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b9a06185 | 1 | /* Register renaming for the GNU compiler. |
3072d30e | 2 | Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 |
ada8adad | 3 | Free Software Foundation, Inc. |
b9a06185 | 4 | |
f12b58b3 | 5 | This file is part of GCC. |
b9a06185 | 6 | |
f12b58b3 | 7 | GCC is free software; you can redistribute it and/or modify it |
8 | under the terms of the GNU General Public License as published by | |
b9a06185 | 9 | the Free Software Foundation; either version 2, or (at your option) |
10 | any later version. | |
11 | ||
f12b58b3 | 12 | GCC is distributed in the hope that it will be useful, but WITHOUT |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
b9a06185 | 16 | |
17 | You should have received a copy of the GNU General Public License | |
f12b58b3 | 18 | along with GCC; see the file COPYING. If not, write to the Free |
67ce556b | 19 | Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA |
20 | 02110-1301, USA. */ | |
b9a06185 | 21 | |
22 | #include "config.h" | |
23 | #include "system.h" | |
805e22b2 | 24 | #include "coretypes.h" |
25 | #include "tm.h" | |
b9a06185 | 26 | #include "rtl.h" |
1140e77e | 27 | #include "tm_p.h" |
b9a06185 | 28 | #include "insn-config.h" |
29 | #include "regs.h" | |
00cb30dc | 30 | #include "addresses.h" |
1140e77e | 31 | #include "hard-reg-set.h" |
32 | #include "basic-block.h" | |
33 | #include "reload.h" | |
b9a06185 | 34 | #include "output.h" |
35 | #include "function.h" | |
36 | #include "recog.h" | |
1140e77e | 37 | #include "flags.h" |
298a9306 | 38 | #include "toplev.h" |
1140e77e | 39 | #include "obstack.h" |
77fce4cd | 40 | #include "timevar.h" |
41 | #include "tree-pass.h" | |
3072d30e | 42 | #include "df.h" |
1140e77e | 43 | |
1140e77e | 44 | struct du_chain |
b9a06185 | 45 | { |
1140e77e | 46 | struct du_chain *next_chain; |
47 | struct du_chain *next_use; | |
b9a06185 | 48 | |
1140e77e | 49 | rtx insn; |
50 | rtx *loc; | |
e916c70c | 51 | ENUM_BITFIELD(reg_class) cl : 16; |
1140e77e | 52 | unsigned int need_caller_save_reg:1; |
d5dfb455 | 53 | unsigned int earlyclobber:1; |
1140e77e | 54 | }; |
b9a06185 | 55 | |
1140e77e | 56 | enum scan_actions |
57 | { | |
1140e77e | 58 | terminate_all_read, |
59 | terminate_overlapping_read, | |
60 | terminate_write, | |
61 | terminate_dead, | |
62 | mark_read, | |
b9d576f5 | 63 | mark_write, |
64 | /* mark_access is for marking the destination regs in | |
65 | REG_FRAME_RELATED_EXPR notes (as if they were read) so that the | |
66 | note is updated properly. */ | |
67 | mark_access | |
1140e77e | 68 | }; |
69 | ||
70 | static const char * const scan_actions_name[] = | |
71 | { | |
1140e77e | 72 | "terminate_all_read", |
73 | "terminate_overlapping_read", | |
74 | "terminate_write", | |
75 | "terminate_dead", | |
76 | "mark_read", | |
b9d576f5 | 77 | "mark_write", |
78 | "mark_access" | |
1140e77e | 79 | }; |
80 | ||
81 | static struct obstack rename_obstack; | |
82 | ||
3ad4992f | 83 | static void do_replace (struct du_chain *, int); |
84 | static void scan_rtx_reg (rtx, rtx *, enum reg_class, | |
85 | enum scan_actions, enum op_type, int); | |
86 | static void scan_rtx_address (rtx, rtx *, enum reg_class, | |
87 | enum scan_actions, enum machine_mode); | |
88 | static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions, | |
89 | enum op_type, int); | |
90 | static struct du_chain *build_def_use (basic_block); | |
91 | static void dump_def_use_chain (struct du_chain *); | |
92 | static void note_sets (rtx, rtx, void *); | |
93 | static void clear_dead_regs (HARD_REG_SET *, enum machine_mode, rtx); | |
94 | static void merge_overlapping_regs (basic_block, HARD_REG_SET *, | |
95 | struct du_chain *); | |
d5dfb455 | 96 | |
3072d30e | 97 | /* Called through note_stores. Find sets of registers, and |
d5dfb455 | 98 | record them in *DATA (which is actually a HARD_REG_SET *). */ |
99 | ||
100 | static void | |
3ad4992f | 101 | note_sets (rtx x, rtx set ATTRIBUTE_UNUSED, void *data) |
d5dfb455 | 102 | { |
103 | HARD_REG_SET *pset = (HARD_REG_SET *) data; | |
feb90512 | 104 | |
105 | if (GET_CODE (x) == SUBREG) | |
106 | x = SUBREG_REG (x); | |
8ad4c111 | 107 | if (!REG_P (x)) |
d5dfb455 | 108 | return; |
b2920130 | 109 | /* There must not be pseudos at this point. */ |
a2c6f0b7 | 110 | gcc_assert (HARD_REGISTER_P (x)); |
111 | add_to_hard_reg_set (pset, GET_MODE (x), REGNO (x)); | |
d5dfb455 | 112 | } |
113 | ||
114 | /* Clear all registers from *PSET for which a note of kind KIND can be found | |
115 | in the list NOTES. */ | |
116 | ||
117 | static void | |
3ad4992f | 118 | clear_dead_regs (HARD_REG_SET *pset, enum machine_mode kind, rtx notes) |
d5dfb455 | 119 | { |
120 | rtx note; | |
121 | for (note = notes; note; note = XEXP (note, 1)) | |
122 | if (REG_NOTE_KIND (note) == kind && REG_P (XEXP (note, 0))) | |
123 | { | |
124 | rtx reg = XEXP (note, 0); | |
b2920130 | 125 | /* There must not be pseudos at this point. */ |
a2c6f0b7 | 126 | gcc_assert (HARD_REGISTER_P (reg)); |
127 | remove_from_hard_reg_set (pset, GET_MODE (reg), REGNO (reg)); | |
d5dfb455 | 128 | } |
129 | } | |
130 | ||
131 | /* For a def-use chain CHAIN in basic block B, find which registers overlap | |
132 | its lifetime and set the corresponding bits in *PSET. */ | |
133 | ||
134 | static void | |
3ad4992f | 135 | merge_overlapping_regs (basic_block b, HARD_REG_SET *pset, |
136 | struct du_chain *chain) | |
d5dfb455 | 137 | { |
138 | struct du_chain *t = chain; | |
139 | rtx insn; | |
140 | HARD_REG_SET live; | |
141 | ||
3072d30e | 142 | REG_SET_TO_HARD_REG_SET (live, DF_LIVE_IN (b)); |
5496dbfc | 143 | insn = BB_HEAD (b); |
d5dfb455 | 144 | while (t) |
145 | { | |
146 | /* Search forward until the next reference to the register to be | |
147 | renamed. */ | |
148 | while (insn != t->insn) | |
149 | { | |
150 | if (INSN_P (insn)) | |
151 | { | |
152 | clear_dead_regs (&live, REG_DEAD, REG_NOTES (insn)); | |
153 | note_stores (PATTERN (insn), note_sets, (void *) &live); | |
154 | /* Only record currently live regs if we are inside the | |
155 | reg's live range. */ | |
156 | if (t != chain) | |
157 | IOR_HARD_REG_SET (*pset, live); | |
709c2f34 | 158 | clear_dead_regs (&live, REG_UNUSED, REG_NOTES (insn)); |
d5dfb455 | 159 | } |
160 | insn = NEXT_INSN (insn); | |
161 | } | |
162 | ||
163 | IOR_HARD_REG_SET (*pset, live); | |
164 | ||
165 | /* For the last reference, also merge in all registers set in the | |
166 | same insn. | |
167 | @@@ We only have take earlyclobbered sets into account. */ | |
168 | if (! t->next_use) | |
169 | note_stores (PATTERN (insn), note_sets, (void *) pset); | |
170 | ||
171 | t = t->next_use; | |
172 | } | |
173 | } | |
174 | ||
175 | /* Perform register renaming on the current function. */ | |
b9a06185 | 176 | |
6cf81841 | 177 | static void |
3ad4992f | 178 | regrename_optimize (void) |
1140e77e | 179 | { |
d5dfb455 | 180 | int tick[FIRST_PSEUDO_REGISTER]; |
181 | int this_tick = 0; | |
4c26117a | 182 | basic_block bb; |
1140e77e | 183 | char *first_obj; |
b9a06185 | 184 | |
3072d30e | 185 | df_set_flags (DF_LR_RUN_DCE); |
186 | df_note_add_problem (); | |
187 | df_analyze (); | |
188 | df_set_flags (DF_NO_INSN_RESCAN); | |
189 | ||
d5dfb455 | 190 | memset (tick, 0, sizeof tick); |
191 | ||
1140e77e | 192 | gcc_obstack_init (&rename_obstack); |
f0af5a88 | 193 | first_obj = obstack_alloc (&rename_obstack, 0); |
b9a06185 | 194 | |
4c26117a | 195 | FOR_EACH_BB (bb) |
1140e77e | 196 | { |
1140e77e | 197 | struct du_chain *all_chains = 0; |
1140e77e | 198 | HARD_REG_SET unavailable; |
199 | HARD_REG_SET regs_seen; | |
b9a06185 | 200 | |
1140e77e | 201 | CLEAR_HARD_REG_SET (unavailable); |
b9a06185 | 202 | |
450d042a | 203 | if (dump_file) |
204 | fprintf (dump_file, "\nBasic block %d:\n", bb->index); | |
b9a06185 | 205 | |
d5dfb455 | 206 | all_chains = build_def_use (bb); |
b9a06185 | 207 | |
450d042a | 208 | if (dump_file) |
1140e77e | 209 | dump_def_use_chain (all_chains); |
b9a06185 | 210 | |
d5dfb455 | 211 | CLEAR_HARD_REG_SET (unavailable); |
1140e77e | 212 | /* Don't clobber traceback for noreturn functions. */ |
213 | if (frame_pointer_needed) | |
214 | { | |
a2c6f0b7 | 215 | add_to_hard_reg_set (&unavailable, Pmode, FRAME_POINTER_REGNUM); |
1140e77e | 216 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
a2c6f0b7 | 217 | add_to_hard_reg_set (&unavailable, Pmode, HARD_FRAME_POINTER_REGNUM); |
1140e77e | 218 | #endif |
219 | } | |
b9a06185 | 220 | |
1140e77e | 221 | CLEAR_HARD_REG_SET (regs_seen); |
222 | while (all_chains) | |
223 | { | |
eeb4a70e | 224 | int new_reg, best_new_reg; |
1140e77e | 225 | int n_uses; |
226 | struct du_chain *this = all_chains; | |
227 | struct du_chain *tmp, *last; | |
228 | HARD_REG_SET this_unavailable; | |
68ec8b7d | 229 | int reg = REGNO (*this->loc); |
1f6f74af | 230 | int i; |
b9a06185 | 231 | |
1140e77e | 232 | all_chains = this->next_chain; |
709c2f34 | 233 | |
eeb4a70e | 234 | best_new_reg = reg; |
235 | ||
d5dfb455 | 236 | #if 0 /* This just disables optimization opportunities. */ |
1140e77e | 237 | /* Only rename once we've seen the reg more than once. */ |
238 | if (! TEST_HARD_REG_BIT (regs_seen, reg)) | |
d98fed9f | 239 | { |
1140e77e | 240 | SET_HARD_REG_BIT (regs_seen, reg); |
241 | continue; | |
242 | } | |
d5dfb455 | 243 | #endif |
d98fed9f | 244 | |
940fa57f | 245 | if (fixed_regs[reg] || global_regs[reg] |
246 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
247 | || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM) | |
248 | #else | |
249 | || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM) | |
250 | #endif | |
251 | ) | |
1140e77e | 252 | continue; |
d98fed9f | 253 | |
1140e77e | 254 | COPY_HARD_REG_SET (this_unavailable, unavailable); |
d98fed9f | 255 | |
1140e77e | 256 | /* Find last entry on chain (which has the need_caller_save bit), |
257 | count number of uses, and narrow the set of registers we can | |
258 | use for renaming. */ | |
259 | n_uses = 0; | |
260 | for (last = this; last->next_use; last = last->next_use) | |
261 | { | |
262 | n_uses++; | |
263 | IOR_COMPL_HARD_REG_SET (this_unavailable, | |
e916c70c | 264 | reg_class_contents[last->cl]); |
d98fed9f | 265 | } |
1140e77e | 266 | if (n_uses < 1) |
267 | continue; | |
b9a06185 | 268 | |
1140e77e | 269 | IOR_COMPL_HARD_REG_SET (this_unavailable, |
e916c70c | 270 | reg_class_contents[last->cl]); |
b9a06185 | 271 | |
d5dfb455 | 272 | if (this->need_caller_save_reg) |
1140e77e | 273 | IOR_HARD_REG_SET (this_unavailable, call_used_reg_set); |
274 | ||
d5dfb455 | 275 | merge_overlapping_regs (bb, &this_unavailable, this); |
276 | ||
1140e77e | 277 | /* Now potential_regs is a reasonable approximation, let's |
278 | have a closer look at each register still in there. */ | |
68ec8b7d | 279 | for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++) |
d98fed9f | 280 | { |
67d6c12b | 281 | int nregs = hard_regno_nregs[new_reg][GET_MODE (*this->loc)]; |
68ec8b7d | 282 | |
1f6f74af | 283 | for (i = nregs - 1; i >= 0; --i) |
d5dfb455 | 284 | if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i) |
285 | || fixed_regs[new_reg + i] | |
286 | || global_regs[new_reg + i] | |
1f6f74af | 287 | /* Can't use regs which aren't saved by the prologue. */ |
3072d30e | 288 | || (! df_regs_ever_live_p (new_reg + i) |
d5dfb455 | 289 | && ! call_used_regs[new_reg + i]) |
f5100774 | 290 | #ifdef LEAF_REGISTERS |
709c2f34 | 291 | /* We can't use a non-leaf register if we're in a |
f5100774 | 292 | leaf function. */ |
709c2f34 | 293 | || (current_function_is_leaf |
f5100774 | 294 | && !LEAF_REGISTERS[new_reg + i]) |
295 | #endif | |
1140e77e | 296 | #ifdef HARD_REGNO_RENAME_OK |
d5dfb455 | 297 | || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i) |
1140e77e | 298 | #endif |
1f6f74af | 299 | ) |
300 | break; | |
301 | if (i >= 0) | |
1140e77e | 302 | continue; |
d98fed9f | 303 | |
1f6f74af | 304 | /* See whether it accepts all modes that occur in |
305 | definition and uses. */ | |
1140e77e | 306 | for (tmp = this; tmp; tmp = tmp->next_use) |
5ee24cd9 | 307 | if (! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc)) |
308 | || (tmp->need_caller_save_reg | |
309 | && ! (HARD_REGNO_CALL_PART_CLOBBERED | |
310 | (reg, GET_MODE (*tmp->loc))) | |
311 | && (HARD_REGNO_CALL_PART_CLOBBERED | |
312 | (new_reg, GET_MODE (*tmp->loc))))) | |
1140e77e | 313 | break; |
314 | if (! tmp) | |
d5dfb455 | 315 | { |
eeb4a70e | 316 | if (tick[best_new_reg] > tick[new_reg]) |
d5dfb455 | 317 | best_new_reg = new_reg; |
318 | } | |
d98fed9f | 319 | } |
b9a06185 | 320 | |
450d042a | 321 | if (dump_file) |
1140e77e | 322 | { |
450d042a | 323 | fprintf (dump_file, "Register %s in insn %d", |
1140e77e | 324 | reg_names[reg], INSN_UID (last->insn)); |
325 | if (last->need_caller_save_reg) | |
450d042a | 326 | fprintf (dump_file, " crosses a call"); |
709c2f34 | 327 | } |
d98fed9f | 328 | |
eeb4a70e | 329 | if (best_new_reg == reg) |
1140e77e | 330 | { |
eeb4a70e | 331 | tick[reg] = ++this_tick; |
450d042a | 332 | if (dump_file) |
333 | fprintf (dump_file, "; no available better choice\n"); | |
b9a06185 | 334 | continue; |
1140e77e | 335 | } |
b9a06185 | 336 | |
d5dfb455 | 337 | do_replace (this, best_new_reg); |
eeb4a70e | 338 | tick[best_new_reg] = ++this_tick; |
3072d30e | 339 | df_set_regs_ever_live (best_new_reg, true); |
d98fed9f | 340 | |
450d042a | 341 | if (dump_file) |
342 | fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]); | |
1140e77e | 343 | } |
d98fed9f | 344 | |
1140e77e | 345 | obstack_free (&rename_obstack, first_obj); |
346 | } | |
d98fed9f | 347 | |
1140e77e | 348 | obstack_free (&rename_obstack, NULL); |
3072d30e | 349 | df_clear_flags (DF_NO_INSN_RESCAN); |
350 | df_insn_rescan_all (); | |
b9a06185 | 351 | |
450d042a | 352 | if (dump_file) |
353 | fputc ('\n', dump_file); | |
b9a06185 | 354 | } |
355 | ||
b9a06185 | 356 | static void |
3ad4992f | 357 | do_replace (struct du_chain *chain, int reg) |
b9a06185 | 358 | { |
1140e77e | 359 | while (chain) |
b9a06185 | 360 | { |
22cf44bc | 361 | unsigned int regno = ORIGINAL_REGNO (*chain->loc); |
83d9f776 | 362 | struct reg_attrs * attr = REG_ATTRS (*chain->loc); |
363 | ||
22cf44bc | 364 | *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg); |
940fa57f | 365 | if (regno >= FIRST_PSEUDO_REGISTER) |
366 | ORIGINAL_REGNO (*chain->loc) = regno; | |
83d9f776 | 367 | REG_ATTRS (*chain->loc) = attr; |
1140e77e | 368 | chain = chain->next_use; |
b9a06185 | 369 | } |
b9a06185 | 370 | } |
371 | ||
b9a06185 | 372 | |
1140e77e | 373 | static struct du_chain *open_chains; |
374 | static struct du_chain *closed_chains; | |
375 | ||
376 | static void | |
e916c70c | 377 | scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, |
3ad4992f | 378 | enum scan_actions action, enum op_type type, int earlyclobber) |
b9a06185 | 379 | { |
1140e77e | 380 | struct du_chain **p; |
381 | rtx x = *loc; | |
382 | enum machine_mode mode = GET_MODE (x); | |
383 | int this_regno = REGNO (x); | |
67d6c12b | 384 | int this_nregs = hard_regno_nregs[this_regno][mode]; |
1140e77e | 385 | |
1140e77e | 386 | if (action == mark_write) |
b9a06185 | 387 | { |
1140e77e | 388 | if (type == OP_OUT) |
b9a06185 | 389 | { |
f0af5a88 | 390 | struct du_chain *this |
391 | = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); | |
1140e77e | 392 | this->next_use = 0; |
393 | this->next_chain = open_chains; | |
394 | this->loc = loc; | |
395 | this->insn = insn; | |
e916c70c | 396 | this->cl = cl; |
1140e77e | 397 | this->need_caller_save_reg = 0; |
d5dfb455 | 398 | this->earlyclobber = earlyclobber; |
1140e77e | 399 | open_chains = this; |
b9a06185 | 400 | } |
1140e77e | 401 | return; |
b9a06185 | 402 | } |
d98fed9f | 403 | |
b9d576f5 | 404 | if ((type == OP_OUT) != (action == terminate_write || action == mark_access)) |
1140e77e | 405 | return; |
ceba8bb1 | 406 | |
1140e77e | 407 | for (p = &open_chains; *p;) |
ceba8bb1 | 408 | { |
1140e77e | 409 | struct du_chain *this = *p; |
1140e77e | 410 | |
77b2358d | 411 | /* Check if the chain has been terminated if it has then skip to |
412 | the next chain. | |
1140e77e | 413 | |
77b2358d | 414 | This can happen when we've already appended the location to |
415 | the chain in Step 3, but are trying to hide in-out operands | |
416 | from terminate_write in Step 5. */ | |
ceba8bb1 | 417 | |
77b2358d | 418 | if (*this->loc == cc0_rtx) |
419 | p = &this->next_chain; | |
420 | else | |
709c2f34 | 421 | { |
77b2358d | 422 | int regno = REGNO (*this->loc); |
67d6c12b | 423 | int nregs = hard_regno_nregs[regno][GET_MODE (*this->loc)]; |
77b2358d | 424 | int exact_match = (regno == this_regno && nregs == this_nregs); |
425 | ||
426 | if (regno + nregs <= this_regno | |
427 | || this_regno + this_nregs <= regno) | |
a292cb6e | 428 | { |
429 | p = &this->next_chain; | |
430 | continue; | |
431 | } | |
432 | ||
b9d576f5 | 433 | if (action == mark_read || action == mark_access) |
1140e77e | 434 | { |
04e579b6 | 435 | gcc_assert (exact_match); |
77b2358d | 436 | |
709c2f34 | 437 | /* ??? Class NO_REGS can happen if the md file makes use of |
a292cb6e | 438 | EXTRA_CONSTRAINTS to match registers. Which is arguably |
439 | wrong, but there we are. Since we know not what this may | |
440 | be replaced with, terminate the chain. */ | |
e916c70c | 441 | if (cl != NO_REGS) |
a292cb6e | 442 | { |
f0af5a88 | 443 | this = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); |
d5dfb455 | 444 | this->next_use = 0; |
a292cb6e | 445 | this->next_chain = (*p)->next_chain; |
446 | this->loc = loc; | |
447 | this->insn = insn; | |
e916c70c | 448 | this->cl = cl; |
a292cb6e | 449 | this->need_caller_save_reg = 0; |
d5dfb455 | 450 | while (*p) |
451 | p = &(*p)->next_use; | |
a292cb6e | 452 | *p = this; |
453 | return; | |
454 | } | |
1140e77e | 455 | } |
a292cb6e | 456 | |
457 | if (action != terminate_overlapping_read || ! exact_match) | |
1140e77e | 458 | { |
77b2358d | 459 | struct du_chain *next = this->next_chain; |
460 | ||
461 | /* Whether the terminated chain can be used for renaming | |
462 | depends on the action and this being an exact match. | |
463 | In either case, we remove this element from open_chains. */ | |
464 | ||
465 | if ((action == terminate_dead || action == terminate_write) | |
466 | && exact_match) | |
467 | { | |
468 | this->next_chain = closed_chains; | |
469 | closed_chains = this; | |
450d042a | 470 | if (dump_file) |
471 | fprintf (dump_file, | |
77b2358d | 472 | "Closing chain %s at insn %d (%s)\n", |
473 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
474 | scan_actions_name[(int) action]); | |
475 | } | |
476 | else | |
477 | { | |
450d042a | 478 | if (dump_file) |
479 | fprintf (dump_file, | |
77b2358d | 480 | "Discarding chain %s at insn %d (%s)\n", |
481 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
482 | scan_actions_name[(int) action]); | |
483 | } | |
484 | *p = next; | |
1140e77e | 485 | } |
77b2358d | 486 | else |
487 | p = &this->next_chain; | |
1140e77e | 488 | } |
1140e77e | 489 | } |
b9a06185 | 490 | } |
491 | ||
e916c70c | 492 | /* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or |
1140e77e | 493 | BASE_REG_CLASS depending on how the register is being considered. */ |
b9a06185 | 494 | |
31659b75 | 495 | static void |
e916c70c | 496 | scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, |
3ad4992f | 497 | enum scan_actions action, enum machine_mode mode) |
b9a06185 | 498 | { |
1140e77e | 499 | rtx x = *loc; |
500 | RTX_CODE code = GET_CODE (x); | |
501 | const char *fmt; | |
502 | int i, j; | |
b9a06185 | 503 | |
b9d576f5 | 504 | if (action == mark_write || action == mark_access) |
1140e77e | 505 | return; |
b9a06185 | 506 | |
1140e77e | 507 | switch (code) |
b9a06185 | 508 | { |
1140e77e | 509 | case PLUS: |
510 | { | |
511 | rtx orig_op0 = XEXP (x, 0); | |
512 | rtx orig_op1 = XEXP (x, 1); | |
513 | RTX_CODE code0 = GET_CODE (orig_op0); | |
514 | RTX_CODE code1 = GET_CODE (orig_op1); | |
515 | rtx op0 = orig_op0; | |
516 | rtx op1 = orig_op1; | |
517 | rtx *locI = NULL; | |
518 | rtx *locB = NULL; | |
260988c8 | 519 | enum rtx_code index_code = SCRATCH; |
1140e77e | 520 | |
521 | if (GET_CODE (op0) == SUBREG) | |
522 | { | |
523 | op0 = SUBREG_REG (op0); | |
524 | code0 = GET_CODE (op0); | |
525 | } | |
b9a06185 | 526 | |
1140e77e | 527 | if (GET_CODE (op1) == SUBREG) |
528 | { | |
529 | op1 = SUBREG_REG (op1); | |
530 | code1 = GET_CODE (op1); | |
531 | } | |
b9a06185 | 532 | |
1140e77e | 533 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE |
534 | || code0 == ZERO_EXTEND || code1 == MEM) | |
535 | { | |
536 | locI = &XEXP (x, 0); | |
537 | locB = &XEXP (x, 1); | |
00cb30dc | 538 | index_code = GET_CODE (*locI); |
1140e77e | 539 | } |
540 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
541 | || code1 == ZERO_EXTEND || code0 == MEM) | |
542 | { | |
543 | locI = &XEXP (x, 1); | |
544 | locB = &XEXP (x, 0); | |
00cb30dc | 545 | index_code = GET_CODE (*locI); |
1140e77e | 546 | } |
547 | else if (code0 == CONST_INT || code0 == CONST | |
548 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
00cb30dc | 549 | { |
550 | locB = &XEXP (x, 1); | |
551 | index_code = GET_CODE (XEXP (x, 0)); | |
552 | } | |
1140e77e | 553 | else if (code1 == CONST_INT || code1 == CONST |
554 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
00cb30dc | 555 | { |
556 | locB = &XEXP (x, 0); | |
557 | index_code = GET_CODE (XEXP (x, 1)); | |
558 | } | |
1140e77e | 559 | else if (code0 == REG && code1 == REG) |
560 | { | |
561 | int index_op; | |
00cb30dc | 562 | unsigned regno0 = REGNO (op0), regno1 = REGNO (op1); |
1140e77e | 563 | |
00cb30dc | 564 | if (REGNO_OK_FOR_INDEX_P (regno0) |
565 | && regno_ok_for_base_p (regno1, mode, PLUS, REG)) | |
1140e77e | 566 | index_op = 0; |
00cb30dc | 567 | else if (REGNO_OK_FOR_INDEX_P (regno1) |
568 | && regno_ok_for_base_p (regno0, mode, PLUS, REG)) | |
1140e77e | 569 | index_op = 1; |
00cb30dc | 570 | else if (regno_ok_for_base_p (regno1, mode, PLUS, REG)) |
1140e77e | 571 | index_op = 0; |
00cb30dc | 572 | else if (regno_ok_for_base_p (regno0, mode, PLUS, REG)) |
1140e77e | 573 | index_op = 1; |
00cb30dc | 574 | else if (REGNO_OK_FOR_INDEX_P (regno1)) |
1140e77e | 575 | index_op = 1; |
576 | else | |
577 | index_op = 0; | |
578 | ||
579 | locI = &XEXP (x, index_op); | |
00cb30dc | 580 | locB = &XEXP (x, !index_op); |
581 | index_code = GET_CODE (*locI); | |
1140e77e | 582 | } |
583 | else if (code0 == REG) | |
584 | { | |
585 | locI = &XEXP (x, 0); | |
586 | locB = &XEXP (x, 1); | |
00cb30dc | 587 | index_code = GET_CODE (*locI); |
1140e77e | 588 | } |
589 | else if (code1 == REG) | |
590 | { | |
591 | locI = &XEXP (x, 1); | |
592 | locB = &XEXP (x, 0); | |
00cb30dc | 593 | index_code = GET_CODE (*locI); |
1140e77e | 594 | } |
b9a06185 | 595 | |
1140e77e | 596 | if (locI) |
1f6f74af | 597 | scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode); |
1140e77e | 598 | if (locB) |
00cb30dc | 599 | scan_rtx_address (insn, locB, base_reg_class (mode, PLUS, index_code), |
6006f9fd | 600 | action, mode); |
00cb30dc | 601 | |
1140e77e | 602 | return; |
603 | } | |
b9a06185 | 604 | |
1140e77e | 605 | case POST_INC: |
606 | case POST_DEC: | |
607 | case POST_MODIFY: | |
608 | case PRE_INC: | |
609 | case PRE_DEC: | |
610 | case PRE_MODIFY: | |
611 | #ifndef AUTO_INC_DEC | |
8f758362 | 612 | /* If the target doesn't claim to handle autoinc, this must be |
613 | something special, like a stack push. Kill this chain. */ | |
614 | action = terminate_all_read; | |
1140e77e | 615 | #endif |
616 | break; | |
b9a06185 | 617 | |
1140e77e | 618 | case MEM: |
2e6d14e8 | 619 | scan_rtx_address (insn, &XEXP (x, 0), |
00cb30dc | 620 | base_reg_class (GET_MODE (x), MEM, SCRATCH), action, |
1f6f74af | 621 | GET_MODE (x)); |
1140e77e | 622 | return; |
d98fed9f | 623 | |
1140e77e | 624 | case REG: |
e916c70c | 625 | scan_rtx_reg (insn, loc, cl, action, OP_IN, 0); |
31659b75 | 626 | return; |
d98fed9f | 627 | |
1140e77e | 628 | default: |
629 | break; | |
31659b75 | 630 | } |
1140e77e | 631 | |
632 | fmt = GET_RTX_FORMAT (code); | |
633 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
31659b75 | 634 | { |
1140e77e | 635 | if (fmt[i] == 'e') |
e916c70c | 636 | scan_rtx_address (insn, &XEXP (x, i), cl, action, mode); |
1140e77e | 637 | else if (fmt[i] == 'E') |
638 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e916c70c | 639 | scan_rtx_address (insn, &XVECEXP (x, i, j), cl, action, mode); |
31659b75 | 640 | } |
b9a06185 | 641 | } |
642 | ||
1140e77e | 643 | static void |
e916c70c | 644 | scan_rtx (rtx insn, rtx *loc, enum reg_class cl, |
3ad4992f | 645 | enum scan_actions action, enum op_type type, int earlyclobber) |
b9a06185 | 646 | { |
1140e77e | 647 | const char *fmt; |
648 | rtx x = *loc; | |
649 | enum rtx_code code = GET_CODE (x); | |
650 | int i, j; | |
b9a06185 | 651 | |
1140e77e | 652 | code = GET_CODE (x); |
653 | switch (code) | |
b9a06185 | 654 | { |
1140e77e | 655 | case CONST: |
656 | case CONST_INT: | |
657 | case CONST_DOUBLE: | |
886cfd4f | 658 | case CONST_VECTOR: |
1140e77e | 659 | case SYMBOL_REF: |
660 | case LABEL_REF: | |
661 | case CC0: | |
662 | case PC: | |
663 | return; | |
22d9265e | 664 | |
1140e77e | 665 | case REG: |
e916c70c | 666 | scan_rtx_reg (insn, loc, cl, action, type, earlyclobber); |
1140e77e | 667 | return; |
b9a06185 | 668 | |
1140e77e | 669 | case MEM: |
2e6d14e8 | 670 | scan_rtx_address (insn, &XEXP (x, 0), |
00cb30dc | 671 | base_reg_class (GET_MODE (x), MEM, SCRATCH), action, |
1f6f74af | 672 | GET_MODE (x)); |
1140e77e | 673 | return; |
b9a06185 | 674 | |
1140e77e | 675 | case SET: |
e916c70c | 676 | scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN, 0); |
72ab6a85 | 677 | scan_rtx (insn, &SET_DEST (x), cl, action, |
678 | GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0); | |
1140e77e | 679 | return; |
b9a06185 | 680 | |
1140e77e | 681 | case STRICT_LOW_PART: |
e916c70c | 682 | scan_rtx (insn, &XEXP (x, 0), cl, action, OP_INOUT, earlyclobber); |
1140e77e | 683 | return; |
b9a06185 | 684 | |
1140e77e | 685 | case ZERO_EXTRACT: |
709c2f34 | 686 | case SIGN_EXTRACT: |
e916c70c | 687 | scan_rtx (insn, &XEXP (x, 0), cl, action, |
d5dfb455 | 688 | type == OP_IN ? OP_IN : OP_INOUT, earlyclobber); |
e916c70c | 689 | scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN, 0); |
690 | scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN, 0); | |
1140e77e | 691 | return; |
b9a06185 | 692 | |
1140e77e | 693 | case POST_INC: |
694 | case PRE_INC: | |
695 | case POST_DEC: | |
696 | case PRE_DEC: | |
697 | case POST_MODIFY: | |
698 | case PRE_MODIFY: | |
699 | /* Should only happen inside MEM. */ | |
04e579b6 | 700 | gcc_unreachable (); |
1140e77e | 701 | |
702 | case CLOBBER: | |
72ab6a85 | 703 | scan_rtx (insn, &SET_DEST (x), cl, action, |
704 | GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0); | |
1140e77e | 705 | return; |
b9a06185 | 706 | |
1140e77e | 707 | case EXPR_LIST: |
e916c70c | 708 | scan_rtx (insn, &XEXP (x, 0), cl, action, type, 0); |
1140e77e | 709 | if (XEXP (x, 1)) |
e916c70c | 710 | scan_rtx (insn, &XEXP (x, 1), cl, action, type, 0); |
1140e77e | 711 | return; |
b9a06185 | 712 | |
1140e77e | 713 | default: |
714 | break; | |
715 | } | |
b9a06185 | 716 | |
1140e77e | 717 | fmt = GET_RTX_FORMAT (code); |
718 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
b9a06185 | 719 | { |
720 | if (fmt[i] == 'e') | |
e916c70c | 721 | scan_rtx (insn, &XEXP (x, i), cl, action, type, 0); |
b9a06185 | 722 | else if (fmt[i] == 'E') |
723 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e916c70c | 724 | scan_rtx (insn, &XVECEXP (x, i, j), cl, action, type, 0); |
b9a06185 | 725 | } |
b9a06185 | 726 | } |
727 | ||
45498ea1 | 728 | /* Build def/use chain. */ |
b9a06185 | 729 | |
1140e77e | 730 | static struct du_chain * |
3ad4992f | 731 | build_def_use (basic_block bb) |
b9a06185 | 732 | { |
1140e77e | 733 | rtx insn; |
d98fed9f | 734 | |
1140e77e | 735 | open_chains = closed_chains = NULL; |
d98fed9f | 736 | |
5496dbfc | 737 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
1140e77e | 738 | { |
739 | if (INSN_P (insn)) | |
740 | { | |
741 | int n_ops; | |
742 | rtx note; | |
743 | rtx old_operands[MAX_RECOG_OPERANDS]; | |
744 | rtx old_dups[MAX_DUP_OPERANDS]; | |
eff62531 | 745 | int i, icode; |
1140e77e | 746 | int alt; |
747 | int predicated; | |
748 | ||
1140e77e | 749 | /* Process the insn, determining its effect on the def-use |
750 | chains. We perform the following steps with the register | |
751 | references in the insn: | |
752 | (1) Any read that overlaps an open chain, but doesn't exactly | |
753 | match, causes that chain to be closed. We can't deal | |
754 | with overlaps yet. | |
755 | (2) Any read outside an operand causes any chain it overlaps | |
756 | with to be closed, since we can't replace it. | |
757 | (3) Any read inside an operand is added if there's already | |
758 | an open chain for it. | |
759 | (4) For any REG_DEAD note we find, close open chains that | |
760 | overlap it. | |
761 | (5) For any write we find, close open chains that overlap it. | |
762 | (6) For any write we find in an operand, make a new chain. | |
763 | (7) For any REG_UNUSED, close any chains we just opened. */ | |
764 | ||
1172d780 | 765 | icode = recog_memoized (insn); |
1140e77e | 766 | extract_insn (insn); |
caeae6e1 | 767 | if (! constrain_operands (1)) |
709c2f34 | 768 | fatal_insn_not_found (insn); |
1140e77e | 769 | preprocess_constraints (); |
770 | alt = which_alternative; | |
771 | n_ops = recog_data.n_operands; | |
772 | ||
773 | /* Simplify the code below by rewriting things to reflect | |
774 | matching constraints. Also promote OP_OUT to OP_INOUT | |
775 | in predicated instructions. */ | |
776 | ||
777 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
778 | for (i = 0; i < n_ops; ++i) | |
b9a06185 | 779 | { |
1140e77e | 780 | int matches = recog_op_alt[i][alt].matches; |
781 | if (matches >= 0) | |
e916c70c | 782 | recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; |
1140e77e | 783 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 |
784 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
785 | recog_data.operand_type[i] = OP_INOUT; | |
b9a06185 | 786 | } |
d98fed9f | 787 | |
1140e77e | 788 | /* Step 1: Close chains for which we have overlapping reads. */ |
789 | for (i = 0; i < n_ops; i++) | |
790 | scan_rtx (insn, recog_data.operand_loc[i], | |
791 | NO_REGS, terminate_overlapping_read, | |
d5dfb455 | 792 | recog_data.operand_type[i], 0); |
d98fed9f | 793 | |
1140e77e | 794 | /* Step 2: Close chains for which we have reads outside operands. |
709c2f34 | 795 | We do this by munging all operands into CC0, and closing |
1140e77e | 796 | everything remaining. */ |
b9a06185 | 797 | |
1140e77e | 798 | for (i = 0; i < n_ops; i++) |
d98fed9f | 799 | { |
1140e77e | 800 | old_operands[i] = recog_data.operand[i]; |
801 | /* Don't squash match_operator or match_parallel here, since | |
709c2f34 | 802 | we don't know that all of the contained registers are |
1140e77e | 803 | reachable by proper operands. */ |
804 | if (recog_data.constraints[i][0] == '\0') | |
805 | continue; | |
806 | *recog_data.operand_loc[i] = cc0_rtx; | |
807 | } | |
808 | for (i = 0; i < recog_data.n_dups; i++) | |
809 | { | |
eff62531 | 810 | int dup_num = recog_data.dup_num[i]; |
811 | ||
1140e77e | 812 | old_dups[i] = *recog_data.dup_loc[i]; |
813 | *recog_data.dup_loc[i] = cc0_rtx; | |
eff62531 | 814 | |
815 | /* For match_dup of match_operator or match_parallel, share | |
816 | them, so that we don't miss changes in the dup. */ | |
817 | if (icode >= 0 | |
818 | && insn_data[icode].operand[dup_num].eliminable == 0) | |
819 | old_dups[i] = recog_data.operand[dup_num]; | |
d98fed9f | 820 | } |
d98fed9f | 821 | |
d5dfb455 | 822 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_all_read, |
823 | OP_IN, 0); | |
d98fed9f | 824 | |
1140e77e | 825 | for (i = 0; i < recog_data.n_dups; i++) |
826 | *recog_data.dup_loc[i] = old_dups[i]; | |
827 | for (i = 0; i < n_ops; i++) | |
828 | *recog_data.operand_loc[i] = old_operands[i]; | |
b9a06185 | 829 | |
1140e77e | 830 | /* Step 2B: Can't rename function call argument registers. */ |
6d7dc5b9 | 831 | if (CALL_P (insn) && CALL_INSN_FUNCTION_USAGE (insn)) |
1140e77e | 832 | scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn), |
d5dfb455 | 833 | NO_REGS, terminate_all_read, OP_IN, 0); |
b9a06185 | 834 | |
a68730c1 | 835 | /* Step 2C: Can't rename asm operands that were originally |
836 | hard registers. */ | |
837 | if (asm_noperands (PATTERN (insn)) > 0) | |
838 | for (i = 0; i < n_ops; i++) | |
839 | { | |
840 | rtx *loc = recog_data.operand_loc[i]; | |
841 | rtx op = *loc; | |
842 | ||
8ad4c111 | 843 | if (REG_P (op) |
a68730c1 | 844 | && REGNO (op) == ORIGINAL_REGNO (op) |
845 | && (recog_data.operand_type[i] == OP_IN | |
846 | || recog_data.operand_type[i] == OP_INOUT)) | |
847 | scan_rtx (insn, loc, NO_REGS, terminate_all_read, OP_IN, 0); | |
848 | } | |
849 | ||
1140e77e | 850 | /* Step 3: Append to chains for reads inside operands. */ |
851 | for (i = 0; i < n_ops + recog_data.n_dups; i++) | |
852 | { | |
853 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
854 | rtx *loc = (i < n_ops | |
855 | ? recog_data.operand_loc[opn] | |
856 | : recog_data.dup_loc[i - n_ops]); | |
e916c70c | 857 | enum reg_class cl = recog_op_alt[opn][alt].cl; |
1140e77e | 858 | enum op_type type = recog_data.operand_type[opn]; |
859 | ||
860 | /* Don't scan match_operand here, since we've no reg class | |
861 | information to pass down. Any operands that we could | |
862 | substitute in will be represented elsewhere. */ | |
863 | if (recog_data.constraints[opn][0] == '\0') | |
864 | continue; | |
b9a06185 | 865 | |
1140e77e | 866 | if (recog_op_alt[opn][alt].is_address) |
e916c70c | 867 | scan_rtx_address (insn, loc, cl, mark_read, VOIDmode); |
1140e77e | 868 | else |
e916c70c | 869 | scan_rtx (insn, loc, cl, mark_read, type, 0); |
1140e77e | 870 | } |
b9a06185 | 871 | |
b9d576f5 | 872 | /* Step 3B: Record updates for regs in REG_INC notes, and |
873 | source regs in REG_FRAME_RELATED_EXPR notes. */ | |
1140e77e | 874 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
b9d576f5 | 875 | if (REG_NOTE_KIND (note) == REG_INC |
876 | || REG_NOTE_KIND (note) == REG_FRAME_RELATED_EXPR) | |
877 | scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read, | |
878 | OP_INOUT, 0); | |
879 | ||
880 | /* Step 4: Close chains for registers that die here. */ | |
881 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
882 | if (REG_NOTE_KIND (note) == REG_DEAD) | |
883 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, | |
884 | OP_IN, 0); | |
d98fed9f | 885 | |
1140e77e | 886 | /* Step 4B: If this is a call, any chain live at this point |
887 | requires a caller-saved reg. */ | |
6d7dc5b9 | 888 | if (CALL_P (insn)) |
1140e77e | 889 | { |
890 | struct du_chain *p; | |
891 | for (p = open_chains; p; p = p->next_chain) | |
d5dfb455 | 892 | p->need_caller_save_reg = 1; |
1140e77e | 893 | } |
b9a06185 | 894 | |
1140e77e | 895 | /* Step 5: Close open chains that overlap writes. Similar to |
896 | step 2, we hide in-out operands, since we do not want to | |
897 | close these chains. */ | |
b9a06185 | 898 | |
1140e77e | 899 | for (i = 0; i < n_ops; i++) |
900 | { | |
901 | old_operands[i] = recog_data.operand[i]; | |
902 | if (recog_data.operand_type[i] == OP_INOUT) | |
903 | *recog_data.operand_loc[i] = cc0_rtx; | |
904 | } | |
905 | for (i = 0; i < recog_data.n_dups; i++) | |
906 | { | |
907 | int opn = recog_data.dup_num[i]; | |
908 | old_dups[i] = *recog_data.dup_loc[i]; | |
909 | if (recog_data.operand_type[opn] == OP_INOUT) | |
910 | *recog_data.dup_loc[i] = cc0_rtx; | |
911 | } | |
b9a06185 | 912 | |
d5dfb455 | 913 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN, 0); |
b9a06185 | 914 | |
1140e77e | 915 | for (i = 0; i < recog_data.n_dups; i++) |
916 | *recog_data.dup_loc[i] = old_dups[i]; | |
917 | for (i = 0; i < n_ops; i++) | |
918 | *recog_data.operand_loc[i] = old_operands[i]; | |
b9a06185 | 919 | |
1140e77e | 920 | /* Step 6: Begin new chains for writes inside operands. */ |
921 | /* ??? Many targets have output constraints on the SET_DEST | |
922 | of a call insn, which is stupid, since these are certainly | |
a68730c1 | 923 | ABI defined hard registers. Don't change calls at all. |
924 | Similarly take special care for asm statement that originally | |
925 | referenced hard registers. */ | |
926 | if (asm_noperands (PATTERN (insn)) > 0) | |
927 | { | |
928 | for (i = 0; i < n_ops; i++) | |
929 | if (recog_data.operand_type[i] == OP_OUT) | |
930 | { | |
931 | rtx *loc = recog_data.operand_loc[i]; | |
932 | rtx op = *loc; | |
e916c70c | 933 | enum reg_class cl = recog_op_alt[i][alt].cl; |
a68730c1 | 934 | |
8ad4c111 | 935 | if (REG_P (op) |
709c2f34 | 936 | && REGNO (op) == ORIGINAL_REGNO (op)) |
a68730c1 | 937 | continue; |
938 | ||
e916c70c | 939 | scan_rtx (insn, loc, cl, mark_write, OP_OUT, |
a68730c1 | 940 | recog_op_alt[i][alt].earlyclobber); |
941 | } | |
942 | } | |
6d7dc5b9 | 943 | else if (!CALL_P (insn)) |
1140e77e | 944 | for (i = 0; i < n_ops + recog_data.n_dups; i++) |
945 | { | |
946 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
947 | rtx *loc = (i < n_ops | |
948 | ? recog_data.operand_loc[opn] | |
949 | : recog_data.dup_loc[i - n_ops]); | |
e916c70c | 950 | enum reg_class cl = recog_op_alt[opn][alt].cl; |
1140e77e | 951 | |
952 | if (recog_data.operand_type[opn] == OP_OUT) | |
e916c70c | 953 | scan_rtx (insn, loc, cl, mark_write, OP_OUT, |
d5dfb455 | 954 | recog_op_alt[opn][alt].earlyclobber); |
1140e77e | 955 | } |
b9a06185 | 956 | |
b9d576f5 | 957 | /* Step 6B: Record destination regs in REG_FRAME_RELATED_EXPR |
958 | notes for update. */ | |
959 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
960 | if (REG_NOTE_KIND (note) == REG_FRAME_RELATED_EXPR) | |
961 | scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_access, | |
962 | OP_INOUT, 0); | |
963 | ||
1140e77e | 964 | /* Step 7: Close chains for registers that were never |
965 | really used here. */ | |
966 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
967 | if (REG_NOTE_KIND (note) == REG_UNUSED) | |
d5dfb455 | 968 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, |
969 | OP_IN, 0); | |
1140e77e | 970 | } |
5496dbfc | 971 | if (insn == BB_END (bb)) |
1140e77e | 972 | break; |
973 | } | |
b9a06185 | 974 | |
1140e77e | 975 | /* Since we close every chain when we find a REG_DEAD note, anything that |
976 | is still open lives past the basic block, so it can't be renamed. */ | |
977 | return closed_chains; | |
978 | } | |
b9a06185 | 979 | |
450d042a | 980 | /* Dump all def/use chains in CHAINS to DUMP_FILE. They are |
1140e77e | 981 | printed in reverse order as that's how we build them. */ |
b9a06185 | 982 | |
1140e77e | 983 | static void |
3ad4992f | 984 | dump_def_use_chain (struct du_chain *chains) |
1140e77e | 985 | { |
986 | while (chains) | |
d98fed9f | 987 | { |
1140e77e | 988 | struct du_chain *this = chains; |
989 | int r = REGNO (*this->loc); | |
67d6c12b | 990 | int nregs = hard_regno_nregs[r][GET_MODE (*this->loc)]; |
450d042a | 991 | fprintf (dump_file, "Register %s (%d):", reg_names[r], nregs); |
1140e77e | 992 | while (this) |
993 | { | |
450d042a | 994 | fprintf (dump_file, " %d [%s]", INSN_UID (this->insn), |
e916c70c | 995 | reg_class_names[this->cl]); |
1140e77e | 996 | this = this->next_use; |
997 | } | |
450d042a | 998 | fprintf (dump_file, "\n"); |
1140e77e | 999 | chains = chains->next_chain; |
d98fed9f | 1000 | } |
b9a06185 | 1001 | } |
298a9306 | 1002 | \f |
1003 | /* The following code does forward propagation of hard register copies. | |
1004 | The object is to eliminate as many dependencies as possible, so that | |
1005 | we have the most scheduling freedom. As a side effect, we also clean | |
709c2f34 | 1006 | up some silly register allocation decisions made by reload. This |
298a9306 | 1007 | code may be obsoleted by a new register allocator. */ |
1008 | ||
1009 | /* For each register, we have a list of registers that contain the same | |
709c2f34 | 1010 | value. The OLDEST_REGNO field points to the head of the list, and |
298a9306 | 1011 | the NEXT_REGNO field runs through the list. The MODE field indicates |
1012 | what mode the data is known to be in; this field is VOIDmode when the | |
1013 | register is not known to contain valid data. */ | |
1014 | ||
1015 | struct value_data_entry | |
1016 | { | |
1017 | enum machine_mode mode; | |
1018 | unsigned int oldest_regno; | |
1019 | unsigned int next_regno; | |
1020 | }; | |
1021 | ||
1022 | struct value_data | |
1023 | { | |
1024 | struct value_data_entry e[FIRST_PSEUDO_REGISTER]; | |
ea82c544 | 1025 | unsigned int max_value_regs; |
298a9306 | 1026 | }; |
1027 | ||
032b6a07 | 1028 | static void kill_value_one_regno (unsigned, struct value_data *); |
1029 | static void kill_value_regno (unsigned, unsigned, struct value_data *); | |
3ad4992f | 1030 | static void kill_value (rtx, struct value_data *); |
1031 | static void set_value_regno (unsigned, enum machine_mode, struct value_data *); | |
1032 | static void init_value_data (struct value_data *); | |
1033 | static void kill_clobbered_value (rtx, rtx, void *); | |
1034 | static void kill_set_value (rtx, rtx, void *); | |
1035 | static int kill_autoinc_value (rtx *, void *); | |
1036 | static void copy_value (rtx, rtx, struct value_data *); | |
1037 | static bool mode_change_ok (enum machine_mode, enum machine_mode, | |
1038 | unsigned int); | |
1039 | static rtx maybe_mode_change (enum machine_mode, enum machine_mode, | |
1040 | enum machine_mode, unsigned int, unsigned int); | |
1041 | static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *); | |
1042 | static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx, | |
1043 | struct value_data *); | |
1044 | static bool replace_oldest_value_addr (rtx *, enum reg_class, | |
1045 | enum machine_mode, rtx, | |
1046 | struct value_data *); | |
1047 | static bool replace_oldest_value_mem (rtx, rtx, struct value_data *); | |
1048 | static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *); | |
1049 | extern void debug_value_data (struct value_data *); | |
298a9306 | 1050 | #ifdef ENABLE_CHECKING |
3ad4992f | 1051 | static void validate_value_data (struct value_data *); |
298a9306 | 1052 | #endif |
1053 | ||
032b6a07 | 1054 | /* Kill register REGNO. This involves removing it from any value |
1055 | lists, and resetting the value mode to VOIDmode. This is only a | |
1056 | helper function; it does not handle any hard registers overlapping | |
1057 | with REGNO. */ | |
298a9306 | 1058 | |
1059 | static void | |
032b6a07 | 1060 | kill_value_one_regno (unsigned int regno, struct value_data *vd) |
298a9306 | 1061 | { |
1062 | unsigned int i, next; | |
1063 | ||
1064 | if (vd->e[regno].oldest_regno != regno) | |
1065 | { | |
1066 | for (i = vd->e[regno].oldest_regno; | |
1067 | vd->e[i].next_regno != regno; | |
1068 | i = vd->e[i].next_regno) | |
1069 | continue; | |
8065af9f | 1070 | vd->e[i].next_regno = vd->e[regno].next_regno; |
298a9306 | 1071 | } |
1072 | else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM) | |
1073 | { | |
1074 | for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno) | |
709c2f34 | 1075 | vd->e[i].oldest_regno = next; |
298a9306 | 1076 | } |
1077 | ||
1078 | vd->e[regno].mode = VOIDmode; | |
1079 | vd->e[regno].oldest_regno = regno; | |
1080 | vd->e[regno].next_regno = INVALID_REGNUM; | |
1081 | ||
1082 | #ifdef ENABLE_CHECKING | |
1083 | validate_value_data (vd); | |
1084 | #endif | |
1085 | } | |
1086 | ||
032b6a07 | 1087 | /* Kill the value in register REGNO for NREGS, and any other registers |
1088 | whose values overlap. */ | |
1089 | ||
1090 | static void | |
90bd6a0a | 1091 | kill_value_regno (unsigned int regno, unsigned int nregs, |
1092 | struct value_data *vd) | |
032b6a07 | 1093 | { |
1094 | unsigned int j; | |
1095 | ||
1096 | /* Kill the value we're told to kill. */ | |
1097 | for (j = 0; j < nregs; ++j) | |
1098 | kill_value_one_regno (regno + j, vd); | |
1099 | ||
1100 | /* Kill everything that overlapped what we're told to kill. */ | |
1101 | if (regno < vd->max_value_regs) | |
1102 | j = 0; | |
1103 | else | |
1104 | j = regno - vd->max_value_regs; | |
1105 | for (; j < regno; ++j) | |
1106 | { | |
1107 | unsigned int i, n; | |
1108 | if (vd->e[j].mode == VOIDmode) | |
1109 | continue; | |
1110 | n = hard_regno_nregs[j][vd->e[j].mode]; | |
1111 | if (j + n > regno) | |
1112 | for (i = 0; i < n; ++i) | |
1113 | kill_value_one_regno (j + i, vd); | |
1114 | } | |
1115 | } | |
1116 | ||
1117 | /* Kill X. This is a convenience function wrapping kill_value_regno | |
8065af9f | 1118 | so that we mind the mode the register is in. */ |
298a9306 | 1119 | |
1120 | static void | |
3ad4992f | 1121 | kill_value (rtx x, struct value_data *vd) |
298a9306 | 1122 | { |
8ade52a4 | 1123 | rtx orig_rtx = x; |
bd6bc33d | 1124 | |
1125 | if (GET_CODE (x) == SUBREG) | |
8ade52a4 | 1126 | { |
1127 | x = simplify_subreg (GET_MODE (x), SUBREG_REG (x), | |
1128 | GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); | |
1129 | if (x == NULL_RTX) | |
1130 | x = SUBREG_REG (orig_rtx); | |
1131 | } | |
298a9306 | 1132 | if (REG_P (x)) |
8065af9f | 1133 | { |
1134 | unsigned int regno = REGNO (x); | |
67d6c12b | 1135 | unsigned int n = hard_regno_nregs[regno][GET_MODE (x)]; |
ea82c544 | 1136 | |
032b6a07 | 1137 | kill_value_regno (regno, n, vd); |
8065af9f | 1138 | } |
298a9306 | 1139 | } |
1140 | ||
ea82c544 | 1141 | /* Remember that REGNO is valid in MODE. */ |
1142 | ||
1143 | static void | |
3ad4992f | 1144 | set_value_regno (unsigned int regno, enum machine_mode mode, |
1145 | struct value_data *vd) | |
ea82c544 | 1146 | { |
1147 | unsigned int nregs; | |
1148 | ||
1149 | vd->e[regno].mode = mode; | |
1150 | ||
67d6c12b | 1151 | nregs = hard_regno_nregs[regno][mode]; |
ea82c544 | 1152 | if (nregs > vd->max_value_regs) |
1153 | vd->max_value_regs = nregs; | |
1154 | } | |
1155 | ||
298a9306 | 1156 | /* Initialize VD such that there are no known relationships between regs. */ |
1157 | ||
1158 | static void | |
3ad4992f | 1159 | init_value_data (struct value_data *vd) |
298a9306 | 1160 | { |
1161 | int i; | |
1162 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1163 | { | |
1164 | vd->e[i].mode = VOIDmode; | |
1165 | vd->e[i].oldest_regno = i; | |
1166 | vd->e[i].next_regno = INVALID_REGNUM; | |
1167 | } | |
ea82c544 | 1168 | vd->max_value_regs = 0; |
298a9306 | 1169 | } |
1170 | ||
1171 | /* Called through note_stores. If X is clobbered, kill its value. */ | |
1172 | ||
1173 | static void | |
3ad4992f | 1174 | kill_clobbered_value (rtx x, rtx set, void *data) |
298a9306 | 1175 | { |
1176 | struct value_data *vd = data; | |
1177 | if (GET_CODE (set) == CLOBBER) | |
1178 | kill_value (x, vd); | |
1179 | } | |
1180 | ||
709c2f34 | 1181 | /* Called through note_stores. If X is set, not clobbered, kill its |
298a9306 | 1182 | current value and install it as the root of its own value list. */ |
1183 | ||
1184 | static void | |
3ad4992f | 1185 | kill_set_value (rtx x, rtx set, void *data) |
298a9306 | 1186 | { |
1187 | struct value_data *vd = data; | |
00e8d5e7 | 1188 | if (GET_CODE (set) != CLOBBER) |
298a9306 | 1189 | { |
8065af9f | 1190 | kill_value (x, vd); |
00e8d5e7 | 1191 | if (REG_P (x)) |
709c2f34 | 1192 | set_value_regno (REGNO (x), GET_MODE (x), vd); |
298a9306 | 1193 | } |
1194 | } | |
1195 | ||
1196 | /* Called through for_each_rtx. Kill any register used as the base of an | |
1197 | auto-increment expression, and install that register as the root of its | |
1198 | own value list. */ | |
1199 | ||
1200 | static int | |
3ad4992f | 1201 | kill_autoinc_value (rtx *px, void *data) |
298a9306 | 1202 | { |
1203 | rtx x = *px; | |
1204 | struct value_data *vd = data; | |
1205 | ||
6720e96c | 1206 | if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC) |
298a9306 | 1207 | { |
8065af9f | 1208 | x = XEXP (x, 0); |
1209 | kill_value (x, vd); | |
ea82c544 | 1210 | set_value_regno (REGNO (x), Pmode, vd); |
298a9306 | 1211 | return -1; |
1212 | } | |
1213 | ||
1214 | return 0; | |
1215 | } | |
1216 | ||
1217 | /* Assert that SRC has been copied to DEST. Adjust the data structures | |
1218 | to reflect that SRC contains an older copy of the shared value. */ | |
1219 | ||
1220 | static void | |
3ad4992f | 1221 | copy_value (rtx dest, rtx src, struct value_data *vd) |
298a9306 | 1222 | { |
1223 | unsigned int dr = REGNO (dest); | |
1224 | unsigned int sr = REGNO (src); | |
e932080c | 1225 | unsigned int dn, sn; |
298a9306 | 1226 | unsigned int i; |
1227 | ||
1228 | /* ??? At present, it's possible to see noop sets. It'd be nice if | |
1229 | this were cleaned up beforehand... */ | |
1230 | if (sr == dr) | |
1231 | return; | |
1232 | ||
1233 | /* Do not propagate copies to the stack pointer, as that can leave | |
c8515df4 | 1234 | memory accesses with no scheduling dependency on the stack update. */ |
298a9306 | 1235 | if (dr == STACK_POINTER_REGNUM) |
1236 | return; | |
1237 | ||
1238 | /* Likewise with the frame pointer, if we're using one. */ | |
1239 | if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM) | |
1240 | return; | |
1241 | ||
f68ab9c5 | 1242 | /* Do not propagate copies to fixed or global registers, patterns |
1243 | can be relying to see particular fixed register or users can | |
1244 | expect the chosen global register in asm. */ | |
b94771d1 | 1245 | if (fixed_regs[dr] || global_regs[dr]) |
1246 | return; | |
1247 | ||
e932080c | 1248 | /* If SRC and DEST overlap, don't record anything. */ |
67d6c12b | 1249 | dn = hard_regno_nregs[dr][GET_MODE (dest)]; |
1250 | sn = hard_regno_nregs[sr][GET_MODE (dest)]; | |
e932080c | 1251 | if ((dr > sr && dr < sr + sn) |
1252 | || (sr > dr && sr < dr + dn)) | |
1253 | return; | |
1254 | ||
298a9306 | 1255 | /* If SRC had no assigned mode (i.e. we didn't know it was live) |
1256 | assign it now and assume the value came from an input argument | |
1257 | or somesuch. */ | |
1258 | if (vd->e[sr].mode == VOIDmode) | |
ea82c544 | 1259 | set_value_regno (sr, vd->e[dr].mode, vd); |
298a9306 | 1260 | |
d30e015b | 1261 | /* If we are narrowing the input to a smaller number of hard regs, |
14a4ccb4 | 1262 | and it is in big endian, we are really extracting a high part. |
1263 | Since we generally associate a low part of a value with the value itself, | |
1264 | we must not do the same for the high part. | |
1265 | Note we can still get low parts for the same mode combination through | |
1266 | a two-step copy involving differently sized hard regs. | |
1267 | Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each: | |
1268 | (set (reg:DI r0) (reg:DI fr0)) | |
1269 | (set (reg:SI fr2) (reg:SI r0)) | |
1270 | loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while: | |
1271 | (set (reg:SI fr2) (reg:SI fr0)) | |
1272 | loads the high part of (reg:DI fr0) into fr2. | |
1273 | ||
1274 | We can't properly represent the latter case in our tables, so don't | |
1275 | record anything then. */ | |
67d6c12b | 1276 | else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode] |
14a4ccb4 | 1277 | && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD |
1278 | ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)) | |
1279 | return; | |
1280 | ||
8a1ef47a | 1281 | /* If SRC had been assigned a mode narrower than the copy, we can't |
1282 | link DEST into the chain, because not all of the pieces of the | |
1283 | copy came from oldest_regno. */ | |
67d6c12b | 1284 | else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]) |
8a1ef47a | 1285 | return; |
1286 | ||
298a9306 | 1287 | /* Link DR at the end of the value chain used by SR. */ |
1288 | ||
1289 | vd->e[dr].oldest_regno = vd->e[sr].oldest_regno; | |
1290 | ||
1291 | for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno) | |
1292 | continue; | |
1293 | vd->e[i].next_regno = dr; | |
1294 | ||
1295 | #ifdef ENABLE_CHECKING | |
1296 | validate_value_data (vd); | |
1297 | #endif | |
1298 | } | |
1299 | ||
709f72ea | 1300 | /* Return true if a mode change from ORIG to NEW is allowed for REGNO. */ |
1301 | ||
1302 | static bool | |
3ad4992f | 1303 | mode_change_ok (enum machine_mode orig_mode, enum machine_mode new_mode, |
1304 | unsigned int regno ATTRIBUTE_UNUSED) | |
709f72ea | 1305 | { |
1306 | if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode)) | |
1307 | return false; | |
1308 | ||
897118e8 | 1309 | #ifdef CANNOT_CHANGE_MODE_CLASS |
1310 | return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode); | |
709f72ea | 1311 | #endif |
1312 | ||
1313 | return true; | |
1314 | } | |
1315 | ||
5018b5cd | 1316 | /* Register REGNO was originally set in ORIG_MODE. It - or a copy of it - |
1317 | was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed | |
1318 | in NEW_MODE. | |
1319 | Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */ | |
1320 | ||
1321 | static rtx | |
3ad4992f | 1322 | maybe_mode_change (enum machine_mode orig_mode, enum machine_mode copy_mode, |
1323 | enum machine_mode new_mode, unsigned int regno, | |
1324 | unsigned int copy_regno ATTRIBUTE_UNUSED) | |
5018b5cd | 1325 | { |
1326 | if (orig_mode == new_mode) | |
1327 | return gen_rtx_raw_REG (new_mode, regno); | |
1328 | else if (mode_change_ok (orig_mode, new_mode, regno)) | |
1329 | { | |
67d6c12b | 1330 | int copy_nregs = hard_regno_nregs[copy_regno][copy_mode]; |
1331 | int use_nregs = hard_regno_nregs[copy_regno][new_mode]; | |
5018b5cd | 1332 | int copy_offset |
1333 | = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs); | |
1334 | int offset | |
1335 | = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset; | |
1336 | int byteoffset = offset % UNITS_PER_WORD; | |
1337 | int wordoffset = offset - byteoffset; | |
1338 | ||
1339 | offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0) | |
1340 | + (BYTES_BIG_ENDIAN ? byteoffset : 0)); | |
1341 | return gen_rtx_raw_REG (new_mode, | |
1342 | regno + subreg_regno_offset (regno, orig_mode, | |
1343 | offset, | |
1344 | new_mode)); | |
1345 | } | |
1346 | return NULL_RTX; | |
1347 | } | |
1348 | ||
298a9306 | 1349 | /* Find the oldest copy of the value contained in REGNO that is in |
e916c70c | 1350 | register class CL and has mode MODE. If found, return an rtx |
298a9306 | 1351 | of that oldest register, otherwise return NULL. */ |
1352 | ||
1353 | static rtx | |
e916c70c | 1354 | find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd) |
298a9306 | 1355 | { |
a68730c1 | 1356 | unsigned int regno = REGNO (reg); |
1357 | enum machine_mode mode = GET_MODE (reg); | |
298a9306 | 1358 | unsigned int i; |
1359 | ||
6ec4bb60 | 1360 | /* If we are accessing REG in some mode other that what we set it in, |
1361 | make sure that the replacement is valid. In particular, consider | |
1362 | (set (reg:DI r11) (...)) | |
1363 | (set (reg:SI r9) (reg:SI r11)) | |
1364 | (set (reg:SI r10) (...)) | |
1365 | (set (...) (reg:DI r9)) | |
1366 | Replacing r9 with r11 is invalid. */ | |
1367 | if (mode != vd->e[regno].mode) | |
1368 | { | |
67d6c12b | 1369 | if (hard_regno_nregs[regno][mode] |
1370 | > hard_regno_nregs[regno][vd->e[regno].mode]) | |
6ec4bb60 | 1371 | return NULL_RTX; |
1372 | } | |
1373 | ||
298a9306 | 1374 | for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno) |
78defff5 | 1375 | { |
1376 | enum machine_mode oldmode = vd->e[i].mode; | |
5018b5cd | 1377 | rtx new; |
78defff5 | 1378 | |
a2c6f0b7 | 1379 | if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i)) |
1380 | return NULL_RTX; | |
b1c00d40 | 1381 | |
705e01b3 | 1382 | new = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno); |
1383 | if (new) | |
b1c00d40 | 1384 | { |
1385 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (reg); | |
1386 | REG_ATTRS (new) = REG_ATTRS (reg); | |
1387 | return new; | |
1388 | } | |
78defff5 | 1389 | } |
298a9306 | 1390 | |
1391 | return NULL_RTX; | |
1392 | } | |
1393 | ||
1394 | /* If possible, replace the register at *LOC with the oldest register | |
e916c70c | 1395 | in register class CL. Return true if successfully replaced. */ |
298a9306 | 1396 | |
1397 | static bool | |
e916c70c | 1398 | replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn, |
3ad4992f | 1399 | struct value_data *vd) |
298a9306 | 1400 | { |
e916c70c | 1401 | rtx new = find_oldest_value_reg (cl, *loc, vd); |
298a9306 | 1402 | if (new) |
1403 | { | |
450d042a | 1404 | if (dump_file) |
1405 | fprintf (dump_file, "insn %u: replaced reg %u with %u\n", | |
298a9306 | 1406 | INSN_UID (insn), REGNO (*loc), REGNO (new)); |
1407 | ||
d3c1c389 | 1408 | validate_change (insn, loc, new, 1); |
298a9306 | 1409 | return true; |
1410 | } | |
1411 | return false; | |
1412 | } | |
1413 | ||
1414 | /* Similar to replace_oldest_value_reg, but *LOC contains an address. | |
e916c70c | 1415 | Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or |
298a9306 | 1416 | BASE_REG_CLASS depending on how the register is being considered. */ |
1417 | ||
1418 | static bool | |
e916c70c | 1419 | replace_oldest_value_addr (rtx *loc, enum reg_class cl, |
3ad4992f | 1420 | enum machine_mode mode, rtx insn, |
1421 | struct value_data *vd) | |
298a9306 | 1422 | { |
1423 | rtx x = *loc; | |
1424 | RTX_CODE code = GET_CODE (x); | |
1425 | const char *fmt; | |
1426 | int i, j; | |
1427 | bool changed = false; | |
1428 | ||
1429 | switch (code) | |
1430 | { | |
1431 | case PLUS: | |
1432 | { | |
1433 | rtx orig_op0 = XEXP (x, 0); | |
1434 | rtx orig_op1 = XEXP (x, 1); | |
1435 | RTX_CODE code0 = GET_CODE (orig_op0); | |
1436 | RTX_CODE code1 = GET_CODE (orig_op1); | |
1437 | rtx op0 = orig_op0; | |
1438 | rtx op1 = orig_op1; | |
1439 | rtx *locI = NULL; | |
1440 | rtx *locB = NULL; | |
345c1cc2 | 1441 | enum rtx_code index_code = SCRATCH; |
298a9306 | 1442 | |
1443 | if (GET_CODE (op0) == SUBREG) | |
1444 | { | |
1445 | op0 = SUBREG_REG (op0); | |
1446 | code0 = GET_CODE (op0); | |
1447 | } | |
1448 | ||
1449 | if (GET_CODE (op1) == SUBREG) | |
1450 | { | |
1451 | op1 = SUBREG_REG (op1); | |
1452 | code1 = GET_CODE (op1); | |
1453 | } | |
1454 | ||
1455 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE | |
1456 | || code0 == ZERO_EXTEND || code1 == MEM) | |
1457 | { | |
1458 | locI = &XEXP (x, 0); | |
1459 | locB = &XEXP (x, 1); | |
00cb30dc | 1460 | index_code = GET_CODE (*locI); |
298a9306 | 1461 | } |
1462 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
1463 | || code1 == ZERO_EXTEND || code0 == MEM) | |
1464 | { | |
1465 | locI = &XEXP (x, 1); | |
1466 | locB = &XEXP (x, 0); | |
00cb30dc | 1467 | index_code = GET_CODE (*locI); |
298a9306 | 1468 | } |
1469 | else if (code0 == CONST_INT || code0 == CONST | |
1470 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
00cb30dc | 1471 | { |
1472 | locB = &XEXP (x, 1); | |
1473 | index_code = GET_CODE (XEXP (x, 0)); | |
1474 | } | |
298a9306 | 1475 | else if (code1 == CONST_INT || code1 == CONST |
1476 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
00cb30dc | 1477 | { |
1478 | locB = &XEXP (x, 0); | |
1479 | index_code = GET_CODE (XEXP (x, 1)); | |
1480 | } | |
298a9306 | 1481 | else if (code0 == REG && code1 == REG) |
1482 | { | |
1483 | int index_op; | |
00cb30dc | 1484 | unsigned regno0 = REGNO (op0), regno1 = REGNO (op1); |
298a9306 | 1485 | |
00cb30dc | 1486 | if (REGNO_OK_FOR_INDEX_P (regno0) |
1487 | && regno_ok_for_base_p (regno1, mode, PLUS, REG)) | |
298a9306 | 1488 | index_op = 0; |
00cb30dc | 1489 | else if (REGNO_OK_FOR_INDEX_P (regno1) |
1490 | && regno_ok_for_base_p (regno0, mode, PLUS, REG)) | |
298a9306 | 1491 | index_op = 1; |
00cb30dc | 1492 | else if (regno_ok_for_base_p (regno1, mode, PLUS, REG)) |
298a9306 | 1493 | index_op = 0; |
00cb30dc | 1494 | else if (regno_ok_for_base_p (regno0, mode, PLUS, REG)) |
298a9306 | 1495 | index_op = 1; |
00cb30dc | 1496 | else if (REGNO_OK_FOR_INDEX_P (regno1)) |
298a9306 | 1497 | index_op = 1; |
1498 | else | |
1499 | index_op = 0; | |
1500 | ||
1501 | locI = &XEXP (x, index_op); | |
00cb30dc | 1502 | locB = &XEXP (x, !index_op); |
1503 | index_code = GET_CODE (*locI); | |
298a9306 | 1504 | } |
1505 | else if (code0 == REG) | |
1506 | { | |
1507 | locI = &XEXP (x, 0); | |
1508 | locB = &XEXP (x, 1); | |
00cb30dc | 1509 | index_code = GET_CODE (*locI); |
298a9306 | 1510 | } |
1511 | else if (code1 == REG) | |
1512 | { | |
1513 | locI = &XEXP (x, 1); | |
1514 | locB = &XEXP (x, 0); | |
00cb30dc | 1515 | index_code = GET_CODE (*locI); |
298a9306 | 1516 | } |
1517 | ||
1518 | if (locI) | |
1519 | changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS, mode, | |
709c2f34 | 1520 | insn, vd); |
298a9306 | 1521 | if (locB) |
2e6d14e8 | 1522 | changed |= replace_oldest_value_addr (locB, |
00cb30dc | 1523 | base_reg_class (mode, PLUS, |
1524 | index_code), | |
6006f9fd | 1525 | mode, insn, vd); |
298a9306 | 1526 | return changed; |
1527 | } | |
1528 | ||
1529 | case POST_INC: | |
1530 | case POST_DEC: | |
1531 | case POST_MODIFY: | |
1532 | case PRE_INC: | |
1533 | case PRE_DEC: | |
1534 | case PRE_MODIFY: | |
1535 | return false; | |
1536 | ||
1537 | case MEM: | |
1538 | return replace_oldest_value_mem (x, insn, vd); | |
1539 | ||
1540 | case REG: | |
e916c70c | 1541 | return replace_oldest_value_reg (loc, cl, insn, vd); |
298a9306 | 1542 | |
1543 | default: | |
1544 | break; | |
1545 | } | |
1546 | ||
1547 | fmt = GET_RTX_FORMAT (code); | |
1548 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1549 | { | |
1550 | if (fmt[i] == 'e') | |
e916c70c | 1551 | changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, |
298a9306 | 1552 | insn, vd); |
1553 | else if (fmt[i] == 'E') | |
1554 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e916c70c | 1555 | changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl, |
709c2f34 | 1556 | mode, insn, vd); |
298a9306 | 1557 | } |
1558 | ||
1559 | return changed; | |
1560 | } | |
1561 | ||
1562 | /* Similar to replace_oldest_value_reg, but X contains a memory. */ | |
1563 | ||
1564 | static bool | |
3ad4992f | 1565 | replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd) |
298a9306 | 1566 | { |
2e6d14e8 | 1567 | return replace_oldest_value_addr (&XEXP (x, 0), |
00cb30dc | 1568 | base_reg_class (GET_MODE (x), MEM, |
1569 | SCRATCH), | |
298a9306 | 1570 | GET_MODE (x), insn, vd); |
1571 | } | |
1572 | ||
1573 | /* Perform the forward copy propagation on basic block BB. */ | |
1574 | ||
1575 | static bool | |
3ad4992f | 1576 | copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd) |
298a9306 | 1577 | { |
1578 | bool changed = false; | |
1579 | rtx insn; | |
1580 | ||
5496dbfc | 1581 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
298a9306 | 1582 | { |
1583 | int n_ops, i, alt, predicated; | |
d3c1c389 | 1584 | bool is_asm, any_replacements; |
298a9306 | 1585 | rtx set; |
d3c1c389 | 1586 | bool replaced[MAX_RECOG_OPERANDS]; |
298a9306 | 1587 | |
1588 | if (! INSN_P (insn)) | |
1589 | { | |
5496dbfc | 1590 | if (insn == BB_END (bb)) |
298a9306 | 1591 | break; |
1592 | else | |
1593 | continue; | |
1594 | } | |
1595 | ||
1596 | set = single_set (insn); | |
1597 | extract_insn (insn); | |
caeae6e1 | 1598 | if (! constrain_operands (1)) |
709c2f34 | 1599 | fatal_insn_not_found (insn); |
298a9306 | 1600 | preprocess_constraints (); |
1601 | alt = which_alternative; | |
1602 | n_ops = recog_data.n_operands; | |
a68730c1 | 1603 | is_asm = asm_noperands (PATTERN (insn)) >= 0; |
298a9306 | 1604 | |
1605 | /* Simplify the code below by rewriting things to reflect | |
1606 | matching constraints. Also promote OP_OUT to OP_INOUT | |
1607 | in predicated instructions. */ | |
1608 | ||
1609 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
1610 | for (i = 0; i < n_ops; ++i) | |
1611 | { | |
1612 | int matches = recog_op_alt[i][alt].matches; | |
1613 | if (matches >= 0) | |
e916c70c | 1614 | recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; |
298a9306 | 1615 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 |
1616 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
1617 | recog_data.operand_type[i] = OP_INOUT; | |
1618 | } | |
1619 | ||
1620 | /* For each earlyclobber operand, zap the value data. */ | |
1621 | for (i = 0; i < n_ops; i++) | |
1622 | if (recog_op_alt[i][alt].earlyclobber) | |
1623 | kill_value (recog_data.operand[i], vd); | |
1624 | ||
1625 | /* Within asms, a clobber cannot overlap inputs or outputs. | |
1626 | I wouldn't think this were true for regular insns, but | |
1627 | scan_rtx treats them like that... */ | |
1628 | note_stores (PATTERN (insn), kill_clobbered_value, vd); | |
1629 | ||
1630 | /* Kill all auto-incremented values. */ | |
1631 | /* ??? REG_INC is useless, since stack pushes aren't done that way. */ | |
1632 | for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd); | |
1633 | ||
ea82c544 | 1634 | /* Kill all early-clobbered operands. */ |
1635 | for (i = 0; i < n_ops; i++) | |
1636 | if (recog_op_alt[i][alt].earlyclobber) | |
1637 | kill_value (recog_data.operand[i], vd); | |
1638 | ||
298a9306 | 1639 | /* Special-case plain move instructions, since we may well |
1640 | be able to do the move from a different register class. */ | |
1641 | if (set && REG_P (SET_SRC (set))) | |
1642 | { | |
a68730c1 | 1643 | rtx src = SET_SRC (set); |
1644 | unsigned int regno = REGNO (src); | |
1645 | enum machine_mode mode = GET_MODE (src); | |
298a9306 | 1646 | unsigned int i; |
1647 | rtx new; | |
1648 | ||
6ec4bb60 | 1649 | /* If we are accessing SRC in some mode other that what we |
1650 | set it in, make sure that the replacement is valid. */ | |
1651 | if (mode != vd->e[regno].mode) | |
1652 | { | |
67d6c12b | 1653 | if (hard_regno_nregs[regno][mode] |
1654 | > hard_regno_nregs[regno][vd->e[regno].mode]) | |
6ec4bb60 | 1655 | goto no_move_special_case; |
1656 | } | |
1657 | ||
298a9306 | 1658 | /* If the destination is also a register, try to find a source |
1659 | register in the same class. */ | |
1660 | if (REG_P (SET_DEST (set))) | |
1661 | { | |
a68730c1 | 1662 | new = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd); |
298a9306 | 1663 | if (new && validate_change (insn, &SET_SRC (set), new, 0)) |
1664 | { | |
450d042a | 1665 | if (dump_file) |
1666 | fprintf (dump_file, | |
298a9306 | 1667 | "insn %u: replaced reg %u with %u\n", |
1668 | INSN_UID (insn), regno, REGNO (new)); | |
709c2f34 | 1669 | changed = true; |
298a9306 | 1670 | goto did_replacement; |
1671 | } | |
1672 | } | |
1673 | ||
1674 | /* Otherwise, try all valid registers and see if its valid. */ | |
1675 | for (i = vd->e[regno].oldest_regno; i != regno; | |
1676 | i = vd->e[i].next_regno) | |
5018b5cd | 1677 | { |
1678 | new = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode, | |
1679 | mode, i, regno); | |
1680 | if (new != NULL_RTX) | |
1681 | { | |
1682 | if (validate_change (insn, &SET_SRC (set), new, 0)) | |
1683 | { | |
1684 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (src); | |
83d9f776 | 1685 | REG_ATTRS (new) = REG_ATTRS (src); |
450d042a | 1686 | if (dump_file) |
1687 | fprintf (dump_file, | |
5018b5cd | 1688 | "insn %u: replaced reg %u with %u\n", |
1689 | INSN_UID (insn), regno, REGNO (new)); | |
1690 | changed = true; | |
1691 | goto did_replacement; | |
1692 | } | |
1693 | } | |
1694 | } | |
298a9306 | 1695 | } |
6ec4bb60 | 1696 | no_move_special_case: |
298a9306 | 1697 | |
d3c1c389 | 1698 | any_replacements = false; |
1699 | ||
298a9306 | 1700 | /* For each input operand, replace a hard register with the |
1701 | eldest live copy that's in an appropriate register class. */ | |
1702 | for (i = 0; i < n_ops; i++) | |
1703 | { | |
d3c1c389 | 1704 | replaced[i] = false; |
298a9306 | 1705 | |
1706 | /* Don't scan match_operand here, since we've no reg class | |
1707 | information to pass down. Any operands that we could | |
1708 | substitute in will be represented elsewhere. */ | |
1709 | if (recog_data.constraints[i][0] == '\0') | |
1710 | continue; | |
1711 | ||
a68730c1 | 1712 | /* Don't replace in asms intentionally referencing hard regs. */ |
8ad4c111 | 1713 | if (is_asm && REG_P (recog_data.operand[i]) |
a68730c1 | 1714 | && (REGNO (recog_data.operand[i]) |
1715 | == ORIGINAL_REGNO (recog_data.operand[i]))) | |
1716 | continue; | |
1717 | ||
298a9306 | 1718 | if (recog_data.operand_type[i] == OP_IN) |
1719 | { | |
1720 | if (recog_op_alt[i][alt].is_address) | |
d3c1c389 | 1721 | replaced[i] |
298a9306 | 1722 | = replace_oldest_value_addr (recog_data.operand_loc[i], |
e916c70c | 1723 | recog_op_alt[i][alt].cl, |
298a9306 | 1724 | VOIDmode, insn, vd); |
1725 | else if (REG_P (recog_data.operand[i])) | |
d3c1c389 | 1726 | replaced[i] |
298a9306 | 1727 | = replace_oldest_value_reg (recog_data.operand_loc[i], |
e916c70c | 1728 | recog_op_alt[i][alt].cl, |
298a9306 | 1729 | insn, vd); |
e16ceb8e | 1730 | else if (MEM_P (recog_data.operand[i])) |
d3c1c389 | 1731 | replaced[i] = replace_oldest_value_mem (recog_data.operand[i], |
1732 | insn, vd); | |
298a9306 | 1733 | } |
e16ceb8e | 1734 | else if (MEM_P (recog_data.operand[i])) |
d3c1c389 | 1735 | replaced[i] = replace_oldest_value_mem (recog_data.operand[i], |
1736 | insn, vd); | |
298a9306 | 1737 | |
1738 | /* If we performed any replacement, update match_dups. */ | |
d3c1c389 | 1739 | if (replaced[i]) |
298a9306 | 1740 | { |
1741 | int j; | |
1742 | rtx new; | |
1743 | ||
298a9306 | 1744 | new = *recog_data.operand_loc[i]; |
1745 | recog_data.operand[i] = new; | |
1746 | for (j = 0; j < recog_data.n_dups; j++) | |
1747 | if (recog_data.dup_num[j] == i) | |
d3c1c389 | 1748 | validate_change (insn, recog_data.dup_loc[j], new, 1); |
1749 | ||
1750 | any_replacements = true; | |
1751 | } | |
1752 | } | |
1753 | ||
1754 | if (any_replacements) | |
1755 | { | |
1756 | if (! apply_change_group ()) | |
1757 | { | |
1758 | for (i = 0; i < n_ops; i++) | |
1759 | if (replaced[i]) | |
1760 | { | |
1761 | rtx old = *recog_data.operand_loc[i]; | |
1762 | recog_data.operand[i] = old; | |
1763 | } | |
1764 | ||
1765 | if (dump_file) | |
1766 | fprintf (dump_file, | |
1767 | "insn %u: reg replacements not verified\n", | |
1768 | INSN_UID (insn)); | |
298a9306 | 1769 | } |
d3c1c389 | 1770 | else |
1771 | changed = true; | |
298a9306 | 1772 | } |
1773 | ||
1774 | did_replacement: | |
1775 | /* Clobber call-clobbered registers. */ | |
6d7dc5b9 | 1776 | if (CALL_P (insn)) |
298a9306 | 1777 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
1778 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
032b6a07 | 1779 | kill_value_regno (i, 1, vd); |
298a9306 | 1780 | |
1781 | /* Notice stores. */ | |
1782 | note_stores (PATTERN (insn), kill_set_value, vd); | |
1783 | ||
1784 | /* Notice copies. */ | |
1785 | if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))) | |
1786 | copy_value (SET_DEST (set), SET_SRC (set), vd); | |
1787 | ||
5496dbfc | 1788 | if (insn == BB_END (bb)) |
298a9306 | 1789 | break; |
1790 | } | |
1791 | ||
1792 | return changed; | |
1793 | } | |
1794 | ||
1795 | /* Main entry point for the forward copy propagation optimization. */ | |
1796 | ||
6cf81841 | 1797 | static void |
3ad4992f | 1798 | copyprop_hardreg_forward (void) |
298a9306 | 1799 | { |
298a9306 | 1800 | struct value_data *all_vd; |
8d77f669 | 1801 | basic_block bb; |
d3129ae7 | 1802 | sbitmap visited; |
298a9306 | 1803 | |
4c36ffe6 | 1804 | all_vd = XNEWVEC (struct value_data, last_basic_block); |
298a9306 | 1805 | |
4d2e5d52 | 1806 | visited = sbitmap_alloc (last_basic_block); |
d3129ae7 | 1807 | sbitmap_zero (visited); |
8d77f669 | 1808 | |
4c26117a | 1809 | FOR_EACH_BB (bb) |
298a9306 | 1810 | { |
4d2e5d52 | 1811 | SET_BIT (visited, bb->index); |
8d77f669 | 1812 | |
298a9306 | 1813 | /* If a block has a single predecessor, that we've already |
1814 | processed, begin with the value data that was live at | |
1815 | the end of the predecessor block. */ | |
40e55fbb | 1816 | /* ??? Ought to use more intelligent queuing of blocks. */ |
4d2e5d52 | 1817 | if (single_pred_p (bb) |
1818 | && TEST_BIT (visited, single_pred (bb)->index) | |
ea091dfd | 1819 | && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH))) |
1820 | all_vd[bb->index] = all_vd[single_pred (bb)->index]; | |
298a9306 | 1821 | else |
4c26117a | 1822 | init_value_data (all_vd + bb->index); |
298a9306 | 1823 | |
3072d30e | 1824 | copyprop_hardreg_forward_1 (bb, all_vd + bb->index); |
298a9306 | 1825 | } |
1826 | ||
d3129ae7 | 1827 | sbitmap_free (visited); |
298a9306 | 1828 | free (all_vd); |
1829 | } | |
1830 | ||
1831 | /* Dump the value chain data to stderr. */ | |
1832 | ||
1833 | void | |
3ad4992f | 1834 | debug_value_data (struct value_data *vd) |
298a9306 | 1835 | { |
1836 | HARD_REG_SET set; | |
1837 | unsigned int i, j; | |
1838 | ||
1839 | CLEAR_HARD_REG_SET (set); | |
1840 | ||
1841 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1842 | if (vd->e[i].oldest_regno == i) | |
1843 | { | |
1844 | if (vd->e[i].mode == VOIDmode) | |
1845 | { | |
1846 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1847 | fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n", | |
1848 | i, vd->e[i].next_regno); | |
1849 | continue; | |
1850 | } | |
1851 | ||
1852 | SET_HARD_REG_BIT (set, i); | |
1853 | fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode)); | |
1854 | ||
1855 | for (j = vd->e[i].next_regno; | |
1856 | j != INVALID_REGNUM; | |
1857 | j = vd->e[j].next_regno) | |
1858 | { | |
6ec4bb60 | 1859 | if (TEST_HARD_REG_BIT (set, j)) |
298a9306 | 1860 | { |
1861 | fprintf (stderr, "[%u] Loop in regno chain\n", j); | |
1862 | return; | |
1863 | } | |
1864 | ||
1865 | if (vd->e[j].oldest_regno != i) | |
1866 | { | |
1867 | fprintf (stderr, "[%u] Bad oldest_regno (%u)\n", | |
1868 | j, vd->e[j].oldest_regno); | |
1869 | return; | |
1870 | } | |
1871 | SET_HARD_REG_BIT (set, j); | |
1872 | fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode)); | |
1873 | } | |
1874 | fputc ('\n', stderr); | |
1875 | } | |
1876 | ||
1877 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1878 | if (! TEST_HARD_REG_BIT (set, i) | |
1879 | && (vd->e[i].mode != VOIDmode | |
1880 | || vd->e[i].oldest_regno != i | |
1881 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1882 | fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n", | |
1883 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1884 | vd->e[i].next_regno); | |
1885 | } | |
1886 | ||
1887 | #ifdef ENABLE_CHECKING | |
1888 | static void | |
3ad4992f | 1889 | validate_value_data (struct value_data *vd) |
298a9306 | 1890 | { |
1891 | HARD_REG_SET set; | |
1892 | unsigned int i, j; | |
1893 | ||
1894 | CLEAR_HARD_REG_SET (set); | |
1895 | ||
1896 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1897 | if (vd->e[i].oldest_regno == i) | |
1898 | { | |
1899 | if (vd->e[i].mode == VOIDmode) | |
1900 | { | |
1901 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1902 | internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)", | |
1903 | i, vd->e[i].next_regno); | |
1904 | continue; | |
1905 | } | |
1906 | ||
1907 | SET_HARD_REG_BIT (set, i); | |
1908 | ||
1909 | for (j = vd->e[i].next_regno; | |
1910 | j != INVALID_REGNUM; | |
1911 | j = vd->e[j].next_regno) | |
1912 | { | |
1913 | if (TEST_HARD_REG_BIT (set, j)) | |
1914 | internal_error ("validate_value_data: Loop in regno chain (%u)", | |
1915 | j); | |
1916 | if (vd->e[j].oldest_regno != i) | |
1917 | internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)", | |
1918 | j, vd->e[j].oldest_regno); | |
1919 | ||
1920 | SET_HARD_REG_BIT (set, j); | |
1921 | } | |
1922 | } | |
1923 | ||
1924 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1925 | if (! TEST_HARD_REG_BIT (set, i) | |
1926 | && (vd->e[i].mode != VOIDmode | |
1927 | || vd->e[i].oldest_regno != i | |
1928 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1929 | internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)", | |
1930 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1931 | vd->e[i].next_regno); | |
1932 | } | |
1933 | #endif | |
77fce4cd | 1934 | \f |
1935 | static bool | |
1936 | gate_handle_regrename (void) | |
1937 | { | |
3072d30e | 1938 | return (optimize > 0 && (flag_rename_registers)); |
77fce4cd | 1939 | } |
1940 | ||
1941 | ||
1942 | /* Run the regrename and cprop passes. */ | |
2a1990e9 | 1943 | static unsigned int |
77fce4cd | 1944 | rest_of_handle_regrename (void) |
1945 | { | |
3072d30e | 1946 | regrename_optimize (); |
2a1990e9 | 1947 | return 0; |
77fce4cd | 1948 | } |
1949 | ||
1950 | struct tree_opt_pass pass_regrename = | |
1951 | { | |
1952 | "rnreg", /* name */ | |
1953 | gate_handle_regrename, /* gate */ | |
1954 | rest_of_handle_regrename, /* execute */ | |
1955 | NULL, /* sub */ | |
1956 | NULL, /* next */ | |
1957 | 0, /* static_pass_number */ | |
1958 | TV_RENAME_REGISTERS, /* tv_id */ | |
1959 | 0, /* properties_required */ | |
1960 | 0, /* properties_provided */ | |
1961 | 0, /* properties_destroyed */ | |
1962 | 0, /* todo_flags_start */ | |
3072d30e | 1963 | TODO_df_finish | |
1964 | TODO_dump_func, /* todo_flags_finish */ | |
1965 | 'n' /* letter */ | |
1966 | }; | |
1967 | ||
1968 | static bool | |
1969 | gate_handle_cprop (void) | |
1970 | { | |
1971 | return (optimize > 0 && (flag_cprop_registers)); | |
1972 | } | |
1973 | ||
1974 | ||
1975 | /* Run the regrename and cprop passes. */ | |
1976 | static unsigned int | |
1977 | rest_of_handle_cprop (void) | |
1978 | { | |
1979 | copyprop_hardreg_forward (); | |
1980 | return 0; | |
1981 | } | |
1982 | ||
1983 | struct tree_opt_pass pass_cprop_hardreg = | |
1984 | { | |
1985 | "cprop_hardreg", /* name */ | |
1986 | gate_handle_cprop, /* gate */ | |
1987 | rest_of_handle_cprop, /* execute */ | |
1988 | NULL, /* sub */ | |
1989 | NULL, /* next */ | |
1990 | 0, /* static_pass_number */ | |
1991 | TV_RENAME_REGISTERS, /* tv_id */ | |
1992 | 0, /* properties_required */ | |
1993 | 0, /* properties_provided */ | |
1994 | 0, /* properties_destroyed */ | |
1995 | 0, /* todo_flags_start */ | |
77fce4cd | 1996 | TODO_dump_func, /* todo_flags_finish */ |
1997 | 'n' /* letter */ | |
1998 | }; | |
1999 |