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7b82b5da 1/* Register renaming for the GNU compiler.
684bcee5 2 Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
7b82b5da 3
1322177d 4 This file is part of GCC.
7b82b5da 5
1322177d
LB
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
7b82b5da
SC
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
1322177d
LB
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
7b82b5da
SC
15
16 You should have received a copy of the GNU General Public License
1322177d
LB
17 along with GCC; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19 02111-1307, USA. */
7b82b5da
SC
20
21#include "config.h"
22#include "system.h"
4977bab6
ZW
23#include "coretypes.h"
24#include "tm.h"
7b82b5da 25#include "rtl.h"
541f7d56 26#include "tm_p.h"
7b82b5da
SC
27#include "insn-config.h"
28#include "regs.h"
541f7d56
BS
29#include "hard-reg-set.h"
30#include "basic-block.h"
31#include "reload.h"
7b82b5da
SC
32#include "output.h"
33#include "function.h"
34#include "recog.h"
541f7d56 35#include "flags.h"
8582c27b 36#include "toplev.h"
541f7d56
BS
37#include "obstack.h"
38
541f7d56
BS
39#ifndef REG_MODE_OK_FOR_BASE_P
40#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
41#endif
7b82b5da
SC
42
43static const char *const reg_class_names[] = REG_CLASS_NAMES;
44
541f7d56 45struct du_chain
7b82b5da 46{
541f7d56
BS
47 struct du_chain *next_chain;
48 struct du_chain *next_use;
7b82b5da 49
541f7d56
BS
50 rtx insn;
51 rtx *loc;
e3a64162 52 ENUM_BITFIELD(reg_class) cl : 16;
541f7d56 53 unsigned int need_caller_save_reg:1;
fe08a886 54 unsigned int earlyclobber:1;
541f7d56 55};
7b82b5da 56
541f7d56
BS
57enum scan_actions
58{
541f7d56
BS
59 terminate_all_read,
60 terminate_overlapping_read,
61 terminate_write,
62 terminate_dead,
63 mark_read,
64 mark_write
65};
66
67static const char * const scan_actions_name[] =
68{
541f7d56
BS
69 "terminate_all_read",
70 "terminate_overlapping_read",
71 "terminate_write",
72 "terminate_dead",
73 "mark_read",
74 "mark_write"
75};
76
77static struct obstack rename_obstack;
78
0c20a65f
AJ
79static void do_replace (struct du_chain *, int);
80static void scan_rtx_reg (rtx, rtx *, enum reg_class,
81 enum scan_actions, enum op_type, int);
82static void scan_rtx_address (rtx, rtx *, enum reg_class,
83 enum scan_actions, enum machine_mode);
84static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions,
85 enum op_type, int);
86static struct du_chain *build_def_use (basic_block);
87static void dump_def_use_chain (struct du_chain *);
88static void note_sets (rtx, rtx, void *);
89static void clear_dead_regs (HARD_REG_SET *, enum machine_mode, rtx);
90static void merge_overlapping_regs (basic_block, HARD_REG_SET *,
91 struct du_chain *);
fe08a886
BS
92
93/* Called through note_stores from update_life. Find sets of registers, and
94 record them in *DATA (which is actually a HARD_REG_SET *). */
95
96static void
0c20a65f 97note_sets (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
fe08a886
BS
98{
99 HARD_REG_SET *pset = (HARD_REG_SET *) data;
100 unsigned int regno;
101 int nregs;
f8cfc6aa 102 if (!REG_P (x))
fe08a886
BS
103 return;
104 regno = REGNO (x);
66fd46b6 105 nregs = hard_regno_nregs[regno][GET_MODE (x)];
3d17d93d
AO
106
107 /* There must not be pseudos at this point. */
41374e13 108 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
3d17d93d 109
fe08a886
BS
110 while (nregs-- > 0)
111 SET_HARD_REG_BIT (*pset, regno + nregs);
112}
113
114/* Clear all registers from *PSET for which a note of kind KIND can be found
115 in the list NOTES. */
116
117static void
0c20a65f 118clear_dead_regs (HARD_REG_SET *pset, enum machine_mode kind, rtx notes)
fe08a886
BS
119{
120 rtx note;
121 for (note = notes; note; note = XEXP (note, 1))
122 if (REG_NOTE_KIND (note) == kind && REG_P (XEXP (note, 0)))
123 {
124 rtx reg = XEXP (note, 0);
125 unsigned int regno = REGNO (reg);
66fd46b6 126 int nregs = hard_regno_nregs[regno][GET_MODE (reg)];
3d17d93d
AO
127
128 /* There must not be pseudos at this point. */
41374e13 129 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
3d17d93d 130
fe08a886
BS
131 while (nregs-- > 0)
132 CLEAR_HARD_REG_BIT (*pset, regno + nregs);
133 }
134}
135
136/* For a def-use chain CHAIN in basic block B, find which registers overlap
137 its lifetime and set the corresponding bits in *PSET. */
138
139static void
0c20a65f
AJ
140merge_overlapping_regs (basic_block b, HARD_REG_SET *pset,
141 struct du_chain *chain)
fe08a886
BS
142{
143 struct du_chain *t = chain;
144 rtx insn;
145 HARD_REG_SET live;
146
147 REG_SET_TO_HARD_REG_SET (live, b->global_live_at_start);
a813c111 148 insn = BB_HEAD (b);
fe08a886
BS
149 while (t)
150 {
151 /* Search forward until the next reference to the register to be
152 renamed. */
153 while (insn != t->insn)
154 {
155 if (INSN_P (insn))
156 {
157 clear_dead_regs (&live, REG_DEAD, REG_NOTES (insn));
158 note_stores (PATTERN (insn), note_sets, (void *) &live);
159 /* Only record currently live regs if we are inside the
160 reg's live range. */
161 if (t != chain)
162 IOR_HARD_REG_SET (*pset, live);
3b03c671 163 clear_dead_regs (&live, REG_UNUSED, REG_NOTES (insn));
fe08a886
BS
164 }
165 insn = NEXT_INSN (insn);
166 }
167
168 IOR_HARD_REG_SET (*pset, live);
169
170 /* For the last reference, also merge in all registers set in the
171 same insn.
172 @@@ We only have take earlyclobbered sets into account. */
173 if (! t->next_use)
174 note_stores (PATTERN (insn), note_sets, (void *) pset);
175
176 t = t->next_use;
177 }
178}
179
180/* Perform register renaming on the current function. */
7b82b5da 181
541f7d56 182void
0c20a65f 183regrename_optimize (void)
541f7d56 184{
fe08a886
BS
185 int tick[FIRST_PSEUDO_REGISTER];
186 int this_tick = 0;
e0082a72 187 basic_block bb;
541f7d56 188 char *first_obj;
7b82b5da 189
fe08a886
BS
190 memset (tick, 0, sizeof tick);
191
541f7d56 192 gcc_obstack_init (&rename_obstack);
703ad42b 193 first_obj = obstack_alloc (&rename_obstack, 0);
7b82b5da 194
e0082a72 195 FOR_EACH_BB (bb)
541f7d56 196 {
541f7d56 197 struct du_chain *all_chains = 0;
541f7d56
BS
198 HARD_REG_SET unavailable;
199 HARD_REG_SET regs_seen;
7b82b5da 200
541f7d56 201 CLEAR_HARD_REG_SET (unavailable);
7b82b5da 202
c263766c
RH
203 if (dump_file)
204 fprintf (dump_file, "\nBasic block %d:\n", bb->index);
7b82b5da 205
fe08a886 206 all_chains = build_def_use (bb);
7b82b5da 207
c263766c 208 if (dump_file)
541f7d56 209 dump_def_use_chain (all_chains);
7b82b5da 210
fe08a886 211 CLEAR_HARD_REG_SET (unavailable);
541f7d56
BS
212 /* Don't clobber traceback for noreturn functions. */
213 if (frame_pointer_needed)
214 {
65599eb4 215 int i;
3b03c671 216
66fd46b6 217 for (i = hard_regno_nregs[FRAME_POINTER_REGNUM][Pmode]; i--;)
65599eb4 218 SET_HARD_REG_BIT (unavailable, FRAME_POINTER_REGNUM + i);
3b03c671 219
541f7d56 220#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
66fd46b6 221 for (i = hard_regno_nregs[HARD_FRAME_POINTER_REGNUM][Pmode]; i--;)
65599eb4 222 SET_HARD_REG_BIT (unavailable, HARD_FRAME_POINTER_REGNUM + i);
541f7d56
BS
223#endif
224 }
7b82b5da 225
541f7d56
BS
226 CLEAR_HARD_REG_SET (regs_seen);
227 while (all_chains)
228 {
62551c66 229 int new_reg, best_new_reg;
541f7d56
BS
230 int n_uses;
231 struct du_chain *this = all_chains;
232 struct du_chain *tmp, *last;
233 HARD_REG_SET this_unavailable;
4e812700 234 int reg = REGNO (*this->loc);
85941a0a 235 int i;
7b82b5da 236
541f7d56 237 all_chains = this->next_chain;
3b03c671 238
62551c66
JH
239 best_new_reg = reg;
240
fe08a886 241#if 0 /* This just disables optimization opportunities. */
541f7d56
BS
242 /* Only rename once we've seen the reg more than once. */
243 if (! TEST_HARD_REG_BIT (regs_seen, reg))
1a43c33f 244 {
541f7d56
BS
245 SET_HARD_REG_BIT (regs_seen, reg);
246 continue;
247 }
fe08a886 248#endif
1a43c33f 249
f4d578da
BS
250 if (fixed_regs[reg] || global_regs[reg]
251#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
252 || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM)
253#else
254 || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM)
255#endif
256 )
541f7d56 257 continue;
1a43c33f 258
541f7d56 259 COPY_HARD_REG_SET (this_unavailable, unavailable);
1a43c33f 260
541f7d56
BS
261 /* Find last entry on chain (which has the need_caller_save bit),
262 count number of uses, and narrow the set of registers we can
263 use for renaming. */
264 n_uses = 0;
265 for (last = this; last->next_use; last = last->next_use)
266 {
267 n_uses++;
268 IOR_COMPL_HARD_REG_SET (this_unavailable,
e3a64162 269 reg_class_contents[last->cl]);
1a43c33f 270 }
541f7d56
BS
271 if (n_uses < 1)
272 continue;
7b82b5da 273
541f7d56 274 IOR_COMPL_HARD_REG_SET (this_unavailable,
e3a64162 275 reg_class_contents[last->cl]);
7b82b5da 276
fe08a886 277 if (this->need_caller_save_reg)
541f7d56
BS
278 IOR_HARD_REG_SET (this_unavailable, call_used_reg_set);
279
fe08a886
BS
280 merge_overlapping_regs (bb, &this_unavailable, this);
281
541f7d56
BS
282 /* Now potential_regs is a reasonable approximation, let's
283 have a closer look at each register still in there. */
4e812700 284 for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++)
1a43c33f 285 {
66fd46b6 286 int nregs = hard_regno_nregs[new_reg][GET_MODE (*this->loc)];
4e812700 287
85941a0a 288 for (i = nregs - 1; i >= 0; --i)
fe08a886
BS
289 if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i)
290 || fixed_regs[new_reg + i]
291 || global_regs[new_reg + i]
85941a0a 292 /* Can't use regs which aren't saved by the prologue. */
fe08a886
BS
293 || (! regs_ever_live[new_reg + i]
294 && ! call_used_regs[new_reg + i])
b2a8b026 295#ifdef LEAF_REGISTERS
3b03c671 296 /* We can't use a non-leaf register if we're in a
b2a8b026 297 leaf function. */
3b03c671 298 || (current_function_is_leaf
b2a8b026
MM
299 && !LEAF_REGISTERS[new_reg + i])
300#endif
541f7d56 301#ifdef HARD_REGNO_RENAME_OK
fe08a886 302 || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i)
541f7d56 303#endif
85941a0a
RH
304 )
305 break;
306 if (i >= 0)
541f7d56 307 continue;
1a43c33f 308
85941a0a
RH
309 /* See whether it accepts all modes that occur in
310 definition and uses. */
541f7d56 311 for (tmp = this; tmp; tmp = tmp->next_use)
66df7a98
AO
312 if (! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc))
313 || (tmp->need_caller_save_reg
314 && ! (HARD_REGNO_CALL_PART_CLOBBERED
315 (reg, GET_MODE (*tmp->loc)))
316 && (HARD_REGNO_CALL_PART_CLOBBERED
317 (new_reg, GET_MODE (*tmp->loc)))))
541f7d56
BS
318 break;
319 if (! tmp)
fe08a886 320 {
62551c66 321 if (tick[best_new_reg] > tick[new_reg])
fe08a886
BS
322 best_new_reg = new_reg;
323 }
1a43c33f 324 }
7b82b5da 325
c263766c 326 if (dump_file)
541f7d56 327 {
c263766c 328 fprintf (dump_file, "Register %s in insn %d",
541f7d56
BS
329 reg_names[reg], INSN_UID (last->insn));
330 if (last->need_caller_save_reg)
c263766c 331 fprintf (dump_file, " crosses a call");
3b03c671 332 }
1a43c33f 333
62551c66 334 if (best_new_reg == reg)
541f7d56 335 {
62551c66 336 tick[reg] = ++this_tick;
c263766c
RH
337 if (dump_file)
338 fprintf (dump_file, "; no available better choice\n");
7b82b5da 339 continue;
541f7d56 340 }
7b82b5da 341
fe08a886 342 do_replace (this, best_new_reg);
62551c66 343 tick[best_new_reg] = ++this_tick;
ead61c1d 344 regs_ever_live[best_new_reg] = 1;
1a43c33f 345
c263766c
RH
346 if (dump_file)
347 fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]);
541f7d56 348 }
1a43c33f 349
541f7d56
BS
350 obstack_free (&rename_obstack, first_obj);
351 }
1a43c33f 352
541f7d56 353 obstack_free (&rename_obstack, NULL);
7b82b5da 354
c263766c
RH
355 if (dump_file)
356 fputc ('\n', dump_file);
7b82b5da 357
541f7d56
BS
358 count_or_remove_death_notes (NULL, 1);
359 update_life_info (NULL, UPDATE_LIFE_LOCAL,
736b64dd 360 PROP_DEATH_NOTES);
7b82b5da
SC
361}
362
7b82b5da 363static void
0c20a65f 364do_replace (struct du_chain *chain, int reg)
7b82b5da 365{
541f7d56 366 while (chain)
7b82b5da 367 {
08394eef 368 unsigned int regno = ORIGINAL_REGNO (*chain->loc);
d1d3c9a6
JH
369 struct reg_attrs * attr = REG_ATTRS (*chain->loc);
370
08394eef 371 *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg);
f4d578da
BS
372 if (regno >= FIRST_PSEUDO_REGISTER)
373 ORIGINAL_REGNO (*chain->loc) = regno;
d1d3c9a6 374 REG_ATTRS (*chain->loc) = attr;
541f7d56 375 chain = chain->next_use;
7b82b5da 376 }
7b82b5da
SC
377}
378
7b82b5da 379
541f7d56
BS
380static struct du_chain *open_chains;
381static struct du_chain *closed_chains;
382
383static void
e3a64162 384scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl,
0c20a65f 385 enum scan_actions action, enum op_type type, int earlyclobber)
7b82b5da 386{
541f7d56
BS
387 struct du_chain **p;
388 rtx x = *loc;
389 enum machine_mode mode = GET_MODE (x);
390 int this_regno = REGNO (x);
66fd46b6 391 int this_nregs = hard_regno_nregs[this_regno][mode];
541f7d56 392
541f7d56 393 if (action == mark_write)
7b82b5da 394 {
541f7d56 395 if (type == OP_OUT)
7b82b5da 396 {
703ad42b
KG
397 struct du_chain *this
398 = obstack_alloc (&rename_obstack, sizeof (struct du_chain));
541f7d56
BS
399 this->next_use = 0;
400 this->next_chain = open_chains;
401 this->loc = loc;
402 this->insn = insn;
e3a64162 403 this->cl = cl;
541f7d56 404 this->need_caller_save_reg = 0;
fe08a886 405 this->earlyclobber = earlyclobber;
541f7d56 406 open_chains = this;
7b82b5da 407 }
541f7d56 408 return;
7b82b5da 409 }
1a43c33f 410
541f7d56
BS
411 if ((type == OP_OUT && action != terminate_write)
412 || (type != OP_OUT && action == terminate_write))
413 return;
5fa41e13 414
541f7d56 415 for (p = &open_chains; *p;)
5fa41e13 416 {
541f7d56 417 struct du_chain *this = *p;
541f7d56 418
695e4773
GS
419 /* Check if the chain has been terminated if it has then skip to
420 the next chain.
541f7d56 421
695e4773
GS
422 This can happen when we've already appended the location to
423 the chain in Step 3, but are trying to hide in-out operands
424 from terminate_write in Step 5. */
5fa41e13 425
695e4773
GS
426 if (*this->loc == cc0_rtx)
427 p = &this->next_chain;
428 else
3b03c671 429 {
695e4773 430 int regno = REGNO (*this->loc);
66fd46b6 431 int nregs = hard_regno_nregs[regno][GET_MODE (*this->loc)];
695e4773
GS
432 int exact_match = (regno == this_regno && nregs == this_nregs);
433
434 if (regno + nregs <= this_regno
435 || this_regno + this_nregs <= regno)
a125d855
RH
436 {
437 p = &this->next_chain;
438 continue;
439 }
440
441 if (action == mark_read)
541f7d56 442 {
41374e13 443 gcc_assert (exact_match);
695e4773 444
3b03c671 445 /* ??? Class NO_REGS can happen if the md file makes use of
a125d855
RH
446 EXTRA_CONSTRAINTS to match registers. Which is arguably
447 wrong, but there we are. Since we know not what this may
448 be replaced with, terminate the chain. */
e3a64162 449 if (cl != NO_REGS)
a125d855 450 {
703ad42b 451 this = obstack_alloc (&rename_obstack, sizeof (struct du_chain));
fe08a886 452 this->next_use = 0;
a125d855
RH
453 this->next_chain = (*p)->next_chain;
454 this->loc = loc;
455 this->insn = insn;
e3a64162 456 this->cl = cl;
a125d855 457 this->need_caller_save_reg = 0;
fe08a886
BS
458 while (*p)
459 p = &(*p)->next_use;
a125d855
RH
460 *p = this;
461 return;
462 }
541f7d56 463 }
a125d855
RH
464
465 if (action != terminate_overlapping_read || ! exact_match)
541f7d56 466 {
695e4773
GS
467 struct du_chain *next = this->next_chain;
468
469 /* Whether the terminated chain can be used for renaming
470 depends on the action and this being an exact match.
471 In either case, we remove this element from open_chains. */
472
473 if ((action == terminate_dead || action == terminate_write)
474 && exact_match)
475 {
476 this->next_chain = closed_chains;
477 closed_chains = this;
c263766c
RH
478 if (dump_file)
479 fprintf (dump_file,
695e4773
GS
480 "Closing chain %s at insn %d (%s)\n",
481 reg_names[REGNO (*this->loc)], INSN_UID (insn),
482 scan_actions_name[(int) action]);
483 }
484 else
485 {
c263766c
RH
486 if (dump_file)
487 fprintf (dump_file,
695e4773
GS
488 "Discarding chain %s at insn %d (%s)\n",
489 reg_names[REGNO (*this->loc)], INSN_UID (insn),
490 scan_actions_name[(int) action]);
491 }
492 *p = next;
541f7d56 493 }
695e4773
GS
494 else
495 p = &this->next_chain;
541f7d56 496 }
541f7d56 497 }
7b82b5da
SC
498}
499
e3a64162 500/* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
541f7d56 501 BASE_REG_CLASS depending on how the register is being considered. */
7b82b5da 502
4ca0f257 503static void
e3a64162 504scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl,
0c20a65f 505 enum scan_actions action, enum machine_mode mode)
7b82b5da 506{
541f7d56
BS
507 rtx x = *loc;
508 RTX_CODE code = GET_CODE (x);
509 const char *fmt;
510 int i, j;
7b82b5da 511
541f7d56
BS
512 if (action == mark_write)
513 return;
7b82b5da 514
541f7d56 515 switch (code)
7b82b5da 516 {
541f7d56
BS
517 case PLUS:
518 {
519 rtx orig_op0 = XEXP (x, 0);
520 rtx orig_op1 = XEXP (x, 1);
521 RTX_CODE code0 = GET_CODE (orig_op0);
522 RTX_CODE code1 = GET_CODE (orig_op1);
523 rtx op0 = orig_op0;
524 rtx op1 = orig_op1;
525 rtx *locI = NULL;
526 rtx *locB = NULL;
527
528 if (GET_CODE (op0) == SUBREG)
529 {
530 op0 = SUBREG_REG (op0);
531 code0 = GET_CODE (op0);
532 }
7b82b5da 533
541f7d56
BS
534 if (GET_CODE (op1) == SUBREG)
535 {
536 op1 = SUBREG_REG (op1);
537 code1 = GET_CODE (op1);
538 }
7b82b5da 539
541f7d56
BS
540 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
541 || code0 == ZERO_EXTEND || code1 == MEM)
542 {
543 locI = &XEXP (x, 0);
544 locB = &XEXP (x, 1);
545 }
546 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
547 || code1 == ZERO_EXTEND || code0 == MEM)
548 {
549 locI = &XEXP (x, 1);
550 locB = &XEXP (x, 0);
551 }
552 else if (code0 == CONST_INT || code0 == CONST
553 || code0 == SYMBOL_REF || code0 == LABEL_REF)
554 locB = &XEXP (x, 1);
555 else if (code1 == CONST_INT || code1 == CONST
556 || code1 == SYMBOL_REF || code1 == LABEL_REF)
557 locB = &XEXP (x, 0);
558 else if (code0 == REG && code1 == REG)
559 {
560 int index_op;
561
562 if (REG_OK_FOR_INDEX_P (op0)
563 && REG_MODE_OK_FOR_BASE_P (op1, mode))
564 index_op = 0;
565 else if (REG_OK_FOR_INDEX_P (op1)
566 && REG_MODE_OK_FOR_BASE_P (op0, mode))
567 index_op = 1;
568 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
569 index_op = 0;
570 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
571 index_op = 1;
572 else if (REG_OK_FOR_INDEX_P (op1))
573 index_op = 1;
574 else
575 index_op = 0;
576
577 locI = &XEXP (x, index_op);
578 locB = &XEXP (x, !index_op);
579 }
580 else if (code0 == REG)
581 {
582 locI = &XEXP (x, 0);
583 locB = &XEXP (x, 1);
584 }
585 else if (code1 == REG)
586 {
587 locI = &XEXP (x, 1);
588 locB = &XEXP (x, 0);
589 }
7b82b5da 590
541f7d56 591 if (locI)
85941a0a 592 scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode);
541f7d56 593 if (locB)
3dcc68a4 594 scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode);
541f7d56
BS
595 return;
596 }
7b82b5da 597
541f7d56
BS
598 case POST_INC:
599 case POST_DEC:
600 case POST_MODIFY:
601 case PRE_INC:
602 case PRE_DEC:
603 case PRE_MODIFY:
604#ifndef AUTO_INC_DEC
ce73761f
RH
605 /* If the target doesn't claim to handle autoinc, this must be
606 something special, like a stack push. Kill this chain. */
607 action = terminate_all_read;
541f7d56
BS
608#endif
609 break;
7b82b5da 610
541f7d56 611 case MEM:
3dcc68a4
NC
612 scan_rtx_address (insn, &XEXP (x, 0),
613 MODE_BASE_REG_CLASS (GET_MODE (x)), action,
85941a0a 614 GET_MODE (x));
541f7d56 615 return;
1a43c33f 616
541f7d56 617 case REG:
e3a64162 618 scan_rtx_reg (insn, loc, cl, action, OP_IN, 0);
4ca0f257 619 return;
1a43c33f 620
541f7d56
BS
621 default:
622 break;
4ca0f257 623 }
541f7d56
BS
624
625 fmt = GET_RTX_FORMAT (code);
626 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4ca0f257 627 {
541f7d56 628 if (fmt[i] == 'e')
e3a64162 629 scan_rtx_address (insn, &XEXP (x, i), cl, action, mode);
541f7d56
BS
630 else if (fmt[i] == 'E')
631 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
e3a64162 632 scan_rtx_address (insn, &XVECEXP (x, i, j), cl, action, mode);
4ca0f257 633 }
7b82b5da
SC
634}
635
541f7d56 636static void
e3a64162 637scan_rtx (rtx insn, rtx *loc, enum reg_class cl,
0c20a65f 638 enum scan_actions action, enum op_type type, int earlyclobber)
7b82b5da 639{
541f7d56
BS
640 const char *fmt;
641 rtx x = *loc;
642 enum rtx_code code = GET_CODE (x);
643 int i, j;
7b82b5da 644
541f7d56
BS
645 code = GET_CODE (x);
646 switch (code)
7b82b5da 647 {
541f7d56
BS
648 case CONST:
649 case CONST_INT:
650 case CONST_DOUBLE:
69ef87e2 651 case CONST_VECTOR:
541f7d56
BS
652 case SYMBOL_REF:
653 case LABEL_REF:
654 case CC0:
655 case PC:
656 return;
055be976 657
541f7d56 658 case REG:
e3a64162 659 scan_rtx_reg (insn, loc, cl, action, type, earlyclobber);
541f7d56 660 return;
7b82b5da 661
541f7d56 662 case MEM:
3dcc68a4
NC
663 scan_rtx_address (insn, &XEXP (x, 0),
664 MODE_BASE_REG_CLASS (GET_MODE (x)), action,
85941a0a 665 GET_MODE (x));
541f7d56 666 return;
7b82b5da 667
541f7d56 668 case SET:
e3a64162
BI
669 scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN, 0);
670 scan_rtx (insn, &SET_DEST (x), cl, action, OP_OUT, 0);
541f7d56 671 return;
7b82b5da 672
541f7d56 673 case STRICT_LOW_PART:
e3a64162 674 scan_rtx (insn, &XEXP (x, 0), cl, action, OP_INOUT, earlyclobber);
541f7d56 675 return;
7b82b5da 676
541f7d56 677 case ZERO_EXTRACT:
3b03c671 678 case SIGN_EXTRACT:
e3a64162 679 scan_rtx (insn, &XEXP (x, 0), cl, action,
fe08a886 680 type == OP_IN ? OP_IN : OP_INOUT, earlyclobber);
e3a64162
BI
681 scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN, 0);
682 scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN, 0);
541f7d56 683 return;
7b82b5da 684
541f7d56
BS
685 case POST_INC:
686 case PRE_INC:
687 case POST_DEC:
688 case PRE_DEC:
689 case POST_MODIFY:
690 case PRE_MODIFY:
691 /* Should only happen inside MEM. */
41374e13 692 gcc_unreachable ();
541f7d56
BS
693
694 case CLOBBER:
e3a64162 695 scan_rtx (insn, &SET_DEST (x), cl, action, OP_OUT, 1);
541f7d56 696 return;
7b82b5da 697
541f7d56 698 case EXPR_LIST:
e3a64162 699 scan_rtx (insn, &XEXP (x, 0), cl, action, type, 0);
541f7d56 700 if (XEXP (x, 1))
e3a64162 701 scan_rtx (insn, &XEXP (x, 1), cl, action, type, 0);
541f7d56 702 return;
7b82b5da 703
541f7d56
BS
704 default:
705 break;
706 }
7b82b5da 707
541f7d56
BS
708 fmt = GET_RTX_FORMAT (code);
709 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7b82b5da
SC
710 {
711 if (fmt[i] == 'e')
e3a64162 712 scan_rtx (insn, &XEXP (x, i), cl, action, type, 0);
7b82b5da
SC
713 else if (fmt[i] == 'E')
714 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
e3a64162 715 scan_rtx (insn, &XVECEXP (x, i, j), cl, action, type, 0);
7b82b5da 716 }
7b82b5da
SC
717}
718
3eae4643 719/* Build def/use chain. */
7b82b5da 720
541f7d56 721static struct du_chain *
0c20a65f 722build_def_use (basic_block bb)
7b82b5da 723{
541f7d56 724 rtx insn;
1a43c33f 725
541f7d56 726 open_chains = closed_chains = NULL;
1a43c33f 727
a813c111 728 for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
541f7d56
BS
729 {
730 if (INSN_P (insn))
731 {
732 int n_ops;
733 rtx note;
734 rtx old_operands[MAX_RECOG_OPERANDS];
735 rtx old_dups[MAX_DUP_OPERANDS];
ea475b23 736 int i, icode;
541f7d56
BS
737 int alt;
738 int predicated;
739
541f7d56
BS
740 /* Process the insn, determining its effect on the def-use
741 chains. We perform the following steps with the register
742 references in the insn:
743 (1) Any read that overlaps an open chain, but doesn't exactly
744 match, causes that chain to be closed. We can't deal
745 with overlaps yet.
746 (2) Any read outside an operand causes any chain it overlaps
747 with to be closed, since we can't replace it.
748 (3) Any read inside an operand is added if there's already
749 an open chain for it.
750 (4) For any REG_DEAD note we find, close open chains that
751 overlap it.
752 (5) For any write we find, close open chains that overlap it.
753 (6) For any write we find in an operand, make a new chain.
754 (7) For any REG_UNUSED, close any chains we just opened. */
755
2ed1f154 756 icode = recog_memoized (insn);
541f7d56 757 extract_insn (insn);
4be9e9cb 758 if (! constrain_operands (1))
3b03c671 759 fatal_insn_not_found (insn);
541f7d56
BS
760 preprocess_constraints ();
761 alt = which_alternative;
762 n_ops = recog_data.n_operands;
763
764 /* Simplify the code below by rewriting things to reflect
765 matching constraints. Also promote OP_OUT to OP_INOUT
766 in predicated instructions. */
767
768 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
769 for (i = 0; i < n_ops; ++i)
7b82b5da 770 {
541f7d56
BS
771 int matches = recog_op_alt[i][alt].matches;
772 if (matches >= 0)
e3a64162 773 recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl;
541f7d56
BS
774 if (matches >= 0 || recog_op_alt[i][alt].matched >= 0
775 || (predicated && recog_data.operand_type[i] == OP_OUT))
776 recog_data.operand_type[i] = OP_INOUT;
7b82b5da 777 }
1a43c33f 778
541f7d56
BS
779 /* Step 1: Close chains for which we have overlapping reads. */
780 for (i = 0; i < n_ops; i++)
781 scan_rtx (insn, recog_data.operand_loc[i],
782 NO_REGS, terminate_overlapping_read,
fe08a886 783 recog_data.operand_type[i], 0);
1a43c33f 784
541f7d56 785 /* Step 2: Close chains for which we have reads outside operands.
3b03c671 786 We do this by munging all operands into CC0, and closing
541f7d56 787 everything remaining. */
7b82b5da 788
541f7d56 789 for (i = 0; i < n_ops; i++)
1a43c33f 790 {
541f7d56
BS
791 old_operands[i] = recog_data.operand[i];
792 /* Don't squash match_operator or match_parallel here, since
3b03c671 793 we don't know that all of the contained registers are
541f7d56
BS
794 reachable by proper operands. */
795 if (recog_data.constraints[i][0] == '\0')
796 continue;
797 *recog_data.operand_loc[i] = cc0_rtx;
798 }
799 for (i = 0; i < recog_data.n_dups; i++)
800 {
ea475b23
JJ
801 int dup_num = recog_data.dup_num[i];
802
541f7d56
BS
803 old_dups[i] = *recog_data.dup_loc[i];
804 *recog_data.dup_loc[i] = cc0_rtx;
ea475b23
JJ
805
806 /* For match_dup of match_operator or match_parallel, share
807 them, so that we don't miss changes in the dup. */
808 if (icode >= 0
809 && insn_data[icode].operand[dup_num].eliminable == 0)
810 old_dups[i] = recog_data.operand[dup_num];
1a43c33f 811 }
1a43c33f 812
fe08a886
BS
813 scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_all_read,
814 OP_IN, 0);
1a43c33f 815
541f7d56
BS
816 for (i = 0; i < recog_data.n_dups; i++)
817 *recog_data.dup_loc[i] = old_dups[i];
818 for (i = 0; i < n_ops; i++)
819 *recog_data.operand_loc[i] = old_operands[i];
7b82b5da 820
541f7d56 821 /* Step 2B: Can't rename function call argument registers. */
4b4bf941 822 if (CALL_P (insn) && CALL_INSN_FUNCTION_USAGE (insn))
541f7d56 823 scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn),
fe08a886 824 NO_REGS, terminate_all_read, OP_IN, 0);
7b82b5da 825
3ada20ee
RH
826 /* Step 2C: Can't rename asm operands that were originally
827 hard registers. */
828 if (asm_noperands (PATTERN (insn)) > 0)
829 for (i = 0; i < n_ops; i++)
830 {
831 rtx *loc = recog_data.operand_loc[i];
832 rtx op = *loc;
833
f8cfc6aa 834 if (REG_P (op)
3ada20ee
RH
835 && REGNO (op) == ORIGINAL_REGNO (op)
836 && (recog_data.operand_type[i] == OP_IN
837 || recog_data.operand_type[i] == OP_INOUT))
838 scan_rtx (insn, loc, NO_REGS, terminate_all_read, OP_IN, 0);
839 }
840
541f7d56
BS
841 /* Step 3: Append to chains for reads inside operands. */
842 for (i = 0; i < n_ops + recog_data.n_dups; i++)
843 {
844 int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
845 rtx *loc = (i < n_ops
846 ? recog_data.operand_loc[opn]
847 : recog_data.dup_loc[i - n_ops]);
e3a64162 848 enum reg_class cl = recog_op_alt[opn][alt].cl;
541f7d56
BS
849 enum op_type type = recog_data.operand_type[opn];
850
851 /* Don't scan match_operand here, since we've no reg class
852 information to pass down. Any operands that we could
853 substitute in will be represented elsewhere. */
854 if (recog_data.constraints[opn][0] == '\0')
855 continue;
7b82b5da 856
541f7d56 857 if (recog_op_alt[opn][alt].is_address)
e3a64162 858 scan_rtx_address (insn, loc, cl, mark_read, VOIDmode);
541f7d56 859 else
e3a64162 860 scan_rtx (insn, loc, cl, mark_read, type, 0);
541f7d56 861 }
7b82b5da 862
6fb85418
BS
863 /* Step 4: Close chains for registers that die here.
864 Also record updates for REG_INC notes. */
541f7d56 865 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
6fb85418
BS
866 {
867 if (REG_NOTE_KIND (note) == REG_DEAD)
fe08a886
BS
868 scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead,
869 OP_IN, 0);
6fb85418 870 else if (REG_NOTE_KIND (note) == REG_INC)
fe08a886
BS
871 scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read,
872 OP_INOUT, 0);
6fb85418 873 }
1a43c33f 874
541f7d56
BS
875 /* Step 4B: If this is a call, any chain live at this point
876 requires a caller-saved reg. */
4b4bf941 877 if (CALL_P (insn))
541f7d56
BS
878 {
879 struct du_chain *p;
880 for (p = open_chains; p; p = p->next_chain)
fe08a886 881 p->need_caller_save_reg = 1;
541f7d56 882 }
7b82b5da 883
541f7d56
BS
884 /* Step 5: Close open chains that overlap writes. Similar to
885 step 2, we hide in-out operands, since we do not want to
886 close these chains. */
7b82b5da 887
541f7d56
BS
888 for (i = 0; i < n_ops; i++)
889 {
890 old_operands[i] = recog_data.operand[i];
891 if (recog_data.operand_type[i] == OP_INOUT)
892 *recog_data.operand_loc[i] = cc0_rtx;
893 }
894 for (i = 0; i < recog_data.n_dups; i++)
895 {
896 int opn = recog_data.dup_num[i];
897 old_dups[i] = *recog_data.dup_loc[i];
898 if (recog_data.operand_type[opn] == OP_INOUT)
899 *recog_data.dup_loc[i] = cc0_rtx;
900 }
7b82b5da 901
fe08a886 902 scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN, 0);
7b82b5da 903
541f7d56
BS
904 for (i = 0; i < recog_data.n_dups; i++)
905 *recog_data.dup_loc[i] = old_dups[i];
906 for (i = 0; i < n_ops; i++)
907 *recog_data.operand_loc[i] = old_operands[i];
7b82b5da 908
541f7d56
BS
909 /* Step 6: Begin new chains for writes inside operands. */
910 /* ??? Many targets have output constraints on the SET_DEST
911 of a call insn, which is stupid, since these are certainly
3ada20ee
RH
912 ABI defined hard registers. Don't change calls at all.
913 Similarly take special care for asm statement that originally
914 referenced hard registers. */
915 if (asm_noperands (PATTERN (insn)) > 0)
916 {
917 for (i = 0; i < n_ops; i++)
918 if (recog_data.operand_type[i] == OP_OUT)
919 {
920 rtx *loc = recog_data.operand_loc[i];
921 rtx op = *loc;
e3a64162 922 enum reg_class cl = recog_op_alt[i][alt].cl;
3ada20ee 923
f8cfc6aa 924 if (REG_P (op)
3b03c671 925 && REGNO (op) == ORIGINAL_REGNO (op))
3ada20ee
RH
926 continue;
927
e3a64162 928 scan_rtx (insn, loc, cl, mark_write, OP_OUT,
3ada20ee
RH
929 recog_op_alt[i][alt].earlyclobber);
930 }
931 }
4b4bf941 932 else if (!CALL_P (insn))
541f7d56
BS
933 for (i = 0; i < n_ops + recog_data.n_dups; i++)
934 {
935 int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
936 rtx *loc = (i < n_ops
937 ? recog_data.operand_loc[opn]
938 : recog_data.dup_loc[i - n_ops]);
e3a64162 939 enum reg_class cl = recog_op_alt[opn][alt].cl;
541f7d56
BS
940
941 if (recog_data.operand_type[opn] == OP_OUT)
e3a64162 942 scan_rtx (insn, loc, cl, mark_write, OP_OUT,
fe08a886 943 recog_op_alt[opn][alt].earlyclobber);
541f7d56 944 }
7b82b5da 945
541f7d56
BS
946 /* Step 7: Close chains for registers that were never
947 really used here. */
948 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
949 if (REG_NOTE_KIND (note) == REG_UNUSED)
fe08a886
BS
950 scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead,
951 OP_IN, 0);
541f7d56 952 }
a813c111 953 if (insn == BB_END (bb))
541f7d56
BS
954 break;
955 }
7b82b5da 956
541f7d56
BS
957 /* Since we close every chain when we find a REG_DEAD note, anything that
958 is still open lives past the basic block, so it can't be renamed. */
959 return closed_chains;
960}
7b82b5da 961
c263766c 962/* Dump all def/use chains in CHAINS to DUMP_FILE. They are
541f7d56 963 printed in reverse order as that's how we build them. */
7b82b5da 964
541f7d56 965static void
0c20a65f 966dump_def_use_chain (struct du_chain *chains)
541f7d56
BS
967{
968 while (chains)
1a43c33f 969 {
541f7d56
BS
970 struct du_chain *this = chains;
971 int r = REGNO (*this->loc);
66fd46b6 972 int nregs = hard_regno_nregs[r][GET_MODE (*this->loc)];
c263766c 973 fprintf (dump_file, "Register %s (%d):", reg_names[r], nregs);
541f7d56
BS
974 while (this)
975 {
c263766c 976 fprintf (dump_file, " %d [%s]", INSN_UID (this->insn),
e3a64162 977 reg_class_names[this->cl]);
541f7d56
BS
978 this = this->next_use;
979 }
c263766c 980 fprintf (dump_file, "\n");
541f7d56 981 chains = chains->next_chain;
1a43c33f 982 }
7b82b5da 983}
8582c27b
RH
984\f
985/* The following code does forward propagation of hard register copies.
986 The object is to eliminate as many dependencies as possible, so that
987 we have the most scheduling freedom. As a side effect, we also clean
3b03c671 988 up some silly register allocation decisions made by reload. This
8582c27b
RH
989 code may be obsoleted by a new register allocator. */
990
991/* For each register, we have a list of registers that contain the same
3b03c671 992 value. The OLDEST_REGNO field points to the head of the list, and
8582c27b
RH
993 the NEXT_REGNO field runs through the list. The MODE field indicates
994 what mode the data is known to be in; this field is VOIDmode when the
995 register is not known to contain valid data. */
996
997struct value_data_entry
998{
999 enum machine_mode mode;
1000 unsigned int oldest_regno;
1001 unsigned int next_regno;
1002};
1003
1004struct value_data
1005{
1006 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
752ae914 1007 unsigned int max_value_regs;
8582c27b
RH
1008};
1009
d64d5e80
DJ
1010static void kill_value_one_regno (unsigned, struct value_data *);
1011static void kill_value_regno (unsigned, unsigned, struct value_data *);
0c20a65f
AJ
1012static void kill_value (rtx, struct value_data *);
1013static void set_value_regno (unsigned, enum machine_mode, struct value_data *);
1014static void init_value_data (struct value_data *);
1015static void kill_clobbered_value (rtx, rtx, void *);
1016static void kill_set_value (rtx, rtx, void *);
1017static int kill_autoinc_value (rtx *, void *);
1018static void copy_value (rtx, rtx, struct value_data *);
1019static bool mode_change_ok (enum machine_mode, enum machine_mode,
1020 unsigned int);
1021static rtx maybe_mode_change (enum machine_mode, enum machine_mode,
1022 enum machine_mode, unsigned int, unsigned int);
1023static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
1024static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx,
1025 struct value_data *);
1026static bool replace_oldest_value_addr (rtx *, enum reg_class,
1027 enum machine_mode, rtx,
1028 struct value_data *);
1029static bool replace_oldest_value_mem (rtx, rtx, struct value_data *);
1030static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
1031extern void debug_value_data (struct value_data *);
8582c27b 1032#ifdef ENABLE_CHECKING
0c20a65f 1033static void validate_value_data (struct value_data *);
8582c27b
RH
1034#endif
1035
d64d5e80
DJ
1036/* Kill register REGNO. This involves removing it from any value
1037 lists, and resetting the value mode to VOIDmode. This is only a
1038 helper function; it does not handle any hard registers overlapping
1039 with REGNO. */
8582c27b
RH
1040
1041static void
d64d5e80 1042kill_value_one_regno (unsigned int regno, struct value_data *vd)
8582c27b
RH
1043{
1044 unsigned int i, next;
1045
1046 if (vd->e[regno].oldest_regno != regno)
1047 {
1048 for (i = vd->e[regno].oldest_regno;
1049 vd->e[i].next_regno != regno;
1050 i = vd->e[i].next_regno)
1051 continue;
3de23727 1052 vd->e[i].next_regno = vd->e[regno].next_regno;
8582c27b
RH
1053 }
1054 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
1055 {
1056 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
3b03c671 1057 vd->e[i].oldest_regno = next;
8582c27b
RH
1058 }
1059
1060 vd->e[regno].mode = VOIDmode;
1061 vd->e[regno].oldest_regno = regno;
1062 vd->e[regno].next_regno = INVALID_REGNUM;
1063
1064#ifdef ENABLE_CHECKING
1065 validate_value_data (vd);
1066#endif
1067}
1068
d64d5e80
DJ
1069/* Kill the value in register REGNO for NREGS, and any other registers
1070 whose values overlap. */
1071
1072static void
753d0efa
AP
1073kill_value_regno (unsigned int regno, unsigned int nregs,
1074 struct value_data *vd)
d64d5e80
DJ
1075{
1076 unsigned int j;
1077
1078 /* Kill the value we're told to kill. */
1079 for (j = 0; j < nregs; ++j)
1080 kill_value_one_regno (regno + j, vd);
1081
1082 /* Kill everything that overlapped what we're told to kill. */
1083 if (regno < vd->max_value_regs)
1084 j = 0;
1085 else
1086 j = regno - vd->max_value_regs;
1087 for (; j < regno; ++j)
1088 {
1089 unsigned int i, n;
1090 if (vd->e[j].mode == VOIDmode)
1091 continue;
1092 n = hard_regno_nregs[j][vd->e[j].mode];
1093 if (j + n > regno)
1094 for (i = 0; i < n; ++i)
1095 kill_value_one_regno (j + i, vd);
1096 }
1097}
1098
1099/* Kill X. This is a convenience function wrapping kill_value_regno
3de23727 1100 so that we mind the mode the register is in. */
8582c27b
RH
1101
1102static void
0c20a65f 1103kill_value (rtx x, struct value_data *vd)
8582c27b 1104{
8686336f
JH
1105 /* SUBREGS are supposed to have been eliminated by now. But some
1106 ports, e.g. i386 sse, use them to smuggle vector type information
1107 through to instruction selection. Each such SUBREG should simplify,
1eeeb6a4 1108 so if we get a NULL we've done something wrong elsewhere. */
8686336f
JH
1109
1110 if (GET_CODE (x) == SUBREG)
1111 x = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
1112 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
8582c27b 1113 if (REG_P (x))
3de23727
RH
1114 {
1115 unsigned int regno = REGNO (x);
66fd46b6 1116 unsigned int n = hard_regno_nregs[regno][GET_MODE (x)];
752ae914 1117
d64d5e80 1118 kill_value_regno (regno, n, vd);
3de23727 1119 }
8582c27b
RH
1120}
1121
752ae914
RH
1122/* Remember that REGNO is valid in MODE. */
1123
1124static void
0c20a65f
AJ
1125set_value_regno (unsigned int regno, enum machine_mode mode,
1126 struct value_data *vd)
752ae914
RH
1127{
1128 unsigned int nregs;
1129
1130 vd->e[regno].mode = mode;
1131
66fd46b6 1132 nregs = hard_regno_nregs[regno][mode];
752ae914
RH
1133 if (nregs > vd->max_value_regs)
1134 vd->max_value_regs = nregs;
1135}
1136
8582c27b
RH
1137/* Initialize VD such that there are no known relationships between regs. */
1138
1139static void
0c20a65f 1140init_value_data (struct value_data *vd)
8582c27b
RH
1141{
1142 int i;
1143 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1144 {
1145 vd->e[i].mode = VOIDmode;
1146 vd->e[i].oldest_regno = i;
1147 vd->e[i].next_regno = INVALID_REGNUM;
1148 }
752ae914 1149 vd->max_value_regs = 0;
8582c27b
RH
1150}
1151
1152/* Called through note_stores. If X is clobbered, kill its value. */
1153
1154static void
0c20a65f 1155kill_clobbered_value (rtx x, rtx set, void *data)
8582c27b
RH
1156{
1157 struct value_data *vd = data;
1158 if (GET_CODE (set) == CLOBBER)
1159 kill_value (x, vd);
1160}
1161
3b03c671 1162/* Called through note_stores. If X is set, not clobbered, kill its
8582c27b
RH
1163 current value and install it as the root of its own value list. */
1164
1165static void
0c20a65f 1166kill_set_value (rtx x, rtx set, void *data)
8582c27b
RH
1167{
1168 struct value_data *vd = data;
c43a12b5 1169 if (GET_CODE (set) != CLOBBER)
8582c27b 1170 {
3de23727 1171 kill_value (x, vd);
c43a12b5 1172 if (REG_P (x))
3b03c671 1173 set_value_regno (REGNO (x), GET_MODE (x), vd);
8582c27b
RH
1174 }
1175}
1176
1177/* Called through for_each_rtx. Kill any register used as the base of an
1178 auto-increment expression, and install that register as the root of its
1179 own value list. */
1180
1181static int
0c20a65f 1182kill_autoinc_value (rtx *px, void *data)
8582c27b
RH
1183{
1184 rtx x = *px;
1185 struct value_data *vd = data;
1186
ec8e098d 1187 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
8582c27b 1188 {
3de23727
RH
1189 x = XEXP (x, 0);
1190 kill_value (x, vd);
752ae914 1191 set_value_regno (REGNO (x), Pmode, vd);
8582c27b
RH
1192 return -1;
1193 }
1194
1195 return 0;
1196}
1197
1198/* Assert that SRC has been copied to DEST. Adjust the data structures
1199 to reflect that SRC contains an older copy of the shared value. */
1200
1201static void
0c20a65f 1202copy_value (rtx dest, rtx src, struct value_data *vd)
8582c27b
RH
1203{
1204 unsigned int dr = REGNO (dest);
1205 unsigned int sr = REGNO (src);
21e16bd6 1206 unsigned int dn, sn;
8582c27b
RH
1207 unsigned int i;
1208
1209 /* ??? At present, it's possible to see noop sets. It'd be nice if
1210 this were cleaned up beforehand... */
1211 if (sr == dr)
1212 return;
1213
1214 /* Do not propagate copies to the stack pointer, as that can leave
88cad84b 1215 memory accesses with no scheduling dependency on the stack update. */
8582c27b
RH
1216 if (dr == STACK_POINTER_REGNUM)
1217 return;
1218
1219 /* Likewise with the frame pointer, if we're using one. */
1220 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
1221 return;
1222
21e16bd6 1223 /* If SRC and DEST overlap, don't record anything. */
66fd46b6
JH
1224 dn = hard_regno_nregs[dr][GET_MODE (dest)];
1225 sn = hard_regno_nregs[sr][GET_MODE (dest)];
21e16bd6
RH
1226 if ((dr > sr && dr < sr + sn)
1227 || (sr > dr && sr < dr + dn))
1228 return;
1229
8582c27b
RH
1230 /* If SRC had no assigned mode (i.e. we didn't know it was live)
1231 assign it now and assume the value came from an input argument
1232 or somesuch. */
1233 if (vd->e[sr].mode == VOIDmode)
752ae914 1234 set_value_regno (sr, vd->e[dr].mode, vd);
8582c27b 1235
27d30956 1236 /* If we are narrowing the input to a smaller number of hard regs,
dbf65c2f
R
1237 and it is in big endian, we are really extracting a high part.
1238 Since we generally associate a low part of a value with the value itself,
1239 we must not do the same for the high part.
1240 Note we can still get low parts for the same mode combination through
1241 a two-step copy involving differently sized hard regs.
1242 Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each:
1243 (set (reg:DI r0) (reg:DI fr0))
1244 (set (reg:SI fr2) (reg:SI r0))
1245 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
1246 (set (reg:SI fr2) (reg:SI fr0))
1247 loads the high part of (reg:DI fr0) into fr2.
1248
1249 We can't properly represent the latter case in our tables, so don't
1250 record anything then. */
66fd46b6 1251 else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]
dbf65c2f
R
1252 && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD
1253 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
1254 return;
1255
42bd17b7
RH
1256 /* If SRC had been assigned a mode narrower than the copy, we can't
1257 link DEST into the chain, because not all of the pieces of the
1258 copy came from oldest_regno. */
66fd46b6 1259 else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode])
42bd17b7
RH
1260 return;
1261
8582c27b
RH
1262 /* Link DR at the end of the value chain used by SR. */
1263
1264 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
1265
1266 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
1267 continue;
1268 vd->e[i].next_regno = dr;
1269
1270#ifdef ENABLE_CHECKING
1271 validate_value_data (vd);
1272#endif
1273}
1274
8610ba70
RH
1275/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
1276
1277static bool
0c20a65f
AJ
1278mode_change_ok (enum machine_mode orig_mode, enum machine_mode new_mode,
1279 unsigned int regno ATTRIBUTE_UNUSED)
8610ba70
RH
1280{
1281 if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode))
1282 return false;
1283
cff9f8d5
AH
1284#ifdef CANNOT_CHANGE_MODE_CLASS
1285 return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode);
8610ba70
RH
1286#endif
1287
1288 return true;
1289}
1290
61dde664
R
1291/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
1292 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
1293 in NEW_MODE.
1294 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
1295
1296static rtx
0c20a65f
AJ
1297maybe_mode_change (enum machine_mode orig_mode, enum machine_mode copy_mode,
1298 enum machine_mode new_mode, unsigned int regno,
1299 unsigned int copy_regno ATTRIBUTE_UNUSED)
61dde664
R
1300{
1301 if (orig_mode == new_mode)
1302 return gen_rtx_raw_REG (new_mode, regno);
1303 else if (mode_change_ok (orig_mode, new_mode, regno))
1304 {
66fd46b6
JH
1305 int copy_nregs = hard_regno_nregs[copy_regno][copy_mode];
1306 int use_nregs = hard_regno_nregs[copy_regno][new_mode];
61dde664
R
1307 int copy_offset
1308 = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs);
1309 int offset
1310 = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset;
1311 int byteoffset = offset % UNITS_PER_WORD;
1312 int wordoffset = offset - byteoffset;
1313
1314 offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0)
1315 + (BYTES_BIG_ENDIAN ? byteoffset : 0));
1316 return gen_rtx_raw_REG (new_mode,
1317 regno + subreg_regno_offset (regno, orig_mode,
1318 offset,
1319 new_mode));
1320 }
1321 return NULL_RTX;
1322}
1323
8582c27b 1324/* Find the oldest copy of the value contained in REGNO that is in
e3a64162 1325 register class CL and has mode MODE. If found, return an rtx
8582c27b
RH
1326 of that oldest register, otherwise return NULL. */
1327
1328static rtx
e3a64162 1329find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
8582c27b 1330{
3ada20ee
RH
1331 unsigned int regno = REGNO (reg);
1332 enum machine_mode mode = GET_MODE (reg);
8582c27b
RH
1333 unsigned int i;
1334
57d1019b
RH
1335 /* If we are accessing REG in some mode other that what we set it in,
1336 make sure that the replacement is valid. In particular, consider
1337 (set (reg:DI r11) (...))
1338 (set (reg:SI r9) (reg:SI r11))
1339 (set (reg:SI r10) (...))
1340 (set (...) (reg:DI r9))
1341 Replacing r9 with r11 is invalid. */
1342 if (mode != vd->e[regno].mode)
1343 {
66fd46b6
JH
1344 if (hard_regno_nregs[regno][mode]
1345 > hard_regno_nregs[regno][vd->e[regno].mode])
57d1019b
RH
1346 return NULL_RTX;
1347 }
1348
8582c27b 1349 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
cffa2189
R
1350 {
1351 enum machine_mode oldmode = vd->e[i].mode;
61dde664 1352 rtx new;
684bcee5 1353 unsigned int last;
cffa2189 1354
66fd46b6 1355 for (last = i; last < i + hard_regno_nregs[i][mode]; last++)
e3a64162 1356 if (!TEST_HARD_REG_BIT (reg_class_contents[cl], last))
684bcee5
RE
1357 return NULL_RTX;
1358
abbe8578
KH
1359 new = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
1360 if (new)
684bcee5
RE
1361 {
1362 ORIGINAL_REGNO (new) = ORIGINAL_REGNO (reg);
1363 REG_ATTRS (new) = REG_ATTRS (reg);
1364 return new;
1365 }
cffa2189 1366 }
8582c27b
RH
1367
1368 return NULL_RTX;
1369}
1370
1371/* If possible, replace the register at *LOC with the oldest register
e3a64162 1372 in register class CL. Return true if successfully replaced. */
8582c27b
RH
1373
1374static bool
e3a64162 1375replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn,
0c20a65f 1376 struct value_data *vd)
8582c27b 1377{
e3a64162 1378 rtx new = find_oldest_value_reg (cl, *loc, vd);
8582c27b
RH
1379 if (new)
1380 {
c263766c
RH
1381 if (dump_file)
1382 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
8582c27b
RH
1383 INSN_UID (insn), REGNO (*loc), REGNO (new));
1384
1385 *loc = new;
1386 return true;
1387 }
1388 return false;
1389}
1390
1391/* Similar to replace_oldest_value_reg, but *LOC contains an address.
e3a64162 1392 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
8582c27b
RH
1393 BASE_REG_CLASS depending on how the register is being considered. */
1394
1395static bool
e3a64162 1396replace_oldest_value_addr (rtx *loc, enum reg_class cl,
0c20a65f
AJ
1397 enum machine_mode mode, rtx insn,
1398 struct value_data *vd)
8582c27b
RH
1399{
1400 rtx x = *loc;
1401 RTX_CODE code = GET_CODE (x);
1402 const char *fmt;
1403 int i, j;
1404 bool changed = false;
1405
1406 switch (code)
1407 {
1408 case PLUS:
1409 {
1410 rtx orig_op0 = XEXP (x, 0);
1411 rtx orig_op1 = XEXP (x, 1);
1412 RTX_CODE code0 = GET_CODE (orig_op0);
1413 RTX_CODE code1 = GET_CODE (orig_op1);
1414 rtx op0 = orig_op0;
1415 rtx op1 = orig_op1;
1416 rtx *locI = NULL;
1417 rtx *locB = NULL;
1418
1419 if (GET_CODE (op0) == SUBREG)
1420 {
1421 op0 = SUBREG_REG (op0);
1422 code0 = GET_CODE (op0);
1423 }
1424
1425 if (GET_CODE (op1) == SUBREG)
1426 {
1427 op1 = SUBREG_REG (op1);
1428 code1 = GET_CODE (op1);
1429 }
1430
1431 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
1432 || code0 == ZERO_EXTEND || code1 == MEM)
1433 {
1434 locI = &XEXP (x, 0);
1435 locB = &XEXP (x, 1);
1436 }
1437 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
1438 || code1 == ZERO_EXTEND || code0 == MEM)
1439 {
1440 locI = &XEXP (x, 1);
1441 locB = &XEXP (x, 0);
1442 }
1443 else if (code0 == CONST_INT || code0 == CONST
1444 || code0 == SYMBOL_REF || code0 == LABEL_REF)
1445 locB = &XEXP (x, 1);
1446 else if (code1 == CONST_INT || code1 == CONST
1447 || code1 == SYMBOL_REF || code1 == LABEL_REF)
1448 locB = &XEXP (x, 0);
1449 else if (code0 == REG && code1 == REG)
1450 {
1451 int index_op;
1452
1453 if (REG_OK_FOR_INDEX_P (op0)
1454 && REG_MODE_OK_FOR_BASE_P (op1, mode))
1455 index_op = 0;
1456 else if (REG_OK_FOR_INDEX_P (op1)
1457 && REG_MODE_OK_FOR_BASE_P (op0, mode))
1458 index_op = 1;
1459 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
1460 index_op = 0;
1461 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
1462 index_op = 1;
1463 else if (REG_OK_FOR_INDEX_P (op1))
1464 index_op = 1;
1465 else
1466 index_op = 0;
1467
1468 locI = &XEXP (x, index_op);
1469 locB = &XEXP (x, !index_op);
1470 }
1471 else if (code0 == REG)
1472 {
1473 locI = &XEXP (x, 0);
1474 locB = &XEXP (x, 1);
1475 }
1476 else if (code1 == REG)
1477 {
1478 locI = &XEXP (x, 1);
1479 locB = &XEXP (x, 0);
1480 }
1481
1482 if (locI)
1483 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS, mode,
3b03c671 1484 insn, vd);
8582c27b 1485 if (locB)
3dcc68a4
NC
1486 changed |= replace_oldest_value_addr (locB,
1487 MODE_BASE_REG_CLASS (mode),
1488 mode, insn, vd);
8582c27b
RH
1489 return changed;
1490 }
1491
1492 case POST_INC:
1493 case POST_DEC:
1494 case POST_MODIFY:
1495 case PRE_INC:
1496 case PRE_DEC:
1497 case PRE_MODIFY:
1498 return false;
1499
1500 case MEM:
1501 return replace_oldest_value_mem (x, insn, vd);
1502
1503 case REG:
e3a64162 1504 return replace_oldest_value_reg (loc, cl, insn, vd);
8582c27b
RH
1505
1506 default:
1507 break;
1508 }
1509
1510 fmt = GET_RTX_FORMAT (code);
1511 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1512 {
1513 if (fmt[i] == 'e')
e3a64162 1514 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode,
8582c27b
RH
1515 insn, vd);
1516 else if (fmt[i] == 'E')
1517 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
e3a64162 1518 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
3b03c671 1519 mode, insn, vd);
8582c27b
RH
1520 }
1521
1522 return changed;
1523}
1524
1525/* Similar to replace_oldest_value_reg, but X contains a memory. */
1526
1527static bool
0c20a65f 1528replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd)
8582c27b 1529{
3dcc68a4
NC
1530 return replace_oldest_value_addr (&XEXP (x, 0),
1531 MODE_BASE_REG_CLASS (GET_MODE (x)),
8582c27b
RH
1532 GET_MODE (x), insn, vd);
1533}
1534
1535/* Perform the forward copy propagation on basic block BB. */
1536
1537static bool
0c20a65f 1538copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
8582c27b
RH
1539{
1540 bool changed = false;
1541 rtx insn;
1542
a813c111 1543 for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
8582c27b
RH
1544 {
1545 int n_ops, i, alt, predicated;
3ada20ee 1546 bool is_asm;
8582c27b
RH
1547 rtx set;
1548
1549 if (! INSN_P (insn))
1550 {
a813c111 1551 if (insn == BB_END (bb))
8582c27b
RH
1552 break;
1553 else
1554 continue;
1555 }
1556
1557 set = single_set (insn);
1558 extract_insn (insn);
4be9e9cb 1559 if (! constrain_operands (1))
3b03c671 1560 fatal_insn_not_found (insn);
8582c27b
RH
1561 preprocess_constraints ();
1562 alt = which_alternative;
1563 n_ops = recog_data.n_operands;
3ada20ee 1564 is_asm = asm_noperands (PATTERN (insn)) >= 0;
8582c27b
RH
1565
1566 /* Simplify the code below by rewriting things to reflect
1567 matching constraints. Also promote OP_OUT to OP_INOUT
1568 in predicated instructions. */
1569
1570 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
1571 for (i = 0; i < n_ops; ++i)
1572 {
1573 int matches = recog_op_alt[i][alt].matches;
1574 if (matches >= 0)
e3a64162 1575 recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl;
8582c27b
RH
1576 if (matches >= 0 || recog_op_alt[i][alt].matched >= 0
1577 || (predicated && recog_data.operand_type[i] == OP_OUT))
1578 recog_data.operand_type[i] = OP_INOUT;
1579 }
1580
1581 /* For each earlyclobber operand, zap the value data. */
1582 for (i = 0; i < n_ops; i++)
1583 if (recog_op_alt[i][alt].earlyclobber)
1584 kill_value (recog_data.operand[i], vd);
1585
1586 /* Within asms, a clobber cannot overlap inputs or outputs.
1587 I wouldn't think this were true for regular insns, but
1588 scan_rtx treats them like that... */
1589 note_stores (PATTERN (insn), kill_clobbered_value, vd);
1590
1591 /* Kill all auto-incremented values. */
1592 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
1593 for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd);
1594
752ae914
RH
1595 /* Kill all early-clobbered operands. */
1596 for (i = 0; i < n_ops; i++)
1597 if (recog_op_alt[i][alt].earlyclobber)
1598 kill_value (recog_data.operand[i], vd);
1599
8582c27b
RH
1600 /* Special-case plain move instructions, since we may well
1601 be able to do the move from a different register class. */
1602 if (set && REG_P (SET_SRC (set)))
1603 {
3ada20ee
RH
1604 rtx src = SET_SRC (set);
1605 unsigned int regno = REGNO (src);
1606 enum machine_mode mode = GET_MODE (src);
8582c27b
RH
1607 unsigned int i;
1608 rtx new;
1609
57d1019b
RH
1610 /* If we are accessing SRC in some mode other that what we
1611 set it in, make sure that the replacement is valid. */
1612 if (mode != vd->e[regno].mode)
1613 {
66fd46b6
JH
1614 if (hard_regno_nregs[regno][mode]
1615 > hard_regno_nregs[regno][vd->e[regno].mode])
57d1019b
RH
1616 goto no_move_special_case;
1617 }
1618
8582c27b
RH
1619 /* If the destination is also a register, try to find a source
1620 register in the same class. */
1621 if (REG_P (SET_DEST (set)))
1622 {
3ada20ee 1623 new = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd);
8582c27b
RH
1624 if (new && validate_change (insn, &SET_SRC (set), new, 0))
1625 {
c263766c
RH
1626 if (dump_file)
1627 fprintf (dump_file,
8582c27b
RH
1628 "insn %u: replaced reg %u with %u\n",
1629 INSN_UID (insn), regno, REGNO (new));
3b03c671 1630 changed = true;
8582c27b
RH
1631 goto did_replacement;
1632 }
1633 }
1634
1635 /* Otherwise, try all valid registers and see if its valid. */
1636 for (i = vd->e[regno].oldest_regno; i != regno;
1637 i = vd->e[i].next_regno)
61dde664
R
1638 {
1639 new = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
1640 mode, i, regno);
1641 if (new != NULL_RTX)
1642 {
1643 if (validate_change (insn, &SET_SRC (set), new, 0))
1644 {
1645 ORIGINAL_REGNO (new) = ORIGINAL_REGNO (src);
d1d3c9a6 1646 REG_ATTRS (new) = REG_ATTRS (src);
c263766c
RH
1647 if (dump_file)
1648 fprintf (dump_file,
61dde664
R
1649 "insn %u: replaced reg %u with %u\n",
1650 INSN_UID (insn), regno, REGNO (new));
1651 changed = true;
1652 goto did_replacement;
1653 }
1654 }
1655 }
8582c27b 1656 }
57d1019b 1657 no_move_special_case:
8582c27b
RH
1658
1659 /* For each input operand, replace a hard register with the
1660 eldest live copy that's in an appropriate register class. */
1661 for (i = 0; i < n_ops; i++)
1662 {
1663 bool replaced = false;
1664
1665 /* Don't scan match_operand here, since we've no reg class
1666 information to pass down. Any operands that we could
1667 substitute in will be represented elsewhere. */
1668 if (recog_data.constraints[i][0] == '\0')
1669 continue;
1670
3ada20ee 1671 /* Don't replace in asms intentionally referencing hard regs. */
f8cfc6aa 1672 if (is_asm && REG_P (recog_data.operand[i])
3ada20ee
RH
1673 && (REGNO (recog_data.operand[i])
1674 == ORIGINAL_REGNO (recog_data.operand[i])))
1675 continue;
1676
8582c27b
RH
1677 if (recog_data.operand_type[i] == OP_IN)
1678 {
1679 if (recog_op_alt[i][alt].is_address)
1680 replaced
1681 = replace_oldest_value_addr (recog_data.operand_loc[i],
e3a64162 1682 recog_op_alt[i][alt].cl,
8582c27b
RH
1683 VOIDmode, insn, vd);
1684 else if (REG_P (recog_data.operand[i]))
1685 replaced
1686 = replace_oldest_value_reg (recog_data.operand_loc[i],
e3a64162 1687 recog_op_alt[i][alt].cl,
8582c27b 1688 insn, vd);
3c0cb5de 1689 else if (MEM_P (recog_data.operand[i]))
8582c27b
RH
1690 replaced = replace_oldest_value_mem (recog_data.operand[i],
1691 insn, vd);
1692 }
3c0cb5de 1693 else if (MEM_P (recog_data.operand[i]))
8582c27b 1694 replaced = replace_oldest_value_mem (recog_data.operand[i],
3b03c671 1695 insn, vd);
8582c27b
RH
1696
1697 /* If we performed any replacement, update match_dups. */
1698 if (replaced)
1699 {
1700 int j;
1701 rtx new;
1702
1703 changed = true;
1704
1705 new = *recog_data.operand_loc[i];
1706 recog_data.operand[i] = new;
1707 for (j = 0; j < recog_data.n_dups; j++)
1708 if (recog_data.dup_num[j] == i)
1709 *recog_data.dup_loc[j] = new;
1710 }
1711 }
1712
1713 did_replacement:
1714 /* Clobber call-clobbered registers. */
4b4bf941 1715 if (CALL_P (insn))
8582c27b
RH
1716 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1717 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
d64d5e80 1718 kill_value_regno (i, 1, vd);
8582c27b
RH
1719
1720 /* Notice stores. */
1721 note_stores (PATTERN (insn), kill_set_value, vd);
1722
1723 /* Notice copies. */
1724 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
1725 copy_value (SET_DEST (set), SET_SRC (set), vd);
1726
a813c111 1727 if (insn == BB_END (bb))
8582c27b
RH
1728 break;
1729 }
1730
1731 return changed;
1732}
1733
1734/* Main entry point for the forward copy propagation optimization. */
1735
1736void
0c20a65f 1737copyprop_hardreg_forward (void)
8582c27b 1738{
8582c27b 1739 struct value_data *all_vd;
3de23727 1740 bool need_refresh;
d950dee3 1741 basic_block bb, bbp = 0;
8582c27b 1742
3de23727 1743 need_refresh = false;
8582c27b 1744
d55bc081 1745 all_vd = xmalloc (sizeof (struct value_data) * last_basic_block);
8582c27b 1746
e0082a72 1747 FOR_EACH_BB (bb)
8582c27b 1748 {
8582c27b
RH
1749 /* If a block has a single predecessor, that we've already
1750 processed, begin with the value data that was live at
1751 the end of the predecessor block. */
d91edf86 1752 /* ??? Ought to use more intelligent queuing of blocks. */
628f6a4e
BE
1753 if (EDGE_COUNT (bb->preds) > 0)
1754 for (bbp = bb; bbp && bbp != EDGE_PRED (bb, 0)->src; bbp = bbp->prev_bb);
1755 if (EDGE_COUNT (bb->preds) == 1
1756 && ! (EDGE_PRED (bb, 0)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH))
1757 && EDGE_PRED (bb, 0)->src != ENTRY_BLOCK_PTR
e0082a72 1758 && bbp)
628f6a4e 1759 all_vd[bb->index] = all_vd[EDGE_PRED (bb, 0)->src->index];
8582c27b 1760 else
e0082a72 1761 init_value_data (all_vd + bb->index);
8582c27b 1762
e0082a72 1763 if (copyprop_hardreg_forward_1 (bb, all_vd + bb->index))
3de23727 1764 need_refresh = true;
8582c27b
RH
1765 }
1766
1767 if (need_refresh)
1768 {
c263766c
RH
1769 if (dump_file)
1770 fputs ("\n\n", dump_file);
8582c27b 1771
3de23727
RH
1772 /* ??? Irritatingly, delete_noop_moves does not take a set of blocks
1773 to scan, so we have to do a life update with no initial set of
1774 blocks Just In Case. */
827c06b6 1775 delete_noop_moves ();
3de23727 1776 update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES,
8582c27b
RH
1777 PROP_DEATH_NOTES
1778 | PROP_SCAN_DEAD_CODE
1779 | PROP_KILL_DEAD_CODE);
1780 }
1781
8582c27b
RH
1782 free (all_vd);
1783}
1784
1785/* Dump the value chain data to stderr. */
1786
1787void
0c20a65f 1788debug_value_data (struct value_data *vd)
8582c27b
RH
1789{
1790 HARD_REG_SET set;
1791 unsigned int i, j;
1792
1793 CLEAR_HARD_REG_SET (set);
1794
1795 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1796 if (vd->e[i].oldest_regno == i)
1797 {
1798 if (vd->e[i].mode == VOIDmode)
1799 {
1800 if (vd->e[i].next_regno != INVALID_REGNUM)
1801 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1802 i, vd->e[i].next_regno);
1803 continue;
1804 }
1805
1806 SET_HARD_REG_BIT (set, i);
1807 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1808
1809 for (j = vd->e[i].next_regno;
1810 j != INVALID_REGNUM;
1811 j = vd->e[j].next_regno)
1812 {
57d1019b 1813 if (TEST_HARD_REG_BIT (set, j))
8582c27b
RH
1814 {
1815 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1816 return;
1817 }
1818
1819 if (vd->e[j].oldest_regno != i)
1820 {
1821 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1822 j, vd->e[j].oldest_regno);
1823 return;
1824 }
1825 SET_HARD_REG_BIT (set, j);
1826 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1827 }
1828 fputc ('\n', stderr);
1829 }
1830
1831 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1832 if (! TEST_HARD_REG_BIT (set, i)
1833 && (vd->e[i].mode != VOIDmode
1834 || vd->e[i].oldest_regno != i
1835 || vd->e[i].next_regno != INVALID_REGNUM))
1836 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1837 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1838 vd->e[i].next_regno);
1839}
1840
1841#ifdef ENABLE_CHECKING
1842static void
0c20a65f 1843validate_value_data (struct value_data *vd)
8582c27b
RH
1844{
1845 HARD_REG_SET set;
1846 unsigned int i, j;
1847
1848 CLEAR_HARD_REG_SET (set);
1849
1850 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1851 if (vd->e[i].oldest_regno == i)
1852 {
1853 if (vd->e[i].mode == VOIDmode)
1854 {
1855 if (vd->e[i].next_regno != INVALID_REGNUM)
1856 internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)",
1857 i, vd->e[i].next_regno);
1858 continue;
1859 }
1860
1861 SET_HARD_REG_BIT (set, i);
1862
1863 for (j = vd->e[i].next_regno;
1864 j != INVALID_REGNUM;
1865 j = vd->e[j].next_regno)
1866 {
1867 if (TEST_HARD_REG_BIT (set, j))
1868 internal_error ("validate_value_data: Loop in regno chain (%u)",
1869 j);
1870 if (vd->e[j].oldest_regno != i)
1871 internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)",
1872 j, vd->e[j].oldest_regno);
1873
1874 SET_HARD_REG_BIT (set, j);
1875 }
1876 }
1877
1878 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1879 if (! TEST_HARD_REG_BIT (set, i)
1880 && (vd->e[i].mode != VOIDmode
1881 || vd->e[i].oldest_regno != i
1882 || vd->e[i].next_regno != INVALID_REGNUM))
1883 internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)",
1884 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1885 vd->e[i].next_regno);
1886}
1887#endif