[thirdparty/gcc.git] / gcc / regs.h

/* Define per-register tables for data flow info and register allocation.
   Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
   1999, 2000, 2003, 2004 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2, or (at your option) any later
version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING.  If not, write to the Free
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.  */

#ifndef GCC_REGS_H
#define GCC_REGS_H

#include "varray.h"
#include "obstack.h"
#include "hard-reg-set.h"
#include "basic-block.h"

#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]

/* When you only have the mode of a pseudo register before it has a hard
   register chosen for it, this reports the size of each hard register
   a pseudo in such a mode would get allocated to.  A target may
   override this.  */

#ifndef REGMODE_NATURAL_SIZE
#define REGMODE_NATURAL_SIZE(MODE)	UNITS_PER_WORD
#endif

#ifndef SMALL_REGISTER_CLASSES
#define SMALL_REGISTER_CLASSES 0
#endif

/* Maximum register number used in this function, plus one.  */

extern int max_regno;

/* Register information indexed by register number */
typedef struct reg_info_def
{				/* fields set by reg_scan */
  int first_uid;		/* UID of first insn to use (REG n) */
  int last_uid;			/* UID of last insn to use (REG n) */

				/* fields set by reg_scan & flow_analysis */
  int sets;			/* # of times (REG n) is set */

				/* fields set by flow_analysis */
  int refs;			/* # of times (REG n) is used or set */
  int freq;			/* # estimated frequency (REG n) is used or set */
  int deaths;			/* # of times (REG n) dies */
  int live_length;		/* # of instructions (REG n) is live */
  int calls_crossed;		/* # of calls (REG n) is live across */
  int throw_calls_crossed;	/* # of calls that may throw (REG n) is live across */
  int basic_block;		/* # of basic blocks (REG n) is used in */
} reg_info;

typedef reg_info *reg_info_p;

DEF_VEC_P(reg_info_p);
DEF_VEC_ALLOC_P(reg_info_p,heap);

extern VEC(reg_info_p,heap) *reg_n_info;

/* Indexed by n, gives number of times (REG n) is used or set.  */

#define REG_N_REFS(N) (VEC_index (reg_info_p, reg_n_info, N)->refs)

/* Estimate frequency of references to register N.  */

#define REG_FREQ(N) (VEC_index (reg_info_p, reg_n_info, N)->freq)

/* The weights for each insn varries from 0 to REG_FREQ_BASE.
   This constant does not need to be high, as in infrequently executed
   regions we want to count instructions equivalently to optimize for
   size instead of speed.  */
#define REG_FREQ_MAX 1000

/* Compute register frequency from the BB frequency.  When optimizing for size,
   or profile driven feedback is available and the function is never executed,
   frequency is always equivalent.  Otherwise rescale the basic block
   frequency.  */
#define REG_FREQ_FROM_BB(bb) (optimize_size				      \
			      || (flag_branch_probabilities		      \
				  && !ENTRY_BLOCK_PTR->count)		      \
			      ? REG_FREQ_MAX				      \
			      : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
			      ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
			      : 1)

/* Indexed by n, gives number of times (REG n) is set.
   ??? both regscan and flow allocate space for this.  We should settle
   on just copy.  */

#define REG_N_SETS(N) (VEC_index (reg_info_p, reg_n_info, N)->sets)

/* Indexed by N, gives number of insns in which register N dies.
   Note that if register N is live around loops, it can die
   in transitions between basic blocks, and that is not counted here.
   So this is only a reliable indicator of how many regions of life there are
   for registers that are contained in one basic block.  */

#define REG_N_DEATHS(N) (VEC_index (reg_info_p, reg_n_info, N)->deaths)

/* Get the number of consecutive words required to hold pseudo-reg N.  */

#define PSEUDO_REGNO_SIZE(N) \
  ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)		\
   / UNITS_PER_WORD)

/* Get the number of bytes required to hold pseudo-reg N.  */

#define PSEUDO_REGNO_BYTES(N) \
  GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))

/* Get the machine mode of pseudo-reg N.  */

#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])

/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */

#define REG_N_CALLS_CROSSED(N)					\
  (VEC_index (reg_info_p, reg_n_info, N)->calls_crossed)

/* Indexed by N, gives number of CALL_INSNS that may throw, across which
   (REG n) is live.  */

#define REG_N_THROWING_CALLS_CROSSED(N) \
  (VEC_index (reg_info_p, reg_n_info, N)->throw_calls_crossed)

/* Total number of instructions at which (REG n) is live.
   The larger this is, the less priority (REG n) gets for
   allocation in a hard register (in global-alloc).
   This is set in flow.c and remains valid for the rest of the compilation
   of the function; it is used to control register allocation.

   local-alloc.c may alter this number to change the priority.

   Negative values are special.
   -1 is used to mark a pseudo reg which has a constant or memory equivalent
   and is used infrequently enough that it should not get a hard register.
   -2 is used to mark a pseudo reg for a parameter, when a frame pointer
   is not required.  global.c makes an allocno for this but does
   not try to assign a hard register to it.  */

#define REG_LIVE_LENGTH(N)				\
  (VEC_index (reg_info_p, reg_n_info, N)->live_length)

/* Vector of substitutions of register numbers,
   used to map pseudo regs into hardware regs.

   This can't be folded into reg_n_info without changing all of the
   machine dependent directories, since the reload functions
   in the machine dependent files access it.  */

extern short *reg_renumber;

/* Vector indexed by hardware reg saying whether that reg is ever used.  */

extern char regs_ever_live[FIRST_PSEUDO_REGISTER];

/* Like regs_ever_live, but saying whether reg is set by asm statements.  */

extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];

/* Vector indexed by machine mode saying whether there are regs of that mode.  */

extern bool have_regs_of_mode [MAX_MACHINE_MODE];

/* For each hard register, the widest mode object that it can contain.
   This will be a MODE_INT mode if the register can hold integers.  Otherwise
   it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
   register.  */

extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];

/* Vector indexed by regno; gives uid of first insn using that reg.
   This is computed by reg_scan for use by cse and loop.
   It is sometimes adjusted for subsequent changes during loop,
   but not adjusted by cse even if cse invalidates it.  */

#define REGNO_FIRST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->first_uid)

/* Vector indexed by regno; gives uid of last insn using that reg.
   This is computed by reg_scan for use by cse and loop.
   It is sometimes adjusted for subsequent changes during loop,
   but not adjusted by cse even if cse invalidates it.
   This is harmless since cse won't scan through a loop end.  */

#define REGNO_LAST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->last_uid)

/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
   that have to go in the same hard reg.  */
extern rtx regs_may_share;

/* Flag set by local-alloc or global-alloc if they decide to allocate
   something in a call-clobbered register.  */

extern int caller_save_needed;

/* Predicate to decide whether to give a hard reg to a pseudo which
   is referenced REFS times and would need to be saved and restored
   around a call CALLS times.  */

#ifndef CALLER_SAVE_PROFITABLE
#define CALLER_SAVE_PROFITABLE(REFS, CALLS)  (4 * (CALLS) < (REFS))
#endif

/* On most machines a register class is likely to be spilled if it
   only has one register.  */
#ifndef CLASS_LIKELY_SPILLED_P
#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
#endif

/* Select a register mode required for caller save of hard regno REGNO.  */
#ifndef HARD_REGNO_CALLER_SAVE_MODE
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
  choose_hard_reg_mode (REGNO, NREGS, false)
#endif

/* Registers that get partially clobbered by a call in a given mode.
   These must not be call used registers.  */
#ifndef HARD_REGNO_CALL_PART_CLOBBERED
#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
#endif

/* Allocate reg_n_info tables */
extern void allocate_reg_info (size_t, int, int);

/* Specify number of hard registers given machine mode occupy.  */
extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];

#endif /* GCC_REGS_H */
Commit	Line	Data
c3bcc836	1	/* Define per-register tables for data flow info and register allocation.
af841dbd	2	Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
e146f815	3	1999, 2000, 2003, 2004 Free Software Foundation, Inc.
c3bcc836	4
1322177d	5	This file is part of GCC.
c3bcc836	6
1322177d LB	7	GCC is free software; you can redistribute it and/or modify it under
	8	the terms of the GNU General Public License as published by the Free
	9	Software Foundation; either version 2, or (at your option) any later
	10	version.
c3bcc836	11
1322177d LB	12	GCC is distributed in the hope that it will be useful, but WITHOUT ANY
	13	WARRANTY; without even the implied warranty of MERCHANTABILITY or
	14	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	15	for more details.
c3bcc836 RK	16
c3bcc836 RK	17	You should have received a copy of the GNU General Public License
1322177d	18	along with GCC; see the file COPYING. If not, write to the Free
366ccddb KC	19	Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
366ccddb KC	20	02110-1301, USA. */
c3bcc836	21
6de9cd9a DN	22	#ifndef GCC_REGS_H
6de9cd9a DN	23	#define GCC_REGS_H
c3bcc836	24
6feacd09	25	#include "varray.h"
7932a3db	26	#include "obstack.h"
cff9f8d5 AH	27	#include "hard-reg-set.h"
cff9f8d5 AH	28	#include "basic-block.h"
c3bcc836 RK	29
	30	#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
	31
ddef6bc7 JJ	32	/* When you only have the mode of a pseudo register before it has a hard
ddef6bc7 JJ	33	register chosen for it, this reports the size of each hard register
ec8e621d KG	34	a pseudo in such a mode would get allocated to. A target may
ec8e621d KG	35	override this. */
ddef6bc7 JJ	36
	37	#ifndef REGMODE_NATURAL_SIZE
	38	#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
	39	#endif
c3bcc836	40
31031edd JL	41	#ifndef SMALL_REGISTER_CLASSES
	42	#define SMALL_REGISTER_CLASSES 0
	43	#endif
	44
c3bcc836 RK	45	/* Maximum register number used in this function, plus one. */
	46
	47	extern int max_regno;
	48
b1f21e0a	49	/* Register information indexed by register number */
d4b60170 RK	50	typedef struct reg_info_def
d4b60170 RK	51	{ /* fields set by reg_scan */
b1f21e0a MM	52	int first_uid; /* UID of first insn to use (REG n) */
b1f21e0a MM	53	int last_uid; /* UID of last insn to use (REG n) */
b1f21e0a	54
d4b60170	55	/* fields set by reg_scan & flow_analysis */
b1f21e0a MM	56	int sets; /* # of times (REG n) is set */
	57
	58	/* fields set by flow_analysis */
	59	int refs; /* # of times (REG n) is used or set */
b2aec5c0	60	int freq; /* # estimated frequency (REG n) is used or set */
b1f21e0a MM	61	int deaths; /* # of times (REG n) dies */
	62	int live_length; /* # of instructions (REG n) is live */
	63	int calls_crossed; /* # of calls (REG n) is live across */
27004606	64	int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
b1f21e0a	65	int basic_block; /* # of basic blocks (REG n) is used in */
b1f21e0a MM	66	} reg_info;
b1f21e0a MM	67
1935e8a8 KH	68	typedef reg_info *reg_info_p;
	69
	70	DEF_VEC_P(reg_info_p);
	71	DEF_VEC_ALLOC_P(reg_info_p,heap);
	72
	73	extern VEC(reg_info_p,heap) *reg_n_info;
b1f21e0a	74
b2aec5c0	75	/* Indexed by n, gives number of times (REG n) is used or set. */
c3bcc836	76
1935e8a8	77	#define REG_N_REFS(N) (VEC_index (reg_info_p, reg_n_info, N)->refs)
c3bcc836	78
b2aec5c0 JH	79	/* Estimate frequency of references to register N. */
b2aec5c0 JH	80
1935e8a8	81	#define REG_FREQ(N) (VEC_index (reg_info_p, reg_n_info, N)->freq)
b2aec5c0	82
0c20a65f	83	/* The weights for each insn varries from 0 to REG_FREQ_BASE.
a08b2604 JH	84	This constant does not need to be high, as in infrequently executed
	85	regions we want to count instructions equivalently to optimize for
	86	size instead of speed. */
	87	#define REG_FREQ_MAX 1000
	88
	89	/* Compute register frequency from the BB frequency. When optimizing for size,
	90	or profile driven feedback is available and the function is never executed,
	91	frequency is always equivalent. Otherwise rescale the basic block
	92	frequency. */
	93	#define REG_FREQ_FROM_BB(bb) (optimize_size \
	94	\|\| (flag_branch_probabilities \
	95	&& !ENTRY_BLOCK_PTR->count) \
	96	? REG_FREQ_MAX \
	97	: ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
	98	? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
	99	: 1)
	100
b1f21e0a MM	101	/* Indexed by n, gives number of times (REG n) is set.
	102	??? both regscan and flow allocate space for this. We should settle
	103	on just copy. */
c3bcc836	104
1935e8a8	105	#define REG_N_SETS(N) (VEC_index (reg_info_p, reg_n_info, N)->sets)
c3bcc836 RK	106
	107	/* Indexed by N, gives number of insns in which register N dies.
	108	Note that if register N is live around loops, it can die
	109	in transitions between basic blocks, and that is not counted here.
	110	So this is only a reliable indicator of how many regions of life there are
	111	for registers that are contained in one basic block. */
	112
1935e8a8	113	#define REG_N_DEATHS(N) (VEC_index (reg_info_p, reg_n_info, N)->deaths)
c3bcc836 RK	114
	115	/* Get the number of consecutive words required to hold pseudo-reg N. */
	116
	117	#define PSEUDO_REGNO_SIZE(N) \
	118	((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
	119	/ UNITS_PER_WORD)
	120
	121	/* Get the number of bytes required to hold pseudo-reg N. */
	122
	123	#define PSEUDO_REGNO_BYTES(N) \
	124	GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
	125
	126	/* Get the machine mode of pseudo-reg N. */
	127
	128	#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
	129
	130	/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
	131
1935e8a8 KH	132	#define REG_N_CALLS_CROSSED(N) \
1935e8a8 KH	133	(VEC_index (reg_info_p, reg_n_info, N)->calls_crossed)
c3bcc836	134
27004606 JJ	135	/* Indexed by N, gives number of CALL_INSNS that may throw, across which
	136	(REG n) is live. */
	137
	138	#define REG_N_THROWING_CALLS_CROSSED(N) \
1935e8a8	139	(VEC_index (reg_info_p, reg_n_info, N)->throw_calls_crossed)
27004606	140
c3bcc836 RK	141	/* Total number of instructions at which (REG n) is live.
	142	The larger this is, the less priority (REG n) gets for
	143	allocation in a hard register (in global-alloc).
	144	This is set in flow.c and remains valid for the rest of the compilation
	145	of the function; it is used to control register allocation.
	146
	147	local-alloc.c may alter this number to change the priority.
	148
	149	Negative values are special.
	150	-1 is used to mark a pseudo reg which has a constant or memory equivalent
	151	and is used infrequently enough that it should not get a hard register.
	152	-2 is used to mark a pseudo reg for a parameter, when a frame pointer
cfb2c0b1	153	is not required. global.c makes an allocno for this but does
c3bcc836 RK	154	not try to assign a hard register to it. */
c3bcc836 RK	155
1935e8a8 KH	156	#define REG_LIVE_LENGTH(N) \
1935e8a8 KH	157	(VEC_index (reg_info_p, reg_n_info, N)->live_length)
c3bcc836 RK	158
c3bcc836 RK	159	/* Vector of substitutions of register numbers,
b1f21e0a MM	160	used to map pseudo regs into hardware regs.
	161
	162	This can't be folded into reg_n_info without changing all of the
	163	machine dependent directories, since the reload functions
39379e67	164	in the machine dependent files access it. */
c3bcc836 RK	165
	166	extern short *reg_renumber;
	167
df2ef49b	168	/* Vector indexed by hardware reg saying whether that reg is ever used. */
c3bcc836 RK	169
	170	extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
	171
df2ef49b AM	172	/* Like regs_ever_live, but saying whether reg is set by asm statements. */
	173
	174	extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
	175
26277d41 PB	176	/* Vector indexed by machine mode saying whether there are regs of that mode. */
	177
	178	extern bool have_regs_of_mode [MAX_MACHINE_MODE];
	179
04569dfb DE	180	/* For each hard register, the widest mode object that it can contain.
	181	This will be a MODE_INT mode if the register can hold integers. Otherwise
	182	it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
	183	register. */
	184
	185	extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
	186
c3bcc836 RK	187	/* Vector indexed by regno; gives uid of first insn using that reg.
	188	This is computed by reg_scan for use by cse and loop.
	189	It is sometimes adjusted for subsequent changes during loop,
	190	but not adjusted by cse even if cse invalidates it. */
	191
1935e8a8	192	#define REGNO_FIRST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->first_uid)
c3bcc836 RK	193
	194	/* Vector indexed by regno; gives uid of last insn using that reg.
	195	This is computed by reg_scan for use by cse and loop.
	196	It is sometimes adjusted for subsequent changes during loop,
	197	but not adjusted by cse even if cse invalidates it.
	198	This is harmless since cse won't scan through a loop end. */
	199
1935e8a8	200	#define REGNO_LAST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->last_uid)
c3bcc836	201
c3bcc836 RK	202	/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
	203	that have to go in the same hard reg. */
	204	extern rtx regs_may_share;
	205
c3bcc836 RK	206	/* Flag set by local-alloc or global-alloc if they decide to allocate
	207	something in a call-clobbered register. */
	208
	209	extern int caller_save_needed;
	210
	211	/* Predicate to decide whether to give a hard reg to a pseudo which
	212	is referenced REFS times and would need to be saved and restored
	213	around a call CALLS times. */
	214
	215	#ifndef CALLER_SAVE_PROFITABLE
	216	#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
	217	#endif
a65b6597	218
6cad67d2 JL	219	/* On most machines a register class is likely to be spilled if it
	220	only has one register. */
	221	#ifndef CLASS_LIKELY_SPILLED_P
	222	#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
	223	#endif
	224
8d5c8167 JL	225	/* Select a register mode required for caller save of hard regno REGNO. */
8d5c8167 JL	226	#ifndef HARD_REGNO_CALLER_SAVE_MODE
787dc842	227	#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
fee226d2	228	choose_hard_reg_mode (REGNO, NREGS, false)
8d5c8167 JL	229	#endif
8d5c8167 JL	230
0c20a65f	231	/* Registers that get partially clobbered by a call in a given mode.
1e326708 MH	232	These must not be call used registers. */
	233	#ifndef HARD_REGNO_CALL_PART_CLOBBERED
	234	#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
	235	#endif
	236
b1f21e0a	237	/* Allocate reg_n_info tables */
0c20a65f	238	extern void allocate_reg_info (size_t, int, int);
66fd46b6 JH	239
	240	/* Specify number of hard registers given machine mode occupy. */
	241	extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
6de9cd9a DN	242
6de9cd9a DN	243	#endif /* GCC_REGS_H */