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db23c708 1/* Define per-register tables for data flow info and register allocation.
9daf6266 2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
d91f7526 3 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software
f0b5f617 4 Foundation, Inc.
db23c708 5
f12b58b3 6This file is part of GCC.
db23c708 7
f12b58b3 8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
8c4c00c1 10Software Foundation; either version 3, or (at your option) any later
f12b58b3 11version.
db23c708 12
f12b58b3 13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
db23c708 17
18You should have received a copy of the GNU General Public License
8c4c00c1 19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
db23c708 21
4ee9c684 22#ifndef GCC_REGS_H
23#define GCC_REGS_H
db23c708 24
a79e7523 25#include "machmode.h"
897118e8 26#include "hard-reg-set.h"
71e16a8f 27#include "rtl.h"
db23c708 28
29#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
30
701e46d0 31/* When you only have the mode of a pseudo register before it has a hard
32 register chosen for it, this reports the size of each hard register
eda949d5 33 a pseudo in such a mode would get allocated to. A target may
34 override this. */
701e46d0 35
36#ifndef REGMODE_NATURAL_SIZE
37#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
38#endif
db23c708 39
40/* Maximum register number used in this function, plus one. */
41
42extern int max_regno;
43
3072d30e 44/* REG_N_REFS and REG_N_SETS are initialized by a call to
45 regstat_init_n_sets_and_refs from the current values of
46 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
47 should only be used if a pass need to change these values in some
851d9296 48 magical way or the pass needs to have accurate values for these
3072d30e 49 and is not using incremental df scanning.
50
51 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
48e1416a 52 should be made to regstat_free_n_sets_and_refs.
3072d30e 53
54 Local alloc seems to play pretty loose with these values.
55 REG_N_REFS is set to 0 if the register is used in an asm.
56 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
57 REG_N_SETS for three address insns. Other passes seem to have
58 other special values. */
59
394685a4 60
394685a4 61
3072d30e 62/* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
63
64struct regstat_n_sets_and_refs_t
65{
66 int sets; /* # of times (REG n) is set */
394685a4 67 int refs; /* # of times (REG n) is used or set */
3072d30e 68};
69
70extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
71
72/* Indexed by n, gives number of times (REG n) is used or set. */
73static inline int
74REG_N_REFS(int regno)
75{
76 return regstat_n_sets_and_refs[regno].refs;
77}
78
79/* Indexed by n, gives number of times (REG n) is used or set. */
80#define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
81#define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
82
83/* Indexed by n, gives number of times (REG n) is set. */
84static inline int
85REG_N_SETS (int regno)
86{
87 return regstat_n_sets_and_refs[regno].sets;
88}
89
90/* Indexed by n, gives number of times (REG n) is set. */
91#define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
92#define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
93
94
4a020a8c 95/* Functions defined in regstat.c. */
3072d30e 96extern void regstat_init_n_sets_and_refs (void);
97extern void regstat_free_n_sets_and_refs (void);
98extern void regstat_compute_ri (void);
99extern void regstat_free_ri (void);
100extern bitmap regstat_get_setjmp_crosses (void);
101extern void regstat_compute_calls_crossed (void);
102extern void regstat_free_calls_crossed (void);
4a020a8c 103extern void dump_reg_info (FILE *);
3072d30e 104
105/* Register information indexed by register number. This structure is
106 initialized by calling regstat_compute_ri and is destroyed by
107 calling regstat_free_ri. */
108struct reg_info_t
109{
63f23608 110 int freq; /* # estimated frequency (REG n) is used or set */
394685a4 111 int deaths; /* # of times (REG n) dies */
112 int live_length; /* # of instructions (REG n) is live */
113 int calls_crossed; /* # of calls (REG n) is live across */
a8587796 114 int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */
45db5f0a 115 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
394685a4 116 int basic_block; /* # of basic blocks (REG n) is used in */
3072d30e 117};
d14dbec5 118
3072d30e 119extern struct reg_info_t *reg_info_p;
d14dbec5 120
3072d30e 121/* The number allocated elements of reg_info_p. */
122extern size_t reg_info_p_size;
db23c708 123
63f23608 124/* Estimate frequency of references to register N. */
125
3072d30e 126#define REG_FREQ(N) (reg_info_p[N].freq)
63f23608 127
f0b5f617 128/* The weights for each insn varies from 0 to REG_FREQ_BASE.
eefdec48 129 This constant does not need to be high, as in infrequently executed
130 regions we want to count instructions equivalently to optimize for
131 size instead of speed. */
132#define REG_FREQ_MAX 1000
133
134/* Compute register frequency from the BB frequency. When optimizing for size,
135 or profile driven feedback is available and the function is never executed,
136 frequency is always equivalent. Otherwise rescale the basic block
137 frequency. */
138#define REG_FREQ_FROM_BB(bb) (optimize_size \
139 || (flag_branch_probabilities \
140 && !ENTRY_BLOCK_PTR->count) \
141 ? REG_FREQ_MAX \
142 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
143 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
144 : 1)
145
db23c708 146/* Indexed by N, gives number of insns in which register N dies.
147 Note that if register N is live around loops, it can die
148 in transitions between basic blocks, and that is not counted here.
149 So this is only a reliable indicator of how many regions of life there are
150 for registers that are contained in one basic block. */
151
3072d30e 152#define REG_N_DEATHS(N) (reg_info_p[N].deaths)
db23c708 153
154/* Get the number of consecutive words required to hold pseudo-reg N. */
155
156#define PSEUDO_REGNO_SIZE(N) \
157 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
158 / UNITS_PER_WORD)
159
160/* Get the number of bytes required to hold pseudo-reg N. */
161
162#define PSEUDO_REGNO_BYTES(N) \
163 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
164
165/* Get the machine mode of pseudo-reg N. */
166
167#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
168
169/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
170
3072d30e 171#define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
a8587796 172#define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed)
db23c708 173
45db5f0a 174/* Indexed by N, gives number of CALL_INSNS that may throw, across which
175 (REG n) is live. */
176
3072d30e 177#define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
45db5f0a 178
3072d30e 179/* Total number of instructions at which (REG n) is live. The larger
180 this is, the less priority (REG n) gets for allocation in a hard
181 register (in global-alloc). This is set in df-problems.c whenever
182 register info is requested and remains valid for the rest of the
183 compilation of the function; it is used to control register
184 allocation.
db23c708 185
186 local-alloc.c may alter this number to change the priority.
187
188 Negative values are special.
189 -1 is used to mark a pseudo reg which has a constant or memory equivalent
190 and is used infrequently enough that it should not get a hard register.
191 -2 is used to mark a pseudo reg for a parameter, when a frame pointer
21430490 192 is not required. global.c makes an allocno for this but does
db23c708 193 not try to assign a hard register to it. */
194
3072d30e 195#define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length)
196
197/* Indexed by n, gives number of basic block that (REG n) is used in.
198 If the value is REG_BLOCK_GLOBAL (-1),
199 it means (REG n) is used in more than one basic block.
200 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
201 This information remains valid for the rest of the compilation
202 of the current function; it is used to control register allocation. */
203
204#define REG_BLOCK_UNKNOWN 0
205#define REG_BLOCK_GLOBAL -1
206
207#define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
db23c708 208
209/* Vector of substitutions of register numbers,
394685a4 210 used to map pseudo regs into hardware regs.
211
212 This can't be folded into reg_n_info without changing all of the
213 machine dependent directories, since the reload functions
e5f994bf 214 in the machine dependent files access it. */
db23c708 215
216extern short *reg_renumber;
217
db23c708 218/* Flag set by local-alloc or global-alloc if they decide to allocate
219 something in a call-clobbered register. */
220
221extern int caller_save_needed;
222
223/* Predicate to decide whether to give a hard reg to a pseudo which
224 is referenced REFS times and would need to be saved and restored
225 around a call CALLS times. */
226
227#ifndef CALLER_SAVE_PROFITABLE
228#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
229#endif
e3961adb 230
a3a64825 231/* Select a register mode required for caller save of hard regno REGNO. */
232#ifndef HARD_REGNO_CALLER_SAVE_MODE
301652e2 233#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
b805295e 234 choose_hard_reg_mode (REGNO, NREGS, false)
a3a64825 235#endif
236
3ad4992f 237/* Registers that get partially clobbered by a call in a given mode.
fc51ca3b 238 These must not be call used registers. */
239#ifndef HARD_REGNO_CALL_PART_CLOBBERED
240#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
241#endif
242
c3460481 243/* Target-dependent globals. */
244struct target_regs {
245 /* For each starting hard register, the number of consecutive hard
246 registers that a given machine mode occupies. */
247 unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
248
249 /* For each hard register, the widest mode object that it can contain.
250 This will be a MODE_INT mode if the register can hold integers. Otherwise
251 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
252 register. */
253 enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
fee704fa 254
255 /* Vector indexed by machine mode saying whether there are regs of
256 that mode. */
257 bool x_have_regs_of_mode[MAX_MACHINE_MODE];
258
259 /* 1 if the corresponding class contains a register of the given mode. */
260 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
261
db5ca0ab 262 /* Record for each mode whether we can move a register directly to or
263 from an object of that mode in memory. If we can't, we won't try
264 to use that mode directly when accessing a field of that mode. */
265 char x_direct_load[NUM_MACHINE_MODES];
266 char x_direct_store[NUM_MACHINE_MODES];
267
268 /* Record for each mode whether we can float-extend from memory. */
269 bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
c3460481 270};
271
272extern struct target_regs default_target_regs;
273#if SWITCHABLE_TARGET
274extern struct target_regs *this_target_regs;
275#else
276#define this_target_regs (&default_target_regs)
277#endif
278
279#define hard_regno_nregs \
280 (this_target_regs->x_hard_regno_nregs)
281#define reg_raw_mode \
282 (this_target_regs->x_reg_raw_mode)
fee704fa 283#define have_regs_of_mode \
284 (this_target_regs->x_have_regs_of_mode)
285#define contains_reg_of_mode \
286 (this_target_regs->x_contains_reg_of_mode)
db5ca0ab 287#define direct_load \
288 (this_target_regs->x_direct_load)
289#define direct_store \
290 (this_target_regs->x_direct_store)
291#define float_extend_from_mem \
292 (this_target_regs->x_float_extend_from_mem)
c3460481 293
a2c6f0b7 294/* Return an exclusive upper bound on the registers occupied by hard
295 register (reg:MODE REGNO). */
296
297static inline unsigned int
298end_hard_regno (enum machine_mode mode, unsigned int regno)
299{
300 return regno + hard_regno_nregs[regno][(int) mode];
301}
302
303/* Likewise for hard register X. */
304
305#define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
306
307/* Likewise for hard or pseudo register X. */
308
309#define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
310
311/* Add to REGS all the registers required to store a value of mode MODE
312 in register REGNO. */
313
314static inline void
315add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
316 unsigned int regno)
317{
318 unsigned int end_regno;
319
320 end_regno = end_hard_regno (mode, regno);
321 do
322 SET_HARD_REG_BIT (*regs, regno);
323 while (++regno < end_regno);
324}
325
326/* Likewise, but remove the registers. */
327
328static inline void
329remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
330 unsigned int regno)
331{
332 unsigned int end_regno;
333
334 end_regno = end_hard_regno (mode, regno);
335 do
336 CLEAR_HARD_REG_BIT (*regs, regno);
337 while (++regno < end_regno);
338}
339
340/* Return true if REGS contains the whole of (reg:MODE REGNO). */
341
342static inline bool
343in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
344 unsigned int regno)
345{
346 unsigned int end_regno;
347
71e16a8f 348 gcc_assert (HARD_REGISTER_NUM_P (regno));
349
a2c6f0b7 350 if (!TEST_HARD_REG_BIT (regs, regno))
351 return false;
352
353 end_regno = end_hard_regno (mode, regno);
71e16a8f 354
355 if (!HARD_REGISTER_NUM_P (end_regno - 1))
356 return false;
357
a2c6f0b7 358 while (++regno < end_regno)
359 if (!TEST_HARD_REG_BIT (regs, regno))
360 return false;
361
362 return true;
363}
364
365/* Return true if (reg:MODE REGNO) includes an element of REGS. */
366
367static inline bool
368overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
369 unsigned int regno)
370{
371 unsigned int end_regno;
372
373 if (TEST_HARD_REG_BIT (regs, regno))
374 return true;
375
376 end_regno = end_hard_regno (mode, regno);
377 while (++regno < end_regno)
378 if (TEST_HARD_REG_BIT (regs, regno))
379 return true;
380
381 return false;
382}
383
31adcf56 384/* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
385 REGNO and MODE. */
386
387static inline void
388add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
389 int nregs)
390{
391 while (nregs-- > 0)
392 SET_HARD_REG_BIT (*regs, regno + nregs);
393}
394
395/* Likewise, but remove the registers. */
396
397static inline void
398remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
399 int nregs)
400{
401 while (nregs-- > 0)
402 CLEAR_HARD_REG_BIT (*regs, regno + nregs);
403}
404
405/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
406 REGNO and MODE. */
407static inline bool
408range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
409 int nregs)
410{
411 while (nregs-- > 0)
412 if (TEST_HARD_REG_BIT (set, regno + nregs))
413 return true;
414 return false;
415}
416
417/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
418 REGNO and MODE. */
419static inline bool
420range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
421{
422 while (nregs-- > 0)
423 if (!TEST_HARD_REG_BIT (set, regno + nregs))
424 return false;
425 return true;
426}
427
4ee9c684 428#endif /* GCC_REGS_H */