[thirdparty/gcc.git] / gcc / regs.h

/* Define per-register tables for data flow info and register allocation.
   Copyright (C) 1987-2015 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */

#ifndef GCC_REGS_H
#define GCC_REGS_H

#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]

/* When you only have the mode of a pseudo register before it has a hard
   register chosen for it, this reports the size of each hard register
   a pseudo in such a mode would get allocated to.  A target may
   override this.  */

#ifndef REGMODE_NATURAL_SIZE
#define REGMODE_NATURAL_SIZE(MODE)	UNITS_PER_WORD
#endif

/* Maximum register number used in this function, plus one.  */

extern int max_regno;

/* REG_N_REFS and REG_N_SETS are initialized by a call to
   regstat_init_n_sets_and_refs from the current values of
   DF_REG_DEF_COUNT and DF_REG_USE_COUNT.  REG_N_REFS and REG_N_SETS
   should only be used if a pass need to change these values in some
   magical way or the pass needs to have accurate values for these
   and is not using incremental df scanning.

   At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
   should be made to regstat_free_n_sets_and_refs.

   Local alloc seems to play pretty loose with these values.
   REG_N_REFS is set to 0 if the register is used in an asm.
   Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
   REG_N_SETS for three address insns.  Other passes seem to have
   other special values.  */


/* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */

struct regstat_n_sets_and_refs_t
{
  int sets;			/* # of times (REG n) is set */
  int refs;			/* # of times (REG n) is used or set */
};

extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;

/* Indexed by n, gives number of times (REG n) is used or set.  */
static inline int
REG_N_REFS (int regno)
{
  return regstat_n_sets_and_refs[regno].refs;
}

/* Indexed by n, gives number of times (REG n) is used or set.  */
#define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
#define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)

/* Indexed by n, gives number of times (REG n) is set.  */
static inline int
REG_N_SETS (int regno)
{
  return regstat_n_sets_and_refs[regno].sets;
}

/* Indexed by n, gives number of times (REG n) is set.  */
#define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
#define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)

/* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise.  */
extern bool reg_is_parm_p (rtx);

/* Functions defined in regstat.c.  */
extern void regstat_init_n_sets_and_refs (void);
extern void regstat_free_n_sets_and_refs (void);
extern void regstat_compute_ri (void);
extern void regstat_free_ri (void);
extern bitmap regstat_get_setjmp_crosses (void);
extern void regstat_compute_calls_crossed (void);
extern void regstat_free_calls_crossed (void);
extern void dump_reg_info (FILE *);

/* Register information indexed by register number.  This structure is
   initialized by calling regstat_compute_ri and is destroyed by
   calling regstat_free_ri.  */
struct reg_info_t
{
  int freq;			/* # estimated frequency (REG n) is used or set */
  int deaths;			/* # of times (REG n) dies */
  int live_length;		/* # of instructions (REG n) is live */
  int calls_crossed;		/* # of calls (REG n) is live across */
  int freq_calls_crossed;	/* # estimated frequency (REG n) crosses call */
  int throw_calls_crossed;	/* # of calls that may throw (REG n) is live across */
  int basic_block;		/* # of basic blocks (REG n) is used in */
};

extern struct reg_info_t *reg_info_p;

/* The number allocated elements of reg_info_p.  */
extern size_t reg_info_p_size;

/* Estimate frequency of references to register N.  */

#define REG_FREQ(N) (reg_info_p[N].freq)

/* The weights for each insn varies from 0 to REG_FREQ_BASE.
   This constant does not need to be high, as in infrequently executed
   regions we want to count instructions equivalently to optimize for
   size instead of speed.  */
#define REG_FREQ_MAX 1000

/* Compute register frequency from the BB frequency.  When optimizing for size,
   or profile driven feedback is available and the function is never executed,
   frequency is always equivalent.  Otherwise rescale the basic block
   frequency.  */
#define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun)	      \
			      ? REG_FREQ_MAX				      \
			      : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
			      ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
			      : 1)

/* Indexed by N, gives number of insns in which register N dies.
   Note that if register N is live around loops, it can die
   in transitions between basic blocks, and that is not counted here.
   So this is only a reliable indicator of how many regions of life there are
   for registers that are contained in one basic block.  */

#define REG_N_DEATHS(N) (reg_info_p[N].deaths)

/* Get the number of consecutive words required to hold pseudo-reg N.  */

#define PSEUDO_REGNO_SIZE(N) \
  ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)		\
   / UNITS_PER_WORD)

/* Get the number of bytes required to hold pseudo-reg N.  */

#define PSEUDO_REGNO_BYTES(N) \
  GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))

/* Get the machine mode of pseudo-reg N.  */

#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])

/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */

#define REG_N_CALLS_CROSSED(N)  (reg_info_p[N].calls_crossed)
#define REG_FREQ_CALLS_CROSSED(N)  (reg_info_p[N].freq_calls_crossed)

/* Indexed by N, gives number of CALL_INSNS that may throw, across which
   (REG n) is live.  */

#define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)

/* Total number of instructions at which (REG n) is live.
   
   This is set in regstat.c whenever register info is requested and
   remains valid for the rest of the compilation of the function; it is
   used to control register allocation.  The larger this is, the less
   priority (REG n) gets for allocation in a hard register (in IRA in
   priority-coloring mode).

   Negative values are special: -1 is used to mark a pseudo reg that
   should not be allocated to a hard register, because it crosses a
   setjmp call.  */

#define REG_LIVE_LENGTH(N)  (reg_info_p[N].live_length)

/* Indexed by n, gives number of basic block that  (REG n) is used in.
   If the value is REG_BLOCK_GLOBAL (-1),
   it means (REG n) is used in more than one basic block.
   REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
   This information remains valid for the rest of the compilation
   of the current function; it is used to control register allocation.  */

#define REG_BLOCK_UNKNOWN 0
#define REG_BLOCK_GLOBAL -1

#define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)

/* Vector of substitutions of register numbers,
   used to map pseudo regs into hardware regs.

   This can't be folded into reg_n_info without changing all of the
   machine dependent directories, since the reload functions
   in the machine dependent files access it.  */

extern short *reg_renumber;

/* Flag set by local-alloc or global-alloc if they decide to allocate
   something in a call-clobbered register.  */

extern int caller_save_needed;

/* Select a register mode required for caller save of hard regno REGNO.  */
#ifndef HARD_REGNO_CALLER_SAVE_MODE
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
  choose_hard_reg_mode (REGNO, NREGS, false)
#endif

/* Registers that get partially clobbered by a call in a given mode.
   These must not be call used registers.  */
#ifndef HARD_REGNO_CALL_PART_CLOBBERED
#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
#endif

/* Target-dependent globals.  */
struct target_regs {
  /* For each starting hard register, the number of consecutive hard
     registers that a given machine mode occupies.  */
  unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];

  /* For each hard register, the widest mode object that it can contain.
     This will be a MODE_INT mode if the register can hold integers.  Otherwise
     it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
     register.  */
  machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];

  /* Vector indexed by machine mode saying whether there are regs of
     that mode.  */
  bool x_have_regs_of_mode[MAX_MACHINE_MODE];

  /* 1 if the corresponding class contains a register of the given mode.  */
  char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];

  /* Record for each mode whether we can move a register directly to or
     from an object of that mode in memory.  If we can't, we won't try
     to use that mode directly when accessing a field of that mode.  */
  char x_direct_load[NUM_MACHINE_MODES];
  char x_direct_store[NUM_MACHINE_MODES];

  /* Record for each mode whether we can float-extend from memory.  */
  bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
};

extern struct target_regs default_target_regs;
#if SWITCHABLE_TARGET
extern struct target_regs *this_target_regs;
#else
#define this_target_regs (&default_target_regs)
#endif

#define hard_regno_nregs \
  (this_target_regs->x_hard_regno_nregs)
#define reg_raw_mode \
  (this_target_regs->x_reg_raw_mode)
#define have_regs_of_mode \
  (this_target_regs->x_have_regs_of_mode)
#define contains_reg_of_mode \
  (this_target_regs->x_contains_reg_of_mode)
#define direct_load \
  (this_target_regs->x_direct_load)
#define direct_store \
  (this_target_regs->x_direct_store)
#define float_extend_from_mem \
  (this_target_regs->x_float_extend_from_mem)

/* Return an exclusive upper bound on the registers occupied by hard
   register (reg:MODE REGNO).  */

static inline unsigned int
end_hard_regno (machine_mode mode, unsigned int regno)
{
  return regno + hard_regno_nregs[regno][(int) mode];
}

/* Add to REGS all the registers required to store a value of mode MODE
   in register REGNO.  */

static inline void
add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
		     unsigned int regno)
{
  unsigned int end_regno;

  end_regno = end_hard_regno (mode, regno);
  do
    SET_HARD_REG_BIT (*regs, regno);
  while (++regno < end_regno);
}

/* Likewise, but remove the registers.  */

static inline void
remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
			  unsigned int regno)
{
  unsigned int end_regno;

  end_regno = end_hard_regno (mode, regno);
  do
    CLEAR_HARD_REG_BIT (*regs, regno);
  while (++regno < end_regno);
}

/* Return true if REGS contains the whole of (reg:MODE REGNO).  */

static inline bool
in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
		   unsigned int regno)
{
  unsigned int end_regno;

  gcc_assert (HARD_REGISTER_NUM_P (regno));
  
  if (!TEST_HARD_REG_BIT (regs, regno))
    return false;

  end_regno = end_hard_regno (mode, regno);

  if (!HARD_REGISTER_NUM_P (end_regno - 1))
    return false;

  while (++regno < end_regno)
    if (!TEST_HARD_REG_BIT (regs, regno))
      return false;

  return true;
}

/* Return true if (reg:MODE REGNO) includes an element of REGS.  */

static inline bool
overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
			 unsigned int regno)
{
  unsigned int end_regno;

  if (TEST_HARD_REG_BIT (regs, regno))
    return true;

  end_regno = end_hard_regno (mode, regno);
  while (++regno < end_regno)
    if (TEST_HARD_REG_BIT (regs, regno))
      return true;

  return false;
}

/* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
   REGNO and MODE.  */

static inline void
add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
			   int nregs)
{
  while (nregs-- > 0)
    SET_HARD_REG_BIT (*regs, regno + nregs);
}

/* Likewise, but remove the registers.  */

static inline void
remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
				int nregs)
{
  while (nregs-- > 0)
    CLEAR_HARD_REG_BIT (*regs, regno + nregs);
}

/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
   REGNO and MODE.  */
static inline bool
range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
			       int nregs)
{
  while (nregs-- > 0)
    if (TEST_HARD_REG_BIT (set, regno + nregs))
      return true;
  return false;
}

/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
   REGNO and MODE.  */
static inline bool
range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
{
  while (nregs-- > 0)
    if (!TEST_HARD_REG_BIT (set, regno + nregs))
      return false;
  return true;
}

/* Get registers used by given function call instruction.  */
extern bool get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
				    HARD_REG_SET default_set);

#endif /* GCC_REGS_H */
Commit	Line	Data
db23c708	1	/* Define per-register tables for data flow info and register allocation.
d353bf18	2	Copyright (C) 1987-2015 Free Software Foundation, Inc.
db23c708	3
f12b58b3	4	This file is part of GCC.
db23c708	5
f12b58b3	6	GCC is free software; you can redistribute it and/or modify it under
f12b58b3	7	the terms of the GNU General Public License as published by the Free
8c4c00c1	8	Software Foundation; either version 3, or (at your option) any later
f12b58b3	9	version.
db23c708	10
f12b58b3	11	GCC is distributed in the hope that it will be useful, but WITHOUT ANY
	12	WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	14	for more details.
db23c708	15
db23c708	16	You should have received a copy of the GNU General Public License
8c4c00c1	17	along with GCC; see the file COPYING3. If not see
8c4c00c1	18	<http://www.gnu.org/licenses/>. */
db23c708	19
4ee9c684	20	#ifndef GCC_REGS_H
4ee9c684	21	#define GCC_REGS_H
db23c708	22
db23c708	23	#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
db23c708	24
701e46d0	25	/* When you only have the mode of a pseudo register before it has a hard
701e46d0	26	register chosen for it, this reports the size of each hard register
eda949d5	27	a pseudo in such a mode would get allocated to. A target may
eda949d5	28	override this. */
701e46d0	29
	30	#ifndef REGMODE_NATURAL_SIZE
	31	#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
	32	#endif
db23c708	33
	34	/* Maximum register number used in this function, plus one. */
	35
	36	extern int max_regno;
	37
3072d30e	38	/* REG_N_REFS and REG_N_SETS are initialized by a call to
	39	regstat_init_n_sets_and_refs from the current values of
	40	DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
	41	should only be used if a pass need to change these values in some
851d9296	42	magical way or the pass needs to have accurate values for these
3072d30e	43	and is not using incremental df scanning.
	44
	45	At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
48e1416a	46	should be made to regstat_free_n_sets_and_refs.
3072d30e	47
	48	Local alloc seems to play pretty loose with these values.
	49	REG_N_REFS is set to 0 if the register is used in an asm.
	50	Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
	51	REG_N_SETS for three address insns. Other passes seem to have
	52	other special values. */
	53
394685a4	54
394685a4	55
3072d30e	56	/* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
	57
	58	struct regstat_n_sets_and_refs_t
	59	{
	60	int sets; /* # of times (REG n) is set */
394685a4	61	int refs; /* # of times (REG n) is used or set */
3072d30e	62	};
	63
	64	extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
	65
	66	/* Indexed by n, gives number of times (REG n) is used or set. */
	67	static inline int
9af5ce0c	68	REG_N_REFS (int regno)
3072d30e	69	{
	70	return regstat_n_sets_and_refs[regno].refs;
	71	}
	72
	73	/* Indexed by n, gives number of times (REG n) is used or set. */
	74	#define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
	75	#define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
	76
	77	/* Indexed by n, gives number of times (REG n) is set. */
	78	static inline int
	79	REG_N_SETS (int regno)
	80	{
	81	return regstat_n_sets_and_refs[regno].sets;
	82	}
	83
	84	/* Indexed by n, gives number of times (REG n) is set. */
	85	#define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
	86	#define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
	87
ea239197	88	/* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise. */
ea239197	89	extern bool reg_is_parm_p (rtx);
3072d30e	90
4a020a8c	91	/* Functions defined in regstat.c. */
3072d30e	92	extern void regstat_init_n_sets_and_refs (void);
	93	extern void regstat_free_n_sets_and_refs (void);
	94	extern void regstat_compute_ri (void);
	95	extern void regstat_free_ri (void);
	96	extern bitmap regstat_get_setjmp_crosses (void);
	97	extern void regstat_compute_calls_crossed (void);
	98	extern void regstat_free_calls_crossed (void);
4a020a8c	99	extern void dump_reg_info (FILE *);
3072d30e	100
	101	/* Register information indexed by register number. This structure is
	102	initialized by calling regstat_compute_ri and is destroyed by
	103	calling regstat_free_ri. */
	104	struct reg_info_t
	105	{
63f23608	106	int freq; /* # estimated frequency (REG n) is used or set */
394685a4	107	int deaths; /* # of times (REG n) dies */
	108	int live_length; /* # of instructions (REG n) is live */
	109	int calls_crossed; /* # of calls (REG n) is live across */
a8587796	110	int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */
45db5f0a	111	int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
394685a4	112	int basic_block; /* # of basic blocks (REG n) is used in */
3072d30e	113	};
d14dbec5	114
3072d30e	115	extern struct reg_info_t *reg_info_p;
d14dbec5	116
3072d30e	117	/* The number allocated elements of reg_info_p. */
3072d30e	118	extern size_t reg_info_p_size;
db23c708	119
63f23608	120	/* Estimate frequency of references to register N. */
63f23608	121
3072d30e	122	#define REG_FREQ(N) (reg_info_p[N].freq)
63f23608	123
f0b5f617	124	/* The weights for each insn varies from 0 to REG_FREQ_BASE.
eefdec48	125	This constant does not need to be high, as in infrequently executed
	126	regions we want to count instructions equivalently to optimize for
	127	size instead of speed. */
	128	#define REG_FREQ_MAX 1000
	129
	130	/* Compute register frequency from the BB frequency. When optimizing for size,
	131	or profile driven feedback is available and the function is never executed,
	132	frequency is always equivalent. Otherwise rescale the basic block
	133	frequency. */
e604463f	134	#define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun) \
eefdec48	135	? REG_FREQ_MAX \
	136	: ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
	137	? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
	138	: 1)
	139
db23c708	140	/* Indexed by N, gives number of insns in which register N dies.
	141	Note that if register N is live around loops, it can die
	142	in transitions between basic blocks, and that is not counted here.
	143	So this is only a reliable indicator of how many regions of life there are
	144	for registers that are contained in one basic block. */
	145
3072d30e	146	#define REG_N_DEATHS(N) (reg_info_p[N].deaths)
db23c708	147
	148	/* Get the number of consecutive words required to hold pseudo-reg N. */
	149
	150	#define PSEUDO_REGNO_SIZE(N) \
	151	((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
	152	/ UNITS_PER_WORD)
	153
	154	/* Get the number of bytes required to hold pseudo-reg N. */
	155
	156	#define PSEUDO_REGNO_BYTES(N) \
	157	GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
	158
	159	/* Get the machine mode of pseudo-reg N. */
	160
	161	#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
	162
	163	/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
	164
3072d30e	165	#define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
a8587796	166	#define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed)
db23c708	167
45db5f0a	168	/* Indexed by N, gives number of CALL_INSNS that may throw, across which
	169	(REG n) is live. */
	170
3072d30e	171	#define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
45db5f0a	172
957b2bdc	173	/* Total number of instructions at which (REG n) is live.
	174
	175	This is set in regstat.c whenever register info is requested and
	176	remains valid for the rest of the compilation of the function; it is
	177	used to control register allocation. The larger this is, the less
	178	priority (REG n) gets for allocation in a hard register (in IRA in
	179	priority-coloring mode).
	180
	181	Negative values are special: -1 is used to mark a pseudo reg that
	182	should not be allocated to a hard register, because it crosses a
	183	setjmp call. */
db23c708	184
3072d30e	185	#define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length)
	186
	187	/* Indexed by n, gives number of basic block that (REG n) is used in.
	188	If the value is REG_BLOCK_GLOBAL (-1),
	189	it means (REG n) is used in more than one basic block.
	190	REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
	191	This information remains valid for the rest of the compilation
	192	of the current function; it is used to control register allocation. */
	193
	194	#define REG_BLOCK_UNKNOWN 0
	195	#define REG_BLOCK_GLOBAL -1
	196
	197	#define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
db23c708	198
db23c708	199	/* Vector of substitutions of register numbers,
394685a4	200	used to map pseudo regs into hardware regs.
	201
	202	This can't be folded into reg_n_info without changing all of the
	203	machine dependent directories, since the reload functions
e5f994bf	204	in the machine dependent files access it. */
db23c708	205
	206	extern short *reg_renumber;
	207
db23c708	208	/* Flag set by local-alloc or global-alloc if they decide to allocate
	209	something in a call-clobbered register. */
	210
	211	extern int caller_save_needed;
	212
a3a64825	213	/* Select a register mode required for caller save of hard regno REGNO. */
a3a64825	214	#ifndef HARD_REGNO_CALLER_SAVE_MODE
301652e2	215	#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
b805295e	216	choose_hard_reg_mode (REGNO, NREGS, false)
a3a64825	217	#endif
a3a64825	218
3ad4992f	219	/* Registers that get partially clobbered by a call in a given mode.
fc51ca3b	220	These must not be call used registers. */
	221	#ifndef HARD_REGNO_CALL_PART_CLOBBERED
	222	#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
	223	#endif
	224
c3460481	225	/* Target-dependent globals. */
	226	struct target_regs {
	227	/* For each starting hard register, the number of consecutive hard
	228	registers that a given machine mode occupies. */
	229	unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
	230
	231	/* For each hard register, the widest mode object that it can contain.
	232	This will be a MODE_INT mode if the register can hold integers. Otherwise
	233	it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
	234	register. */
3754d046	235	machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
fee704fa	236
	237	/* Vector indexed by machine mode saying whether there are regs of
	238	that mode. */
	239	bool x_have_regs_of_mode[MAX_MACHINE_MODE];
	240
	241	/* 1 if the corresponding class contains a register of the given mode. */
	242	char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
	243
db5ca0ab	244	/* Record for each mode whether we can move a register directly to or
	245	from an object of that mode in memory. If we can't, we won't try
	246	to use that mode directly when accessing a field of that mode. */
	247	char x_direct_load[NUM_MACHINE_MODES];
	248	char x_direct_store[NUM_MACHINE_MODES];
	249
	250	/* Record for each mode whether we can float-extend from memory. */
	251	bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
c3460481	252	};
	253
	254	extern struct target_regs default_target_regs;
	255	#if SWITCHABLE_TARGET
	256	extern struct target_regs *this_target_regs;
	257	#else
	258	#define this_target_regs (&default_target_regs)
	259	#endif
	260
	261	#define hard_regno_nregs \
	262	(this_target_regs->x_hard_regno_nregs)
	263	#define reg_raw_mode \
	264	(this_target_regs->x_reg_raw_mode)
fee704fa	265	#define have_regs_of_mode \
	266	(this_target_regs->x_have_regs_of_mode)
	267	#define contains_reg_of_mode \
	268	(this_target_regs->x_contains_reg_of_mode)
db5ca0ab	269	#define direct_load \
	270	(this_target_regs->x_direct_load)
	271	#define direct_store \
	272	(this_target_regs->x_direct_store)
	273	#define float_extend_from_mem \
	274	(this_target_regs->x_float_extend_from_mem)
c3460481	275
a2c6f0b7	276	/* Return an exclusive upper bound on the registers occupied by hard
	277	register (reg:MODE REGNO). */
	278
	279	static inline unsigned int
3754d046	280	end_hard_regno (machine_mode mode, unsigned int regno)
a2c6f0b7	281	{
	282	return regno + hard_regno_nregs[regno][(int) mode];
	283	}
	284
a2c6f0b7	285	/* Add to REGS all the registers required to store a value of mode MODE
	286	in register REGNO. */
	287
	288	static inline void
3754d046	289	add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
a2c6f0b7	290	unsigned int regno)
	291	{
	292	unsigned int end_regno;
	293
	294	end_regno = end_hard_regno (mode, regno);
	295	do
	296	SET_HARD_REG_BIT (*regs, regno);
	297	while (++regno < end_regno);
	298	}
	299
	300	/* Likewise, but remove the registers. */
	301
	302	static inline void
3754d046	303	remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
a2c6f0b7	304	unsigned int regno)
	305	{
	306	unsigned int end_regno;
	307
	308	end_regno = end_hard_regno (mode, regno);
	309	do
	310	CLEAR_HARD_REG_BIT (*regs, regno);
	311	while (++regno < end_regno);
	312	}
	313
	314	/* Return true if REGS contains the whole of (reg:MODE REGNO). */
	315
	316	static inline bool
3754d046	317	in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
a2c6f0b7	318	unsigned int regno)
	319	{
	320	unsigned int end_regno;
	321
71e16a8f	322	gcc_assert (HARD_REGISTER_NUM_P (regno));
71e16a8f	323
a2c6f0b7	324	if (!TEST_HARD_REG_BIT (regs, regno))
	325	return false;
	326
	327	end_regno = end_hard_regno (mode, regno);
71e16a8f	328
	329	if (!HARD_REGISTER_NUM_P (end_regno - 1))
	330	return false;
	331
a2c6f0b7	332	while (++regno < end_regno)
	333	if (!TEST_HARD_REG_BIT (regs, regno))
	334	return false;
	335
	336	return true;
	337	}
	338
	339	/* Return true if (reg:MODE REGNO) includes an element of REGS. */
	340
	341	static inline bool
3754d046	342	overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
a2c6f0b7	343	unsigned int regno)
	344	{
	345	unsigned int end_regno;
	346
	347	if (TEST_HARD_REG_BIT (regs, regno))
	348	return true;
	349
	350	end_regno = end_hard_regno (mode, regno);
	351	while (++regno < end_regno)
	352	if (TEST_HARD_REG_BIT (regs, regno))
	353	return true;
	354
	355	return false;
	356	}
	357
31adcf56	358	/* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
	359	REGNO and MODE. */
	360
	361	static inline void
	362	add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
	363	int nregs)
	364	{
	365	while (nregs-- > 0)
	366	SET_HARD_REG_BIT (*regs, regno + nregs);
	367	}
	368
	369	/* Likewise, but remove the registers. */
	370
	371	static inline void
	372	remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
	373	int nregs)
	374	{
	375	while (nregs-- > 0)
	376	CLEAR_HARD_REG_BIT (*regs, regno + nregs);
	377	}
	378
	379	/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
	380	REGNO and MODE. */
	381	static inline bool
	382	range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
	383	int nregs)
	384	{
	385	while (nregs-- > 0)
	386	if (TEST_HARD_REG_BIT (set, regno + nregs))
	387	return true;
	388	return false;
	389	}
	390
	391	/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
	392	REGNO and MODE. */
	393	static inline bool
	394	range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
	395	{
	396	while (nregs-- > 0)
	397	if (!TEST_HARD_REG_BIT (set, regno + nregs))
	398	return false;
	399	return true;
	400	}
	401
9ac9a758	402	/* Get registers used by given function call instruction. */
a5412d60	403	extern bool get_call_reg_set_usage (rtx_insn insn, HARD_REG_SET reg_set,
9ac9a758	404	HARD_REG_SET default_set);
9ac9a758	405
4ee9c684	406	#endif /* GCC_REGS_H */