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1/* Communication between reload.c, reload1.c and the rest of compiler.
2 Copyright (C) 1987, 1991, 1992, 1993, 1994, 1995, 1997, 1998, 1999,
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3 2000, 2001, 2003, 2004, 2007, 2008, 2010
4 Free Software Foundation, Inc.
b4e0cbb5 5
1322177d 6This file is part of GCC.
b4e0cbb5 7
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8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
9dcd6f09 10Software Foundation; either version 3, or (at your option) any later
1322177d 11version.
b4e0cbb5 12
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13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
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17
18You should have received a copy of the GNU General Public License
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19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
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21
22
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23/* If secondary reloads are the same for inputs and outputs, define those
24 macros here. */
25
26#ifdef SECONDARY_RELOAD_CLASS
27#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
28 SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
29#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
30 SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
31#endif
32
faa832a7 33extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
6f76a878 34extern int memory_move_cost (enum machine_mode, reg_class_t, bool);
faa832a7 35extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
cbd5b9a2 36
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37/* Maximum number of reloads we can need. */
38#define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
39
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40/* Encode the usage of a reload. The following codes are supported:
41
42 RELOAD_FOR_INPUT reload of an input operand
43 RELOAD_FOR_OUTPUT likewise, for output
44 RELOAD_FOR_INSN a reload that must not conflict with anything
45 used in the insn, but may conflict with
46 something used before or after the insn
47 RELOAD_FOR_INPUT_ADDRESS reload for parts of the address of an object
48 that is an input reload
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49 RELOAD_FOR_INPADDR_ADDRESS reload needed for RELOAD_FOR_INPUT_ADDRESS
50 RELOAD_FOR_OUTPUT_ADDRESS like RELOAD_FOR INPUT_ADDRESS, for output
51 RELOAD_FOR_OUTADDR_ADDRESS reload needed for RELOAD_FOR_OUTPUT_ADDRESS
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52 RELOAD_FOR_OPERAND_ADDRESS reload for the address of a non-reloaded
53 operand; these don't conflict with
54 any other addresses.
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55 RELOAD_FOR_OPADDR_ADDR reload needed for RELOAD_FOR_OPERAND_ADDRESS
56 reloads; usually secondary reloads
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57 RELOAD_OTHER none of the above, usually multiple uses
58 RELOAD_FOR_OTHER_ADDRESS reload for part of the address of an input
0c20a65f 59 that is marked RELOAD_OTHER.
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60
61 This used to be "enum reload_when_needed" but some debuggers have trouble
62 with an enum tag and variable of the same name. */
63
64enum reload_type
b4e0cbb5 65{
0c20a65f 66 RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
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67 RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
68 RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
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69 RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
70 RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
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71};
72
e78d8e51 73#ifdef GCC_INSN_CODES_H
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74/* Each reload is recorded with a structure like this. */
75struct reload
76{
77 /* The value to reload from */
78 rtx in;
79 /* Where to store reload-reg afterward if nec (often the same as
80 reload_in) */
81 rtx out;
82
83 /* The class of registers to reload into. */
48c54229 84 enum reg_class rclass;
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85
86 /* The mode this operand should have when reloaded, on input. */
87 enum machine_mode inmode;
88 /* The mode this operand should have when reloaded, on output. */
89 enum machine_mode outmode;
90
8ec450a4 91 /* The mode of the reload register. */
1e875952 92 enum machine_mode mode;
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93
94 /* the largest number of registers this reload will require. */
770ae6cc 95 unsigned int nregs;
8ec450a4 96
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97 /* Positive amount to increment or decrement by if
98 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
99 Ignored otherwise (don't assume it is zero). */
100 int inc;
101 /* A reg for which reload_in is the equivalent.
102 If reload_in is a symbol_ref which came from
c865e437 103 reg_equiv_constant, then this is the pseudo
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104 which has that symbol_ref as equivalent. */
105 rtx in_reg;
106 rtx out_reg;
107
108 /* Used in find_reload_regs to record the allocated register. */
109 int regno;
110 /* This is the register to reload into. If it is zero when `find_reloads'
111 returns, you must find a suitable register in the class specified by
112 reload_reg_class, and store here an rtx for that register with mode from
113 reload_inmode or reload_outmode. */
114 rtx reg_rtx;
115 /* The operand number being reloaded. This is used to group related reloads
116 and need not always be equal to the actual operand number in the insn,
117 though it current will be; for in-out operands, it is one of the two
118 operand numbers. */
119 int opnum;
120
121 /* Gives the reload number of a secondary input reload, when needed;
122 otherwise -1. */
123 int secondary_in_reload;
124 /* Gives the reload number of a secondary output reload, when needed;
125 otherwise -1. */
126 int secondary_out_reload;
127 /* If a secondary input reload is required, gives the INSN_CODE that uses the
128 secondary reload as a scratch register, or CODE_FOR_nothing if the
129 secondary reload register is to be an intermediate register. */
130 enum insn_code secondary_in_icode;
131 /* Likewise, for a secondary output reload. */
132 enum insn_code secondary_out_icode;
133
134 /* Classifies reload as needed either for addressing an input reload,
135 addressing an output, for addressing a non-reloaded mem ref, or for
136 unspecified purposes (i.e., more than one of the above). */
137 enum reload_type when_needed;
0c20a65f 138
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139 /* Nonzero for an optional reload. Optional reloads are ignored unless the
140 value is already sitting in a register. */
141 unsigned int optional:1;
142 /* nonzero if this reload shouldn't be combined with another reload. */
143 unsigned int nocombine:1;
144 /* Nonzero if this is a secondary register for one or more reloads. */
145 unsigned int secondary_p:1;
146 /* Nonzero if this reload must use a register not already allocated to a
147 group. */
148 unsigned int nongroup:1;
149};
150
151extern struct reload rld[MAX_RELOADS];
152extern int n_reloads;
153#endif
b4e0cbb5 154
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155/* Target-dependent globals. */
156struct target_reload {
157 /* Nonzero if indirect addressing is supported when the innermost MEM is
158 of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to
159 which these are valid is the same as spill_indirect_levels, above. */
160 bool x_indirect_symref_ok;
161
162 /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid. */
163 bool x_double_reg_address_ok;
164
165 /* Nonzero if indirect addressing is supported on the machine; this means
166 that spilling (REG n) does not require reloading it into a register in
167 order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The
168 value indicates the level of indirect addressing supported, e.g., two
169 means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
170 a hard register. */
171 bool x_spill_indirect_levels;
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172
173 /* True if caller-save has been reinitialized. */
174 bool x_caller_save_initialized_p;
175
176 /* Modes for each hard register that we can save. The smallest mode is wide
177 enough to save the entire contents of the register. When saving the
178 register because it is live we first try to save in multi-register modes.
179 If that is not possible the save is done one register at a time. */
180 enum machine_mode (x_regno_save_mode
181 [FIRST_PSEUDO_REGISTER]
182 [MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
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183
184 /* We will only make a register eligible for caller-save if it can be
185 saved in its widest mode with a simple SET insn as long as the memory
186 address is valid. We record the INSN_CODE is those insns here since
187 when we emit them, the addresses might not be valid, so they might not
188 be recognized. */
189 int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
190 int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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191};
192
193extern struct target_reload default_target_reload;
194#if SWITCHABLE_TARGET
195extern struct target_reload *this_target_reload;
196#else
197#define this_target_reload (&default_target_reload)
198#endif
199
200#define indirect_symref_ok \
201 (this_target_reload->x_indirect_symref_ok)
202#define double_reg_address_ok \
203 (this_target_reload->x_double_reg_address_ok)
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204#define caller_save_initialized_p \
205 (this_target_reload->x_caller_save_initialized_p)
d474db84 206
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207/* Register equivalences. Indexed by register number. */
208typedef struct reg_equivs
209{
210 /* The constant value to which pseudo reg N is equivalent,
211 or zero if pseudo reg N is not equivalent to a constant.
212 find_reloads looks at this in order to replace pseudo reg N
213 with the constant it stands for. */
214 rtx constant;
215
216 /* An invariant value to which pseudo reg N is equivalent.
217 eliminate_regs_in_insn uses this to replace pseudos in particular
218 contexts. */
219 rtx invariant;
220
221 /* A memory location to which pseudo reg N is equivalent,
222 prior to any register elimination (such as frame pointer to stack
223 pointer). Depending on whether or not it is a valid address, this value
224 is transferred to either equiv_address or equiv_mem. */
225 rtx memory_loc;
226
227 /* The address of stack slot to which pseudo reg N is equivalent.
228 This is used when the address is not valid as a memory address
229 (because its displacement is too big for the machine.) */
230 rtx address;
231
232 /* The memory slot to which pseudo reg N is equivalent,
233 or zero if pseudo reg N is not equivalent to a memory slot. */
234 rtx mem;
235
236 /* An EXPR_LIST of REG_EQUIVs containing MEMs with
237 alternate representations of the location of pseudo reg N. */
238 rtx alt_mem_list;
239
240 /* The list of insns that initialized reg N from its equivalent
241 constant or memory slot. */
242 rtx init;
243} reg_equivs_t;
244
245#define reg_equiv_constant(ELT) \
0823efed 246 VEC_index (reg_equivs_t, reg_equivs, (ELT)).constant
f2034d06 247#define reg_equiv_invariant(ELT) \
0823efed 248 VEC_index (reg_equivs_t, reg_equivs, (ELT)).invariant
f2034d06 249#define reg_equiv_memory_loc(ELT) \
0823efed 250 VEC_index (reg_equivs_t, reg_equivs, (ELT)).memory_loc
f2034d06 251#define reg_equiv_address(ELT) \
0823efed 252 VEC_index (reg_equivs_t, reg_equivs, (ELT)).address
f2034d06 253#define reg_equiv_mem(ELT) \
0823efed 254 VEC_index (reg_equivs_t, reg_equivs, (ELT)).mem
f2034d06 255#define reg_equiv_alt_mem_list(ELT) \
0823efed 256 VEC_index (reg_equivs_t, reg_equivs, (ELT)).alt_mem_list
f2034d06 257#define reg_equiv_init(ELT) \
0823efed 258 VEC_index (reg_equivs_t, reg_equivs, (ELT)).init
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259
260DEF_VEC_O(reg_equivs_t);
261DEF_VEC_ALLOC_O(reg_equivs_t, gc);
262extern VEC(reg_equivs_t,gc) *reg_equivs;
d7f88d86 263
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264/* All the "earlyclobber" operands of the current insn
265 are recorded here. */
266extern int n_earlyclobbers;
267extern rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
268
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269/* Save the number of operands. */
270extern int reload_n_operands;
271
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272/* First uid used by insns created by reload in this function.
273 Used in find_equiv_reg. */
274extern int reload_first_uid;
275
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276extern int num_not_at_initial_offset;
277
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278#if defined SET_HARD_REG_BIT && defined CLEAR_REG_SET
279/* This structure describes instructions which are relevant for reload.
280 Apart from all regular insns, this also includes CODE_LABELs, since they
281 must be examined for register elimination. */
0c20a65f 282struct insn_chain
cad6f7d0 283{
8d9afc4e 284 /* Links to the neighbor instructions. */
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285 struct insn_chain *next, *prev;
286
287 /* Link through a chains set up by calculate_needs_all_insns, containing
288 all insns that need reloading. */
289 struct insn_chain *next_need_reload;
290
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291 /* The rtx of the insn. */
292 rtx insn;
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293
294 /* The basic block this insn is in. */
295 int block;
296
297 /* Nonzero if find_reloads said the insn requires reloading. */
298 unsigned int need_reload:1;
299 /* Nonzero if find_reloads needs to be run during reload_as_needed to
300 perform modifications on any operands. */
301 unsigned int need_operand_change:1;
302 /* Nonzero if eliminate_regs_in_insn said it requires eliminations. */
303 unsigned int need_elim:1;
304 /* Nonzero if this insn was inserted by perform_caller_saves. */
305 unsigned int is_caller_save_insn:1;
306
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307 /* Register life information: record all live hard registers, and
308 all live pseudos that have a hard register. This set also
309 contains pseudos spilled by IRA. */
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310 bitmap_head live_throughout;
311 bitmap_head dead_or_set;
cad6f7d0 312
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313 /* Copies of the global variables computed by find_reloads. */
314 struct reload *rld;
315 int n_reloads;
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316
317 /* Indicates which registers have already been used for spills. */
318 HARD_REG_SET used_spill_regs;
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319};
320
321/* A chain of insn_chain structures to describe all non-note insns in
322 a function. */
323extern struct insn_chain *reload_insn_chain;
324
325/* Allocate a new insn_chain structure. */
0c20a65f 326extern struct insn_chain *new_insn_chain (void);
7a8cba34 327#endif
cad6f7d0 328
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329#if defined SET_HARD_REG_BIT
330extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
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331#endif
332
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333/* Functions from reload.c: */
334
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335extern reg_class_t secondary_reload_class (bool, reg_class_t,
336 enum machine_mode, rtx);
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337
338#ifdef GCC_INSN_CODES_H
339extern enum reg_class scratch_reload_class (enum insn_code);
340#endif
341
0c20a65f 342/* Return a memory location that will be used to copy X in mode MODE.
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343 If we haven't already made a location for this mode in this insn,
344 call find_reloads_address on the location being returned. */
0c20a65f 345extern rtx get_secondary_mem (rtx, enum machine_mode, int, enum reload_type);
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346
347/* Clear any secondary memory locations we've made. */
0c20a65f 348extern void clear_secondary_mem (void);
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349
350/* Transfer all replacements that used to be in reload FROM to be in
351 reload TO. */
0c20a65f 352extern void transfer_replacements (int, int);
96c82232 353
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354/* IN_RTX is the value loaded by a reload that we now decided to inherit,
355 or a subpart of it. If we have any replacements registered for IN_RTX,
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356 cancel the reloads that were supposed to load them.
357 Return nonzero if we canceled any reloads. */
0c20a65f 358extern int remove_address_replacements (rtx in_rtx);
029b38ff 359
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360/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
361 if they are the same hard reg, and has special hacks for
362 autoincrement and autodecrement. */
0c20a65f 363extern int operands_match_p (rtx, rtx);
96c82232 364
2ba84f36 365/* Return 1 if altering OP will not modify the value of CLOBBER. */
0c20a65f 366extern int safe_from_earlyclobber (rtx, rtx);
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367
368/* Search the body of INSN for values that need reloading and record them
369 with push_reload. REPLACE nonzero means record also where the values occur
97ecb251 370 so that subst_reloads can be used. */
0c20a65f 371extern int find_reloads (rtx, int, int, int, short *);
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372
373/* Compute the sum of X and Y, making canonicalizations assumed in an
374 address, namely: sum constant integers, surround the sum of two
375 constants with a CONST, put the constant as the second operand, and
376 group the constant on the outermost sum. */
d4ebfa65 377extern rtx form_sum (enum machine_mode, rtx, rtx);
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378
379/* Substitute into the current INSN the registers into which we have reloaded
380 the things that need reloading. */
0c20a65f 381extern void subst_reloads (rtx);
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382
383/* Make a copy of any replacements being done into X and move those copies
384 to locations in Y, a copy of X. We only look at the highest level of
385 the RTL. */
0c20a65f 386extern void copy_replacements (rtx, rtx);
96c82232 387
a9a2595b 388/* Change any replacements being done to *X to be done to *Y */
0c20a65f 389extern void move_replacements (rtx *x, rtx *y);
a9a2595b 390
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391/* If LOC was scheduled to be replaced by something, return the replacement.
392 Otherwise, return *LOC. */
0c20a65f 393extern rtx find_replacement (rtx *);
96c82232 394
96c82232 395/* Nonzero if modifying X will affect IN. */
0c20a65f 396extern int reg_overlap_mentioned_for_reload_p (rtx, rtx);
96c82232 397
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398/* Check the insns before INSN to see if there is a suitable register
399 containing the same value as GOAL. */
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400extern rtx find_equiv_reg (rtx, rtx, enum reg_class, int, short *,
401 int, enum machine_mode);
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402
403/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
0c20a65f 404extern int regno_clobbered_p (unsigned int, rtx, enum machine_mode, int);
96c82232 405
09a308fe 406/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
0c20a65f 407extern int earlyclobber_operand_p (rtx);
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408
409/* Record one reload that needs to be performed. */
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410extern int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class,
411 enum machine_mode, enum machine_mode,
412 int, int, int, enum reload_type);
09a308fe 413
15e35479 414/* Functions in reload1.c: */
d6f4ec51 415
96c82232 416/* Initialize the reload pass once per compilation. */
0c20a65f 417extern void init_reload (void);
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418
419/* The reload pass itself. */
b0c11403 420extern bool reload (rtx, int);
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421
422/* Mark the slots in regs_ever_live for the hard regs
423 used by pseudo-reg number REGNO. */
0c20a65f 424extern void mark_home_live (int);
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425
426/* Scan X and replace any eliminable registers (such as fp) with a
427 replacement (such as sp), plus an offset. */
0c20a65f 428extern rtx eliminate_regs (rtx, enum machine_mode, rtx);
8c74fb06 429extern bool elimination_target_reg_p (rtx);
96c82232 430
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431/* Called from the register allocator to estimate costs of eliminating
432 invariant registers. */
433extern void calculate_elim_costs_all_insns (void);
434
cb2afeb3 435/* Deallocate the reload register used by reload number R. */
0c20a65f 436extern void deallocate_reload_reg (int r);
cb2afeb3 437
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438/* Functions in caller-save.c: */
439
440/* Initialize for caller-save. */
0c20a65f 441extern void init_caller_save (void);
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442
443/* Initialize save areas by showing that we haven't allocated any yet. */
0c20a65f 444extern void init_save_areas (void);
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445
446/* Allocate save areas for any hard registers that might need saving. */
0c20a65f 447extern void setup_save_areas (void);
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448
449/* Find the places where hard regs are live across calls and save them. */
0c20a65f 450extern void save_call_clobbered_regs (void);
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451
452/* Replace (subreg (reg)) with the appropriate (reg) for any operands. */
0c20a65f 453extern void cleanup_subreg_operands (rtx);
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454
455/* Debugging support. */
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456extern void debug_reload_to_stream (FILE *);
457extern void debug_reload (void);
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458
459/* Compute the actual register we should reload to, in case we're
460 reloading to/from a register that is wider than a word. */
0c20a65f 461extern rtx reload_adjust_reg_for_mode (rtx, enum machine_mode);
f2034d06 462
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463/* Allocate or grow the reg_equiv tables, initializing new entries to 0. */
464extern void grow_reg_equivs (void);