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9c7e2978 | 1 | /* Perform instruction reorganizations for delay slot filling. |
af841dbd | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
d9221e01 | 3 | 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. |
1923e516 | 4 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu). |
9c7e2978 RK |
5 | Hacked by Michael Tiemann (tiemann@cygnus.com). |
6 | ||
1322177d | 7 | This file is part of GCC. |
9c7e2978 | 8 | |
1322177d LB |
9 | GCC is free software; you can redistribute it and/or modify it under |
10 | the terms of the GNU General Public License as published by the Free | |
11 | Software Foundation; either version 2, or (at your option) any later | |
12 | version. | |
9c7e2978 | 13 | |
1322177d LB |
14 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
15 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
16 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
17 | for more details. | |
9c7e2978 RK |
18 | |
19 | You should have received a copy of the GNU General Public License | |
1322177d LB |
20 | along with GCC; see the file COPYING. If not, write to the Free |
21 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
22 | 02111-1307, USA. */ | |
9c7e2978 | 23 | |
9c7e2978 RK |
24 | /* Instruction reorganization pass. |
25 | ||
26 | This pass runs after register allocation and final jump | |
27 | optimization. It should be the last pass to run before peephole. | |
28 | It serves primarily to fill delay slots of insns, typically branch | |
29 | and call insns. Other insns typically involve more complicated | |
6dc42e49 | 30 | interactions of data dependencies and resource constraints, and |
9c7e2978 RK |
31 | are better handled by scheduling before register allocation (by the |
32 | function `schedule_insns'). | |
33 | ||
34 | The Branch Penalty is the number of extra cycles that are needed to | |
35 | execute a branch insn. On an ideal machine, branches take a single | |
36 | cycle, and the Branch Penalty is 0. Several RISC machines approach | |
37 | branch delays differently: | |
38 | ||
fcfcb20e | 39 | The MIPS has a single branch delay slot. Most insns |
9c7e2978 RK |
40 | (except other branches) can be used to fill this slot. When the |
41 | slot is filled, two insns execute in two cycles, reducing the | |
42 | branch penalty to zero. | |
43 | ||
9c7e2978 RK |
44 | The SPARC always has a branch delay slot, but its effects can be |
45 | annulled when the branch is not taken. This means that failing to | |
46 | find other sources of insns, we can hoist an insn from the branch | |
47 | target that would only be safe to execute knowing that the branch | |
48 | is taken. | |
49 | ||
35523fce | 50 | The HP-PA always has a branch delay slot. For unconditional branches |
f27e6bb2 | 51 | its effects can be annulled when the branch is taken. The effects |
35523fce JL |
52 | of the delay slot in a conditional branch can be nullified for forward |
53 | taken branches, or for untaken backward branches. This means | |
54 | we can hoist insns from the fall-through path for forward branches or | |
55 | steal insns from the target of backward branches. | |
56 | ||
18e765cb JL |
57 | The TMS320C3x and C4x have three branch delay slots. When the three |
58 | slots are filled, the branch penalty is zero. Most insns can fill the | |
59 | delay slots except jump insns. | |
60 | ||
9c7e2978 RK |
61 | Three techniques for filling delay slots have been implemented so far: |
62 | ||
63 | (1) `fill_simple_delay_slots' is the simplest, most efficient way | |
64 | to fill delay slots. This pass first looks for insns which come | |
65 | from before the branch and which are safe to execute after the | |
66 | branch. Then it searches after the insn requiring delay slots or, | |
67 | in the case of a branch, for insns that are after the point at | |
68 | which the branch merges into the fallthrough code, if such a point | |
69 | exists. When such insns are found, the branch penalty decreases | |
70 | and no code expansion takes place. | |
71 | ||
72 | (2) `fill_eager_delay_slots' is more complicated: it is used for | |
73 | scheduling conditional jumps, or for scheduling jumps which cannot | |
74 | be filled using (1). A machine need not have annulled jumps to use | |
75 | this strategy, but it helps (by keeping more options open). | |
76 | `fill_eager_delay_slots' tries to guess the direction the branch | |
77 | will go; if it guesses right 100% of the time, it can reduce the | |
c0e12601 | 78 | branch penalty as much as `fill_simple_delay_slots' does. If it |
fcfcb20e | 79 | guesses wrong 100% of the time, it might as well schedule nops. When |
9c7e2978 RK |
80 | `fill_eager_delay_slots' takes insns from the fall-through path of |
81 | the jump, usually there is no code expansion; when it takes insns | |
82 | from the branch target, there is code expansion if it is not the | |
83 | only way to reach that target. | |
84 | ||
85 | (3) `relax_delay_slots' uses a set of rules to simplify code that | |
86 | has been reorganized by (1) and (2). It finds cases where | |
87 | conditional test can be eliminated, jumps can be threaded, extra | |
88 | insns can be eliminated, etc. It is the job of (1) and (2) to do a | |
89 | good job of scheduling locally; `relax_delay_slots' takes care of | |
90 | making the various individual schedules work well together. It is | |
91 | especially tuned to handle the control flow interactions of branch | |
92 | insns. It does nothing for insns with delay slots that do not | |
93 | branch. | |
94 | ||
95 | On machines that use CC0, we are very conservative. We will not make | |
96 | a copy of an insn involving CC0 since we want to maintain a 1-1 | |
d45cf215 | 97 | correspondence between the insn that sets and uses CC0. The insns are |
9c7e2978 RK |
98 | allowed to be separated by placing an insn that sets CC0 (but not an insn |
99 | that uses CC0; we could do this, but it doesn't seem worthwhile) in a | |
100 | delay slot. In that case, we point each insn at the other with REG_CC_USER | |
101 | and REG_CC_SETTER notes. Note that these restrictions affect very few | |
102 | machines because most RISC machines with delay slots will not use CC0 | |
103 | (the RT is the only known exception at this point). | |
104 | ||
105 | Not yet implemented: | |
106 | ||
107 | The Acorn Risc Machine can conditionally execute most insns, so | |
108 | it is profitable to move single insns into a position to execute | |
109 | based on the condition code of the previous insn. | |
110 | ||
111 | The HP-PA can conditionally nullify insns, providing a similar | |
6d2f8887 | 112 | effect to the ARM, differing mostly in which insn is "in charge". */ |
9c7e2978 | 113 | |
9c7e2978 | 114 | #include "config.h" |
670ee920 | 115 | #include "system.h" |
4977bab6 ZW |
116 | #include "coretypes.h" |
117 | #include "tm.h" | |
01198c2f | 118 | #include "toplev.h" |
9c7e2978 | 119 | #include "rtl.h" |
6baf1cc8 | 120 | #include "tm_p.h" |
51549d76 | 121 | #include "expr.h" |
49ad7cfa | 122 | #include "function.h" |
9c7e2978 RK |
123 | #include "insn-config.h" |
124 | #include "conditions.h" | |
125 | #include "hard-reg-set.h" | |
126 | #include "basic-block.h" | |
127 | #include "regs.h" | |
9c7e2978 RK |
128 | #include "recog.h" |
129 | #include "flags.h" | |
130 | #include "output.h" | |
131 | #include "obstack.h" | |
d80e9fd7 | 132 | #include "insn-attr.h" |
ca545bb5 | 133 | #include "resource.h" |
78b41166 | 134 | #include "except.h" |
0443f602 | 135 | #include "params.h" |
d80e9fd7 RS |
136 | |
137 | #ifdef DELAY_SLOTS | |
9c7e2978 | 138 | |
9c7e2978 | 139 | #ifndef ANNUL_IFTRUE_SLOTS |
35523fce | 140 | #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0 |
9c7e2978 RK |
141 | #endif |
142 | #ifndef ANNUL_IFFALSE_SLOTS | |
35523fce | 143 | #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0 |
9c7e2978 RK |
144 | #endif |
145 | ||
146 | /* Insns which have delay slots that have not yet been filled. */ | |
147 | ||
148 | static struct obstack unfilled_slots_obstack; | |
149 | static rtx *unfilled_firstobj; | |
150 | ||
151 | /* Define macros to refer to the first and last slot containing unfilled | |
152 | insns. These are used because the list may move and its address | |
153 | should be recomputed at each use. */ | |
154 | ||
155 | #define unfilled_slots_base \ | |
156 | ((rtx *) obstack_base (&unfilled_slots_obstack)) | |
157 | ||
158 | #define unfilled_slots_next \ | |
159 | ((rtx *) obstack_next_free (&unfilled_slots_obstack)) | |
160 | ||
9c7e2978 RK |
161 | /* Points to the label before the end of the function. */ |
162 | static rtx end_of_function_label; | |
163 | ||
9c7e2978 RK |
164 | /* Mapping between INSN_UID's and position in the code since INSN_UID's do |
165 | not always monotonically increase. */ | |
166 | static int *uid_to_ruid; | |
167 | ||
168 | /* Highest valid index in `uid_to_ruid'. */ | |
169 | static int max_uid; | |
170 | ||
0c20a65f AJ |
171 | static int stop_search_p (rtx, int); |
172 | static int resource_conflicts_p (struct resources *, struct resources *); | |
173 | static int insn_references_resource_p (rtx, struct resources *, int); | |
174 | static int insn_sets_resource_p (rtx, struct resources *, int); | |
175 | static rtx find_end_label (void); | |
176 | static rtx emit_delay_sequence (rtx, rtx, int); | |
177 | static rtx add_to_delay_list (rtx, rtx); | |
178 | static rtx delete_from_delay_slot (rtx); | |
179 | static void delete_scheduled_jump (rtx); | |
180 | static void note_delay_statistics (int, int); | |
80cca0e1 | 181 | #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS) |
0c20a65f | 182 | static rtx optimize_skip (rtx); |
80cca0e1 | 183 | #endif |
0c20a65f AJ |
184 | static int get_jump_flags (rtx, rtx); |
185 | static int rare_destination (rtx); | |
186 | static int mostly_true_jump (rtx, rtx); | |
187 | static rtx get_branch_condition (rtx, rtx); | |
188 | static int condition_dominates_p (rtx, rtx); | |
189 | static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx); | |
190 | static int redirect_with_delay_list_safe_p (rtx, rtx, rtx); | |
191 | static int check_annul_list_true_false (int, rtx); | |
192 | static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx, | |
193 | struct resources *, | |
194 | struct resources *, | |
195 | struct resources *, | |
196 | int, int *, int *, rtx *); | |
197 | static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx, | |
198 | struct resources *, | |
199 | struct resources *, | |
200 | struct resources *, | |
201 | int, int *, int *); | |
202 | static void try_merge_delay_insns (rtx, rtx); | |
203 | static rtx redundant_insn (rtx, rtx, rtx); | |
204 | static int own_thread_p (rtx, rtx, int); | |
205 | static void update_block (rtx, rtx); | |
206 | static int reorg_redirect_jump (rtx, rtx); | |
207 | static void update_reg_dead_notes (rtx, rtx); | |
208 | static void fix_reg_dead_note (rtx, rtx); | |
209 | static void update_reg_unused_notes (rtx, rtx); | |
210 | static void fill_simple_delay_slots (int); | |
211 | static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx, int, int, int, int, | |
212 | int *, rtx); | |
213 | static void fill_eager_delay_slots (void); | |
214 | static void relax_delay_slots (rtx); | |
57bed152 | 215 | #ifdef HAVE_return |
0c20a65f | 216 | static void make_return_insns (rtx); |
57bed152 | 217 | #endif |
9c7e2978 RK |
218 | \f |
219 | /* Return TRUE if this insn should stop the search for insn to fill delay | |
220 | slots. LABELS_P indicates that labels should terminate the search. | |
221 | In all cases, jumps terminate the search. */ | |
222 | ||
223 | static int | |
0c20a65f | 224 | stop_search_p (rtx insn, int labels_p) |
9c7e2978 RK |
225 | { |
226 | if (insn == 0) | |
227 | return 1; | |
228 | ||
5cfc5356 EB |
229 | /* If the insn can throw an exception that is caught within the function, |
230 | it may effectively perform a jump from the viewpoint of the function. | |
231 | Therefore act like for a jump. */ | |
232 | if (can_throw_internal (insn)) | |
233 | return 1; | |
234 | ||
9c7e2978 RK |
235 | switch (GET_CODE (insn)) |
236 | { | |
237 | case NOTE: | |
238 | case CALL_INSN: | |
239 | return 0; | |
240 | ||
241 | case CODE_LABEL: | |
242 | return labels_p; | |
243 | ||
244 | case JUMP_INSN: | |
245 | case BARRIER: | |
246 | return 1; | |
247 | ||
248 | case INSN: | |
249 | /* OK unless it contains a delay slot or is an `asm' insn of some type. | |
250 | We don't know anything about these. */ | |
251 | return (GET_CODE (PATTERN (insn)) == SEQUENCE | |
252 | || GET_CODE (PATTERN (insn)) == ASM_INPUT | |
253 | || asm_noperands (PATTERN (insn)) >= 0); | |
254 | ||
255 | default: | |
256 | abort (); | |
257 | } | |
258 | } | |
259 | \f | |
260 | /* Return TRUE if any resources are marked in both RES1 and RES2 or if either | |
261 | resource set contains a volatile memory reference. Otherwise, return FALSE. */ | |
262 | ||
263 | static int | |
0c20a65f | 264 | resource_conflicts_p (struct resources *res1, struct resources *res2) |
9c7e2978 RK |
265 | { |
266 | if ((res1->cc && res2->cc) || (res1->memory && res2->memory) | |
8eae5ed6 | 267 | || (res1->unch_memory && res2->unch_memory) |
9c7e2978 RK |
268 | || res1->volatil || res2->volatil) |
269 | return 1; | |
270 | ||
271 | #ifdef HARD_REG_SET | |
272 | return (res1->regs & res2->regs) != HARD_CONST (0); | |
273 | #else | |
274 | { | |
275 | int i; | |
276 | ||
277 | for (i = 0; i < HARD_REG_SET_LONGS; i++) | |
278 | if ((res1->regs[i] & res2->regs[i]) != 0) | |
279 | return 1; | |
280 | return 0; | |
281 | } | |
282 | #endif | |
283 | } | |
284 | ||
285 | /* Return TRUE if any resource marked in RES, a `struct resources', is | |
ab63953e | 286 | referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called |
9c7e2978 RK |
287 | routine is using those resources. |
288 | ||
289 | We compute this by computing all the resources referenced by INSN and | |
290 | seeing if this conflicts with RES. It might be faster to directly check | |
291 | ourselves, and this is the way it used to work, but it means duplicating | |
292 | a large block of complex code. */ | |
293 | ||
294 | static int | |
0c20a65f AJ |
295 | insn_references_resource_p (rtx insn, struct resources *res, |
296 | int include_delayed_effects) | |
9c7e2978 RK |
297 | { |
298 | struct resources insn_res; | |
299 | ||
300 | CLEAR_RESOURCE (&insn_res); | |
674345b1 | 301 | mark_referenced_resources (insn, &insn_res, include_delayed_effects); |
9c7e2978 RK |
302 | return resource_conflicts_p (&insn_res, res); |
303 | } | |
304 | ||
305 | /* Return TRUE if INSN modifies resources that are marked in RES. | |
ab63953e | 306 | INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be |
9c7e2978 RK |
307 | included. CC0 is only modified if it is explicitly set; see comments |
308 | in front of mark_set_resources for details. */ | |
309 | ||
310 | static int | |
0c20a65f AJ |
311 | insn_sets_resource_p (rtx insn, struct resources *res, |
312 | int include_delayed_effects) | |
9c7e2978 RK |
313 | { |
314 | struct resources insn_sets; | |
315 | ||
316 | CLEAR_RESOURCE (&insn_sets); | |
674345b1 | 317 | mark_set_resources (insn, &insn_sets, 0, include_delayed_effects); |
9c7e2978 RK |
318 | return resource_conflicts_p (&insn_sets, res); |
319 | } | |
320 | \f | |
321 | /* Find a label at the end of the function or before a RETURN. If there is | |
322 | none, make one. */ | |
323 | ||
324 | static rtx | |
0c20a65f | 325 | find_end_label (void) |
9c7e2978 RK |
326 | { |
327 | rtx insn; | |
328 | ||
329 | /* If we found one previously, return it. */ | |
330 | if (end_of_function_label) | |
331 | return end_of_function_label; | |
332 | ||
333 | /* Otherwise, see if there is a label at the end of the function. If there | |
334 | is, it must be that RETURN insns aren't needed, so that is our return | |
335 | label and we don't have to do anything else. */ | |
336 | ||
337 | insn = get_last_insn (); | |
338 | while (GET_CODE (insn) == NOTE | |
339 | || (GET_CODE (insn) == INSN | |
340 | && (GET_CODE (PATTERN (insn)) == USE | |
341 | || GET_CODE (PATTERN (insn)) == CLOBBER))) | |
342 | insn = PREV_INSN (insn); | |
343 | ||
f27e6bb2 | 344 | /* When a target threads its epilogue we might already have a |
e572bad3 JL |
345 | suitable return insn. If so put a label before it for the |
346 | end_of_function_label. */ | |
347 | if (GET_CODE (insn) == BARRIER | |
348 | && GET_CODE (PREV_INSN (insn)) == JUMP_INSN | |
349 | && GET_CODE (PATTERN (PREV_INSN (insn))) == RETURN) | |
350 | { | |
351 | rtx temp = PREV_INSN (PREV_INSN (insn)); | |
352 | end_of_function_label = gen_label_rtx (); | |
353 | LABEL_NUSES (end_of_function_label) = 0; | |
354 | ||
0f41302f | 355 | /* Put the label before an USE insns that may proceed the RETURN insn. */ |
e572bad3 JL |
356 | while (GET_CODE (temp) == USE) |
357 | temp = PREV_INSN (temp); | |
358 | ||
359 | emit_label_after (end_of_function_label, temp); | |
360 | } | |
361 | ||
362 | else if (GET_CODE (insn) == CODE_LABEL) | |
363 | end_of_function_label = insn; | |
9c7e2978 RK |
364 | else |
365 | { | |
9c7e2978 RK |
366 | end_of_function_label = gen_label_rtx (); |
367 | LABEL_NUSES (end_of_function_label) = 0; | |
bf6302f0 HB |
368 | /* If the basic block reorder pass moves the return insn to |
369 | some other place try to locate it again and put our | |
370 | end_of_function_label there. */ | |
371 | while (insn && ! (GET_CODE (insn) == JUMP_INSN | |
372 | && (GET_CODE (PATTERN (insn)) == RETURN))) | |
373 | insn = PREV_INSN (insn); | |
374 | if (insn) | |
9c7e2978 | 375 | { |
bf6302f0 HB |
376 | insn = PREV_INSN (insn); |
377 | ||
f27e6bb2 | 378 | /* Put the label before an USE insns that may proceed the |
bf6302f0 | 379 | RETURN insn. */ |
f27e6bb2 | 380 | while (GET_CODE (insn) == USE) |
bf6302f0 HB |
381 | insn = PREV_INSN (insn); |
382 | ||
f27e6bb2 | 383 | emit_label_after (end_of_function_label, insn); |
9c7e2978 | 384 | } |
bf6302f0 HB |
385 | else |
386 | { | |
f27e6bb2 | 387 | /* Otherwise, make a new label and emit a RETURN and BARRIER, |
bf6302f0 | 388 | if needed. */ |
f27e6bb2 | 389 | emit_label (end_of_function_label); |
bf6302f0 | 390 | #ifdef HAVE_return |
f27e6bb2 | 391 | if (HAVE_return) |
bf6302f0 HB |
392 | { |
393 | /* The return we make may have delay slots too. */ | |
394 | rtx insn = gen_return (); | |
395 | insn = emit_jump_insn (insn); | |
396 | emit_barrier (); | |
f27e6bb2 KH |
397 | if (num_delay_slots (insn) > 0) |
398 | obstack_ptr_grow (&unfilled_slots_obstack, insn); | |
bf6302f0 | 399 | } |
9c7e2978 | 400 | #endif |
bf6302f0 | 401 | } |
9c7e2978 RK |
402 | } |
403 | ||
404 | /* Show one additional use for this label so it won't go away until | |
405 | we are done. */ | |
406 | ++LABEL_NUSES (end_of_function_label); | |
407 | ||
408 | return end_of_function_label; | |
409 | } | |
410 | \f | |
411 | /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace | |
412 | the pattern of INSN with the SEQUENCE. | |
413 | ||
414 | Chain the insns so that NEXT_INSN of each insn in the sequence points to | |
415 | the next and NEXT_INSN of the last insn in the sequence points to | |
416 | the first insn after the sequence. Similarly for PREV_INSN. This makes | |
417 | it easier to scan all insns. | |
418 | ||
419 | Returns the SEQUENCE that replaces INSN. */ | |
420 | ||
421 | static rtx | |
0c20a65f | 422 | emit_delay_sequence (rtx insn, rtx list, int length) |
9c7e2978 | 423 | { |
b3694847 SS |
424 | int i = 1; |
425 | rtx li; | |
9c7e2978 RK |
426 | int had_barrier = 0; |
427 | ||
38e01259 | 428 | /* Allocate the rtvec to hold the insns and the SEQUENCE. */ |
9c7e2978 | 429 | rtvec seqv = rtvec_alloc (length + 1); |
38a448ca | 430 | rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv); |
9c7e2978 RK |
431 | rtx seq_insn = make_insn_raw (seq); |
432 | rtx first = get_insns (); | |
433 | rtx last = get_last_insn (); | |
434 | ||
0f41302f | 435 | /* Make a copy of the insn having delay slots. */ |
9c7e2978 RK |
436 | rtx delay_insn = copy_rtx (insn); |
437 | ||
438 | /* If INSN is followed by a BARRIER, delete the BARRIER since it will only | |
f27e6bb2 | 439 | confuse further processing. Update LAST in case it was the last insn. |
9c7e2978 RK |
440 | We will put the BARRIER back in later. */ |
441 | if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == BARRIER) | |
442 | { | |
53c17031 | 443 | delete_related_insns (NEXT_INSN (insn)); |
9c7e2978 RK |
444 | last = get_last_insn (); |
445 | had_barrier = 1; | |
446 | } | |
447 | ||
448 | /* Splice our SEQUENCE into the insn stream where INSN used to be. */ | |
449 | NEXT_INSN (seq_insn) = NEXT_INSN (insn); | |
450 | PREV_INSN (seq_insn) = PREV_INSN (insn); | |
451 | ||
f5546425 JL |
452 | if (insn != last) |
453 | PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn; | |
454 | ||
455 | if (insn != first) | |
456 | NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn; | |
457 | ||
458 | /* Note the calls to set_new_first_and_last_insn must occur after | |
459 | SEQ_INSN has been completely spliced into the insn stream. | |
460 | ||
461 | Otherwise CUR_INSN_UID will get set to an incorrect value because | |
462 | set_new_first_and_last_insn will not find SEQ_INSN in the chain. */ | |
9c7e2978 RK |
463 | if (insn == last) |
464 | set_new_first_and_last_insn (first, seq_insn); | |
9c7e2978 RK |
465 | |
466 | if (insn == first) | |
467 | set_new_first_and_last_insn (seq_insn, last); | |
9c7e2978 RK |
468 | |
469 | /* Build our SEQUENCE and rebuild the insn chain. */ | |
470 | XVECEXP (seq, 0, 0) = delay_insn; | |
471 | INSN_DELETED_P (delay_insn) = 0; | |
472 | PREV_INSN (delay_insn) = PREV_INSN (seq_insn); | |
473 | ||
474 | for (li = list; li; li = XEXP (li, 1), i++) | |
475 | { | |
476 | rtx tem = XEXP (li, 0); | |
e41c7831 | 477 | rtx note, next; |
9c7e2978 RK |
478 | |
479 | /* Show that this copy of the insn isn't deleted. */ | |
480 | INSN_DELETED_P (tem) = 0; | |
481 | ||
482 | XVECEXP (seq, 0, i) = tem; | |
483 | PREV_INSN (tem) = XVECEXP (seq, 0, i - 1); | |
484 | NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem; | |
485 | ||
281ac604 JH |
486 | /* SPARC assembler, for instance, emit warning when debug info is output |
487 | into the delay slot. */ | |
488 | if (INSN_LOCATOR (tem) && !INSN_LOCATOR (seq_insn)) | |
489 | INSN_LOCATOR (seq_insn) = INSN_LOCATOR (tem); | |
490 | INSN_LOCATOR (tem) = 0; | |
491 | ||
e41c7831 RH |
492 | for (note = REG_NOTES (tem); note; note = next) |
493 | { | |
494 | next = XEXP (note, 1); | |
495 | switch (REG_NOTE_KIND (note)) | |
496 | { | |
497 | case REG_DEAD: | |
498 | /* Remove any REG_DEAD notes because we can't rely on them now | |
499 | that the insn has been moved. */ | |
500 | remove_note (tem, note); | |
501 | break; | |
502 | ||
503 | case REG_LABEL: | |
504 | /* Keep the label reference count up to date. */ | |
0864c526 JJ |
505 | if (GET_CODE (XEXP (note, 0)) == CODE_LABEL) |
506 | LABEL_NUSES (XEXP (note, 0)) ++; | |
e41c7831 RH |
507 | break; |
508 | ||
509 | default: | |
510 | break; | |
511 | } | |
512 | } | |
9c7e2978 RK |
513 | } |
514 | ||
515 | NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn); | |
516 | ||
f1f9081a RS |
517 | /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the |
518 | last insn in that SEQUENCE to point to us. Similarly for the first | |
519 | insn in the following insn if it is a SEQUENCE. */ | |
520 | ||
521 | if (PREV_INSN (seq_insn) && GET_CODE (PREV_INSN (seq_insn)) == INSN | |
522 | && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE) | |
523 | NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0, | |
524 | XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1)) | |
525 | = seq_insn; | |
526 | ||
527 | if (NEXT_INSN (seq_insn) && GET_CODE (NEXT_INSN (seq_insn)) == INSN | |
528 | && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE) | |
529 | PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn; | |
f27e6bb2 | 530 | |
9c7e2978 RK |
531 | /* If there used to be a BARRIER, put it back. */ |
532 | if (had_barrier) | |
533 | emit_barrier_after (seq_insn); | |
534 | ||
535 | if (i != length + 1) | |
536 | abort (); | |
537 | ||
538 | return seq_insn; | |
539 | } | |
540 | ||
541 | /* Add INSN to DELAY_LIST and return the head of the new list. The list must | |
542 | be in the order in which the insns are to be executed. */ | |
543 | ||
544 | static rtx | |
0c20a65f | 545 | add_to_delay_list (rtx insn, rtx delay_list) |
9c7e2978 | 546 | { |
c8cfe1f6 | 547 | /* If we have an empty list, just make a new list element. If |
9ec36da5 | 548 | INSN has its block number recorded, clear it since we may |
c8cfe1f6 RK |
549 | be moving the insn to a new block. */ |
550 | ||
9c7e2978 | 551 | if (delay_list == 0) |
c8cfe1f6 | 552 | { |
ca545bb5 | 553 | clear_hashed_info_for_insn (insn); |
38a448ca | 554 | return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX); |
c8cfe1f6 | 555 | } |
9c7e2978 RK |
556 | |
557 | /* Otherwise this must be an INSN_LIST. Add INSN to the end of the | |
558 | list. */ | |
559 | XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1)); | |
560 | ||
561 | return delay_list; | |
f27e6bb2 | 562 | } |
9c7e2978 | 563 | \f |
ab87f8c8 JL |
564 | /* Delete INSN from the delay slot of the insn that it is in, which may |
565 | produce an insn with no delay slots. Return the new insn. */ | |
9c7e2978 | 566 | |
96960d10 | 567 | static rtx |
0c20a65f | 568 | delete_from_delay_slot (rtx insn) |
9c7e2978 RK |
569 | { |
570 | rtx trial, seq_insn, seq, prev; | |
571 | rtx delay_list = 0; | |
572 | int i; | |
573 | ||
574 | /* We first must find the insn containing the SEQUENCE with INSN in its | |
575 | delay slot. Do this by finding an insn, TRIAL, where | |
576 | PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */ | |
577 | ||
578 | for (trial = insn; | |
579 | PREV_INSN (NEXT_INSN (trial)) == trial; | |
580 | trial = NEXT_INSN (trial)) | |
581 | ; | |
582 | ||
583 | seq_insn = PREV_INSN (NEXT_INSN (trial)); | |
584 | seq = PATTERN (seq_insn); | |
585 | ||
586 | /* Create a delay list consisting of all the insns other than the one | |
587 | we are deleting (unless we were the only one). */ | |
588 | if (XVECLEN (seq, 0) > 2) | |
589 | for (i = 1; i < XVECLEN (seq, 0); i++) | |
590 | if (XVECEXP (seq, 0, i) != insn) | |
591 | delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list); | |
592 | ||
593 | /* Delete the old SEQUENCE, re-emit the insn that used to have the delay | |
594 | list, and rebuild the delay list if non-empty. */ | |
595 | prev = PREV_INSN (seq_insn); | |
596 | trial = XVECEXP (seq, 0, 0); | |
53c17031 | 597 | delete_related_insns (seq_insn); |
9c7e2978 RK |
598 | add_insn_after (trial, prev); |
599 | ||
600 | if (GET_CODE (trial) == JUMP_INSN | |
601 | && (simplejump_p (trial) || GET_CODE (PATTERN (trial)) == RETURN)) | |
602 | emit_barrier_after (trial); | |
603 | ||
604 | /* If there are any delay insns, remit them. Otherwise clear the | |
605 | annul flag. */ | |
606 | if (delay_list) | |
91a51951 | 607 | trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2); |
cf40ea15 | 608 | else if (GET_CODE (trial) == JUMP_INSN |
7440af14 DM |
609 | || GET_CODE (trial) == CALL_INSN |
610 | || GET_CODE (trial) == INSN) | |
9c7e2978 RK |
611 | INSN_ANNULLED_BRANCH_P (trial) = 0; |
612 | ||
613 | INSN_FROM_TARGET_P (insn) = 0; | |
614 | ||
615 | /* Show we need to fill this insn again. */ | |
616 | obstack_ptr_grow (&unfilled_slots_obstack, trial); | |
96960d10 HB |
617 | |
618 | return trial; | |
9c7e2978 RK |
619 | } |
620 | \f | |
621 | /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down | |
622 | the insn that sets CC0 for it and delete it too. */ | |
623 | ||
624 | static void | |
0c20a65f | 625 | delete_scheduled_jump (rtx insn) |
9c7e2978 RK |
626 | { |
627 | /* Delete the insn that sets cc0 for us. On machines without cc0, we could | |
628 | delete the insn that sets the condition code, but it is hard to find it. | |
629 | Since this case is rare anyway, don't bother trying; there would likely | |
630 | be other insns that became dead anyway, which we wouldn't know to | |
631 | delete. */ | |
632 | ||
633 | #ifdef HAVE_cc0 | |
634 | if (reg_mentioned_p (cc0_rtx, insn)) | |
635 | { | |
fb3821f7 | 636 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
9c7e2978 RK |
637 | |
638 | /* If a reg-note was found, it points to an insn to set CC0. This | |
639 | insn is in the delay list of some other insn. So delete it from | |
640 | the delay list it was in. */ | |
641 | if (note) | |
642 | { | |
fb3821f7 | 643 | if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX) |
9c7e2978 RK |
644 | && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1) |
645 | delete_from_delay_slot (XEXP (note, 0)); | |
646 | } | |
647 | else | |
648 | { | |
649 | /* The insn setting CC0 is our previous insn, but it may be in | |
650 | a delay slot. It will be the last insn in the delay slot, if | |
651 | it is. */ | |
652 | rtx trial = previous_insn (insn); | |
653 | if (GET_CODE (trial) == NOTE) | |
654 | trial = prev_nonnote_insn (trial); | |
655 | if (sets_cc0_p (PATTERN (trial)) != 1 | |
ff81832f | 656 | || FIND_REG_INC_NOTE (trial, NULL_RTX)) |
9c7e2978 RK |
657 | return; |
658 | if (PREV_INSN (NEXT_INSN (trial)) == trial) | |
53c17031 | 659 | delete_related_insns (trial); |
9c7e2978 RK |
660 | else |
661 | delete_from_delay_slot (trial); | |
662 | } | |
663 | } | |
664 | #endif | |
665 | ||
53c17031 | 666 | delete_related_insns (insn); |
9c7e2978 RK |
667 | } |
668 | \f | |
669 | /* Counters for delay-slot filling. */ | |
670 | ||
671 | #define NUM_REORG_FUNCTIONS 2 | |
672 | #define MAX_DELAY_HISTOGRAM 3 | |
673 | #define MAX_REORG_PASSES 2 | |
674 | ||
675 | static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES]; | |
676 | ||
677 | static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES]; | |
678 | ||
679 | static int reorg_pass_number; | |
680 | ||
681 | static void | |
0c20a65f | 682 | note_delay_statistics (int slots_filled, int index) |
9c7e2978 RK |
683 | { |
684 | num_insns_needing_delays[index][reorg_pass_number]++; | |
685 | if (slots_filled > MAX_DELAY_HISTOGRAM) | |
686 | slots_filled = MAX_DELAY_HISTOGRAM; | |
687 | num_filled_delays[index][slots_filled][reorg_pass_number]++; | |
688 | } | |
689 | \f | |
690 | #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS) | |
691 | ||
692 | /* Optimize the following cases: | |
693 | ||
694 | 1. When a conditional branch skips over only one instruction, | |
695 | use an annulling branch and put that insn in the delay slot. | |
6dc42e49 RS |
696 | Use either a branch that annuls when the condition if true or |
697 | invert the test with a branch that annuls when the condition is | |
9c7e2978 RK |
698 | false. This saves insns, since otherwise we must copy an insn |
699 | from the L1 target. | |
700 | ||
701 | (orig) (skip) (otherwise) | |
702 | Bcc.n L1 Bcc',a L1 Bcc,a L1' | |
703 | insn insn insn2 | |
704 | L1: L1: L1: | |
705 | insn2 insn2 insn2 | |
706 | insn3 insn3 L1': | |
707 | insn3 | |
708 | ||
709 | 2. When a conditional branch skips over only one instruction, | |
710 | and after that, it unconditionally branches somewhere else, | |
711 | perform the similar optimization. This saves executing the | |
712 | second branch in the case where the inverted condition is true. | |
713 | ||
714 | Bcc.n L1 Bcc',a L2 | |
715 | insn insn | |
716 | L1: L1: | |
717 | Bra L2 Bra L2 | |
718 | ||
719 | INSN is a JUMP_INSN. | |
720 | ||
721 | This should be expanded to skip over N insns, where N is the number | |
722 | of delay slots required. */ | |
723 | ||
724 | static rtx | |
0c20a65f | 725 | optimize_skip (rtx insn) |
9c7e2978 | 726 | { |
b3694847 | 727 | rtx trial = next_nonnote_insn (insn); |
9c7e2978 RK |
728 | rtx next_trial = next_active_insn (trial); |
729 | rtx delay_list = 0; | |
730 | rtx target_label; | |
35523fce JL |
731 | int flags; |
732 | ||
733 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); | |
9c7e2978 RK |
734 | |
735 | if (trial == 0 | |
736 | || GET_CODE (trial) != INSN | |
737 | || GET_CODE (PATTERN (trial)) == SEQUENCE | |
738 | || recog_memoized (trial) < 0 | |
35523fce | 739 | || (! eligible_for_annul_false (insn, 0, trial, flags) |
1db828df DM |
740 | && ! eligible_for_annul_true (insn, 0, trial, flags)) |
741 | || can_throw_internal (trial)) | |
9c7e2978 RK |
742 | return 0; |
743 | ||
744 | /* There are two cases where we are just executing one insn (we assume | |
745 | here that a branch requires only one insn; this should be generalized | |
746 | at some point): Where the branch goes around a single insn or where | |
747 | we have one insn followed by a branch to the same label we branch to. | |
748 | In both of these cases, inverting the jump and annulling the delay | |
749 | slot give the same effect in fewer insns. */ | |
c5c76735 JL |
750 | if ((next_trial == next_active_insn (JUMP_LABEL (insn)) |
751 | && ! (next_trial == 0 && current_function_epilogue_delay_list != 0)) | |
9c7e2978 RK |
752 | || (next_trial != 0 |
753 | && GET_CODE (next_trial) == JUMP_INSN | |
754 | && JUMP_LABEL (insn) == JUMP_LABEL (next_trial) | |
755 | && (simplejump_p (next_trial) | |
756 | || GET_CODE (PATTERN (next_trial)) == RETURN))) | |
757 | { | |
35523fce | 758 | if (eligible_for_annul_false (insn, 0, trial, flags)) |
9c7e2978 | 759 | { |
9ba11d5a | 760 | if (invert_jump (insn, JUMP_LABEL (insn), 1)) |
9c7e2978 | 761 | INSN_FROM_TARGET_P (trial) = 1; |
35523fce | 762 | else if (! eligible_for_annul_true (insn, 0, trial, flags)) |
9c7e2978 RK |
763 | return 0; |
764 | } | |
765 | ||
fb3821f7 | 766 | delay_list = add_to_delay_list (trial, NULL_RTX); |
9c7e2978 RK |
767 | next_trial = next_active_insn (trial); |
768 | update_block (trial, trial); | |
53c17031 | 769 | delete_related_insns (trial); |
9c7e2978 RK |
770 | |
771 | /* Also, if we are targeting an unconditional | |
772 | branch, thread our jump to the target of that branch. Don't | |
773 | change this into a RETURN here, because it may not accept what | |
774 | we have in the delay slot. We'll fix this up later. */ | |
775 | if (next_trial && GET_CODE (next_trial) == JUMP_INSN | |
776 | && (simplejump_p (next_trial) | |
777 | || GET_CODE (PATTERN (next_trial)) == RETURN)) | |
778 | { | |
779 | target_label = JUMP_LABEL (next_trial); | |
780 | if (target_label == 0) | |
781 | target_label = find_end_label (); | |
0e5bad53 JL |
782 | |
783 | /* Recompute the flags based on TARGET_LABEL since threading | |
784 | the jump to TARGET_LABEL may change the direction of the | |
785 | jump (which may change the circumstances in which the | |
786 | delay slot is nullified). */ | |
787 | flags = get_jump_flags (insn, target_label); | |
788 | if (eligible_for_annul_true (insn, 0, trial, flags)) | |
789 | reorg_redirect_jump (insn, target_label); | |
9c7e2978 RK |
790 | } |
791 | ||
792 | INSN_ANNULLED_BRANCH_P (insn) = 1; | |
793 | } | |
794 | ||
795 | return delay_list; | |
796 | } | |
797 | #endif | |
798 | \f | |
35523fce JL |
799 | /* Encode and return branch direction and prediction information for |
800 | INSN assuming it will jump to LABEL. | |
801 | ||
802 | Non conditional branches return no direction information and | |
803 | are predicted as very likely taken. */ | |
0f41302f | 804 | |
35523fce | 805 | static int |
0c20a65f | 806 | get_jump_flags (rtx insn, rtx label) |
35523fce JL |
807 | { |
808 | int flags; | |
809 | ||
810 | /* get_jump_flags can be passed any insn with delay slots, these may | |
811 | be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch | |
812 | direction information, and only if they are conditional jumps. | |
813 | ||
814 | If LABEL is zero, then there is no way to determine the branch | |
815 | direction. */ | |
816 | if (GET_CODE (insn) == JUMP_INSN | |
3480bb98 | 817 | && (condjump_p (insn) || condjump_in_parallel_p (insn)) |
35523fce | 818 | && INSN_UID (insn) <= max_uid |
e328af29 RK |
819 | && label != 0 |
820 | && INSN_UID (label) <= max_uid) | |
f27e6bb2 | 821 | flags |
35523fce JL |
822 | = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)]) |
823 | ? ATTR_FLAG_forward : ATTR_FLAG_backward; | |
824 | /* No valid direction information. */ | |
825 | else | |
826 | flags = 0; | |
f27e6bb2 | 827 | |
35523fce | 828 | /* If insn is a conditional branch call mostly_true_jump to get |
f27e6bb2 | 829 | determine the branch prediction. |
35523fce JL |
830 | |
831 | Non conditional branches are predicted as very likely taken. */ | |
832 | if (GET_CODE (insn) == JUMP_INSN | |
3480bb98 | 833 | && (condjump_p (insn) || condjump_in_parallel_p (insn))) |
35523fce JL |
834 | { |
835 | int prediction; | |
836 | ||
837 | prediction = mostly_true_jump (insn, get_branch_condition (insn, label)); | |
838 | switch (prediction) | |
839 | { | |
f27e6bb2 KH |
840 | case 2: |
841 | flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely); | |
842 | break; | |
843 | case 1: | |
844 | flags |= ATTR_FLAG_likely; | |
845 | break; | |
846 | case 0: | |
847 | flags |= ATTR_FLAG_unlikely; | |
848 | break; | |
849 | case -1: | |
850 | flags |= (ATTR_FLAG_very_unlikely | ATTR_FLAG_unlikely); | |
851 | break; | |
35523fce | 852 | |
f27e6bb2 KH |
853 | default: |
854 | abort (); | |
35523fce JL |
855 | } |
856 | } | |
857 | else | |
858 | flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely); | |
859 | ||
860 | return flags; | |
861 | } | |
862 | ||
65753f55 | 863 | /* Return 1 if INSN is a destination that will be branched to rarely (the |
0275a51b RK |
864 | return point of a function); return 2 if DEST will be branched to very |
865 | rarely (a call to a function that doesn't return). Otherwise, | |
866 | return 0. */ | |
867 | ||
868 | static int | |
0c20a65f | 869 | rare_destination (rtx insn) |
0275a51b RK |
870 | { |
871 | int jump_count = 0; | |
65753f55 | 872 | rtx next; |
0275a51b | 873 | |
65753f55 | 874 | for (; insn; insn = next) |
0275a51b RK |
875 | { |
876 | if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
877 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
878 | ||
65753f55 RK |
879 | next = NEXT_INSN (insn); |
880 | ||
0275a51b RK |
881 | switch (GET_CODE (insn)) |
882 | { | |
883 | case CODE_LABEL: | |
884 | return 0; | |
885 | case BARRIER: | |
f27e6bb2 | 886 | /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We |
0275a51b RK |
887 | don't scan past JUMP_INSNs, so any barrier we find here must |
888 | have been after a CALL_INSN and hence mean the call doesn't | |
889 | return. */ | |
890 | return 2; | |
891 | case JUMP_INSN: | |
892 | if (GET_CODE (PATTERN (insn)) == RETURN) | |
893 | return 1; | |
894 | else if (simplejump_p (insn) | |
895 | && jump_count++ < 10) | |
65753f55 | 896 | next = JUMP_LABEL (insn); |
0275a51b RK |
897 | else |
898 | return 0; | |
91a51951 KG |
899 | |
900 | default: | |
901 | break; | |
0275a51b RK |
902 | } |
903 | } | |
904 | ||
905 | /* If we got here it means we hit the end of the function. So this | |
906 | is an unlikely destination. */ | |
907 | ||
908 | return 1; | |
909 | } | |
910 | ||
9c7e2978 RK |
911 | /* Return truth value of the statement that this branch |
912 | is mostly taken. If we think that the branch is extremely likely | |
913 | to be taken, we return 2. If the branch is slightly more likely to be | |
0275a51b RK |
914 | taken, return 1. If the branch is slightly less likely to be taken, |
915 | return 0 and if the branch is highly unlikely to be taken, return -1. | |
9c7e2978 | 916 | |
40f03658 | 917 | CONDITION, if nonzero, is the condition that JUMP_INSN is testing. */ |
9c7e2978 RK |
918 | |
919 | static int | |
0c20a65f | 920 | mostly_true_jump (rtx jump_insn, rtx condition) |
9c7e2978 RK |
921 | { |
922 | rtx target_label = JUMP_LABEL (jump_insn); | |
10f13594 | 923 | rtx insn, note; |
0275a51b RK |
924 | int rare_dest = rare_destination (target_label); |
925 | int rare_fallthrough = rare_destination (NEXT_INSN (jump_insn)); | |
926 | ||
a6c383b0 DE |
927 | /* If branch probabilities are available, then use that number since it |
928 | always gives a correct answer. */ | |
10f13594 RH |
929 | note = find_reg_note (jump_insn, REG_BR_PROB, 0); |
930 | if (note) | |
a6c383b0 | 931 | { |
10f13594 RH |
932 | int prob = INTVAL (XEXP (note, 0)); |
933 | ||
934 | if (prob >= REG_BR_PROB_BASE * 9 / 10) | |
f27e6bb2 | 935 | return 2; |
10f13594 | 936 | else if (prob >= REG_BR_PROB_BASE / 2) |
f27e6bb2 | 937 | return 1; |
10f13594 | 938 | else if (prob >= REG_BR_PROB_BASE / 10) |
f27e6bb2 | 939 | return 0; |
10f13594 | 940 | else |
f27e6bb2 | 941 | return -1; |
a6c383b0 DE |
942 | } |
943 | ||
10f13594 RH |
944 | /* ??? Ought to use estimate_probability instead. */ |
945 | ||
0275a51b RK |
946 | /* If this is a branch outside a loop, it is highly unlikely. */ |
947 | if (GET_CODE (PATTERN (jump_insn)) == SET | |
948 | && GET_CODE (SET_SRC (PATTERN (jump_insn))) == IF_THEN_ELSE | |
949 | && ((GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 1)) == LABEL_REF | |
950 | && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 1))) | |
951 | || (GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 2)) == LABEL_REF | |
952 | && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 2))))) | |
953 | return -1; | |
954 | ||
955 | if (target_label) | |
4d0e69c3 | 956 | { |
0275a51b RK |
957 | /* If this is the test of a loop, it is very likely true. We scan |
958 | backwards from the target label. If we find a NOTE_INSN_LOOP_BEG | |
f27e6bb2 | 959 | before the next real insn, we assume the branch is to the top of |
0275a51b RK |
960 | the loop. */ |
961 | for (insn = PREV_INSN (target_label); | |
962 | insn && GET_CODE (insn) == NOTE; | |
963 | insn = PREV_INSN (insn)) | |
964 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
965 | return 2; | |
966 | ||
967 | /* If this is a jump to the test of a loop, it is likely true. We scan | |
968 | forwards from the target label. If we find a NOTE_INSN_LOOP_VTOP | |
969 | before the next real insn, we assume the branch is to the loop branch | |
970 | test. */ | |
971 | for (insn = NEXT_INSN (target_label); | |
972 | insn && GET_CODE (insn) == NOTE; | |
973 | insn = PREV_INSN (insn)) | |
974 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP) | |
975 | return 1; | |
4d0e69c3 | 976 | } |
9c7e2978 | 977 | |
abc95ed3 | 978 | /* Look at the relative rarities of the fallthrough and destination. If |
0f41302f | 979 | they differ, we can predict the branch that way. */ |
9c7e2978 | 980 | |
0275a51b RK |
981 | switch (rare_fallthrough - rare_dest) |
982 | { | |
983 | case -2: | |
984 | return -1; | |
985 | case -1: | |
986 | return 0; | |
987 | case 0: | |
988 | break; | |
989 | case 1: | |
4d0e69c3 | 990 | return 1; |
0275a51b RK |
991 | case 2: |
992 | return 2; | |
993 | } | |
4d0e69c3 | 994 | |
f27e6bb2 | 995 | /* If we couldn't figure out what this jump was, assume it won't be |
9c7e2978 RK |
996 | taken. This should be rare. */ |
997 | if (condition == 0) | |
998 | return 0; | |
999 | ||
1000 | /* EQ tests are usually false and NE tests are usually true. Also, | |
1001 | most quantities are positive, so we can make the appropriate guesses | |
1002 | about signed comparisons against zero. */ | |
1003 | switch (GET_CODE (condition)) | |
1004 | { | |
1005 | case CONST_INT: | |
1006 | /* Unconditional branch. */ | |
1007 | return 1; | |
1008 | case EQ: | |
1009 | return 0; | |
1010 | case NE: | |
1011 | return 1; | |
1012 | case LE: | |
1013 | case LT: | |
1014 | if (XEXP (condition, 1) == const0_rtx) | |
f27e6bb2 | 1015 | return 0; |
9c7e2978 RK |
1016 | break; |
1017 | case GE: | |
1018 | case GT: | |
1019 | if (XEXP (condition, 1) == const0_rtx) | |
1020 | return 1; | |
1021 | break; | |
91a51951 KG |
1022 | |
1023 | default: | |
1024 | break; | |
9c7e2978 RK |
1025 | } |
1026 | ||
1027 | /* Predict backward branches usually take, forward branches usually not. If | |
1028 | we don't know whether this is forward or backward, assume the branch | |
1029 | will be taken, since most are. */ | |
13b8df74 RK |
1030 | return (target_label == 0 || INSN_UID (jump_insn) > max_uid |
1031 | || INSN_UID (target_label) > max_uid | |
9c7e2978 | 1032 | || (uid_to_ruid[INSN_UID (jump_insn)] |
6d649d26 | 1033 | > uid_to_ruid[INSN_UID (target_label)])); |
9c7e2978 RK |
1034 | } |
1035 | ||
1036 | /* Return the condition under which INSN will branch to TARGET. If TARGET | |
1037 | is zero, return the condition under which INSN will return. If INSN is | |
1038 | an unconditional branch, return const_true_rtx. If INSN isn't a simple | |
1039 | type of jump, or it doesn't go to TARGET, return 0. */ | |
1040 | ||
1041 | static rtx | |
0c20a65f | 1042 | get_branch_condition (rtx insn, rtx target) |
9c7e2978 RK |
1043 | { |
1044 | rtx pat = PATTERN (insn); | |
1045 | rtx src; | |
f27e6bb2 | 1046 | |
3480bb98 JL |
1047 | if (condjump_in_parallel_p (insn)) |
1048 | pat = XVECEXP (pat, 0, 0); | |
1049 | ||
9c7e2978 RK |
1050 | if (GET_CODE (pat) == RETURN) |
1051 | return target == 0 ? const_true_rtx : 0; | |
1052 | ||
1053 | else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx) | |
1054 | return 0; | |
1055 | ||
1056 | src = SET_SRC (pat); | |
1057 | if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target) | |
1058 | return const_true_rtx; | |
1059 | ||
1060 | else if (GET_CODE (src) == IF_THEN_ELSE | |
1061 | && ((target == 0 && GET_CODE (XEXP (src, 1)) == RETURN) | |
1062 | || (GET_CODE (XEXP (src, 1)) == LABEL_REF | |
1063 | && XEXP (XEXP (src, 1), 0) == target)) | |
1064 | && XEXP (src, 2) == pc_rtx) | |
1065 | return XEXP (src, 0); | |
1066 | ||
1067 | else if (GET_CODE (src) == IF_THEN_ELSE | |
1068 | && ((target == 0 && GET_CODE (XEXP (src, 2)) == RETURN) | |
1069 | || (GET_CODE (XEXP (src, 2)) == LABEL_REF | |
1070 | && XEXP (XEXP (src, 2), 0) == target)) | |
1071 | && XEXP (src, 1) == pc_rtx) | |
34295799 RH |
1072 | { |
1073 | enum rtx_code rev; | |
1074 | rev = reversed_comparison_code (XEXP (src, 0), insn); | |
1075 | if (rev != UNKNOWN) | |
1076 | return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)), | |
1077 | XEXP (XEXP (src, 0), 0), | |
1078 | XEXP (XEXP (src, 0), 1)); | |
1079 | } | |
58c8c593 RK |
1080 | |
1081 | return 0; | |
9c7e2978 RK |
1082 | } |
1083 | ||
40f03658 | 1084 | /* Return nonzero if CONDITION is more strict than the condition of |
9c7e2978 RK |
1085 | INSN, i.e., if INSN will always branch if CONDITION is true. */ |
1086 | ||
1087 | static int | |
0c20a65f | 1088 | condition_dominates_p (rtx condition, rtx insn) |
9c7e2978 RK |
1089 | { |
1090 | rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn)); | |
1091 | enum rtx_code code = GET_CODE (condition); | |
1092 | enum rtx_code other_code; | |
1093 | ||
1094 | if (rtx_equal_p (condition, other_condition) | |
1095 | || other_condition == const_true_rtx) | |
1096 | return 1; | |
1097 | ||
1098 | else if (condition == const_true_rtx || other_condition == 0) | |
1099 | return 0; | |
1100 | ||
1101 | other_code = GET_CODE (other_condition); | |
1102 | if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2 | |
1103 | || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0)) | |
1104 | || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1))) | |
1105 | return 0; | |
1106 | ||
1107 | return comparison_dominates_p (code, other_code); | |
1108 | } | |
83fd5651 | 1109 | |
40f03658 | 1110 | /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate |
83fd5651 JL |
1111 | any insns already in the delay slot of JUMP. */ |
1112 | ||
1113 | static int | |
0c20a65f | 1114 | redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq) |
83fd5651 | 1115 | { |
91a51951 | 1116 | int flags, i; |
83fd5651 JL |
1117 | rtx pat = PATTERN (seq); |
1118 | ||
1119 | /* Make sure all the delay slots of this jump would still | |
1120 | be valid after threading the jump. If they are still | |
40f03658 | 1121 | valid, then return nonzero. */ |
83fd5651 JL |
1122 | |
1123 | flags = get_jump_flags (jump, newlabel); | |
1124 | for (i = 1; i < XVECLEN (pat, 0); i++) | |
1125 | if (! ( | |
1126 | #ifdef ANNUL_IFFALSE_SLOTS | |
1127 | (INSN_ANNULLED_BRANCH_P (jump) | |
1128 | && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i))) | |
1129 | ? eligible_for_annul_false (jump, i - 1, | |
1130 | XVECEXP (pat, 0, i), flags) : | |
1131 | #endif | |
1132 | #ifdef ANNUL_IFTRUE_SLOTS | |
1133 | (INSN_ANNULLED_BRANCH_P (jump) | |
1134 | && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i))) | |
1135 | ? eligible_for_annul_true (jump, i - 1, | |
1136 | XVECEXP (pat, 0, i), flags) : | |
1137 | #endif | |
f27e6bb2 | 1138 | eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags))) |
83fd5651 JL |
1139 | break; |
1140 | ||
1141 | return (i == XVECLEN (pat, 0)); | |
1142 | } | |
1143 | ||
40f03658 | 1144 | /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate |
b304ad47 JL |
1145 | any insns we wish to place in the delay slot of JUMP. */ |
1146 | ||
1147 | static int | |
0c20a65f | 1148 | redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list) |
b304ad47 JL |
1149 | { |
1150 | int flags, i; | |
1151 | rtx li; | |
1152 | ||
1153 | /* Make sure all the insns in DELAY_LIST would still be | |
1154 | valid after threading the jump. If they are still | |
40f03658 | 1155 | valid, then return nonzero. */ |
b304ad47 JL |
1156 | |
1157 | flags = get_jump_flags (jump, newlabel); | |
1158 | for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++) | |
1159 | if (! ( | |
1160 | #ifdef ANNUL_IFFALSE_SLOTS | |
1161 | (INSN_ANNULLED_BRANCH_P (jump) | |
1162 | && INSN_FROM_TARGET_P (XEXP (li, 0))) | |
4791d99b | 1163 | ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) : |
b304ad47 JL |
1164 | #endif |
1165 | #ifdef ANNUL_IFTRUE_SLOTS | |
1166 | (INSN_ANNULLED_BRANCH_P (jump) | |
1167 | && ! INSN_FROM_TARGET_P (XEXP (li, 0))) | |
4791d99b | 1168 | ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) : |
b304ad47 | 1169 | #endif |
4791d99b | 1170 | eligible_for_delay (jump, i, XEXP (li, 0), flags))) |
b304ad47 JL |
1171 | break; |
1172 | ||
1173 | return (li == NULL); | |
1174 | } | |
1175 | ||
96960d10 HB |
1176 | /* DELAY_LIST is a list of insns that have already been placed into delay |
1177 | slots. See if all of them have the same annulling status as ANNUL_TRUE_P. | |
1178 | If not, return 0; otherwise return 1. */ | |
1179 | ||
1180 | static int | |
0c20a65f | 1181 | check_annul_list_true_false (int annul_true_p, rtx delay_list) |
96960d10 | 1182 | { |
f0c76b51 | 1183 | rtx temp; |
96960d10 HB |
1184 | |
1185 | if (delay_list) | |
1186 | { | |
1187 | for (temp = delay_list; temp; temp = XEXP (temp, 1)) | |
f27e6bb2 KH |
1188 | { |
1189 | rtx trial = XEXP (temp, 0); | |
1190 | ||
1191 | if ((annul_true_p && INSN_FROM_TARGET_P (trial)) | |
96960d10 HB |
1192 | || (!annul_true_p && !INSN_FROM_TARGET_P (trial))) |
1193 | return 0; | |
f27e6bb2 | 1194 | } |
96960d10 | 1195 | } |
ab87f8c8 | 1196 | |
96960d10 HB |
1197 | return 1; |
1198 | } | |
9c7e2978 RK |
1199 | \f |
1200 | /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that | |
1201 | the condition tested by INSN is CONDITION and the resources shown in | |
1202 | OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns | |
1203 | from SEQ's delay list, in addition to whatever insns it may execute | |
1204 | (in DELAY_LIST). SETS and NEEDED are denote resources already set and | |
1205 | needed while searching for delay slot insns. Return the concatenated | |
1206 | delay list if possible, otherwise, return 0. | |
1207 | ||
1208 | SLOTS_TO_FILL is the total number of slots required by INSN, and | |
1209 | PSLOTS_FILLED points to the number filled so far (also the number of | |
1210 | insns in DELAY_LIST). It is updated with the number that have been | |
1211 | filled from the SEQUENCE, if any. | |
1212 | ||
40f03658 | 1213 | PANNUL_P points to a nonzero value if we already know that we need |
9c7e2978 | 1214 | to annul INSN. If this routine determines that annulling is needed, |
40f03658 | 1215 | it may set that value nonzero. |
9c7e2978 RK |
1216 | |
1217 | PNEW_THREAD points to a location that is to receive the place at which | |
1218 | execution should continue. */ | |
1219 | ||
1220 | static rtx | |
0c20a65f AJ |
1221 | steal_delay_list_from_target (rtx insn, rtx condition, rtx seq, |
1222 | rtx delay_list, struct resources *sets, | |
1223 | struct resources *needed, | |
1224 | struct resources *other_needed, | |
1225 | int slots_to_fill, int *pslots_filled, | |
1226 | int *pannul_p, rtx *pnew_thread) | |
9c7e2978 RK |
1227 | { |
1228 | rtx temp; | |
1229 | int slots_remaining = slots_to_fill - *pslots_filled; | |
1230 | int total_slots_filled = *pslots_filled; | |
1231 | rtx new_delay_list = 0; | |
1232 | int must_annul = *pannul_p; | |
f0c76b51 | 1233 | int used_annul = 0; |
ab87f8c8 | 1234 | int i; |
18e765cb | 1235 | struct resources cc_set; |
9c7e2978 RK |
1236 | |
1237 | /* We can't do anything if there are more delay slots in SEQ than we | |
1238 | can handle, or if we don't know that it will be a taken branch. | |
9c7e2978 | 1239 | We know that it will be a taken branch if it is either an unconditional |
fe41a98e JW |
1240 | branch or a conditional branch with a stricter branch condition. |
1241 | ||
1242 | Also, exit if the branch has more than one set, since then it is computing | |
1243 | other results that can't be ignored, e.g. the HPPA mov&branch instruction. | |
1244 | ??? It may be possible to move other sets into INSN in addition to | |
18e765cb JL |
1245 | moving the instructions in the delay slots. |
1246 | ||
1247 | We can not steal the delay list if one of the instructions in the | |
f27e6bb2 | 1248 | current delay_list modifies the condition codes and the jump in the |
18e765cb JL |
1249 | sequence is a conditional jump. We can not do this because we can |
1250 | not change the direction of the jump because the condition codes | |
f27e6bb2 | 1251 | will effect the direction of the jump in the sequence. */ |
18e765cb JL |
1252 | |
1253 | CLEAR_RESOURCE (&cc_set); | |
1254 | for (temp = delay_list; temp; temp = XEXP (temp, 1)) | |
1255 | { | |
1256 | rtx trial = XEXP (temp, 0); | |
1257 | ||
73780b74 | 1258 | mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL); |
18e765cb | 1259 | if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, 0)) |
f27e6bb2 | 1260 | return delay_list; |
18e765cb | 1261 | } |
9c7e2978 RK |
1262 | |
1263 | if (XVECLEN (seq, 0) - 1 > slots_remaining | |
fe41a98e JW |
1264 | || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0)) |
1265 | || ! single_set (XVECEXP (seq, 0, 0))) | |
9c7e2978 RK |
1266 | return delay_list; |
1267 | ||
6e7b03e1 AH |
1268 | #ifdef MD_CAN_REDIRECT_BRANCH |
1269 | /* On some targets, branches with delay slots can have a limited | |
1270 | displacement. Give the back end a chance to tell us we can't do | |
1271 | this. */ | |
1272 | if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0))) | |
1273 | return delay_list; | |
1274 | #endif | |
1275 | ||
9c7e2978 RK |
1276 | for (i = 1; i < XVECLEN (seq, 0); i++) |
1277 | { | |
1278 | rtx trial = XVECEXP (seq, 0, i); | |
35523fce | 1279 | int flags; |
9c7e2978 RK |
1280 | |
1281 | if (insn_references_resource_p (trial, sets, 0) | |
1282 | || insn_sets_resource_p (trial, needed, 0) | |
1283 | || insn_sets_resource_p (trial, sets, 0) | |
1284 | #ifdef HAVE_cc0 | |
1285 | /* If TRIAL sets CC0, we can't copy it, so we can't steal this | |
1286 | delay list. */ | |
fb3821f7 | 1287 | || find_reg_note (trial, REG_CC_USER, NULL_RTX) |
9c7e2978 RK |
1288 | #endif |
1289 | /* If TRIAL is from the fallthrough code of an annulled branch insn | |
1290 | in SEQ, we cannot use it. */ | |
1291 | || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0)) | |
1292 | && ! INSN_FROM_TARGET_P (trial))) | |
1293 | return delay_list; | |
1294 | ||
1295 | /* If this insn was already done (usually in a previous delay slot), | |
1296 | pretend we put it in our delay slot. */ | |
f898abd7 | 1297 | if (redundant_insn (trial, insn, new_delay_list)) |
9c7e2978 RK |
1298 | continue; |
1299 | ||
35523fce JL |
1300 | /* We will end up re-vectoring this branch, so compute flags |
1301 | based on jumping to the new label. */ | |
1302 | flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0))); | |
1303 | ||
9c7e2978 RK |
1304 | if (! must_annul |
1305 | && ((condition == const_true_rtx | |
1306 | || (! insn_sets_resource_p (trial, other_needed, 0) | |
1307 | && ! may_trap_p (PATTERN (trial))))) | |
35523fce | 1308 | ? eligible_for_delay (insn, total_slots_filled, trial, flags) |
96960d10 HB |
1309 | : (must_annul || (delay_list == NULL && new_delay_list == NULL)) |
1310 | && (must_annul = 1, | |
1311 | check_annul_list_true_false (0, delay_list) | |
1312 | && check_annul_list_true_false (0, new_delay_list) | |
1313 | && eligible_for_annul_false (insn, total_slots_filled, | |
1314 | trial, flags))) | |
9c7e2978 | 1315 | { |
96960d10 HB |
1316 | if (must_annul) |
1317 | used_annul = 1; | |
9c7e2978 RK |
1318 | temp = copy_rtx (trial); |
1319 | INSN_FROM_TARGET_P (temp) = 1; | |
1320 | new_delay_list = add_to_delay_list (temp, new_delay_list); | |
1321 | total_slots_filled++; | |
1322 | ||
1323 | if (--slots_remaining == 0) | |
1324 | break; | |
1325 | } | |
1326 | else | |
1327 | return delay_list; | |
1328 | } | |
1329 | ||
1330 | /* Show the place to which we will be branching. */ | |
1331 | *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0))); | |
1332 | ||
1333 | /* Add any new insns to the delay list and update the count of the | |
1334 | number of slots filled. */ | |
1335 | *pslots_filled = total_slots_filled; | |
96960d10 HB |
1336 | if (used_annul) |
1337 | *pannul_p = 1; | |
9c7e2978 RK |
1338 | |
1339 | if (delay_list == 0) | |
1340 | return new_delay_list; | |
1341 | ||
1342 | for (temp = new_delay_list; temp; temp = XEXP (temp, 1)) | |
1343 | delay_list = add_to_delay_list (XEXP (temp, 0), delay_list); | |
1344 | ||
1345 | return delay_list; | |
1346 | } | |
1347 | \f | |
f27e6bb2 | 1348 | /* Similar to steal_delay_list_from_target except that SEQ is on the |
9c7e2978 RK |
1349 | fallthrough path of INSN. Here we only do something if the delay insn |
1350 | of SEQ is an unconditional branch. In that case we steal its delay slot | |
1351 | for INSN since unconditional branches are much easier to fill. */ | |
1352 | ||
1353 | static rtx | |
0c20a65f AJ |
1354 | steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq, |
1355 | rtx delay_list, struct resources *sets, | |
1356 | struct resources *needed, | |
1357 | struct resources *other_needed, | |
1358 | int slots_to_fill, int *pslots_filled, | |
1359 | int *pannul_p) | |
9c7e2978 RK |
1360 | { |
1361 | int i; | |
35523fce | 1362 | int flags; |
96960d10 HB |
1363 | int must_annul = *pannul_p; |
1364 | int used_annul = 0; | |
35523fce JL |
1365 | |
1366 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); | |
9c7e2978 RK |
1367 | |
1368 | /* We can't do anything if SEQ's delay insn isn't an | |
1369 | unconditional branch. */ | |
1370 | ||
1371 | if (! simplejump_p (XVECEXP (seq, 0, 0)) | |
1372 | && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN) | |
1373 | return delay_list; | |
1374 | ||
1375 | for (i = 1; i < XVECLEN (seq, 0); i++) | |
1376 | { | |
1377 | rtx trial = XVECEXP (seq, 0, i); | |
1378 | ||
1379 | /* If TRIAL sets CC0, stealing it will move it too far from the use | |
1380 | of CC0. */ | |
1381 | if (insn_references_resource_p (trial, sets, 0) | |
1382 | || insn_sets_resource_p (trial, needed, 0) | |
1383 | || insn_sets_resource_p (trial, sets, 0) | |
1384 | #ifdef HAVE_cc0 | |
1385 | || sets_cc0_p (PATTERN (trial)) | |
1386 | #endif | |
1387 | ) | |
1388 | ||
1389 | break; | |
1390 | ||
1391 | /* If this insn was already done, we don't need it. */ | |
f898abd7 | 1392 | if (redundant_insn (trial, insn, delay_list)) |
9c7e2978 RK |
1393 | { |
1394 | delete_from_delay_slot (trial); | |
1395 | continue; | |
1396 | } | |
1397 | ||
96960d10 | 1398 | if (! must_annul |
9c7e2978 RK |
1399 | && ((condition == const_true_rtx |
1400 | || (! insn_sets_resource_p (trial, other_needed, 0) | |
1401 | && ! may_trap_p (PATTERN (trial))))) | |
35523fce | 1402 | ? eligible_for_delay (insn, *pslots_filled, trial, flags) |
96960d10 HB |
1403 | : (must_annul || delay_list == NULL) && (must_annul = 1, |
1404 | check_annul_list_true_false (1, delay_list) | |
1405 | && eligible_for_annul_true (insn, *pslots_filled, trial, flags))) | |
9c7e2978 | 1406 | { |
96960d10 HB |
1407 | if (must_annul) |
1408 | used_annul = 1; | |
9c7e2978 RK |
1409 | delete_from_delay_slot (trial); |
1410 | delay_list = add_to_delay_list (trial, delay_list); | |
1411 | ||
1412 | if (++(*pslots_filled) == slots_to_fill) | |
1413 | break; | |
1414 | } | |
1415 | else | |
1416 | break; | |
1417 | } | |
1418 | ||
96960d10 HB |
1419 | if (used_annul) |
1420 | *pannul_p = 1; | |
9c7e2978 RK |
1421 | return delay_list; |
1422 | } | |
1423 | \f | |
1424 | /* Try merging insns starting at THREAD which match exactly the insns in | |
1425 | INSN's delay list. | |
1426 | ||
1427 | If all insns were matched and the insn was previously annulling, the | |
1428 | annul bit will be cleared. | |
1429 | ||
1430 | For each insn that is merged, if the branch is or will be non-annulling, | |
1431 | we delete the merged insn. */ | |
1432 | ||
1433 | static void | |
0c20a65f | 1434 | try_merge_delay_insns (rtx insn, rtx thread) |
9c7e2978 RK |
1435 | { |
1436 | rtx trial, next_trial; | |
1437 | rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0); | |
1438 | int annul_p = INSN_ANNULLED_BRANCH_P (delay_insn); | |
1439 | int slot_number = 1; | |
1440 | int num_slots = XVECLEN (PATTERN (insn), 0); | |
1441 | rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number); | |
1442 | struct resources set, needed; | |
1443 | rtx merged_insns = 0; | |
1444 | int i; | |
35523fce JL |
1445 | int flags; |
1446 | ||
a2f54138 | 1447 | flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn)); |
9c7e2978 RK |
1448 | |
1449 | CLEAR_RESOURCE (&needed); | |
1450 | CLEAR_RESOURCE (&set); | |
1451 | ||
1452 | /* If this is not an annulling branch, take into account anything needed in | |
96960d10 | 1453 | INSN's delay slot. This prevents two increments from being incorrectly |
9c7e2978 RK |
1454 | folded into one. If we are annulling, this would be the correct |
1455 | thing to do. (The alternative, looking at things set in NEXT_TO_MATCH | |
1456 | will essentially disable this optimization. This method is somewhat of | |
1457 | a kludge, but I don't see a better way.) */ | |
1458 | if (! annul_p) | |
f27e6bb2 | 1459 | for (i = 1 ; i < num_slots; i++) |
96960d10 | 1460 | if (XVECEXP (PATTERN (insn), 0, i)) |
f27e6bb2 | 1461 | mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed, 1); |
9c7e2978 RK |
1462 | |
1463 | for (trial = thread; !stop_search_p (trial, 1); trial = next_trial) | |
1464 | { | |
1465 | rtx pat = PATTERN (trial); | |
ce15adaa | 1466 | rtx oldtrial = trial; |
9c7e2978 RK |
1467 | |
1468 | next_trial = next_nonnote_insn (trial); | |
1469 | ||
1470 | /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */ | |
1471 | if (GET_CODE (trial) == INSN | |
1472 | && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)) | |
1473 | continue; | |
1474 | ||
1475 | if (GET_CODE (next_to_match) == GET_CODE (trial) | |
1476 | #ifdef HAVE_cc0 | |
1477 | /* We can't share an insn that sets cc0. */ | |
1478 | && ! sets_cc0_p (pat) | |
1479 | #endif | |
1480 | && ! insn_references_resource_p (trial, &set, 1) | |
1481 | && ! insn_sets_resource_p (trial, &set, 1) | |
1482 | && ! insn_sets_resource_p (trial, &needed, 1) | |
1483 | && (trial = try_split (pat, trial, 0)) != 0 | |
9772d94f JW |
1484 | /* Update next_trial, in case try_split succeeded. */ |
1485 | && (next_trial = next_nonnote_insn (trial)) | |
ce15adaa RK |
1486 | /* Likewise THREAD. */ |
1487 | && (thread = oldtrial == thread ? trial : thread) | |
9c7e2978 RK |
1488 | && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial)) |
1489 | /* Have to test this condition if annul condition is different | |
1490 | from (and less restrictive than) non-annulling one. */ | |
35523fce | 1491 | && eligible_for_delay (delay_insn, slot_number - 1, trial, flags)) |
9c7e2978 | 1492 | { |
9c7e2978 RK |
1493 | |
1494 | if (! annul_p) | |
1495 | { | |
f1f9081a | 1496 | update_block (trial, thread); |
8ad4abfc RK |
1497 | if (trial == thread) |
1498 | thread = next_active_insn (thread); | |
1499 | ||
53c17031 | 1500 | delete_related_insns (trial); |
9c7e2978 RK |
1501 | INSN_FROM_TARGET_P (next_to_match) = 0; |
1502 | } | |
1503 | else | |
38a448ca | 1504 | merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns); |
9c7e2978 RK |
1505 | |
1506 | if (++slot_number == num_slots) | |
1507 | break; | |
1508 | ||
1509 | next_to_match = XVECEXP (PATTERN (insn), 0, slot_number); | |
9c7e2978 RK |
1510 | } |
1511 | ||
73780b74 | 1512 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
9c7e2978 RK |
1513 | mark_referenced_resources (trial, &needed, 1); |
1514 | } | |
1515 | ||
1516 | /* See if we stopped on a filled insn. If we did, try to see if its | |
1517 | delay slots match. */ | |
1518 | if (slot_number != num_slots | |
1519 | && trial && GET_CODE (trial) == INSN | |
1520 | && GET_CODE (PATTERN (trial)) == SEQUENCE | |
1521 | && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))) | |
1522 | { | |
1523 | rtx pat = PATTERN (trial); | |
058acefd JW |
1524 | rtx filled_insn = XVECEXP (pat, 0, 0); |
1525 | ||
1526 | /* Account for resources set/needed by the filled insn. */ | |
73780b74 | 1527 | mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL); |
058acefd | 1528 | mark_referenced_resources (filled_insn, &needed, 1); |
9c7e2978 RK |
1529 | |
1530 | for (i = 1; i < XVECLEN (pat, 0); i++) | |
1531 | { | |
1532 | rtx dtrial = XVECEXP (pat, 0, i); | |
1533 | ||
1534 | if (! insn_references_resource_p (dtrial, &set, 1) | |
1535 | && ! insn_sets_resource_p (dtrial, &set, 1) | |
1536 | && ! insn_sets_resource_p (dtrial, &needed, 1) | |
1537 | #ifdef HAVE_cc0 | |
1538 | && ! sets_cc0_p (PATTERN (dtrial)) | |
1539 | #endif | |
1540 | && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial)) | |
35523fce | 1541 | && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags)) |
9c7e2978 RK |
1542 | { |
1543 | if (! annul_p) | |
1544 | { | |
96960d10 HB |
1545 | rtx new; |
1546 | ||
f1f9081a | 1547 | update_block (dtrial, thread); |
96960d10 HB |
1548 | new = delete_from_delay_slot (dtrial); |
1549 | if (INSN_DELETED_P (thread)) | |
1550 | thread = new; | |
9c7e2978 RK |
1551 | INSN_FROM_TARGET_P (next_to_match) = 0; |
1552 | } | |
1553 | else | |
38a448ca RH |
1554 | merged_insns = gen_rtx_INSN_LIST (SImode, dtrial, |
1555 | merged_insns); | |
9c7e2978 RK |
1556 | |
1557 | if (++slot_number == num_slots) | |
1558 | break; | |
1559 | ||
1560 | next_to_match = XVECEXP (PATTERN (insn), 0, slot_number); | |
1561 | } | |
96960d10 HB |
1562 | else |
1563 | { | |
f0c76b51 JL |
1564 | /* Keep track of the set/referenced resources for the delay |
1565 | slots of any trial insns we encounter. */ | |
f27e6bb2 KH |
1566 | mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL); |
1567 | mark_referenced_resources (dtrial, &needed, 1); | |
96960d10 | 1568 | } |
9c7e2978 RK |
1569 | } |
1570 | } | |
1571 | ||
1572 | /* If all insns in the delay slot have been matched and we were previously | |
1573 | annulling the branch, we need not any more. In that case delete all the | |
38e01259 | 1574 | merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in |
9c7e2978 RK |
1575 | the delay list so that we know that it isn't only being used at the |
1576 | target. */ | |
d58b6986 | 1577 | if (slot_number == num_slots && annul_p) |
9c7e2978 RK |
1578 | { |
1579 | for (; merged_insns; merged_insns = XEXP (merged_insns, 1)) | |
1580 | { | |
1581 | if (GET_MODE (merged_insns) == SImode) | |
1582 | { | |
96960d10 HB |
1583 | rtx new; |
1584 | ||
f1f9081a | 1585 | update_block (XEXP (merged_insns, 0), thread); |
96960d10 HB |
1586 | new = delete_from_delay_slot (XEXP (merged_insns, 0)); |
1587 | if (INSN_DELETED_P (thread)) | |
1588 | thread = new; | |
9c7e2978 RK |
1589 | } |
1590 | else | |
1591 | { | |
f1f9081a | 1592 | update_block (XEXP (merged_insns, 0), thread); |
53c17031 | 1593 | delete_related_insns (XEXP (merged_insns, 0)); |
9c7e2978 RK |
1594 | } |
1595 | } | |
1596 | ||
1597 | INSN_ANNULLED_BRANCH_P (delay_insn) = 0; | |
1598 | ||
1599 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
1600 | INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0; | |
1601 | } | |
1602 | } | |
1603 | \f | |
1604 | /* See if INSN is redundant with an insn in front of TARGET. Often this | |
1605 | is called when INSN is a candidate for a delay slot of TARGET. | |
1606 | DELAY_LIST are insns that will be placed in delay slots of TARGET in front | |
1607 | of INSN. Often INSN will be redundant with an insn in a delay slot of | |
1608 | some previous insn. This happens when we have a series of branches to the | |
1609 | same label; in that case the first insn at the target might want to go | |
1610 | into each of the delay slots. | |
1611 | ||
1612 | If we are not careful, this routine can take up a significant fraction | |
1613 | of the total compilation time (4%), but only wins rarely. Hence we | |
1614 | speed this routine up by making two passes. The first pass goes back | |
5d3cc252 | 1615 | until it hits a label and sees if it finds an insn with an identical |
9c7e2978 RK |
1616 | pattern. Only in this (relatively rare) event does it check for |
1617 | data conflicts. | |
1618 | ||
1619 | We do not split insns we encounter. This could cause us not to find a | |
1620 | redundant insn, but the cost of splitting seems greater than the possible | |
1621 | gain in rare cases. */ | |
1622 | ||
5317d2f8 | 1623 | static rtx |
0c20a65f | 1624 | redundant_insn (rtx insn, rtx target, rtx delay_list) |
9c7e2978 RK |
1625 | { |
1626 | rtx target_main = target; | |
1627 | rtx ipat = PATTERN (insn); | |
1628 | rtx trial, pat; | |
1629 | struct resources needed, set; | |
1630 | int i; | |
0443f602 | 1631 | unsigned insns_to_search; |
9c7e2978 | 1632 | |
cbae24bc RK |
1633 | /* If INSN has any REG_UNUSED notes, it can't match anything since we |
1634 | are allowed to not actually assign to such a register. */ | |
1635 | if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0) | |
1636 | return 0; | |
1637 | ||
9c7e2978 | 1638 | /* Scan backwards looking for a match. */ |
0443f602 JO |
1639 | for (trial = PREV_INSN (target), |
1640 | insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH; | |
1641 | trial && insns_to_search > 0; | |
1642 | trial = PREV_INSN (trial), --insns_to_search) | |
9c7e2978 RK |
1643 | { |
1644 | if (GET_CODE (trial) == CODE_LABEL) | |
1645 | return 0; | |
1646 | ||
2c3c49de | 1647 | if (! INSN_P (trial)) |
9c7e2978 RK |
1648 | continue; |
1649 | ||
1650 | pat = PATTERN (trial); | |
1651 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
1652 | continue; | |
1653 | ||
1654 | if (GET_CODE (pat) == SEQUENCE) | |
1655 | { | |
ca104c13 JL |
1656 | /* Stop for a CALL and its delay slots because it is difficult to |
1657 | track its resource needs correctly. */ | |
9c7e2978 RK |
1658 | if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN) |
1659 | return 0; | |
1660 | ||
ca104c13 | 1661 | /* Stop for an INSN or JUMP_INSN with delayed effects and its delay |
f27e6bb2 | 1662 | slots because it is difficult to track its resource needs |
ca104c13 JL |
1663 | correctly. */ |
1664 | ||
1665 | #ifdef INSN_SETS_ARE_DELAYED | |
1666 | if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0))) | |
f27e6bb2 | 1667 | return 0; |
ca104c13 JL |
1668 | #endif |
1669 | ||
1670 | #ifdef INSN_REFERENCES_ARE_DELAYED | |
1671 | if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0))) | |
f27e6bb2 | 1672 | return 0; |
ca104c13 JL |
1673 | #endif |
1674 | ||
1675 | /* See if any of the insns in the delay slot match, updating | |
1676 | resource requirements as we go. */ | |
9c7e2978 RK |
1677 | for (i = XVECLEN (pat, 0) - 1; i > 0; i--) |
1678 | if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn) | |
cbae24bc RK |
1679 | && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat) |
1680 | && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX)) | |
9c7e2978 RK |
1681 | break; |
1682 | ||
1683 | /* If found a match, exit this loop early. */ | |
1684 | if (i > 0) | |
1685 | break; | |
1686 | } | |
1687 | ||
cbae24bc RK |
1688 | else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat) |
1689 | && ! find_reg_note (trial, REG_UNUSED, NULL_RTX)) | |
9c7e2978 RK |
1690 | break; |
1691 | } | |
1692 | ||
1693 | /* If we didn't find an insn that matches, return 0. */ | |
1694 | if (trial == 0) | |
1695 | return 0; | |
1696 | ||
1697 | /* See what resources this insn sets and needs. If they overlap, or | |
1698 | if this insn references CC0, it can't be redundant. */ | |
1699 | ||
1700 | CLEAR_RESOURCE (&needed); | |
1701 | CLEAR_RESOURCE (&set); | |
73780b74 | 1702 | mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); |
9c7e2978 RK |
1703 | mark_referenced_resources (insn, &needed, 1); |
1704 | ||
1705 | /* If TARGET is a SEQUENCE, get the main insn. */ | |
1706 | if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE) | |
1707 | target_main = XVECEXP (PATTERN (target), 0, 0); | |
1708 | ||
1709 | if (resource_conflicts_p (&needed, &set) | |
1710 | #ifdef HAVE_cc0 | |
1711 | || reg_mentioned_p (cc0_rtx, ipat) | |
1712 | #endif | |
1713 | /* The insn requiring the delay may not set anything needed or set by | |
1714 | INSN. */ | |
1715 | || insn_sets_resource_p (target_main, &needed, 1) | |
1716 | || insn_sets_resource_p (target_main, &set, 1)) | |
1717 | return 0; | |
1718 | ||
1719 | /* Insns we pass may not set either NEEDED or SET, so merge them for | |
1720 | simpler tests. */ | |
1721 | needed.memory |= set.memory; | |
8eae5ed6 | 1722 | needed.unch_memory |= set.unch_memory; |
9c7e2978 RK |
1723 | IOR_HARD_REG_SET (needed.regs, set.regs); |
1724 | ||
1725 | /* This insn isn't redundant if it conflicts with an insn that either is | |
1726 | or will be in a delay slot of TARGET. */ | |
1727 | ||
1728 | while (delay_list) | |
1729 | { | |
1730 | if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, 1)) | |
1731 | return 0; | |
1732 | delay_list = XEXP (delay_list, 1); | |
1733 | } | |
1734 | ||
1735 | if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE) | |
1736 | for (i = 1; i < XVECLEN (PATTERN (target), 0); i++) | |
1737 | if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, 1)) | |
1738 | return 0; | |
1739 | ||
1740 | /* Scan backwards until we reach a label or an insn that uses something | |
1741 | INSN sets or sets something insn uses or sets. */ | |
1742 | ||
0443f602 JO |
1743 | for (trial = PREV_INSN (target), |
1744 | insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH; | |
1745 | trial && GET_CODE (trial) != CODE_LABEL && insns_to_search > 0; | |
1746 | trial = PREV_INSN (trial), --insns_to_search) | |
9c7e2978 RK |
1747 | { |
1748 | if (GET_CODE (trial) != INSN && GET_CODE (trial) != CALL_INSN | |
1749 | && GET_CODE (trial) != JUMP_INSN) | |
1750 | continue; | |
1751 | ||
1752 | pat = PATTERN (trial); | |
1753 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
1754 | continue; | |
1755 | ||
1756 | if (GET_CODE (pat) == SEQUENCE) | |
1757 | { | |
1758 | /* If this is a CALL_INSN and its delay slots, it is hard to track | |
1759 | the resource needs properly, so give up. */ | |
1760 | if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN) | |
1761 | return 0; | |
1762 | ||
38e01259 | 1763 | /* If this is an INSN or JUMP_INSN with delayed effects, it |
ca104c13 JL |
1764 | is hard to track the resource needs properly, so give up. */ |
1765 | ||
1766 | #ifdef INSN_SETS_ARE_DELAYED | |
1767 | if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0))) | |
f27e6bb2 | 1768 | return 0; |
ca104c13 JL |
1769 | #endif |
1770 | ||
1771 | #ifdef INSN_REFERENCES_ARE_DELAYED | |
1772 | if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0))) | |
f27e6bb2 | 1773 | return 0; |
ca104c13 JL |
1774 | #endif |
1775 | ||
9c7e2978 RK |
1776 | /* See if any of the insns in the delay slot match, updating |
1777 | resource requirements as we go. */ | |
1778 | for (i = XVECLEN (pat, 0) - 1; i > 0; i--) | |
1779 | { | |
1780 | rtx candidate = XVECEXP (pat, 0, i); | |
1781 | ||
1782 | /* If an insn will be annulled if the branch is false, it isn't | |
1783 | considered as a possible duplicate insn. */ | |
1784 | if (rtx_equal_p (PATTERN (candidate), ipat) | |
1785 | && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0)) | |
1786 | && INSN_FROM_TARGET_P (candidate))) | |
1787 | { | |
1788 | /* Show that this insn will be used in the sequel. */ | |
1789 | INSN_FROM_TARGET_P (candidate) = 0; | |
5317d2f8 | 1790 | return candidate; |
9c7e2978 RK |
1791 | } |
1792 | ||
1793 | /* Unless this is an annulled insn from the target of a branch, | |
1794 | we must stop if it sets anything needed or set by INSN. */ | |
1795 | if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0)) | |
1796 | || ! INSN_FROM_TARGET_P (candidate)) | |
1797 | && insn_sets_resource_p (candidate, &needed, 1)) | |
1798 | return 0; | |
1799 | } | |
1800 | ||
f27e6bb2 | 1801 | /* If the insn requiring the delay slot conflicts with INSN, we |
9c7e2978 RK |
1802 | must stop. */ |
1803 | if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1)) | |
1804 | return 0; | |
1805 | } | |
1806 | else | |
1807 | { | |
1808 | /* See if TRIAL is the same as INSN. */ | |
1809 | pat = PATTERN (trial); | |
1810 | if (rtx_equal_p (pat, ipat)) | |
5317d2f8 | 1811 | return trial; |
9c7e2978 RK |
1812 | |
1813 | /* Can't go any further if TRIAL conflicts with INSN. */ | |
1814 | if (insn_sets_resource_p (trial, &needed, 1)) | |
1815 | return 0; | |
1816 | } | |
1817 | } | |
1818 | ||
1819 | return 0; | |
1820 | } | |
1821 | \f | |
40f03658 | 1822 | /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero, |
9c7e2978 | 1823 | it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH |
40f03658 | 1824 | is nonzero, we are allowed to fall into this thread; otherwise, we are |
9c7e2978 RK |
1825 | not. |
1826 | ||
1827 | If LABEL is used more than one or we pass a label other than LABEL before | |
1828 | finding an active insn, we do not own this thread. */ | |
1829 | ||
1830 | static int | |
0c20a65f | 1831 | own_thread_p (rtx thread, rtx label, int allow_fallthrough) |
9c7e2978 RK |
1832 | { |
1833 | rtx active_insn; | |
1834 | rtx insn; | |
1835 | ||
1836 | /* We don't own the function end. */ | |
1837 | if (thread == 0) | |
1838 | return 0; | |
1839 | ||
1840 | /* Get the first active insn, or THREAD, if it is an active insn. */ | |
1841 | active_insn = next_active_insn (PREV_INSN (thread)); | |
1842 | ||
1843 | for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn)) | |
1844 | if (GET_CODE (insn) == CODE_LABEL | |
1845 | && (insn != label || LABEL_NUSES (insn) != 1)) | |
1846 | return 0; | |
1847 | ||
1848 | if (allow_fallthrough) | |
1849 | return 1; | |
1850 | ||
1851 | /* Ensure that we reach a BARRIER before any insn or label. */ | |
1852 | for (insn = prev_nonnote_insn (thread); | |
1853 | insn == 0 || GET_CODE (insn) != BARRIER; | |
1854 | insn = prev_nonnote_insn (insn)) | |
1855 | if (insn == 0 | |
1856 | || GET_CODE (insn) == CODE_LABEL | |
1857 | || (GET_CODE (insn) == INSN | |
1858 | && GET_CODE (PATTERN (insn)) != USE | |
1859 | && GET_CODE (PATTERN (insn)) != CLOBBER)) | |
1860 | return 0; | |
1861 | ||
1862 | return 1; | |
1863 | } | |
1864 | \f | |
9c7e2978 | 1865 | /* Called when INSN is being moved from a location near the target of a jump. |
aa2c50d6 | 1866 | We leave a marker of the form (use (INSN)) immediately in front |
9c7e2978 | 1867 | of WHERE for mark_target_live_regs. These markers will be deleted when |
aa2c50d6 RK |
1868 | reorg finishes. |
1869 | ||
1870 | We used to try to update the live status of registers if WHERE is at | |
1871 | the start of a basic block, but that can't work since we may remove a | |
1872 | BARRIER in relax_delay_slots. */ | |
9c7e2978 RK |
1873 | |
1874 | static void | |
0c20a65f | 1875 | update_block (rtx insn, rtx where) |
9c7e2978 | 1876 | { |
f27e6bb2 | 1877 | /* Ignore if this was in a delay slot and it came from the target of |
9c7e2978 RK |
1878 | a branch. */ |
1879 | if (INSN_FROM_TARGET_P (insn)) | |
1880 | return; | |
1881 | ||
38a448ca | 1882 | emit_insn_before (gen_rtx_USE (VOIDmode, insn), where); |
9c7e2978 RK |
1883 | |
1884 | /* INSN might be making a value live in a block where it didn't use to | |
1885 | be. So recompute liveness information for this block. */ | |
aa2c50d6 | 1886 | |
ca545bb5 | 1887 | incr_ticks_for_insn (insn); |
9c7e2978 | 1888 | } |
28c9500b | 1889 | |
326f06f7 RK |
1890 | /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for |
1891 | the basic block containing the jump. */ | |
1892 | ||
1893 | static int | |
0c20a65f | 1894 | reorg_redirect_jump (rtx jump, rtx nlabel) |
326f06f7 | 1895 | { |
ca545bb5 | 1896 | incr_ticks_for_insn (jump); |
9ba11d5a | 1897 | return redirect_jump (jump, nlabel, 1); |
326f06f7 RK |
1898 | } |
1899 | ||
28c9500b JW |
1900 | /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN. |
1901 | We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes | |
1902 | that reference values used in INSN. If we find one, then we move the | |
1903 | REG_DEAD note to INSN. | |
1904 | ||
1905 | This is needed to handle the case where an later insn (after INSN) has a | |
1906 | REG_DEAD note for a register used by INSN, and this later insn subsequently | |
1907 | gets moved before a CODE_LABEL because it is a redundant insn. In this | |
1908 | case, mark_target_live_regs may be confused into thinking the register | |
1909 | is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */ | |
1910 | ||
1911 | static void | |
0c20a65f | 1912 | update_reg_dead_notes (rtx insn, rtx delayed_insn) |
28c9500b JW |
1913 | { |
1914 | rtx p, link, next; | |
1915 | ||
1916 | for (p = next_nonnote_insn (insn); p != delayed_insn; | |
1917 | p = next_nonnote_insn (p)) | |
1918 | for (link = REG_NOTES (p); link; link = next) | |
1919 | { | |
1920 | next = XEXP (link, 1); | |
1921 | ||
1922 | if (REG_NOTE_KIND (link) != REG_DEAD | |
1923 | || GET_CODE (XEXP (link, 0)) != REG) | |
1924 | continue; | |
1925 | ||
1926 | if (reg_referenced_p (XEXP (link, 0), PATTERN (insn))) | |
1927 | { | |
1928 | /* Move the REG_DEAD note from P to INSN. */ | |
1929 | remove_note (p, link); | |
1930 | XEXP (link, 1) = REG_NOTES (insn); | |
1931 | REG_NOTES (insn) = link; | |
1932 | } | |
1933 | } | |
1934 | } | |
5317d2f8 | 1935 | |
c170c8c2 JW |
1936 | /* Called when an insn redundant with start_insn is deleted. If there |
1937 | is a REG_DEAD note for the target of start_insn between start_insn | |
1938 | and stop_insn, then the REG_DEAD note needs to be deleted since the | |
1939 | value no longer dies there. | |
1940 | ||
1941 | If the REG_DEAD note isn't deleted, then mark_target_live_regs may be | |
1942 | confused into thinking the register is dead. */ | |
1943 | ||
1944 | static void | |
0c20a65f | 1945 | fix_reg_dead_note (rtx start_insn, rtx stop_insn) |
c170c8c2 JW |
1946 | { |
1947 | rtx p, link, next; | |
1948 | ||
1949 | for (p = next_nonnote_insn (start_insn); p != stop_insn; | |
1950 | p = next_nonnote_insn (p)) | |
1951 | for (link = REG_NOTES (p); link; link = next) | |
1952 | { | |
1953 | next = XEXP (link, 1); | |
1954 | ||
1955 | if (REG_NOTE_KIND (link) != REG_DEAD | |
1956 | || GET_CODE (XEXP (link, 0)) != REG) | |
1957 | continue; | |
1958 | ||
1959 | if (reg_set_p (XEXP (link, 0), PATTERN (start_insn))) | |
1960 | { | |
1961 | remove_note (p, link); | |
1962 | return; | |
1963 | } | |
1964 | } | |
1965 | } | |
1966 | ||
5317d2f8 RK |
1967 | /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN. |
1968 | ||
1969 | This handles the case of udivmodXi4 instructions which optimize their | |
1970 | output depending on whether any REG_UNUSED notes are present. | |
1971 | we must make sure that INSN calculates as many results as REDUNDANT_INSN | |
1972 | does. */ | |
1973 | ||
1974 | static void | |
0c20a65f | 1975 | update_reg_unused_notes (rtx insn, rtx redundant_insn) |
5317d2f8 | 1976 | { |
91a51951 | 1977 | rtx link, next; |
5317d2f8 RK |
1978 | |
1979 | for (link = REG_NOTES (insn); link; link = next) | |
1980 | { | |
1981 | next = XEXP (link, 1); | |
1982 | ||
1983 | if (REG_NOTE_KIND (link) != REG_UNUSED | |
1984 | || GET_CODE (XEXP (link, 0)) != REG) | |
1985 | continue; | |
1986 | ||
1987 | if (! find_regno_note (redundant_insn, REG_UNUSED, | |
1988 | REGNO (XEXP (link, 0)))) | |
1989 | remove_note (insn, link); | |
1990 | } | |
1991 | } | |
9c7e2978 | 1992 | \f |
9c7e2978 RK |
1993 | /* Scan a function looking for insns that need a delay slot and find insns to |
1994 | put into the delay slot. | |
1995 | ||
40f03658 | 1996 | NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such |
9c7e2978 RK |
1997 | as calls). We do these first since we don't want jump insns (that are |
1998 | easier to fill) to get the only insns that could be used for non-jump insns. | |
1999 | When it is zero, only try to fill JUMP_INSNs. | |
2000 | ||
2001 | When slots are filled in this manner, the insns (including the | |
2002 | delay_insn) are put together in a SEQUENCE rtx. In this fashion, | |
2003 | it is possible to tell whether a delay slot has really been filled | |
2004 | or not. `final' knows how to deal with this, by communicating | |
2005 | through FINAL_SEQUENCE. */ | |
2006 | ||
2007 | static void | |
0c20a65f | 2008 | fill_simple_delay_slots (int non_jumps_p) |
9c7e2978 | 2009 | { |
b3694847 SS |
2010 | rtx insn, pat, trial, next_trial; |
2011 | int i; | |
9c7e2978 RK |
2012 | int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base; |
2013 | struct resources needed, set; | |
126db1fa | 2014 | int slots_to_fill, slots_filled; |
9c7e2978 RK |
2015 | rtx delay_list; |
2016 | ||
2017 | for (i = 0; i < num_unfilled_slots; i++) | |
2018 | { | |
35523fce | 2019 | int flags; |
9c7e2978 RK |
2020 | /* Get the next insn to fill. If it has already had any slots assigned, |
2021 | we can't do anything with it. Maybe we'll improve this later. */ | |
2022 | ||
2023 | insn = unfilled_slots_base[i]; | |
2024 | if (insn == 0 | |
2025 | || INSN_DELETED_P (insn) | |
2026 | || (GET_CODE (insn) == INSN | |
2027 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2028 | || (GET_CODE (insn) == JUMP_INSN && non_jumps_p) | |
2029 | || (GET_CODE (insn) != JUMP_INSN && ! non_jumps_p)) | |
2030 | continue; | |
f27e6bb2 | 2031 | |
c5c76735 JL |
2032 | /* It may have been that this insn used to need delay slots, but |
2033 | now doesn't; ignore in that case. This can happen, for example, | |
2034 | on the HP PA RISC, where the number of delay slots depends on | |
2035 | what insns are nearby. */ | |
9c7e2978 | 2036 | slots_to_fill = num_delay_slots (insn); |
c3a3b536 JL |
2037 | |
2038 | /* Some machine description have defined instructions to have | |
2039 | delay slots only in certain circumstances which may depend on | |
2040 | nearby insns (which change due to reorg's actions). | |
2041 | ||
2042 | For example, the PA port normally has delay slots for unconditional | |
2043 | jumps. | |
2044 | ||
2045 | However, the PA port claims such jumps do not have a delay slot | |
2046 | if they are immediate successors of certain CALL_INSNs. This | |
2047 | allows the port to favor filling the delay slot of the call with | |
2048 | the unconditional jump. */ | |
9c7e2978 | 2049 | if (slots_to_fill == 0) |
c3a3b536 | 2050 | continue; |
9c7e2978 RK |
2051 | |
2052 | /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL | |
464b453d TW |
2053 | says how many. After initialization, first try optimizing |
2054 | ||
2055 | call _foo call _foo | |
2056 | nop add %o7,.-L1,%o7 | |
2057 | b,a L1 | |
2058 | nop | |
2059 | ||
2060 | If this case applies, the delay slot of the call is filled with | |
2061 | the unconditional jump. This is done first to avoid having the | |
2062 | delay slot of the call filled in the backward scan. Also, since | |
2063 | the unconditional jump is likely to also have a delay slot, that | |
733fa7ef JL |
2064 | insn must exist when it is subsequently scanned. |
2065 | ||
2066 | This is tried on each insn with delay slots as some machines | |
f27e6bb2 | 2067 | have insns which perform calls, but are not represented as |
733fa7ef | 2068 | CALL_INSNs. */ |
464b453d TW |
2069 | |
2070 | slots_filled = 0; | |
2071 | delay_list = 0; | |
2072 | ||
c5c76735 JL |
2073 | if (GET_CODE (insn) == JUMP_INSN) |
2074 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); | |
2075 | else | |
2076 | flags = get_jump_flags (insn, NULL_RTX); | |
2077 | ||
733fa7ef | 2078 | if ((trial = next_active_insn (insn)) |
464b453d TW |
2079 | && GET_CODE (trial) == JUMP_INSN |
2080 | && simplejump_p (trial) | |
35523fce | 2081 | && eligible_for_delay (insn, slots_filled, trial, flags) |
1db828df DM |
2082 | && no_labels_between_p (insn, trial) |
2083 | && ! can_throw_internal (trial)) | |
464b453d | 2084 | { |
45d9a5c6 | 2085 | rtx *tmp; |
464b453d TW |
2086 | slots_filled++; |
2087 | delay_list = add_to_delay_list (trial, delay_list); | |
45d9a5c6 RK |
2088 | |
2089 | /* TRIAL may have had its delay slot filled, then unfilled. When | |
2090 | the delay slot is unfilled, TRIAL is placed back on the unfilled | |
2091 | slots obstack. Unfortunately, it is placed on the end of the | |
2092 | obstack, not in its original location. Therefore, we must search | |
2093 | from entry i + 1 to the end of the unfilled slots obstack to | |
2094 | try and find TRIAL. */ | |
2095 | tmp = &unfilled_slots_base[i + 1]; | |
2096 | while (*tmp != trial && tmp != unfilled_slots_next) | |
2097 | tmp++; | |
2098 | ||
464b453d | 2099 | /* Remove the unconditional jump from consideration for delay slot |
6d2f8887 | 2100 | filling and unthread it. */ |
45d9a5c6 RK |
2101 | if (*tmp == trial) |
2102 | *tmp = 0; | |
464b453d TW |
2103 | { |
2104 | rtx next = NEXT_INSN (trial); | |
2105 | rtx prev = PREV_INSN (trial); | |
2106 | if (prev) | |
2107 | NEXT_INSN (prev) = next; | |
2108 | if (next) | |
2109 | PREV_INSN (next) = prev; | |
2110 | } | |
2111 | } | |
2112 | ||
2113 | /* Now, scan backwards from the insn to search for a potential | |
2114 | delay-slot candidate. Stop searching when a label or jump is hit. | |
2115 | ||
9c7e2978 RK |
2116 | For each candidate, if it is to go into the delay slot (moved |
2117 | forward in execution sequence), it must not need or set any resources | |
2118 | that were set by later insns and must not set any resources that | |
2119 | are needed for those insns. | |
f27e6bb2 | 2120 | |
9c7e2978 RK |
2121 | The delay slot insn itself sets resources unless it is a call |
2122 | (in which case the called routine, not the insn itself, is doing | |
2123 | the setting). */ | |
2124 | ||
464b453d | 2125 | if (slots_filled < slots_to_fill) |
9c7e2978 | 2126 | { |
464b453d TW |
2127 | CLEAR_RESOURCE (&needed); |
2128 | CLEAR_RESOURCE (&set); | |
73780b74 | 2129 | mark_set_resources (insn, &set, 0, MARK_SRC_DEST); |
464b453d | 2130 | mark_referenced_resources (insn, &needed, 0); |
9c7e2978 | 2131 | |
464b453d TW |
2132 | for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1); |
2133 | trial = next_trial) | |
2134 | { | |
2135 | next_trial = prev_nonnote_insn (trial); | |
9c7e2978 | 2136 | |
464b453d TW |
2137 | /* This must be an INSN or CALL_INSN. */ |
2138 | pat = PATTERN (trial); | |
2139 | ||
2140 | /* USE and CLOBBER at this level was just for flow; ignore it. */ | |
2141 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
2142 | continue; | |
9c7e2978 | 2143 | |
f27e6bb2 | 2144 | /* Check for resource conflict first, to avoid unnecessary |
464b453d TW |
2145 | splitting. */ |
2146 | if (! insn_references_resource_p (trial, &set, 1) | |
2147 | && ! insn_sets_resource_p (trial, &set, 1) | |
2148 | && ! insn_sets_resource_p (trial, &needed, 1) | |
9c7e2978 | 2149 | #ifdef HAVE_cc0 |
464b453d | 2150 | /* Can't separate set of cc0 from its use. */ |
c5c76735 | 2151 | && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)) |
9c7e2978 | 2152 | #endif |
1db828df | 2153 | && ! can_throw_internal (trial)) |
9c7e2978 | 2154 | { |
464b453d TW |
2155 | trial = try_split (pat, trial, 1); |
2156 | next_trial = prev_nonnote_insn (trial); | |
35523fce | 2157 | if (eligible_for_delay (insn, slots_filled, trial, flags)) |
464b453d TW |
2158 | { |
2159 | /* In this case, we are searching backward, so if we | |
2160 | find insns to put on the delay list, we want | |
2161 | to put them at the head, rather than the | |
2162 | tail, of the list. */ | |
2163 | ||
28c9500b | 2164 | update_reg_dead_notes (trial, insn); |
38a448ca RH |
2165 | delay_list = gen_rtx_INSN_LIST (VOIDmode, |
2166 | trial, delay_list); | |
464b453d | 2167 | update_block (trial, trial); |
53c17031 | 2168 | delete_related_insns (trial); |
464b453d TW |
2169 | if (slots_to_fill == ++slots_filled) |
2170 | break; | |
2171 | continue; | |
2172 | } | |
9c7e2978 | 2173 | } |
9c7e2978 | 2174 | |
73780b74 | 2175 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
464b453d TW |
2176 | mark_referenced_resources (trial, &needed, 1); |
2177 | } | |
9c7e2978 RK |
2178 | } |
2179 | ||
9c7e2978 RK |
2180 | /* If all needed slots haven't been filled, we come here. */ |
2181 | ||
2182 | /* Try to optimize case of jumping around a single insn. */ | |
2183 | #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS) | |
2f9ba5a9 JL |
2184 | if (slots_filled != slots_to_fill |
2185 | && delay_list == 0 | |
f27e6bb2 | 2186 | && GET_CODE (insn) == JUMP_INSN |
3480bb98 | 2187 | && (condjump_p (insn) || condjump_in_parallel_p (insn))) |
9c7e2978 RK |
2188 | { |
2189 | delay_list = optimize_skip (insn); | |
2190 | if (delay_list) | |
2191 | slots_filled += 1; | |
2192 | } | |
2193 | #endif | |
2194 | ||
9c7e2978 RK |
2195 | /* Try to get insns from beyond the insn needing the delay slot. |
2196 | These insns can neither set or reference resources set in insns being | |
2197 | skipped, cannot set resources in the insn being skipped, and, if this | |
2198 | is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the | |
2199 | call might not return). | |
2200 | ||
f03e51d4 RK |
2201 | There used to be code which continued past the target label if |
2202 | we saw all uses of the target label. This code did not work, | |
2203 | because it failed to account for some instructions which were | |
2204 | both annulled and marked as from the target. This can happen as a | |
2205 | result of optimize_skip. Since this code was redundant with | |
2206 | fill_eager_delay_slots anyways, it was just deleted. */ | |
9c7e2978 | 2207 | |
2f9ba5a9 | 2208 | if (slots_filled != slots_to_fill |
be672de8 MM |
2209 | /* If this instruction could throw an exception which is |
2210 | caught in the same function, then it's not safe to fill | |
2211 | the delay slot with an instruction from beyond this | |
2212 | point. For example, consider: | |
2213 | ||
2214 | int i = 2; | |
2215 | ||
ff81832f | 2216 | try { |
be672de8 MM |
2217 | f(); |
2218 | i = 3; | |
2219 | } catch (...) {} | |
ff81832f | 2220 | |
be672de8 MM |
2221 | return i; |
2222 | ||
2223 | Even though `i' is a local variable, we must be sure not | |
2224 | to put `i = 3' in the delay slot if `f' might throw an | |
2225 | exception. | |
2226 | ||
2227 | Presumably, we should also check to see if we could get | |
2228 | back to this function via `setjmp'. */ | |
1db828df | 2229 | && ! can_throw_internal (insn) |
f27e6bb2 | 2230 | && (GET_CODE (insn) != JUMP_INSN |
3480bb98 | 2231 | || ((condjump_p (insn) || condjump_in_parallel_p (insn)) |
f27e6bb2 KH |
2232 | && ! simplejump_p (insn) |
2233 | && JUMP_LABEL (insn) != 0))) | |
9c7e2978 | 2234 | { |
0443f602 JO |
2235 | /* Invariant: If insn is a JUMP_INSN, the insn's jump |
2236 | label. Otherwise, zero. */ | |
9c7e2978 RK |
2237 | rtx target = 0; |
2238 | int maybe_never = 0; | |
0443f602 | 2239 | rtx pat, trial_delay; |
9c7e2978 RK |
2240 | |
2241 | CLEAR_RESOURCE (&needed); | |
2242 | CLEAR_RESOURCE (&set); | |
2243 | ||
2244 | if (GET_CODE (insn) == CALL_INSN) | |
2245 | { | |
73780b74 | 2246 | mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); |
9c7e2978 RK |
2247 | mark_referenced_resources (insn, &needed, 1); |
2248 | maybe_never = 1; | |
2249 | } | |
f27e6bb2 | 2250 | else |
9c7e2978 | 2251 | { |
73780b74 | 2252 | mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); |
674345b1 | 2253 | mark_referenced_resources (insn, &needed, 1); |
2f9ba5a9 | 2254 | if (GET_CODE (insn) == JUMP_INSN) |
f03e51d4 | 2255 | target = JUMP_LABEL (insn); |
9c7e2978 RK |
2256 | } |
2257 | ||
0443f602 JO |
2258 | if (target == 0) |
2259 | for (trial = next_nonnote_insn (insn); trial; trial = next_trial) | |
2260 | { | |
2261 | next_trial = next_nonnote_insn (trial); | |
9c7e2978 | 2262 | |
0443f602 JO |
2263 | if (GET_CODE (trial) == CODE_LABEL |
2264 | || GET_CODE (trial) == BARRIER) | |
2265 | break; | |
9c7e2978 | 2266 | |
0443f602 JO |
2267 | /* We must have an INSN, JUMP_INSN, or CALL_INSN. */ |
2268 | pat = PATTERN (trial); | |
9c7e2978 | 2269 | |
0443f602 JO |
2270 | /* Stand-alone USE and CLOBBER are just for flow. */ |
2271 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
2272 | continue; | |
9c7e2978 | 2273 | |
0443f602 JO |
2274 | /* If this already has filled delay slots, get the insn needing |
2275 | the delay slots. */ | |
2276 | if (GET_CODE (pat) == SEQUENCE) | |
2277 | trial_delay = XVECEXP (pat, 0, 0); | |
2278 | else | |
2279 | trial_delay = trial; | |
2280 | ||
2281 | /* Stop our search when seeing an unconditional jump. */ | |
2282 | if (GET_CODE (trial_delay) == JUMP_INSN) | |
2283 | break; | |
2284 | ||
2285 | /* See if we have a resource problem before we try to | |
6d2f8887 | 2286 | split. */ |
0443f602 JO |
2287 | if (GET_CODE (pat) != SEQUENCE |
2288 | && ! insn_references_resource_p (trial, &set, 1) | |
2289 | && ! insn_sets_resource_p (trial, &set, 1) | |
2290 | && ! insn_sets_resource_p (trial, &needed, 1) | |
9c7e2978 | 2291 | #ifdef HAVE_cc0 |
0443f602 | 2292 | && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)) |
9c7e2978 | 2293 | #endif |
0443f602 JO |
2294 | && ! (maybe_never && may_trap_p (pat)) |
2295 | && (trial = try_split (pat, trial, 0)) | |
1db828df DM |
2296 | && eligible_for_delay (insn, slots_filled, trial, flags) |
2297 | && ! can_throw_internal(trial)) | |
0443f602 JO |
2298 | { |
2299 | next_trial = next_nonnote_insn (trial); | |
2300 | delay_list = add_to_delay_list (trial, delay_list); | |
9c7e2978 RK |
2301 | |
2302 | #ifdef HAVE_cc0 | |
0443f602 JO |
2303 | if (reg_mentioned_p (cc0_rtx, pat)) |
2304 | link_cc0_insns (trial); | |
9c7e2978 RK |
2305 | #endif |
2306 | ||
53c17031 | 2307 | delete_related_insns (trial); |
0443f602 JO |
2308 | if (slots_to_fill == ++slots_filled) |
2309 | break; | |
2310 | continue; | |
2311 | } | |
9c7e2978 | 2312 | |
0443f602 JO |
2313 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
2314 | mark_referenced_resources (trial, &needed, 1); | |
9c7e2978 | 2315 | |
0443f602 JO |
2316 | /* Ensure we don't put insns between the setting of cc and the |
2317 | comparison by moving a setting of cc into an earlier delay | |
2318 | slot since these insns could clobber the condition code. */ | |
2319 | set.cc = 1; | |
9c7e2978 | 2320 | |
0443f602 JO |
2321 | /* If this is a call or jump, we might not get here. */ |
2322 | if (GET_CODE (trial_delay) == CALL_INSN | |
2323 | || GET_CODE (trial_delay) == JUMP_INSN) | |
2324 | maybe_never = 1; | |
2325 | } | |
9c7e2978 RK |
2326 | |
2327 | /* If there are slots left to fill and our search was stopped by an | |
2328 | unconditional branch, try the insn at the branch target. We can | |
f27e6bb2 | 2329 | redirect the branch if it works. |
6f7775d5 JL |
2330 | |
2331 | Don't do this if the insn at the branch target is a branch. */ | |
9c7e2978 RK |
2332 | if (slots_to_fill != slots_filled |
2333 | && trial | |
2334 | && GET_CODE (trial) == JUMP_INSN | |
2335 | && simplejump_p (trial) | |
2336 | && (target == 0 || JUMP_LABEL (trial) == target) | |
2337 | && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0 | |
2338 | && ! (GET_CODE (next_trial) == INSN | |
2339 | && GET_CODE (PATTERN (next_trial)) == SEQUENCE) | |
6f7775d5 | 2340 | && GET_CODE (next_trial) != JUMP_INSN |
9c7e2978 RK |
2341 | && ! insn_references_resource_p (next_trial, &set, 1) |
2342 | && ! insn_sets_resource_p (next_trial, &set, 1) | |
2343 | && ! insn_sets_resource_p (next_trial, &needed, 1) | |
2344 | #ifdef HAVE_cc0 | |
d6749dec | 2345 | && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial)) |
9c7e2978 RK |
2346 | #endif |
2347 | && ! (maybe_never && may_trap_p (PATTERN (next_trial))) | |
2348 | && (next_trial = try_split (PATTERN (next_trial), next_trial, 0)) | |
1db828df DM |
2349 | && eligible_for_delay (insn, slots_filled, next_trial, flags) |
2350 | && ! can_throw_internal (trial)) | |
9c7e2978 RK |
2351 | { |
2352 | rtx new_label = next_active_insn (next_trial); | |
2353 | ||
2354 | if (new_label != 0) | |
2355 | new_label = get_label_before (new_label); | |
99f14de7 JW |
2356 | else |
2357 | new_label = find_end_label (); | |
9c7e2978 | 2358 | |
f27e6bb2 | 2359 | delay_list |
9c7e2978 RK |
2360 | = add_to_delay_list (copy_rtx (next_trial), delay_list); |
2361 | slots_filled++; | |
326f06f7 | 2362 | reorg_redirect_jump (trial, new_label); |
9c7e2978 RK |
2363 | |
2364 | /* If we merged because we both jumped to the same place, | |
2365 | redirect the original insn also. */ | |
2366 | if (target) | |
326f06f7 | 2367 | reorg_redirect_jump (insn, new_label); |
9c7e2978 RK |
2368 | } |
2369 | } | |
2370 | ||
126db1fa JL |
2371 | /* If this is an unconditional jump, then try to get insns from the |
2372 | target of the jump. */ | |
2373 | if (GET_CODE (insn) == JUMP_INSN | |
2374 | && simplejump_p (insn) | |
2375 | && slots_filled != slots_to_fill) | |
2376 | delay_list | |
2377 | = fill_slots_from_thread (insn, const_true_rtx, | |
2378 | next_active_insn (JUMP_LABEL (insn)), | |
2379 | NULL, 1, 1, | |
2380 | own_thread_p (JUMP_LABEL (insn), | |
2381 | JUMP_LABEL (insn), 0), | |
ab63953e JL |
2382 | slots_to_fill, &slots_filled, |
2383 | delay_list); | |
126db1fa | 2384 | |
9c7e2978 RK |
2385 | if (delay_list) |
2386 | unfilled_slots_base[i] | |
91a51951 | 2387 | = emit_delay_sequence (insn, delay_list, slots_filled); |
9c7e2978 RK |
2388 | |
2389 | if (slots_to_fill == slots_filled) | |
2390 | unfilled_slots_base[i] = 0; | |
2391 | ||
2392 | note_delay_statistics (slots_filled, 0); | |
2393 | } | |
2394 | ||
2395 | #ifdef DELAY_SLOTS_FOR_EPILOGUE | |
2396 | /* See if the epilogue needs any delay slots. Try to fill them if so. | |
f27e6bb2 | 2397 | The only thing we can do is scan backwards from the end of the |
9c7e2978 RK |
2398 | function. If we did this in a previous pass, it is incorrect to do it |
2399 | again. */ | |
2400 | if (current_function_epilogue_delay_list) | |
2401 | return; | |
2402 | ||
2403 | slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE; | |
2404 | if (slots_to_fill == 0) | |
2405 | return; | |
2406 | ||
2407 | slots_filled = 0; | |
9c7e2978 RK |
2408 | CLEAR_RESOURCE (&set); |
2409 | ||
8c2977e2 JW |
2410 | /* The frame pointer and stack pointer are needed at the beginning of |
2411 | the epilogue, so instructions setting them can not be put in the | |
2412 | epilogue delay slot. However, everything else needed at function | |
2413 | end is safe, so we don't want to use end_of_function_needs here. */ | |
2414 | CLEAR_RESOURCE (&needed); | |
2415 | if (frame_pointer_needed) | |
2416 | { | |
2417 | SET_HARD_REG_BIT (needed.regs, FRAME_POINTER_REGNUM); | |
2418 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
2419 | SET_HARD_REG_BIT (needed.regs, HARD_FRAME_POINTER_REGNUM); | |
2420 | #endif | |
fdb8a883 JW |
2421 | if (! EXIT_IGNORE_STACK |
2422 | || current_function_sp_is_unchanging) | |
8c2977e2 JW |
2423 | SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM); |
2424 | } | |
2425 | else | |
2426 | SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM); | |
2427 | ||
632c9d9e | 2428 | #ifdef EPILOGUE_USES |
f27e6bb2 | 2429 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
632c9d9e MS |
2430 | { |
2431 | if (EPILOGUE_USES (i)) | |
2432 | SET_HARD_REG_BIT (needed.regs, i); | |
2433 | } | |
2434 | #endif | |
2435 | ||
9c7e2978 RK |
2436 | for (trial = get_last_insn (); ! stop_search_p (trial, 1); |
2437 | trial = PREV_INSN (trial)) | |
2438 | { | |
2439 | if (GET_CODE (trial) == NOTE) | |
2440 | continue; | |
2441 | pat = PATTERN (trial); | |
2442 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
2443 | continue; | |
2444 | ||
2445 | if (! insn_references_resource_p (trial, &set, 1) | |
2446 | && ! insn_sets_resource_p (trial, &needed, 1) | |
8c2977e2 | 2447 | && ! insn_sets_resource_p (trial, &set, 1) |
9c7e2978 RK |
2448 | #ifdef HAVE_cc0 |
2449 | /* Don't want to mess with cc0 here. */ | |
2450 | && ! reg_mentioned_p (cc0_rtx, pat) | |
2451 | #endif | |
1db828df | 2452 | && ! can_throw_internal (trial)) |
9c7e2978 RK |
2453 | { |
2454 | trial = try_split (pat, trial, 1); | |
2455 | if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled)) | |
2456 | { | |
17448690 RK |
2457 | /* Here as well we are searching backward, so put the |
2458 | insns we find on the head of the list. */ | |
2459 | ||
9c7e2978 | 2460 | current_function_epilogue_delay_list |
38a448ca RH |
2461 | = gen_rtx_INSN_LIST (VOIDmode, trial, |
2462 | current_function_epilogue_delay_list); | |
ca545bb5 | 2463 | mark_end_of_function_resources (trial, 1); |
9c7e2978 | 2464 | update_block (trial, trial); |
53c17031 | 2465 | delete_related_insns (trial); |
9c7e2978 RK |
2466 | |
2467 | /* Clear deleted bit so final.c will output the insn. */ | |
2468 | INSN_DELETED_P (trial) = 0; | |
2469 | ||
2470 | if (slots_to_fill == ++slots_filled) | |
2471 | break; | |
2472 | continue; | |
2473 | } | |
2474 | } | |
2475 | ||
73780b74 | 2476 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
9c7e2978 RK |
2477 | mark_referenced_resources (trial, &needed, 1); |
2478 | } | |
2479 | ||
2480 | note_delay_statistics (slots_filled, 0); | |
2481 | #endif | |
2482 | } | |
2483 | \f | |
2484 | /* Try to find insns to place in delay slots. | |
2485 | ||
2486 | INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION | |
2487 | or is an unconditional branch if CONDITION is const_true_rtx. | |
2488 | *PSLOTS_FILLED is updated with the number of slots that we have filled. | |
2489 | ||
2490 | THREAD is a flow-of-control, either the insns to be executed if the | |
2491 | branch is true or if the branch is false, THREAD_IF_TRUE says which. | |
2492 | ||
2493 | OPPOSITE_THREAD is the thread in the opposite direction. It is used | |
2494 | to see if any potential delay slot insns set things needed there. | |
2495 | ||
40f03658 | 2496 | LIKELY is nonzero if it is extremely likely that the branch will be |
9c7e2978 RK |
2497 | taken and THREAD_IF_TRUE is set. This is used for the branch at the |
2498 | end of a loop back up to the top. | |
2499 | ||
2500 | OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the | |
2501 | thread. I.e., it is the fallthrough code of our jump or the target of the | |
2502 | jump when we are the only jump going there. | |
2503 | ||
2504 | If OWN_THREAD is false, it must be the "true" thread of a jump. In that | |
2505 | case, we can only take insns from the head of the thread for our delay | |
2506 | slot. We then adjust the jump to point after the insns we have taken. */ | |
2507 | ||
2508 | static rtx | |
0c20a65f AJ |
2509 | fill_slots_from_thread (rtx insn, rtx condition, rtx thread, |
2510 | rtx opposite_thread, int likely, int thread_if_true, | |
2511 | int own_thread, int slots_to_fill, | |
2512 | int *pslots_filled, rtx delay_list) | |
9c7e2978 | 2513 | { |
d674b9e3 | 2514 | rtx new_thread; |
9c7e2978 RK |
2515 | struct resources opposite_needed, set, needed; |
2516 | rtx trial; | |
2517 | int lose = 0; | |
2518 | int must_annul = 0; | |
35523fce | 2519 | int flags; |
9c7e2978 RK |
2520 | |
2521 | /* Validate our arguments. */ | |
2522 | if ((condition == const_true_rtx && ! thread_if_true) | |
2523 | || (! own_thread && ! thread_if_true)) | |
2524 | abort (); | |
2525 | ||
35523fce JL |
2526 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); |
2527 | ||
9c7e2978 RK |
2528 | /* If our thread is the end of subroutine, we can't get any delay |
2529 | insns from that. */ | |
2530 | if (thread == 0) | |
f27e6bb2 | 2531 | return delay_list; |
9c7e2978 RK |
2532 | |
2533 | /* If this is an unconditional branch, nothing is needed at the | |
2534 | opposite thread. Otherwise, compute what is needed there. */ | |
2535 | if (condition == const_true_rtx) | |
2536 | CLEAR_RESOURCE (&opposite_needed); | |
2537 | else | |
ca545bb5 | 2538 | mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed); |
9c7e2978 | 2539 | |
d674b9e3 RK |
2540 | /* If the insn at THREAD can be split, do it here to avoid having to |
2541 | update THREAD and NEW_THREAD if it is done in the loop below. Also | |
2542 | initialize NEW_THREAD. */ | |
2543 | ||
d45cf215 | 2544 | new_thread = thread = try_split (PATTERN (thread), thread, 0); |
d674b9e3 | 2545 | |
9c7e2978 RK |
2546 | /* Scan insns at THREAD. We are looking for an insn that can be removed |
2547 | from THREAD (it neither sets nor references resources that were set | |
2548 | ahead of it and it doesn't set anything needs by the insns ahead of | |
2549 | it) and that either can be placed in an annulling insn or aren't | |
2550 | needed at OPPOSITE_THREAD. */ | |
2551 | ||
2552 | CLEAR_RESOURCE (&needed); | |
2553 | CLEAR_RESOURCE (&set); | |
2554 | ||
2555 | /* If we do not own this thread, we must stop as soon as we find | |
2556 | something that we can't put in a delay slot, since all we can do | |
2557 | is branch into THREAD at a later point. Therefore, labels stop | |
2558 | the search if this is not the `true' thread. */ | |
2559 | ||
2560 | for (trial = thread; | |
2561 | ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread); | |
2562 | trial = next_nonnote_insn (trial)) | |
2563 | { | |
70011923 | 2564 | rtx pat, old_trial; |
9c7e2978 RK |
2565 | |
2566 | /* If we have passed a label, we no longer own this thread. */ | |
2567 | if (GET_CODE (trial) == CODE_LABEL) | |
2568 | { | |
2569 | own_thread = 0; | |
2570 | continue; | |
2571 | } | |
2572 | ||
2573 | pat = PATTERN (trial); | |
2574 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
2575 | continue; | |
2576 | ||
2577 | /* If TRIAL conflicts with the insns ahead of it, we lose. Also, | |
2578 | don't separate or copy insns that set and use CC0. */ | |
2579 | if (! insn_references_resource_p (trial, &set, 1) | |
2580 | && ! insn_sets_resource_p (trial, &set, 1) | |
2581 | && ! insn_sets_resource_p (trial, &needed, 1) | |
2582 | #ifdef HAVE_cc0 | |
2583 | && ! (reg_mentioned_p (cc0_rtx, pat) | |
2584 | && (! own_thread || ! sets_cc0_p (pat))) | |
2585 | #endif | |
1db828df | 2586 | && ! can_throw_internal (trial)) |
9c7e2978 | 2587 | { |
5317d2f8 RK |
2588 | rtx prior_insn; |
2589 | ||
9c7e2978 RK |
2590 | /* If TRIAL is redundant with some insn before INSN, we don't |
2591 | actually need to add it to the delay list; we can merely pretend | |
2592 | we did. */ | |
91a51951 | 2593 | if ((prior_insn = redundant_insn (trial, insn, delay_list))) |
9c7e2978 | 2594 | { |
c170c8c2 | 2595 | fix_reg_dead_note (prior_insn, insn); |
9c7e2978 RK |
2596 | if (own_thread) |
2597 | { | |
f1f9081a | 2598 | update_block (trial, thread); |
9bfe7965 | 2599 | if (trial == thread) |
8b11645c RK |
2600 | { |
2601 | thread = next_active_insn (thread); | |
2602 | if (new_thread == trial) | |
2603 | new_thread = thread; | |
2604 | } | |
9bfe7965 | 2605 | |
53c17031 | 2606 | delete_related_insns (trial); |
9c7e2978 RK |
2607 | } |
2608 | else | |
5317d2f8 RK |
2609 | { |
2610 | update_reg_unused_notes (prior_insn, trial); | |
088131ee | 2611 | new_thread = next_active_insn (trial); |
5317d2f8 | 2612 | } |
9c7e2978 RK |
2613 | |
2614 | continue; | |
2615 | } | |
2616 | ||
2617 | /* There are two ways we can win: If TRIAL doesn't set anything | |
2618 | needed at the opposite thread and can't trap, or if it can | |
2619 | go into an annulled delay slot. */ | |
96960d10 HB |
2620 | if (!must_annul |
2621 | && (condition == const_true_rtx | |
2622 | || (! insn_sets_resource_p (trial, &opposite_needed, 1) | |
2623 | && ! may_trap_p (pat)))) | |
9c7e2978 | 2624 | { |
70011923 | 2625 | old_trial = trial; |
9c7e2978 | 2626 | trial = try_split (pat, trial, 0); |
70011923 ILT |
2627 | if (new_thread == old_trial) |
2628 | new_thread = trial; | |
9b9cd81b JW |
2629 | if (thread == old_trial) |
2630 | thread = trial; | |
9c7e2978 | 2631 | pat = PATTERN (trial); |
35523fce | 2632 | if (eligible_for_delay (insn, *pslots_filled, trial, flags)) |
9c7e2978 RK |
2633 | goto winner; |
2634 | } | |
2635 | else if (0 | |
2636 | #ifdef ANNUL_IFTRUE_SLOTS | |
2637 | || ! thread_if_true | |
2638 | #endif | |
2639 | #ifdef ANNUL_IFFALSE_SLOTS | |
2640 | || thread_if_true | |
2641 | #endif | |
2642 | ) | |
2643 | { | |
70011923 | 2644 | old_trial = trial; |
9c7e2978 | 2645 | trial = try_split (pat, trial, 0); |
70011923 ILT |
2646 | if (new_thread == old_trial) |
2647 | new_thread = trial; | |
760607e8 RK |
2648 | if (thread == old_trial) |
2649 | thread = trial; | |
9c7e2978 | 2650 | pat = PATTERN (trial); |
96960d10 HB |
2651 | if ((must_annul || delay_list == NULL) && (thread_if_true |
2652 | ? check_annul_list_true_false (0, delay_list) | |
2653 | && eligible_for_annul_false (insn, *pslots_filled, trial, flags) | |
2654 | : check_annul_list_true_false (1, delay_list) | |
2655 | && eligible_for_annul_true (insn, *pslots_filled, trial, flags))) | |
9c7e2978 RK |
2656 | { |
2657 | rtx temp; | |
2658 | ||
2659 | must_annul = 1; | |
2660 | winner: | |
2661 | ||
2662 | #ifdef HAVE_cc0 | |
2663 | if (reg_mentioned_p (cc0_rtx, pat)) | |
2664 | link_cc0_insns (trial); | |
2665 | #endif | |
2666 | ||
2667 | /* If we own this thread, delete the insn. If this is the | |
2668 | destination of a branch, show that a basic block status | |
2669 | may have been updated. In any case, mark the new | |
2670 | starting point of this thread. */ | |
2671 | if (own_thread) | |
2672 | { | |
e41c7831 RH |
2673 | rtx note; |
2674 | ||
f1f9081a | 2675 | update_block (trial, thread); |
a7ad699e RK |
2676 | if (trial == thread) |
2677 | { | |
2678 | thread = next_active_insn (thread); | |
2679 | if (new_thread == trial) | |
2680 | new_thread = thread; | |
2681 | } | |
e41c7831 RH |
2682 | |
2683 | /* We are moving this insn, not deleting it. We must | |
2684 | temporarily increment the use count on any referenced | |
2685 | label lest it be deleted by delete_related_insns. */ | |
2686 | note = find_reg_note (trial, REG_LABEL, 0); | |
0864c526 JJ |
2687 | /* REG_LABEL could be NOTE_INSN_DELETED_LABEL too. */ |
2688 | if (note && GET_CODE (XEXP (note, 0)) == CODE_LABEL) | |
e41c7831 RH |
2689 | LABEL_NUSES (XEXP (note, 0))++; |
2690 | ||
53c17031 | 2691 | delete_related_insns (trial); |
e41c7831 | 2692 | |
0864c526 | 2693 | if (note && GET_CODE (XEXP (note, 0)) == CODE_LABEL) |
e41c7831 | 2694 | LABEL_NUSES (XEXP (note, 0))--; |
9c7e2978 RK |
2695 | } |
2696 | else | |
2697 | new_thread = next_active_insn (trial); | |
2698 | ||
2699 | temp = own_thread ? trial : copy_rtx (trial); | |
2700 | if (thread_if_true) | |
2701 | INSN_FROM_TARGET_P (temp) = 1; | |
2702 | ||
2703 | delay_list = add_to_delay_list (temp, delay_list); | |
2704 | ||
2705 | if (slots_to_fill == ++(*pslots_filled)) | |
2706 | { | |
2707 | /* Even though we have filled all the slots, we | |
2708 | may be branching to a location that has a | |
2709 | redundant insn. Skip any if so. */ | |
2710 | while (new_thread && ! own_thread | |
2711 | && ! insn_sets_resource_p (new_thread, &set, 1) | |
2712 | && ! insn_sets_resource_p (new_thread, &needed, 1) | |
2713 | && ! insn_references_resource_p (new_thread, | |
2714 | &set, 1) | |
f78c792c JL |
2715 | && (prior_insn |
2716 | = redundant_insn (new_thread, insn, | |
2717 | delay_list))) | |
2718 | { | |
2719 | /* We know we do not own the thread, so no need | |
2720 | to call update_block and delete_insn. */ | |
2721 | fix_reg_dead_note (prior_insn, insn); | |
2722 | update_reg_unused_notes (prior_insn, new_thread); | |
2723 | new_thread = next_active_insn (new_thread); | |
2724 | } | |
9c7e2978 RK |
2725 | break; |
2726 | } | |
2727 | ||
2728 | continue; | |
2729 | } | |
2730 | } | |
2731 | } | |
2732 | ||
2733 | /* This insn can't go into a delay slot. */ | |
2734 | lose = 1; | |
73780b74 | 2735 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
9c7e2978 RK |
2736 | mark_referenced_resources (trial, &needed, 1); |
2737 | ||
2738 | /* Ensure we don't put insns between the setting of cc and the comparison | |
2739 | by moving a setting of cc into an earlier delay slot since these insns | |
2740 | could clobber the condition code. */ | |
2741 | set.cc = 1; | |
2742 | ||
2743 | /* If this insn is a register-register copy and the next insn has | |
2744 | a use of our destination, change it to use our source. That way, | |
2745 | it will become a candidate for our delay slot the next time | |
2746 | through this loop. This case occurs commonly in loops that | |
2747 | scan a list. | |
2748 | ||
2749 | We could check for more complex cases than those tested below, | |
2750 | but it doesn't seem worth it. It might also be a good idea to try | |
9b72fab4 RK |
2751 | to swap the two insns. That might do better. |
2752 | ||
963d6142 RK |
2753 | We can't do this if the next insn modifies our destination, because |
2754 | that would make the replacement into the insn invalid. We also can't | |
2755 | do this if it modifies our source, because it might be an earlyclobber | |
2756 | operand. This latter test also prevents updating the contents of | |
5a82c0b1 HPN |
2757 | a PRE_INC. We also can't do this if there's overlap of source and |
2758 | destination. Overlap may happen for larger-than-register-size modes. */ | |
9c7e2978 RK |
2759 | |
2760 | if (GET_CODE (trial) == INSN && GET_CODE (pat) == SET | |
2761 | && GET_CODE (SET_SRC (pat)) == REG | |
5a82c0b1 HPN |
2762 | && GET_CODE (SET_DEST (pat)) == REG |
2763 | && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat))) | |
9c7e2978 RK |
2764 | { |
2765 | rtx next = next_nonnote_insn (trial); | |
9c7e2978 RK |
2766 | |
2767 | if (next && GET_CODE (next) == INSN | |
9b72fab4 RK |
2768 | && GET_CODE (PATTERN (next)) != USE |
2769 | && ! reg_set_p (SET_DEST (pat), next) | |
963d6142 | 2770 | && ! reg_set_p (SET_SRC (pat), next) |
b746d31a TM |
2771 | && reg_referenced_p (SET_DEST (pat), PATTERN (next)) |
2772 | && ! modified_in_p (SET_DEST (pat), next)) | |
9c7e2978 RK |
2773 | validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next); |
2774 | } | |
2775 | } | |
2776 | ||
2777 | /* If we stopped on a branch insn that has delay slots, see if we can | |
2778 | steal some of the insns in those slots. */ | |
2779 | if (trial && GET_CODE (trial) == INSN | |
2780 | && GET_CODE (PATTERN (trial)) == SEQUENCE | |
2781 | && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN) | |
2782 | { | |
2783 | /* If this is the `true' thread, we will want to follow the jump, | |
2784 | so we can only do this if we have taken everything up to here. */ | |
18e765cb | 2785 | if (thread_if_true && trial == new_thread) |
86c7007a HPN |
2786 | { |
2787 | delay_list | |
2788 | = steal_delay_list_from_target (insn, condition, PATTERN (trial), | |
2789 | delay_list, &set, &needed, | |
2790 | &opposite_needed, slots_to_fill, | |
2791 | pslots_filled, &must_annul, | |
2792 | &new_thread); | |
2793 | /* If we owned the thread and are told that it branched | |
2794 | elsewhere, make sure we own the thread at the new location. */ | |
2795 | if (own_thread && trial != new_thread) | |
2796 | own_thread = own_thread_p (new_thread, new_thread, 0); | |
2797 | } | |
9c7e2978 RK |
2798 | else if (! thread_if_true) |
2799 | delay_list | |
2800 | = steal_delay_list_from_fallthrough (insn, condition, | |
2801 | PATTERN (trial), | |
2802 | delay_list, &set, &needed, | |
2803 | &opposite_needed, slots_to_fill, | |
2804 | pslots_filled, &must_annul); | |
2805 | } | |
2806 | ||
2807 | /* If we haven't found anything for this delay slot and it is very | |
2808 | likely that the branch will be taken, see if the insn at our target | |
d674b9e3 RK |
2809 | increments or decrements a register with an increment that does not |
2810 | depend on the destination register. If so, try to place the opposite | |
9c7e2978 RK |
2811 | arithmetic insn after the jump insn and put the arithmetic insn in the |
2812 | delay slot. If we can't do this, return. */ | |
a0a7cb35 JL |
2813 | if (delay_list == 0 && likely && new_thread |
2814 | && GET_CODE (new_thread) == INSN | |
2815 | && GET_CODE (PATTERN (new_thread)) != ASM_INPUT | |
2816 | && asm_noperands (PATTERN (new_thread)) < 0) | |
9c7e2978 RK |
2817 | { |
2818 | rtx pat = PATTERN (new_thread); | |
2819 | rtx dest; | |
2820 | rtx src; | |
2821 | ||
d674b9e3 | 2822 | trial = new_thread; |
9c7e2978 RK |
2823 | pat = PATTERN (trial); |
2824 | ||
1db828df DM |
2825 | if (GET_CODE (trial) != INSN |
2826 | || GET_CODE (pat) != SET | |
2827 | || ! eligible_for_delay (insn, 0, trial, flags) | |
2828 | || can_throw_internal (trial)) | |
9c7e2978 RK |
2829 | return 0; |
2830 | ||
2831 | dest = SET_DEST (pat), src = SET_SRC (pat); | |
2832 | if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS) | |
d674b9e3 | 2833 | && rtx_equal_p (XEXP (src, 0), dest) |
12d7e99c HPN |
2834 | && ! reg_overlap_mentioned_p (dest, XEXP (src, 1)) |
2835 | && ! side_effects_p (pat)) | |
9c7e2978 RK |
2836 | { |
2837 | rtx other = XEXP (src, 1); | |
2838 | rtx new_arith; | |
2839 | rtx ninsn; | |
2840 | ||
2841 | /* If this is a constant adjustment, use the same code with | |
2842 | the negated constant. Otherwise, reverse the sense of the | |
2843 | arithmetic. */ | |
2844 | if (GET_CODE (other) == CONST_INT) | |
38a448ca RH |
2845 | new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest, |
2846 | negate_rtx (GET_MODE (src), other)); | |
9c7e2978 | 2847 | else |
38a448ca RH |
2848 | new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS, |
2849 | GET_MODE (src), dest, other); | |
9c7e2978 | 2850 | |
38a448ca | 2851 | ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith), |
9c7e2978 RK |
2852 | insn); |
2853 | ||
2854 | if (recog_memoized (ninsn) < 0 | |
0eadeb15 | 2855 | || (extract_insn (ninsn), ! constrain_operands (1))) |
9c7e2978 | 2856 | { |
53c17031 | 2857 | delete_related_insns (ninsn); |
9c7e2978 RK |
2858 | return 0; |
2859 | } | |
2860 | ||
2861 | if (own_thread) | |
2862 | { | |
f1f9081a | 2863 | update_block (trial, thread); |
a7ad699e RK |
2864 | if (trial == thread) |
2865 | { | |
2866 | thread = next_active_insn (thread); | |
2867 | if (new_thread == trial) | |
2868 | new_thread = thread; | |
2869 | } | |
53c17031 | 2870 | delete_related_insns (trial); |
9c7e2978 RK |
2871 | } |
2872 | else | |
2873 | new_thread = next_active_insn (trial); | |
2874 | ||
2875 | ninsn = own_thread ? trial : copy_rtx (trial); | |
2876 | if (thread_if_true) | |
2877 | INSN_FROM_TARGET_P (ninsn) = 1; | |
2878 | ||
fb3821f7 | 2879 | delay_list = add_to_delay_list (ninsn, NULL_RTX); |
9c7e2978 RK |
2880 | (*pslots_filled)++; |
2881 | } | |
2882 | } | |
2883 | ||
2884 | if (delay_list && must_annul) | |
2885 | INSN_ANNULLED_BRANCH_P (insn) = 1; | |
2886 | ||
2887 | /* If we are to branch into the middle of this thread, find an appropriate | |
2888 | label or make a new one if none, and redirect INSN to it. If we hit the | |
2889 | end of the function, use the end-of-function label. */ | |
2890 | if (new_thread != thread) | |
2891 | { | |
2892 | rtx label; | |
2893 | ||
2894 | if (! thread_if_true) | |
2895 | abort (); | |
2896 | ||
2897 | if (new_thread && GET_CODE (new_thread) == JUMP_INSN | |
2898 | && (simplejump_p (new_thread) | |
b304ad47 JL |
2899 | || GET_CODE (PATTERN (new_thread)) == RETURN) |
2900 | && redirect_with_delay_list_safe_p (insn, | |
2901 | JUMP_LABEL (new_thread), | |
2902 | delay_list)) | |
22422dbf | 2903 | new_thread = follow_jumps (JUMP_LABEL (new_thread)); |
9c7e2978 RK |
2904 | |
2905 | if (new_thread == 0) | |
2906 | label = find_end_label (); | |
2907 | else if (GET_CODE (new_thread) == CODE_LABEL) | |
2908 | label = new_thread; | |
2909 | else | |
2910 | label = get_label_before (new_thread); | |
2911 | ||
326f06f7 | 2912 | reorg_redirect_jump (insn, label); |
9c7e2978 RK |
2913 | } |
2914 | ||
2915 | return delay_list; | |
2916 | } | |
2917 | \f | |
2918 | /* Make another attempt to find insns to place in delay slots. | |
2919 | ||
2920 | We previously looked for insns located in front of the delay insn | |
2921 | and, for non-jump delay insns, located behind the delay insn. | |
2922 | ||
2923 | Here only try to schedule jump insns and try to move insns from either | |
2924 | the target or the following insns into the delay slot. If annulling is | |
2925 | supported, we will be likely to do this. Otherwise, we can do this only | |
2926 | if safe. */ | |
2927 | ||
2928 | static void | |
0c20a65f | 2929 | fill_eager_delay_slots (void) |
9c7e2978 | 2930 | { |
b3694847 SS |
2931 | rtx insn; |
2932 | int i; | |
9c7e2978 RK |
2933 | int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base; |
2934 | ||
2935 | for (i = 0; i < num_unfilled_slots; i++) | |
2936 | { | |
2937 | rtx condition; | |
2938 | rtx target_label, insn_at_target, fallthrough_insn; | |
2939 | rtx delay_list = 0; | |
2940 | int own_target; | |
2941 | int own_fallthrough; | |
2942 | int prediction, slots_to_fill, slots_filled; | |
2943 | ||
2944 | insn = unfilled_slots_base[i]; | |
2945 | if (insn == 0 | |
2946 | || INSN_DELETED_P (insn) | |
2947 | || GET_CODE (insn) != JUMP_INSN | |
3480bb98 | 2948 | || ! (condjump_p (insn) || condjump_in_parallel_p (insn))) |
9c7e2978 RK |
2949 | continue; |
2950 | ||
2951 | slots_to_fill = num_delay_slots (insn); | |
c3a3b536 JL |
2952 | /* Some machine description have defined instructions to have |
2953 | delay slots only in certain circumstances which may depend on | |
2954 | nearby insns (which change due to reorg's actions). | |
2955 | ||
0c20a65f | 2956 | For example, the PA port normally has delay slots for unconditional |
c3a3b536 JL |
2957 | jumps. |
2958 | ||
2959 | However, the PA port claims such jumps do not have a delay slot | |
2960 | if they are immediate successors of certain CALL_INSNs. This | |
2961 | allows the port to favor filling the delay slot of the call with | |
2962 | the unconditional jump. */ | |
9c7e2978 | 2963 | if (slots_to_fill == 0) |
c5c76735 | 2964 | continue; |
9c7e2978 RK |
2965 | |
2966 | slots_filled = 0; | |
2967 | target_label = JUMP_LABEL (insn); | |
2968 | condition = get_branch_condition (insn, target_label); | |
2969 | ||
2970 | if (condition == 0) | |
2971 | continue; | |
2972 | ||
abc95ed3 | 2973 | /* Get the next active fallthrough and target insns and see if we own |
9c7e2978 RK |
2974 | them. Then see whether the branch is likely true. We don't need |
2975 | to do a lot of this for unconditional branches. */ | |
2976 | ||
2977 | insn_at_target = next_active_insn (target_label); | |
2978 | own_target = own_thread_p (target_label, target_label, 0); | |
2979 | ||
2980 | if (condition == const_true_rtx) | |
2981 | { | |
2982 | own_fallthrough = 0; | |
2983 | fallthrough_insn = 0; | |
2984 | prediction = 2; | |
2985 | } | |
2986 | else | |
2987 | { | |
2988 | fallthrough_insn = next_active_insn (insn); | |
fb3821f7 | 2989 | own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1); |
9c7e2978 RK |
2990 | prediction = mostly_true_jump (insn, condition); |
2991 | } | |
2992 | ||
2993 | /* If this insn is expected to branch, first try to get insns from our | |
0443f602 | 2994 | target, then our fallthrough insns. If it is not expected to branch, |
9c7e2978 RK |
2995 | try the other order. */ |
2996 | ||
0275a51b | 2997 | if (prediction > 0) |
9c7e2978 RK |
2998 | { |
2999 | delay_list | |
3000 | = fill_slots_from_thread (insn, condition, insn_at_target, | |
3001 | fallthrough_insn, prediction == 2, 1, | |
91a51951 | 3002 | own_target, |
ab63953e | 3003 | slots_to_fill, &slots_filled, delay_list); |
9c7e2978 RK |
3004 | |
3005 | if (delay_list == 0 && own_fallthrough) | |
3006 | { | |
3007 | /* Even though we didn't find anything for delay slots, | |
3008 | we might have found a redundant insn which we deleted | |
3009 | from the thread that was filled. So we have to recompute | |
3010 | the next insn at the target. */ | |
3011 | target_label = JUMP_LABEL (insn); | |
3012 | insn_at_target = next_active_insn (target_label); | |
3013 | ||
3014 | delay_list | |
3015 | = fill_slots_from_thread (insn, condition, fallthrough_insn, | |
3016 | insn_at_target, 0, 0, | |
91a51951 | 3017 | own_fallthrough, |
ab63953e JL |
3018 | slots_to_fill, &slots_filled, |
3019 | delay_list); | |
9c7e2978 RK |
3020 | } |
3021 | } | |
3022 | else | |
3023 | { | |
3024 | if (own_fallthrough) | |
3025 | delay_list | |
3026 | = fill_slots_from_thread (insn, condition, fallthrough_insn, | |
3027 | insn_at_target, 0, 0, | |
91a51951 | 3028 | own_fallthrough, |
d9f1e3da MH |
3029 | slots_to_fill, &slots_filled, |
3030 | delay_list); | |
9c7e2978 RK |
3031 | |
3032 | if (delay_list == 0) | |
3033 | delay_list | |
3034 | = fill_slots_from_thread (insn, condition, insn_at_target, | |
3035 | next_active_insn (insn), 0, 1, | |
91a51951 | 3036 | own_target, |
ab63953e JL |
3037 | slots_to_fill, &slots_filled, |
3038 | delay_list); | |
9c7e2978 RK |
3039 | } |
3040 | ||
3041 | if (delay_list) | |
3042 | unfilled_slots_base[i] | |
91a51951 | 3043 | = emit_delay_sequence (insn, delay_list, slots_filled); |
9c7e2978 RK |
3044 | |
3045 | if (slots_to_fill == slots_filled) | |
3046 | unfilled_slots_base[i] = 0; | |
3047 | ||
3048 | note_delay_statistics (slots_filled, 1); | |
3049 | } | |
3050 | } | |
3051 | \f | |
3052 | /* Once we have tried two ways to fill a delay slot, make a pass over the | |
3053 | code to try to improve the results and to do such things as more jump | |
3054 | threading. */ | |
3055 | ||
3056 | static void | |
0c20a65f | 3057 | relax_delay_slots (rtx first) |
9c7e2978 | 3058 | { |
b3694847 SS |
3059 | rtx insn, next, pat; |
3060 | rtx trial, delay_insn, target_label; | |
9c7e2978 RK |
3061 | |
3062 | /* Look at every JUMP_INSN and see if we can improve it. */ | |
3063 | for (insn = first; insn; insn = next) | |
3064 | { | |
3065 | rtx other; | |
3066 | ||
3067 | next = next_active_insn (insn); | |
3068 | ||
3069 | /* If this is a jump insn, see if it now jumps to a jump, jumps to | |
3070 | the next insn, or jumps to a label that is not the last of a | |
3071 | group of consecutive labels. */ | |
3072 | if (GET_CODE (insn) == JUMP_INSN | |
3480bb98 | 3073 | && (condjump_p (insn) || condjump_in_parallel_p (insn)) |
9c7e2978 RK |
3074 | && (target_label = JUMP_LABEL (insn)) != 0) |
3075 | { | |
22422dbf | 3076 | target_label = follow_jumps (target_label); |
9c7e2978 RK |
3077 | target_label = prev_label (next_active_insn (target_label)); |
3078 | ||
de5292c7 RK |
3079 | if (target_label == 0) |
3080 | target_label = find_end_label (); | |
3081 | ||
3480bb98 JL |
3082 | if (next_active_insn (target_label) == next |
3083 | && ! condjump_in_parallel_p (insn)) | |
9c7e2978 RK |
3084 | { |
3085 | delete_jump (insn); | |
3086 | continue; | |
3087 | } | |
3088 | ||
3089 | if (target_label != JUMP_LABEL (insn)) | |
326f06f7 | 3090 | reorg_redirect_jump (insn, target_label); |
9c7e2978 | 3091 | |
4fe9b91c | 3092 | /* See if this jump branches around an unconditional jump. |
9c7e2978 RK |
3093 | If so, invert this jump and point it to the target of the |
3094 | second jump. */ | |
3095 | if (next && GET_CODE (next) == JUMP_INSN | |
3096 | && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN) | |
3097 | && next_active_insn (target_label) == next_active_insn (next) | |
3098 | && no_labels_between_p (insn, next)) | |
3099 | { | |
3100 | rtx label = JUMP_LABEL (next); | |
3101 | ||
3102 | /* Be careful how we do this to avoid deleting code or | |
3103 | labels that are momentarily dead. See similar optimization | |
3104 | in jump.c. | |
3105 | ||
3106 | We also need to ensure we properly handle the case when | |
3107 | invert_jump fails. */ | |
3108 | ||
3109 | ++LABEL_NUSES (target_label); | |
3110 | if (label) | |
3111 | ++LABEL_NUSES (label); | |
3112 | ||
9ba11d5a | 3113 | if (invert_jump (insn, label, 1)) |
9c7e2978 | 3114 | { |
53c17031 | 3115 | delete_related_insns (next); |
9c7e2978 RK |
3116 | next = insn; |
3117 | } | |
3118 | ||
3119 | if (label) | |
3120 | --LABEL_NUSES (label); | |
3121 | ||
3122 | if (--LABEL_NUSES (target_label) == 0) | |
53c17031 | 3123 | delete_related_insns (target_label); |
9c7e2978 RK |
3124 | |
3125 | continue; | |
3126 | } | |
3127 | } | |
f27e6bb2 | 3128 | |
9c7e2978 RK |
3129 | /* If this is an unconditional jump and the previous insn is a |
3130 | conditional jump, try reversing the condition of the previous | |
3131 | insn and swapping our targets. The next pass might be able to | |
3132 | fill the slots. | |
3133 | ||
3134 | Don't do this if we expect the conditional branch to be true, because | |
3135 | we would then be making the more common case longer. */ | |
3136 | ||
3137 | if (GET_CODE (insn) == JUMP_INSN | |
3138 | && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN) | |
3139 | && (other = prev_active_insn (insn)) != 0 | |
3480bb98 | 3140 | && (condjump_p (other) || condjump_in_parallel_p (other)) |
9c7e2978 | 3141 | && no_labels_between_p (other, insn) |
6f20793d | 3142 | && 0 > mostly_true_jump (other, |
0275a51b RK |
3143 | get_branch_condition (other, |
3144 | JUMP_LABEL (other)))) | |
9c7e2978 RK |
3145 | { |
3146 | rtx other_target = JUMP_LABEL (other); | |
7ca4e06e | 3147 | target_label = JUMP_LABEL (insn); |
9c7e2978 | 3148 | |
9ba11d5a | 3149 | if (invert_jump (other, target_label, 0)) |
326f06f7 | 3150 | reorg_redirect_jump (insn, other_target); |
9c7e2978 RK |
3151 | } |
3152 | ||
3153 | /* Now look only at cases where we have filled a delay slot. */ | |
3154 | if (GET_CODE (insn) != INSN | |
3155 | || GET_CODE (PATTERN (insn)) != SEQUENCE) | |
3156 | continue; | |
3157 | ||
3158 | pat = PATTERN (insn); | |
3159 | delay_insn = XVECEXP (pat, 0, 0); | |
3160 | ||
3161 | /* See if the first insn in the delay slot is redundant with some | |
3162 | previous insn. Remove it from the delay slot if so; then set up | |
3163 | to reprocess this insn. */ | |
f898abd7 | 3164 | if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0)) |
9c7e2978 RK |
3165 | { |
3166 | delete_from_delay_slot (XVECEXP (pat, 0, 1)); | |
3167 | next = prev_active_insn (next); | |
3168 | continue; | |
3169 | } | |
3170 | ||
9f5a2691 JL |
3171 | /* See if we have a RETURN insn with a filled delay slot followed |
3172 | by a RETURN insn with an unfilled a delay slot. If so, we can delete | |
3173 | the first RETURN (but not it's delay insn). This gives the same | |
3174 | effect in fewer instructions. | |
3175 | ||
3176 | Only do so if optimizing for size since this results in slower, but | |
3177 | smaller code. */ | |
3178 | if (optimize_size | |
3179 | && GET_CODE (PATTERN (delay_insn)) == RETURN | |
3180 | && next | |
3181 | && GET_CODE (next) == JUMP_INSN | |
3182 | && GET_CODE (PATTERN (next)) == RETURN) | |
3183 | { | |
2f937369 | 3184 | rtx after; |
9f5a2691 JL |
3185 | int i; |
3186 | ||
3187 | /* Delete the RETURN and just execute the delay list insns. | |
3188 | ||
3189 | We do this by deleting the INSN containing the SEQUENCE, then | |
3190 | re-emitting the insns separately, and then deleting the RETURN. | |
3191 | This allows the count of the jump target to be properly | |
3192 | decremented. */ | |
3193 | ||
3194 | /* Clear the from target bit, since these insns are no longer | |
3195 | in delay slots. */ | |
3196 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3197 | INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0; | |
3198 | ||
3199 | trial = PREV_INSN (insn); | |
53c17031 | 3200 | delete_related_insns (insn); |
2f937369 DM |
3201 | if (GET_CODE (pat) != SEQUENCE) |
3202 | abort (); | |
3203 | after = trial; | |
3204 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3205 | { | |
3206 | rtx this_insn = XVECEXP (pat, 0, i); | |
3207 | add_insn_after (this_insn, after); | |
3208 | after = this_insn; | |
3209 | } | |
9f5a2691 JL |
3210 | delete_scheduled_jump (delay_insn); |
3211 | continue; | |
3212 | } | |
3213 | ||
9c7e2978 RK |
3214 | /* Now look only at the cases where we have a filled JUMP_INSN. */ |
3215 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN | |
3480bb98 JL |
3216 | || ! (condjump_p (XVECEXP (PATTERN (insn), 0, 0)) |
3217 | || condjump_in_parallel_p (XVECEXP (PATTERN (insn), 0, 0)))) | |
9c7e2978 RK |
3218 | continue; |
3219 | ||
3220 | target_label = JUMP_LABEL (delay_insn); | |
3221 | ||
3222 | if (target_label) | |
3223 | { | |
3224 | /* If this jump goes to another unconditional jump, thread it, but | |
3225 | don't convert a jump into a RETURN here. */ | |
22422dbf | 3226 | trial = follow_jumps (target_label); |
9e94dc88 JW |
3227 | /* We use next_real_insn instead of next_active_insn, so that |
3228 | the special USE insns emitted by reorg won't be ignored. | |
3229 | If they are ignored, then they will get deleted if target_label | |
3230 | is now unreachable, and that would cause mark_target_live_regs | |
3231 | to fail. */ | |
3232 | trial = prev_label (next_real_insn (trial)); | |
9c7e2978 RK |
3233 | if (trial == 0 && target_label != 0) |
3234 | trial = find_end_label (); | |
3235 | ||
f27e6bb2 | 3236 | if (trial != target_label |
83fd5651 | 3237 | && redirect_with_delay_slots_safe_p (delay_insn, trial, insn)) |
9c7e2978 | 3238 | { |
326f06f7 | 3239 | reorg_redirect_jump (delay_insn, trial); |
9c7e2978 RK |
3240 | target_label = trial; |
3241 | } | |
3242 | ||
3243 | /* If the first insn at TARGET_LABEL is redundant with a previous | |
3244 | insn, redirect the jump to the following insn process again. */ | |
3245 | trial = next_active_insn (target_label); | |
3246 | if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE | |
1db828df DM |
3247 | && redundant_insn (trial, insn, 0) |
3248 | && ! can_throw_internal (trial)) | |
9c7e2978 | 3249 | { |
eed04dff JL |
3250 | rtx tmp; |
3251 | ||
3252 | /* Figure out where to emit the special USE insn so we don't | |
3253 | later incorrectly compute register live/death info. */ | |
3254 | tmp = next_active_insn (trial); | |
3255 | if (tmp == 0) | |
3256 | tmp = find_end_label (); | |
3257 | ||
3258 | /* Insert the special USE insn and update dataflow info. */ | |
f27e6bb2 | 3259 | update_block (trial, tmp); |
eed04dff JL |
3260 | |
3261 | /* Now emit a label before the special USE insn, and | |
f27e6bb2 | 3262 | redirect our jump to the new label. */ |
eed04dff | 3263 | target_label = get_label_before (PREV_INSN (tmp)); |
326f06f7 | 3264 | reorg_redirect_jump (delay_insn, target_label); |
9c7e2978 RK |
3265 | next = insn; |
3266 | continue; | |
3267 | } | |
3268 | ||
3269 | /* Similarly, if it is an unconditional jump with one insn in its | |
3270 | delay list and that insn is redundant, thread the jump. */ | |
3271 | if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE | |
3272 | && XVECLEN (PATTERN (trial), 0) == 2 | |
3273 | && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN | |
3274 | && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0)) | |
3275 | || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN) | |
f898abd7 | 3276 | && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0)) |
9c7e2978 RK |
3277 | { |
3278 | target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0)); | |
3279 | if (target_label == 0) | |
3280 | target_label = find_end_label (); | |
83fd5651 | 3281 | |
f27e6bb2 | 3282 | if (redirect_with_delay_slots_safe_p (delay_insn, target_label, |
83fd5651 JL |
3283 | insn)) |
3284 | { | |
3285 | reorg_redirect_jump (delay_insn, target_label); | |
3286 | next = insn; | |
3287 | continue; | |
3288 | } | |
9c7e2978 RK |
3289 | } |
3290 | } | |
3291 | ||
3292 | if (! INSN_ANNULLED_BRANCH_P (delay_insn) | |
3293 | && prev_active_insn (target_label) == insn | |
3480bb98 | 3294 | && ! condjump_in_parallel_p (delay_insn) |
9c7e2978 RK |
3295 | #ifdef HAVE_cc0 |
3296 | /* If the last insn in the delay slot sets CC0 for some insn, | |
3297 | various code assumes that it is in a delay slot. We could | |
3298 | put it back where it belonged and delete the register notes, | |
6dc42e49 | 3299 | but it doesn't seem worthwhile in this uncommon case. */ |
9c7e2978 | 3300 | && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1), |
fb3821f7 | 3301 | REG_CC_USER, NULL_RTX) |
9c7e2978 RK |
3302 | #endif |
3303 | ) | |
3304 | { | |
2f937369 | 3305 | rtx after; |
ac224823 RK |
3306 | int i; |
3307 | ||
9c7e2978 RK |
3308 | /* All this insn does is execute its delay list and jump to the |
3309 | following insn. So delete the jump and just execute the delay | |
3310 | list insns. | |
3311 | ||
3312 | We do this by deleting the INSN containing the SEQUENCE, then | |
3313 | re-emitting the insns separately, and then deleting the jump. | |
3314 | This allows the count of the jump target to be properly | |
3315 | decremented. */ | |
3316 | ||
ac224823 RK |
3317 | /* Clear the from target bit, since these insns are no longer |
3318 | in delay slots. */ | |
3319 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3320 | INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0; | |
3321 | ||
9c7e2978 | 3322 | trial = PREV_INSN (insn); |
53c17031 | 3323 | delete_related_insns (insn); |
2f937369 DM |
3324 | if (GET_CODE (pat) != SEQUENCE) |
3325 | abort (); | |
3326 | after = trial; | |
3327 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3328 | { | |
3329 | rtx this_insn = XVECEXP (pat, 0, i); | |
3330 | add_insn_after (this_insn, after); | |
3331 | after = this_insn; | |
3332 | } | |
9c7e2978 RK |
3333 | delete_scheduled_jump (delay_insn); |
3334 | continue; | |
3335 | } | |
3336 | ||
51ec2375 JW |
3337 | /* See if this is an unconditional jump around a single insn which is |
3338 | identical to the one in its delay slot. In this case, we can just | |
3339 | delete the branch and the insn in its delay slot. */ | |
3340 | if (next && GET_CODE (next) == INSN | |
3341 | && prev_label (next_active_insn (next)) == target_label | |
3342 | && simplejump_p (insn) | |
3343 | && XVECLEN (pat, 0) == 2 | |
3344 | && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1)))) | |
3345 | { | |
53c17031 | 3346 | delete_related_insns (insn); |
51ec2375 JW |
3347 | continue; |
3348 | } | |
3349 | ||
9c7e2978 RK |
3350 | /* See if this jump (with its delay slots) branches around another |
3351 | jump (without delay slots). If so, invert this jump and point | |
3352 | it to the target of the second jump. We cannot do this for | |
3353 | annulled jumps, though. Again, don't convert a jump to a RETURN | |
3354 | here. */ | |
3355 | if (! INSN_ANNULLED_BRANCH_P (delay_insn) | |
3356 | && next && GET_CODE (next) == JUMP_INSN | |
3357 | && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN) | |
3358 | && next_active_insn (target_label) == next_active_insn (next) | |
3359 | && no_labels_between_p (insn, next)) | |
3360 | { | |
3361 | rtx label = JUMP_LABEL (next); | |
3362 | rtx old_label = JUMP_LABEL (delay_insn); | |
3363 | ||
3364 | if (label == 0) | |
3365 | label = find_end_label (); | |
3366 | ||
bf6302f0 HB |
3367 | /* find_end_label can generate a new label. Check this first. */ |
3368 | if (no_labels_between_p (insn, next) | |
3369 | && redirect_with_delay_slots_safe_p (delay_insn, label, insn)) | |
9c7e2978 | 3370 | { |
83fd5651 JL |
3371 | /* Be careful how we do this to avoid deleting code or labels |
3372 | that are momentarily dead. See similar optimization in | |
3373 | jump.c */ | |
3374 | if (old_label) | |
3375 | ++LABEL_NUSES (old_label); | |
9c7e2978 | 3376 | |
9ba11d5a | 3377 | if (invert_jump (delay_insn, label, 1)) |
83fd5651 | 3378 | { |
9e8b2461 RK |
3379 | int i; |
3380 | ||
3381 | /* Must update the INSN_FROM_TARGET_P bits now that | |
3382 | the branch is reversed, so that mark_target_live_regs | |
3383 | will handle the delay slot insn correctly. */ | |
3384 | for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++) | |
3385 | { | |
3386 | rtx slot = XVECEXP (PATTERN (insn), 0, i); | |
3387 | INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot); | |
3388 | } | |
3389 | ||
53c17031 | 3390 | delete_related_insns (next); |
83fd5651 JL |
3391 | next = insn; |
3392 | } | |
3393 | ||
3394 | if (old_label && --LABEL_NUSES (old_label) == 0) | |
53c17031 | 3395 | delete_related_insns (old_label); |
83fd5651 JL |
3396 | continue; |
3397 | } | |
9c7e2978 RK |
3398 | } |
3399 | ||
3400 | /* If we own the thread opposite the way this insn branches, see if we | |
3401 | can merge its delay slots with following insns. */ | |
3402 | if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1)) | |
3403 | && own_thread_p (NEXT_INSN (insn), 0, 1)) | |
3404 | try_merge_delay_insns (insn, next); | |
3405 | else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1)) | |
3406 | && own_thread_p (target_label, target_label, 0)) | |
3407 | try_merge_delay_insns (insn, next_active_insn (target_label)); | |
3408 | ||
3409 | /* If we get here, we haven't deleted INSN. But we may have deleted | |
3410 | NEXT, so recompute it. */ | |
3411 | next = next_active_insn (insn); | |
3412 | } | |
3413 | } | |
3414 | \f | |
3415 | #ifdef HAVE_return | |
3416 | ||
3417 | /* Look for filled jumps to the end of function label. We can try to convert | |
3418 | them into RETURN insns if the insns in the delay slot are valid for the | |
3419 | RETURN as well. */ | |
3420 | ||
3421 | static void | |
0c20a65f | 3422 | make_return_insns (rtx first) |
9c7e2978 RK |
3423 | { |
3424 | rtx insn, jump_insn, pat; | |
3425 | rtx real_return_label = end_of_function_label; | |
3426 | int slots, i; | |
3427 | ||
c134da6b HPN |
3428 | #ifdef DELAY_SLOTS_FOR_EPILOGUE |
3429 | /* If a previous pass filled delay slots in the epilogue, things get a | |
3430 | bit more complicated, as those filler insns would generally (without | |
3431 | data flow analysis) have to be executed after any existing branch | |
3432 | delay slot filler insns. It is also unknown whether such a | |
3433 | transformation would actually be profitable. Note that the existing | |
3434 | code only cares for branches with (some) filled delay slots. */ | |
3435 | if (current_function_epilogue_delay_list != NULL) | |
3436 | return; | |
3437 | #endif | |
3438 | ||
9c7e2978 RK |
3439 | /* See if there is a RETURN insn in the function other than the one we |
3440 | made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change | |
3441 | into a RETURN to jump to it. */ | |
3442 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
3443 | if (GET_CODE (insn) == JUMP_INSN && GET_CODE (PATTERN (insn)) == RETURN) | |
3444 | { | |
3445 | real_return_label = get_label_before (insn); | |
3446 | break; | |
3447 | } | |
f27e6bb2 | 3448 | |
9c7e2978 RK |
3449 | /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it |
3450 | was equal to END_OF_FUNCTION_LABEL. */ | |
3451 | LABEL_NUSES (real_return_label)++; | |
3452 | ||
3453 | /* Clear the list of insns to fill so we can use it. */ | |
3454 | obstack_free (&unfilled_slots_obstack, unfilled_firstobj); | |
3455 | ||
3456 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
3457 | { | |
35523fce JL |
3458 | int flags; |
3459 | ||
9c7e2978 RK |
3460 | /* Only look at filled JUMP_INSNs that go to the end of function |
3461 | label. */ | |
3462 | if (GET_CODE (insn) != INSN | |
3463 | || GET_CODE (PATTERN (insn)) != SEQUENCE | |
3464 | || GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN | |
3465 | || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label) | |
3466 | continue; | |
3467 | ||
3468 | pat = PATTERN (insn); | |
3469 | jump_insn = XVECEXP (pat, 0, 0); | |
3470 | ||
18beb3e9 | 3471 | /* If we can't make the jump into a RETURN, try to redirect it to the best |
9c7e2978 | 3472 | RETURN and go on to the next insn. */ |
326f06f7 | 3473 | if (! reorg_redirect_jump (jump_insn, NULL_RTX)) |
9c7e2978 | 3474 | { |
18beb3e9 JL |
3475 | /* Make sure redirecting the jump will not invalidate the delay |
3476 | slot insns. */ | |
3477 | if (redirect_with_delay_slots_safe_p (jump_insn, | |
3478 | real_return_label, | |
3479 | insn)) | |
3480 | reorg_redirect_jump (jump_insn, real_return_label); | |
9c7e2978 RK |
3481 | continue; |
3482 | } | |
3483 | ||
3484 | /* See if this RETURN can accept the insns current in its delay slot. | |
3485 | It can if it has more or an equal number of slots and the contents | |
3486 | of each is valid. */ | |
3487 | ||
35523fce | 3488 | flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn)); |
9c7e2978 RK |
3489 | slots = num_delay_slots (jump_insn); |
3490 | if (slots >= XVECLEN (pat, 0) - 1) | |
3491 | { | |
3492 | for (i = 1; i < XVECLEN (pat, 0); i++) | |
3493 | if (! ( | |
3494 | #ifdef ANNUL_IFFALSE_SLOTS | |
3495 | (INSN_ANNULLED_BRANCH_P (jump_insn) | |
3496 | && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i))) | |
3497 | ? eligible_for_annul_false (jump_insn, i - 1, | |
35523fce | 3498 | XVECEXP (pat, 0, i), flags) : |
9c7e2978 RK |
3499 | #endif |
3500 | #ifdef ANNUL_IFTRUE_SLOTS | |
3501 | (INSN_ANNULLED_BRANCH_P (jump_insn) | |
3502 | && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i))) | |
3503 | ? eligible_for_annul_true (jump_insn, i - 1, | |
35523fce | 3504 | XVECEXP (pat, 0, i), flags) : |
9c7e2978 | 3505 | #endif |
f27e6bb2 KH |
3506 | eligible_for_delay (jump_insn, i - 1, |
3507 | XVECEXP (pat, 0, i), flags))) | |
9c7e2978 RK |
3508 | break; |
3509 | } | |
3510 | else | |
3511 | i = 0; | |
3512 | ||
3513 | if (i == XVECLEN (pat, 0)) | |
3514 | continue; | |
3515 | ||
3516 | /* We have to do something with this insn. If it is an unconditional | |
3517 | RETURN, delete the SEQUENCE and output the individual insns, | |
3518 | followed by the RETURN. Then set things up so we try to find | |
3519 | insns for its delay slots, if it needs some. */ | |
3520 | if (GET_CODE (PATTERN (jump_insn)) == RETURN) | |
3521 | { | |
3522 | rtx prev = PREV_INSN (insn); | |
3523 | ||
53c17031 | 3524 | delete_related_insns (insn); |
9c7e2978 RK |
3525 | for (i = 1; i < XVECLEN (pat, 0); i++) |
3526 | prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev); | |
3527 | ||
3528 | insn = emit_jump_insn_after (PATTERN (jump_insn), prev); | |
3529 | emit_barrier_after (insn); | |
3530 | ||
3531 | if (slots) | |
3532 | obstack_ptr_grow (&unfilled_slots_obstack, insn); | |
3533 | } | |
3534 | else | |
3535 | /* It is probably more efficient to keep this with its current | |
3536 | delay slot as a branch to a RETURN. */ | |
326f06f7 | 3537 | reorg_redirect_jump (jump_insn, real_return_label); |
9c7e2978 RK |
3538 | } |
3539 | ||
3540 | /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any | |
3541 | new delay slots we have created. */ | |
3542 | if (--LABEL_NUSES (real_return_label) == 0) | |
53c17031 | 3543 | delete_related_insns (real_return_label); |
9c7e2978 | 3544 | |
91a51951 KG |
3545 | fill_simple_delay_slots (1); |
3546 | fill_simple_delay_slots (0); | |
9c7e2978 RK |
3547 | } |
3548 | #endif | |
3549 | \f | |
3550 | /* Try to find insns to place in delay slots. */ | |
3551 | ||
3552 | void | |
0c20a65f | 3553 | dbr_schedule (rtx first, FILE *file) |
9c7e2978 | 3554 | { |
7bd80f37 | 3555 | rtx insn, next, epilogue_insn = 0; |
9c7e2978 RK |
3556 | int i; |
3557 | #if 0 | |
3558 | int old_flag_no_peephole = flag_no_peephole; | |
3559 | ||
3560 | /* Execute `final' once in prescan mode to delete any insns that won't be | |
3561 | used. Don't let final try to do any peephole optimization--it will | |
3562 | ruin dataflow information for this pass. */ | |
3563 | ||
3564 | flag_no_peephole = 1; | |
3565 | final (first, 0, NO_DEBUG, 1, 1); | |
3566 | flag_no_peephole = old_flag_no_peephole; | |
3567 | #endif | |
3568 | ||
f27e6bb2 | 3569 | /* If the current function has no insns other than the prologue and |
c3b80729 | 3570 | epilogue, then do not try to fill any delay slots. */ |
0b17ab2f | 3571 | if (n_basic_blocks == 0) |
c3b80729 JL |
3572 | return; |
3573 | ||
9c7e2978 RK |
3574 | /* Find the highest INSN_UID and allocate and initialize our map from |
3575 | INSN_UID's to position in code. */ | |
3576 | for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn)) | |
7bd80f37 TW |
3577 | { |
3578 | if (INSN_UID (insn) > max_uid) | |
3579 | max_uid = INSN_UID (insn); | |
3580 | if (GET_CODE (insn) == NOTE | |
3581 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG) | |
3582 | epilogue_insn = insn; | |
3583 | } | |
9c7e2978 | 3584 | |
703ad42b | 3585 | uid_to_ruid = xmalloc ((max_uid + 1) * sizeof (int)); |
9c7e2978 RK |
3586 | for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn)) |
3587 | uid_to_ruid[INSN_UID (insn)] = i; | |
f27e6bb2 | 3588 | |
9c7e2978 RK |
3589 | /* Initialize the list of insns that need filling. */ |
3590 | if (unfilled_firstobj == 0) | |
3591 | { | |
3592 | gcc_obstack_init (&unfilled_slots_obstack); | |
703ad42b | 3593 | unfilled_firstobj = obstack_alloc (&unfilled_slots_obstack, 0); |
9c7e2978 RK |
3594 | } |
3595 | ||
3596 | for (insn = next_active_insn (first); insn; insn = next_active_insn (insn)) | |
3597 | { | |
3598 | rtx target; | |
3599 | ||
9c64026d | 3600 | INSN_ANNULLED_BRANCH_P (insn) = 0; |
9c7e2978 RK |
3601 | INSN_FROM_TARGET_P (insn) = 0; |
3602 | ||
3603 | /* Skip vector tables. We can't get attributes for them. */ | |
3604 | if (GET_CODE (insn) == JUMP_INSN | |
3605 | && (GET_CODE (PATTERN (insn)) == ADDR_VEC | |
3606 | || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)) | |
3607 | continue; | |
f27e6bb2 | 3608 | |
9c7e2978 RK |
3609 | if (num_delay_slots (insn) > 0) |
3610 | obstack_ptr_grow (&unfilled_slots_obstack, insn); | |
3611 | ||
3612 | /* Ensure all jumps go to the last of a set of consecutive labels. */ | |
f27e6bb2 | 3613 | if (GET_CODE (insn) == JUMP_INSN |
3480bb98 | 3614 | && (condjump_p (insn) || condjump_in_parallel_p (insn)) |
9c7e2978 RK |
3615 | && JUMP_LABEL (insn) != 0 |
3616 | && ((target = prev_label (next_active_insn (JUMP_LABEL (insn)))) | |
3617 | != JUMP_LABEL (insn))) | |
9ba11d5a | 3618 | redirect_jump (insn, target, 1); |
9c7e2978 RK |
3619 | } |
3620 | ||
ca545bb5 | 3621 | init_resource_info (epilogue_insn); |
7bd80f37 | 3622 | |
9c7e2978 RK |
3623 | /* Show we haven't computed an end-of-function label yet. */ |
3624 | end_of_function_label = 0; | |
3625 | ||
9c7e2978 | 3626 | /* Initialize the statistics for this function. */ |
703ad42b KG |
3627 | memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays); |
3628 | memset (num_filled_delays, 0, sizeof num_filled_delays); | |
9c7e2978 RK |
3629 | |
3630 | /* Now do the delay slot filling. Try everything twice in case earlier | |
3631 | changes make more slots fillable. */ | |
3632 | ||
3633 | for (reorg_pass_number = 0; | |
3634 | reorg_pass_number < MAX_REORG_PASSES; | |
3635 | reorg_pass_number++) | |
3636 | { | |
91a51951 KG |
3637 | fill_simple_delay_slots (1); |
3638 | fill_simple_delay_slots (0); | |
3639 | fill_eager_delay_slots (); | |
9c7e2978 RK |
3640 | relax_delay_slots (first); |
3641 | } | |
3642 | ||
3643 | /* Delete any USE insns made by update_block; subsequent passes don't need | |
3644 | them or know how to deal with them. */ | |
3645 | for (insn = first; insn; insn = next) | |
3646 | { | |
3647 | next = NEXT_INSN (insn); | |
3648 | ||
3649 | if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE | |
2c3c49de | 3650 | && INSN_P (XEXP (PATTERN (insn), 0))) |
53c17031 | 3651 | next = delete_related_insns (insn); |
9c7e2978 RK |
3652 | } |
3653 | ||
3654 | /* If we made an end of function label, indicate that it is now | |
3655 | safe to delete it by undoing our prior adjustment to LABEL_NUSES. | |
3656 | If it is now unused, delete it. */ | |
3657 | if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0) | |
53c17031 | 3658 | delete_related_insns (end_of_function_label); |
9c7e2978 RK |
3659 | |
3660 | #ifdef HAVE_return | |
3661 | if (HAVE_return && end_of_function_label != 0) | |
3662 | make_return_insns (first); | |
3663 | #endif | |
3664 | ||
3665 | obstack_free (&unfilled_slots_obstack, unfilled_firstobj); | |
3666 | ||
3667 | /* It is not clear why the line below is needed, but it does seem to be. */ | |
703ad42b | 3668 | unfilled_firstobj = obstack_alloc (&unfilled_slots_obstack, 0); |
9c7e2978 RK |
3669 | |
3670 | if (file) | |
3671 | { | |
b3694847 | 3672 | int i, j, need_comma; |
2e02044a HB |
3673 | int total_delay_slots[MAX_DELAY_HISTOGRAM + 1]; |
3674 | int total_annul_slots[MAX_DELAY_HISTOGRAM + 1]; | |
9c7e2978 RK |
3675 | |
3676 | for (reorg_pass_number = 0; | |
3677 | reorg_pass_number < MAX_REORG_PASSES; | |
3678 | reorg_pass_number++) | |
3679 | { | |
3680 | fprintf (file, ";; Reorg pass #%d:\n", reorg_pass_number + 1); | |
3681 | for (i = 0; i < NUM_REORG_FUNCTIONS; i++) | |
3682 | { | |
3683 | need_comma = 0; | |
3684 | fprintf (file, ";; Reorg function #%d\n", i); | |
3685 | ||
3686 | fprintf (file, ";; %d insns needing delay slots\n;; ", | |
3687 | num_insns_needing_delays[i][reorg_pass_number]); | |
3688 | ||
2e02044a | 3689 | for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++) |
9c7e2978 RK |
3690 | if (num_filled_delays[i][j][reorg_pass_number]) |
3691 | { | |
3692 | if (need_comma) | |
3693 | fprintf (file, ", "); | |
3694 | need_comma = 1; | |
3695 | fprintf (file, "%d got %d delays", | |
3696 | num_filled_delays[i][j][reorg_pass_number], j); | |
3697 | } | |
3698 | fprintf (file, "\n"); | |
3699 | } | |
3700 | } | |
703ad42b KG |
3701 | memset (total_delay_slots, 0, sizeof total_delay_slots); |
3702 | memset (total_annul_slots, 0, sizeof total_annul_slots); | |
2e02044a HB |
3703 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
3704 | { | |
3705 | if (! INSN_DELETED_P (insn) | |
3706 | && GET_CODE (insn) == INSN | |
3707 | && GET_CODE (PATTERN (insn)) != USE | |
3708 | && GET_CODE (PATTERN (insn)) != CLOBBER) | |
3709 | { | |
3710 | if (GET_CODE (PATTERN (insn)) == SEQUENCE) | |
3711 | { | |
3712 | j = XVECLEN (PATTERN (insn), 0) - 1; | |
3713 | if (j > MAX_DELAY_HISTOGRAM) | |
3714 | j = MAX_DELAY_HISTOGRAM; | |
3715 | if (INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3716 | total_annul_slots[j]++; | |
3717 | else | |
3718 | total_delay_slots[j]++; | |
3719 | } | |
f27e6bb2 | 3720 | else if (num_delay_slots (insn) > 0) |
2e02044a HB |
3721 | total_delay_slots[0]++; |
3722 | } | |
3723 | } | |
3724 | fprintf (file, ";; Reorg totals: "); | |
3725 | need_comma = 0; | |
3726 | for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++) | |
3727 | { | |
3728 | if (total_delay_slots[j]) | |
3729 | { | |
3730 | if (need_comma) | |
3731 | fprintf (file, ", "); | |
3732 | need_comma = 1; | |
3733 | fprintf (file, "%d got %d delays", total_delay_slots[j], j); | |
3734 | } | |
3735 | } | |
3736 | fprintf (file, "\n"); | |
3737 | #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS) | |
3738 | fprintf (file, ";; Reorg annuls: "); | |
3739 | need_comma = 0; | |
3740 | for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++) | |
3741 | { | |
3742 | if (total_annul_slots[j]) | |
3743 | { | |
3744 | if (need_comma) | |
3745 | fprintf (file, ", "); | |
3746 | need_comma = 1; | |
3747 | fprintf (file, "%d got %d delays", total_annul_slots[j], j); | |
3748 | } | |
3749 | } | |
3750 | fprintf (file, "\n"); | |
3751 | #endif | |
3752 | fprintf (file, "\n"); | |
9c7e2978 | 3753 | } |
c107334d DM |
3754 | |
3755 | /* For all JUMP insns, fill in branch prediction notes, so that during | |
3756 | assembler output a target can set branch prediction bits in the code. | |
3757 | We have to do this now, as up until this point the destinations of | |
3758 | JUMPS can be moved around and changed, but past right here that cannot | |
3759 | happen. */ | |
3760 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
3761 | { | |
3762 | int pred_flags; | |
3763 | ||
e0d80184 | 3764 | if (GET_CODE (insn) == INSN) |
f27e6bb2 | 3765 | { |
e0d80184 DM |
3766 | rtx pat = PATTERN (insn); |
3767 | ||
3768 | if (GET_CODE (pat) == SEQUENCE) | |
3769 | insn = XVECEXP (pat, 0, 0); | |
3770 | } | |
c107334d DM |
3771 | if (GET_CODE (insn) != JUMP_INSN) |
3772 | continue; | |
3773 | ||
3774 | pred_flags = get_jump_flags (insn, JUMP_LABEL (insn)); | |
38a448ca RH |
3775 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_BR_PRED, |
3776 | GEN_INT (pred_flags), | |
3777 | REG_NOTES (insn)); | |
c107334d | 3778 | } |
ca545bb5 | 3779 | free_resource_info (); |
67289ea6 | 3780 | free (uid_to_ruid); |
281ac604 JH |
3781 | #ifdef DELAY_SLOTS_FOR_EPILOGUE |
3782 | /* SPARC assembler, for instance, emit warning when debug info is output | |
3783 | into the delay slot. */ | |
3784 | { | |
3785 | rtx link; | |
3786 | ||
3787 | for (link = current_function_epilogue_delay_list; | |
3788 | link; | |
3789 | link = XEXP (link, 1)) | |
3790 | INSN_LOCATOR (XEXP (link, 0)) = 0; | |
3791 | } | |
3792 | #endif | |
9c7e2978 RK |
3793 | } |
3794 | #endif /* DELAY_SLOTS */ |