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9c7e2978 | 1 | /* Perform instruction reorganizations for delay slot filling. |
5624e564 | 2 | Copyright (C) 1992-2015 Free Software Foundation, Inc. |
1923e516 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu). |
9c7e2978 RK |
4 | Hacked by Michael Tiemann (tiemann@cygnus.com). |
5 | ||
1322177d | 6 | This file is part of GCC. |
9c7e2978 | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 10 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 11 | version. |
9c7e2978 | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
9c7e2978 RK |
17 | |
18 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
9c7e2978 | 21 | |
9c7e2978 RK |
22 | /* Instruction reorganization pass. |
23 | ||
24 | This pass runs after register allocation and final jump | |
25 | optimization. It should be the last pass to run before peephole. | |
26 | It serves primarily to fill delay slots of insns, typically branch | |
27 | and call insns. Other insns typically involve more complicated | |
6dc42e49 | 28 | interactions of data dependencies and resource constraints, and |
9c7e2978 RK |
29 | are better handled by scheduling before register allocation (by the |
30 | function `schedule_insns'). | |
31 | ||
32 | The Branch Penalty is the number of extra cycles that are needed to | |
33 | execute a branch insn. On an ideal machine, branches take a single | |
34 | cycle, and the Branch Penalty is 0. Several RISC machines approach | |
35 | branch delays differently: | |
36 | ||
fcfcb20e | 37 | The MIPS has a single branch delay slot. Most insns |
9c7e2978 RK |
38 | (except other branches) can be used to fill this slot. When the |
39 | slot is filled, two insns execute in two cycles, reducing the | |
40 | branch penalty to zero. | |
41 | ||
9c7e2978 RK |
42 | The SPARC always has a branch delay slot, but its effects can be |
43 | annulled when the branch is not taken. This means that failing to | |
44 | find other sources of insns, we can hoist an insn from the branch | |
45 | target that would only be safe to execute knowing that the branch | |
46 | is taken. | |
47 | ||
35523fce | 48 | The HP-PA always has a branch delay slot. For unconditional branches |
f27e6bb2 | 49 | its effects can be annulled when the branch is taken. The effects |
35523fce JL |
50 | of the delay slot in a conditional branch can be nullified for forward |
51 | taken branches, or for untaken backward branches. This means | |
52 | we can hoist insns from the fall-through path for forward branches or | |
53 | steal insns from the target of backward branches. | |
54 | ||
18e765cb JL |
55 | The TMS320C3x and C4x have three branch delay slots. When the three |
56 | slots are filled, the branch penalty is zero. Most insns can fill the | |
57 | delay slots except jump insns. | |
58 | ||
9c7e2978 RK |
59 | Three techniques for filling delay slots have been implemented so far: |
60 | ||
61 | (1) `fill_simple_delay_slots' is the simplest, most efficient way | |
62 | to fill delay slots. This pass first looks for insns which come | |
63 | from before the branch and which are safe to execute after the | |
64 | branch. Then it searches after the insn requiring delay slots or, | |
65 | in the case of a branch, for insns that are after the point at | |
66 | which the branch merges into the fallthrough code, if such a point | |
67 | exists. When such insns are found, the branch penalty decreases | |
68 | and no code expansion takes place. | |
69 | ||
70 | (2) `fill_eager_delay_slots' is more complicated: it is used for | |
71 | scheduling conditional jumps, or for scheduling jumps which cannot | |
72 | be filled using (1). A machine need not have annulled jumps to use | |
73 | this strategy, but it helps (by keeping more options open). | |
74 | `fill_eager_delay_slots' tries to guess the direction the branch | |
75 | will go; if it guesses right 100% of the time, it can reduce the | |
c0e12601 | 76 | branch penalty as much as `fill_simple_delay_slots' does. If it |
fcfcb20e | 77 | guesses wrong 100% of the time, it might as well schedule nops. When |
9c7e2978 RK |
78 | `fill_eager_delay_slots' takes insns from the fall-through path of |
79 | the jump, usually there is no code expansion; when it takes insns | |
80 | from the branch target, there is code expansion if it is not the | |
81 | only way to reach that target. | |
82 | ||
83 | (3) `relax_delay_slots' uses a set of rules to simplify code that | |
84 | has been reorganized by (1) and (2). It finds cases where | |
85 | conditional test can be eliminated, jumps can be threaded, extra | |
86 | insns can be eliminated, etc. It is the job of (1) and (2) to do a | |
87 | good job of scheduling locally; `relax_delay_slots' takes care of | |
88 | making the various individual schedules work well together. It is | |
89 | especially tuned to handle the control flow interactions of branch | |
90 | insns. It does nothing for insns with delay slots that do not | |
91 | branch. | |
92 | ||
93 | On machines that use CC0, we are very conservative. We will not make | |
94 | a copy of an insn involving CC0 since we want to maintain a 1-1 | |
d45cf215 | 95 | correspondence between the insn that sets and uses CC0. The insns are |
9c7e2978 RK |
96 | allowed to be separated by placing an insn that sets CC0 (but not an insn |
97 | that uses CC0; we could do this, but it doesn't seem worthwhile) in a | |
98 | delay slot. In that case, we point each insn at the other with REG_CC_USER | |
99 | and REG_CC_SETTER notes. Note that these restrictions affect very few | |
100 | machines because most RISC machines with delay slots will not use CC0 | |
2895a2a8 | 101 | (the RT is the only known exception at this point). */ |
9c7e2978 | 102 | |
9c7e2978 | 103 | #include "config.h" |
670ee920 | 104 | #include "system.h" |
4977bab6 ZW |
105 | #include "coretypes.h" |
106 | #include "tm.h" | |
718f9c0f | 107 | #include "diagnostic-core.h" |
9c7e2978 | 108 | #include "rtl.h" |
6baf1cc8 | 109 | #include "tm_p.h" |
40e23961 | 110 | #include "symtab.h" |
83685514 AM |
111 | #include "hashtab.h" |
112 | #include "hash-set.h" | |
113 | #include "vec.h" | |
114 | #include "machmode.h" | |
115 | #include "hard-reg-set.h" | |
116 | #include "input.h" | |
49ad7cfa | 117 | #include "function.h" |
36566b39 PK |
118 | #include "flags.h" |
119 | #include "statistics.h" | |
120 | #include "double-int.h" | |
121 | #include "real.h" | |
122 | #include "fixed-value.h" | |
123 | #include "alias.h" | |
124 | #include "wide-int.h" | |
125 | #include "inchash.h" | |
126 | #include "tree.h" | |
9c7e2978 | 127 | #include "insn-config.h" |
36566b39 PK |
128 | #include "expmed.h" |
129 | #include "dojump.h" | |
130 | #include "explow.h" | |
131 | #include "calls.h" | |
132 | #include "emit-rtl.h" | |
133 | #include "varasm.h" | |
134 | #include "stmt.h" | |
135 | #include "expr.h" | |
9c7e2978 | 136 | #include "conditions.h" |
60393bbc AM |
137 | #include "predict.h" |
138 | #include "dominance.h" | |
139 | #include "cfg.h" | |
9c7e2978 RK |
140 | #include "basic-block.h" |
141 | #include "regs.h" | |
9c7e2978 | 142 | #include "recog.h" |
9c7e2978 | 143 | #include "obstack.h" |
d80e9fd7 | 144 | #include "insn-attr.h" |
ca545bb5 | 145 | #include "resource.h" |
78b41166 | 146 | #include "except.h" |
0443f602 | 147 | #include "params.h" |
ef330312 PB |
148 | #include "target.h" |
149 | #include "tree-pass.h" | |
d80e9fd7 RS |
150 | |
151 | #ifdef DELAY_SLOTS | |
9c7e2978 | 152 | |
9c7e2978 | 153 | #ifndef ANNUL_IFTRUE_SLOTS |
35523fce | 154 | #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0 |
9c7e2978 RK |
155 | #endif |
156 | #ifndef ANNUL_IFFALSE_SLOTS | |
35523fce | 157 | #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0 |
9c7e2978 RK |
158 | #endif |
159 | ||
61216c26 SB |
160 | \f |
161 | /* First, some functions that were used before GCC got a control flow graph. | |
162 | These functions are now only used here in reorg.c, and have therefore | |
163 | been moved here to avoid inadvertent misuse elsewhere in the compiler. */ | |
164 | ||
165 | /* Return the last label to mark the same position as LABEL. Return LABEL | |
166 | itself if it is null or any return rtx. */ | |
167 | ||
c3f14d55 DM |
168 | static rtx |
169 | skip_consecutive_labels (rtx label_or_return) | |
61216c26 | 170 | { |
f8f0516e | 171 | rtx_insn *insn; |
61216c26 | 172 | |
c3f14d55 DM |
173 | if (label_or_return && ANY_RETURN_P (label_or_return)) |
174 | return label_or_return; | |
175 | ||
176 | rtx_insn *label = as_a <rtx_insn *> (label_or_return); | |
61216c26 SB |
177 | |
178 | for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn)) | |
179 | if (LABEL_P (insn)) | |
180 | label = insn; | |
181 | ||
182 | return label; | |
183 | } | |
184 | ||
185 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER | |
186 | and REG_CC_USER notes so we can find it. */ | |
187 | ||
188 | static void | |
189 | link_cc0_insns (rtx insn) | |
190 | { | |
191 | rtx user = next_nonnote_insn (insn); | |
192 | ||
193 | if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE) | |
194 | user = XVECEXP (PATTERN (user), 0, 0); | |
195 | ||
196 | add_reg_note (user, REG_CC_SETTER, insn); | |
197 | add_reg_note (insn, REG_CC_USER, user); | |
198 | } | |
199 | \f | |
9c7e2978 RK |
200 | /* Insns which have delay slots that have not yet been filled. */ |
201 | ||
202 | static struct obstack unfilled_slots_obstack; | |
203 | static rtx *unfilled_firstobj; | |
204 | ||
205 | /* Define macros to refer to the first and last slot containing unfilled | |
206 | insns. These are used because the list may move and its address | |
207 | should be recomputed at each use. */ | |
208 | ||
209 | #define unfilled_slots_base \ | |
f8f0516e | 210 | ((rtx_insn **) obstack_base (&unfilled_slots_obstack)) |
9c7e2978 RK |
211 | |
212 | #define unfilled_slots_next \ | |
f8f0516e | 213 | ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack)) |
9c7e2978 | 214 | |
26898771 BS |
215 | /* Points to the label before the end of the function, or before a |
216 | return insn. */ | |
f8f0516e | 217 | static rtx_code_label *function_return_label; |
26898771 | 218 | /* Likewise for a simple_return. */ |
f8f0516e | 219 | static rtx_code_label *function_simple_return_label; |
9c7e2978 | 220 | |
9c7e2978 RK |
221 | /* Mapping between INSN_UID's and position in the code since INSN_UID's do |
222 | not always monotonically increase. */ | |
223 | static int *uid_to_ruid; | |
224 | ||
225 | /* Highest valid index in `uid_to_ruid'. */ | |
226 | static int max_uid; | |
227 | ||
0c20a65f AJ |
228 | static int stop_search_p (rtx, int); |
229 | static int resource_conflicts_p (struct resources *, struct resources *); | |
675f99c9 ILT |
230 | static int insn_references_resource_p (rtx, struct resources *, bool); |
231 | static int insn_sets_resource_p (rtx, struct resources *, bool); | |
f8f0516e DM |
232 | static rtx_code_label *find_end_label (rtx); |
233 | static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int); | |
234 | static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *); | |
235 | static rtx_insn *delete_from_delay_slot (rtx_insn *); | |
a79b674b | 236 | static void delete_scheduled_jump (rtx_insn *); |
0c20a65f | 237 | static void note_delay_statistics (int, int); |
80cca0e1 | 238 | #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS) |
dc01c3d1 | 239 | static rtx_insn_list *optimize_skip (rtx_insn *); |
80cca0e1 | 240 | #endif |
68a1a6c0 | 241 | static int get_jump_flags (const rtx_insn *, rtx); |
92cfe9d5 | 242 | static int mostly_true_jump (rtx); |
68a1a6c0 DM |
243 | static rtx get_branch_condition (const rtx_insn *, rtx); |
244 | static int condition_dominates_p (rtx, const rtx_insn *); | |
b32d5189 DM |
245 | static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx); |
246 | static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *); | |
0c20a65f | 247 | static int check_annul_list_true_false (int, rtx); |
b32d5189 | 248 | static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx, |
f8f0516e DM |
249 | rtx_sequence *, |
250 | rtx_insn_list *, | |
251 | struct resources *, | |
252 | struct resources *, | |
253 | struct resources *, | |
254 | int, int *, int *, | |
c3f14d55 | 255 | rtx *); |
b32d5189 | 256 | static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx, |
f8f0516e DM |
257 | rtx_sequence *, |
258 | rtx_insn_list *, | |
259 | struct resources *, | |
260 | struct resources *, | |
261 | struct resources *, | |
262 | int, int *, int *); | |
b32d5189 DM |
263 | static void try_merge_delay_insns (rtx, rtx_insn *); |
264 | static rtx redundant_insn (rtx, rtx_insn *, rtx); | |
c3f14d55 | 265 | static int own_thread_p (rtx, rtx, int); |
a79b674b DM |
266 | static void update_block (rtx_insn *, rtx); |
267 | static int reorg_redirect_jump (rtx_insn *, rtx); | |
0c20a65f AJ |
268 | static void update_reg_dead_notes (rtx, rtx); |
269 | static void fix_reg_dead_note (rtx, rtx); | |
270 | static void update_reg_unused_notes (rtx, rtx); | |
271 | static void fill_simple_delay_slots (int); | |
c3f14d55 | 272 | static rtx_insn_list *fill_slots_from_thread (rtx_insn *, rtx, rtx, rtx, |
f8f0516e DM |
273 | int, int, int, int, |
274 | int *, rtx_insn_list *); | |
0c20a65f | 275 | static void fill_eager_delay_slots (void); |
f8f0516e | 276 | static void relax_delay_slots (rtx_insn *); |
b32d5189 | 277 | static void make_return_insns (rtx_insn *); |
9c7e2978 | 278 | \f |
dc0ff1c8 BS |
279 | /* A wrapper around next_active_insn which takes care to return ret_rtx |
280 | unchanged. */ | |
281 | ||
c3f14d55 DM |
282 | static rtx |
283 | first_active_target_insn (rtx insn) | |
dc0ff1c8 BS |
284 | { |
285 | if (ANY_RETURN_P (insn)) | |
286 | return insn; | |
c3f14d55 | 287 | return next_active_insn (as_a <rtx_insn *> (insn)); |
dc0ff1c8 BS |
288 | } |
289 | \f | |
26898771 BS |
290 | /* Return true iff INSN is a simplejump, or any kind of return insn. */ |
291 | ||
292 | static bool | |
293 | simplejump_or_return_p (rtx insn) | |
294 | { | |
295 | return (JUMP_P (insn) | |
68a1a6c0 DM |
296 | && (simplejump_p (as_a <rtx_insn *> (insn)) |
297 | || ANY_RETURN_P (PATTERN (insn)))); | |
26898771 BS |
298 | } |
299 | \f | |
9c7e2978 RK |
300 | /* Return TRUE if this insn should stop the search for insn to fill delay |
301 | slots. LABELS_P indicates that labels should terminate the search. | |
302 | In all cases, jumps terminate the search. */ | |
303 | ||
304 | static int | |
0c20a65f | 305 | stop_search_p (rtx insn, int labels_p) |
9c7e2978 RK |
306 | { |
307 | if (insn == 0) | |
308 | return 1; | |
309 | ||
5cfc5356 EB |
310 | /* If the insn can throw an exception that is caught within the function, |
311 | it may effectively perform a jump from the viewpoint of the function. | |
312 | Therefore act like for a jump. */ | |
313 | if (can_throw_internal (insn)) | |
314 | return 1; | |
315 | ||
9c7e2978 RK |
316 | switch (GET_CODE (insn)) |
317 | { | |
318 | case NOTE: | |
319 | case CALL_INSN: | |
320 | return 0; | |
321 | ||
322 | case CODE_LABEL: | |
323 | return labels_p; | |
324 | ||
325 | case JUMP_INSN: | |
326 | case BARRIER: | |
327 | return 1; | |
328 | ||
329 | case INSN: | |
330 | /* OK unless it contains a delay slot or is an `asm' insn of some type. | |
331 | We don't know anything about these. */ | |
332 | return (GET_CODE (PATTERN (insn)) == SEQUENCE | |
333 | || GET_CODE (PATTERN (insn)) == ASM_INPUT | |
334 | || asm_noperands (PATTERN (insn)) >= 0); | |
335 | ||
336 | default: | |
41374e13 | 337 | gcc_unreachable (); |
9c7e2978 RK |
338 | } |
339 | } | |
340 | \f | |
341 | /* Return TRUE if any resources are marked in both RES1 and RES2 or if either | |
342 | resource set contains a volatile memory reference. Otherwise, return FALSE. */ | |
343 | ||
344 | static int | |
0c20a65f | 345 | resource_conflicts_p (struct resources *res1, struct resources *res2) |
9c7e2978 RK |
346 | { |
347 | if ((res1->cc && res2->cc) || (res1->memory && res2->memory) | |
348 | || res1->volatil || res2->volatil) | |
349 | return 1; | |
350 | ||
92cfe9d5 | 351 | return hard_reg_set_intersect_p (res1->regs, res2->regs); |
9c7e2978 RK |
352 | } |
353 | ||
354 | /* Return TRUE if any resource marked in RES, a `struct resources', is | |
ab63953e | 355 | referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called |
9c7e2978 RK |
356 | routine is using those resources. |
357 | ||
358 | We compute this by computing all the resources referenced by INSN and | |
359 | seeing if this conflicts with RES. It might be faster to directly check | |
360 | ourselves, and this is the way it used to work, but it means duplicating | |
361 | a large block of complex code. */ | |
362 | ||
363 | static int | |
0c20a65f | 364 | insn_references_resource_p (rtx insn, struct resources *res, |
675f99c9 | 365 | bool include_delayed_effects) |
9c7e2978 RK |
366 | { |
367 | struct resources insn_res; | |
368 | ||
369 | CLEAR_RESOURCE (&insn_res); | |
674345b1 | 370 | mark_referenced_resources (insn, &insn_res, include_delayed_effects); |
9c7e2978 RK |
371 | return resource_conflicts_p (&insn_res, res); |
372 | } | |
373 | ||
374 | /* Return TRUE if INSN modifies resources that are marked in RES. | |
ab63953e | 375 | INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be |
9c7e2978 RK |
376 | included. CC0 is only modified if it is explicitly set; see comments |
377 | in front of mark_set_resources for details. */ | |
378 | ||
379 | static int | |
0c20a65f | 380 | insn_sets_resource_p (rtx insn, struct resources *res, |
675f99c9 | 381 | bool include_delayed_effects) |
9c7e2978 RK |
382 | { |
383 | struct resources insn_sets; | |
384 | ||
385 | CLEAR_RESOURCE (&insn_sets); | |
bbbbb16a ILT |
386 | mark_set_resources (insn, &insn_sets, 0, |
387 | (include_delayed_effects | |
388 | ? MARK_SRC_DEST_CALL | |
389 | : MARK_SRC_DEST)); | |
9c7e2978 RK |
390 | return resource_conflicts_p (&insn_sets, res); |
391 | } | |
392 | \f | |
b9185691 EB |
393 | /* Find a label at the end of the function or before a RETURN. If there |
394 | is none, try to make one. If that fails, returns 0. | |
395 | ||
396 | The property of such a label is that it is placed just before the | |
397 | epilogue or a bare RETURN insn, so that another bare RETURN can be | |
398 | turned into a jump to the label unconditionally. In particular, the | |
399 | label cannot be placed before a RETURN insn with a filled delay slot. | |
400 | ||
401 | ??? There may be a problem with the current implementation. Suppose | |
402 | we start with a bare RETURN insn and call find_end_label. It may set | |
26898771 | 403 | function_return_label just before the RETURN. Suppose the machinery |
b9185691 | 404 | is able to fill the delay slot of the RETURN insn afterwards. Then |
26898771 | 405 | function_return_label is no longer valid according to the property |
b9185691 EB |
406 | described above and find_end_label will still return it unmodified. |
407 | Note that this is probably mitigated by the following observation: | |
26898771 | 408 | once function_return_label is made, it is very likely the target of |
b9185691 | 409 | a jump, so filling the delay slot of the RETURN will be much more |
26898771 BS |
410 | difficult. |
411 | KIND is either simple_return_rtx or ret_rtx, indicating which type of | |
412 | return we're looking for. */ | |
9c7e2978 | 413 | |
f8f0516e | 414 | static rtx_code_label * |
26898771 | 415 | find_end_label (rtx kind) |
9c7e2978 | 416 | { |
f8f0516e DM |
417 | rtx_insn *insn; |
418 | rtx_code_label **plabel; | |
26898771 BS |
419 | |
420 | if (kind == ret_rtx) | |
421 | plabel = &function_return_label; | |
422 | else | |
423 | { | |
424 | gcc_assert (kind == simple_return_rtx); | |
425 | plabel = &function_simple_return_label; | |
426 | } | |
9c7e2978 RK |
427 | |
428 | /* If we found one previously, return it. */ | |
26898771 BS |
429 | if (*plabel) |
430 | return *plabel; | |
9c7e2978 RK |
431 | |
432 | /* Otherwise, see if there is a label at the end of the function. If there | |
433 | is, it must be that RETURN insns aren't needed, so that is our return | |
434 | label and we don't have to do anything else. */ | |
435 | ||
436 | insn = get_last_insn (); | |
4b4bf941 JQ |
437 | while (NOTE_P (insn) |
438 | || (NONJUMP_INSN_P (insn) | |
9c7e2978 RK |
439 | && (GET_CODE (PATTERN (insn)) == USE |
440 | || GET_CODE (PATTERN (insn)) == CLOBBER))) | |
441 | insn = PREV_INSN (insn); | |
442 | ||
f27e6bb2 | 443 | /* When a target threads its epilogue we might already have a |
e572bad3 | 444 | suitable return insn. If so put a label before it for the |
26898771 | 445 | function_return_label. */ |
4b4bf941 JQ |
446 | if (BARRIER_P (insn) |
447 | && JUMP_P (PREV_INSN (insn)) | |
26898771 | 448 | && PATTERN (PREV_INSN (insn)) == kind) |
e572bad3 | 449 | { |
f8f0516e DM |
450 | rtx_insn *temp = PREV_INSN (PREV_INSN (insn)); |
451 | rtx_code_label *label = gen_label_rtx (); | |
26898771 | 452 | LABEL_NUSES (label) = 0; |
e572bad3 | 453 | |
26898771 BS |
454 | /* Put the label before any USE insns that may precede the RETURN |
455 | insn. */ | |
e572bad3 JL |
456 | while (GET_CODE (temp) == USE) |
457 | temp = PREV_INSN (temp); | |
458 | ||
26898771 BS |
459 | emit_label_after (label, temp); |
460 | *plabel = label; | |
e572bad3 JL |
461 | } |
462 | ||
4b4bf941 | 463 | else if (LABEL_P (insn)) |
f8f0516e | 464 | *plabel = as_a <rtx_code_label *> (insn); |
9c7e2978 RK |
465 | else |
466 | { | |
f8f0516e | 467 | rtx_code_label *label = gen_label_rtx (); |
26898771 | 468 | LABEL_NUSES (label) = 0; |
bf6302f0 HB |
469 | /* If the basic block reorder pass moves the return insn to |
470 | some other place try to locate it again and put our | |
26898771 BS |
471 | function_return_label there. */ |
472 | while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind))) | |
bf6302f0 HB |
473 | insn = PREV_INSN (insn); |
474 | if (insn) | |
9c7e2978 | 475 | { |
bf6302f0 HB |
476 | insn = PREV_INSN (insn); |
477 | ||
26898771 | 478 | /* Put the label before any USE insns that may precede the |
bf6302f0 | 479 | RETURN insn. */ |
f27e6bb2 | 480 | while (GET_CODE (insn) == USE) |
bf6302f0 HB |
481 | insn = PREV_INSN (insn); |
482 | ||
26898771 | 483 | emit_label_after (label, insn); |
9c7e2978 | 484 | } |
bf6302f0 HB |
485 | else |
486 | { | |
08b7ff1e | 487 | if (HAVE_epilogue && ! HAVE_return) |
26898771 BS |
488 | /* The RETURN insn has its delay slot filled so we cannot |
489 | emit the label just before it. Since we already have | |
490 | an epilogue and cannot emit a new RETURN, we cannot | |
491 | emit the label at all. */ | |
f8f0516e | 492 | return NULL; |
b9185691 | 493 | |
f27e6bb2 | 494 | /* Otherwise, make a new label and emit a RETURN and BARRIER, |
bf6302f0 | 495 | if needed. */ |
26898771 | 496 | emit_label (label); |
fa967f34 | 497 | if (HAVE_return) |
bf6302f0 HB |
498 | { |
499 | /* The return we make may have delay slots too. */ | |
84034c69 DM |
500 | rtx pat = gen_return (); |
501 | rtx_insn *insn = emit_jump_insn (pat); | |
387748de | 502 | set_return_jump_label (insn); |
bf6302f0 | 503 | emit_barrier (); |
f27e6bb2 KH |
504 | if (num_delay_slots (insn) > 0) |
505 | obstack_ptr_grow (&unfilled_slots_obstack, insn); | |
bf6302f0 | 506 | } |
bf6302f0 | 507 | } |
26898771 | 508 | *plabel = label; |
9c7e2978 RK |
509 | } |
510 | ||
511 | /* Show one additional use for this label so it won't go away until | |
512 | we are done. */ | |
26898771 | 513 | ++LABEL_NUSES (*plabel); |
9c7e2978 | 514 | |
26898771 | 515 | return *plabel; |
9c7e2978 RK |
516 | } |
517 | \f | |
518 | /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace | |
519 | the pattern of INSN with the SEQUENCE. | |
520 | ||
f8f0516e | 521 | Returns the insn containing the SEQUENCE that replaces INSN. */ |
9c7e2978 | 522 | |
f8f0516e DM |
523 | static rtx_insn * |
524 | emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length) | |
9c7e2978 | 525 | { |
38e01259 | 526 | /* Allocate the rtvec to hold the insns and the SEQUENCE. */ |
9c7e2978 | 527 | rtvec seqv = rtvec_alloc (length + 1); |
38a448ca | 528 | rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv); |
f8f0516e | 529 | rtx_insn *seq_insn = make_insn_raw (seq); |
f5546425 | 530 | |
3ccb989e SB |
531 | /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does |
532 | not have a location, but one of the delayed insns does, we pick up a | |
533 | location from there later. */ | |
534 | INSN_LOCATION (seq_insn) = INSN_LOCATION (insn); | |
9c7e2978 | 535 | |
3ccb989e SB |
536 | /* Unlink INSN from the insn chain, so that we can put it into |
537 | the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */ | |
21afc57d | 538 | rtx_insn *after = PREV_INSN (insn); |
3ccb989e | 539 | remove_insn (insn); |
0f82e5c9 | 540 | SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL; |
9c7e2978 RK |
541 | |
542 | /* Build our SEQUENCE and rebuild the insn chain. */ | |
3ccb989e SB |
543 | int i = 1; |
544 | start_sequence (); | |
545 | XVECEXP (seq, 0, 0) = emit_insn (insn); | |
f8f0516e | 546 | for (rtx_insn_list *li = list; li; li = li->next (), i++) |
9c7e2978 | 547 | { |
f8f0516e | 548 | rtx_insn *tem = li->insn (); |
e41c7831 | 549 | rtx note, next; |
9c7e2978 RK |
550 | |
551 | /* Show that this copy of the insn isn't deleted. */ | |
4654c0cf | 552 | tem->set_undeleted (); |
9c7e2978 | 553 | |
3ccb989e SB |
554 | /* Unlink insn from its original place, and re-emit it into |
555 | the sequence. */ | |
0f82e5c9 | 556 | SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL; |
3ccb989e | 557 | XVECEXP (seq, 0, i) = emit_insn (tem); |
9c7e2978 | 558 | |
281ac604 JH |
559 | /* SPARC assembler, for instance, emit warning when debug info is output |
560 | into the delay slot. */ | |
5368224f DC |
561 | if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn)) |
562 | INSN_LOCATION (seq_insn) = INSN_LOCATION (tem); | |
563 | INSN_LOCATION (tem) = 0; | |
281ac604 | 564 | |
e41c7831 RH |
565 | for (note = REG_NOTES (tem); note; note = next) |
566 | { | |
567 | next = XEXP (note, 1); | |
568 | switch (REG_NOTE_KIND (note)) | |
569 | { | |
570 | case REG_DEAD: | |
571 | /* Remove any REG_DEAD notes because we can't rely on them now | |
572 | that the insn has been moved. */ | |
573 | remove_note (tem, note); | |
574 | break; | |
575 | ||
cf7c4aa6 HPN |
576 | case REG_LABEL_OPERAND: |
577 | case REG_LABEL_TARGET: | |
e41c7831 | 578 | /* Keep the label reference count up to date. */ |
4b4bf941 | 579 | if (LABEL_P (XEXP (note, 0))) |
0864c526 | 580 | LABEL_NUSES (XEXP (note, 0)) ++; |
e41c7831 RH |
581 | break; |
582 | ||
583 | default: | |
584 | break; | |
585 | } | |
586 | } | |
9c7e2978 | 587 | } |
3ccb989e | 588 | end_sequence (); |
41374e13 | 589 | gcc_assert (i == length + 1); |
9c7e2978 | 590 | |
3ccb989e SB |
591 | /* Splice our SEQUENCE into the insn stream where INSN used to be. */ |
592 | add_insn_after (seq_insn, after, NULL); | |
593 | ||
9c7e2978 RK |
594 | return seq_insn; |
595 | } | |
596 | ||
597 | /* Add INSN to DELAY_LIST and return the head of the new list. The list must | |
598 | be in the order in which the insns are to be executed. */ | |
599 | ||
f8f0516e DM |
600 | static rtx_insn_list * |
601 | add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list) | |
9c7e2978 | 602 | { |
c8cfe1f6 | 603 | /* If we have an empty list, just make a new list element. If |
9ec36da5 | 604 | INSN has its block number recorded, clear it since we may |
c8cfe1f6 RK |
605 | be moving the insn to a new block. */ |
606 | ||
9c7e2978 | 607 | if (delay_list == 0) |
c8cfe1f6 | 608 | { |
ca545bb5 | 609 | clear_hashed_info_for_insn (insn); |
38a448ca | 610 | return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX); |
c8cfe1f6 | 611 | } |
9c7e2978 RK |
612 | |
613 | /* Otherwise this must be an INSN_LIST. Add INSN to the end of the | |
614 | list. */ | |
f8f0516e | 615 | XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ()); |
9c7e2978 RK |
616 | |
617 | return delay_list; | |
f27e6bb2 | 618 | } |
9c7e2978 | 619 | \f |
ab87f8c8 JL |
620 | /* Delete INSN from the delay slot of the insn that it is in, which may |
621 | produce an insn with no delay slots. Return the new insn. */ | |
9c7e2978 | 622 | |
f8f0516e DM |
623 | static rtx_insn * |
624 | delete_from_delay_slot (rtx_insn *insn) | |
9c7e2978 | 625 | { |
f8f0516e DM |
626 | rtx_insn *trial, *seq_insn, *prev; |
627 | rtx_sequence *seq; | |
628 | rtx_insn_list *delay_list = 0; | |
9c7e2978 | 629 | int i; |
52fe4de8 | 630 | int had_barrier = 0; |
9c7e2978 RK |
631 | |
632 | /* We first must find the insn containing the SEQUENCE with INSN in its | |
633 | delay slot. Do this by finding an insn, TRIAL, where | |
634 | PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */ | |
635 | ||
636 | for (trial = insn; | |
637 | PREV_INSN (NEXT_INSN (trial)) == trial; | |
638 | trial = NEXT_INSN (trial)) | |
639 | ; | |
640 | ||
641 | seq_insn = PREV_INSN (NEXT_INSN (trial)); | |
f8f0516e | 642 | seq = as_a <rtx_sequence *> (PATTERN (seq_insn)); |
9c7e2978 | 643 | |
4b4bf941 | 644 | if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn))) |
52fe4de8 JDA |
645 | had_barrier = 1; |
646 | ||
9c7e2978 RK |
647 | /* Create a delay list consisting of all the insns other than the one |
648 | we are deleting (unless we were the only one). */ | |
f8f0516e DM |
649 | if (seq->len () > 2) |
650 | for (i = 1; i < seq->len (); i++) | |
651 | if (seq->insn (i) != insn) | |
652 | delay_list = add_to_delay_list (seq->insn (i), delay_list); | |
9c7e2978 RK |
653 | |
654 | /* Delete the old SEQUENCE, re-emit the insn that used to have the delay | |
655 | list, and rebuild the delay list if non-empty. */ | |
656 | prev = PREV_INSN (seq_insn); | |
f8f0516e | 657 | trial = seq->insn (0); |
53c17031 | 658 | delete_related_insns (seq_insn); |
6fb5fa3c | 659 | add_insn_after (trial, prev, NULL); |
9c7e2978 | 660 | |
52fe4de8 JDA |
661 | /* If there was a barrier after the old SEQUENCE, remit it. */ |
662 | if (had_barrier) | |
9c7e2978 RK |
663 | emit_barrier_after (trial); |
664 | ||
665 | /* If there are any delay insns, remit them. Otherwise clear the | |
666 | annul flag. */ | |
667 | if (delay_list) | |
91a51951 | 668 | trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2); |
8f06d483 | 669 | else if (JUMP_P (trial)) |
9c7e2978 RK |
670 | INSN_ANNULLED_BRANCH_P (trial) = 0; |
671 | ||
672 | INSN_FROM_TARGET_P (insn) = 0; | |
673 | ||
674 | /* Show we need to fill this insn again. */ | |
675 | obstack_ptr_grow (&unfilled_slots_obstack, trial); | |
96960d10 HB |
676 | |
677 | return trial; | |
9c7e2978 RK |
678 | } |
679 | \f | |
680 | /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down | |
681 | the insn that sets CC0 for it and delete it too. */ | |
682 | ||
683 | static void | |
a79b674b | 684 | delete_scheduled_jump (rtx_insn *insn) |
9c7e2978 RK |
685 | { |
686 | /* Delete the insn that sets cc0 for us. On machines without cc0, we could | |
687 | delete the insn that sets the condition code, but it is hard to find it. | |
688 | Since this case is rare anyway, don't bother trying; there would likely | |
689 | be other insns that became dead anyway, which we wouldn't know to | |
690 | delete. */ | |
691 | ||
058eb3b0 | 692 | if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, insn)) |
9c7e2978 | 693 | { |
fb3821f7 | 694 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
9c7e2978 RK |
695 | |
696 | /* If a reg-note was found, it points to an insn to set CC0. This | |
697 | insn is in the delay list of some other insn. So delete it from | |
698 | the delay list it was in. */ | |
699 | if (note) | |
700 | { | |
fb3821f7 | 701 | if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX) |
9c7e2978 | 702 | && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1) |
f8f0516e | 703 | delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0))); |
9c7e2978 RK |
704 | } |
705 | else | |
706 | { | |
707 | /* The insn setting CC0 is our previous insn, but it may be in | |
708 | a delay slot. It will be the last insn in the delay slot, if | |
709 | it is. */ | |
f8f0516e | 710 | rtx_insn *trial = previous_insn (insn); |
4b4bf941 | 711 | if (NOTE_P (trial)) |
9c7e2978 RK |
712 | trial = prev_nonnote_insn (trial); |
713 | if (sets_cc0_p (PATTERN (trial)) != 1 | |
ff81832f | 714 | || FIND_REG_INC_NOTE (trial, NULL_RTX)) |
9c7e2978 RK |
715 | return; |
716 | if (PREV_INSN (NEXT_INSN (trial)) == trial) | |
53c17031 | 717 | delete_related_insns (trial); |
9c7e2978 RK |
718 | else |
719 | delete_from_delay_slot (trial); | |
720 | } | |
721 | } | |
9c7e2978 | 722 | |
53c17031 | 723 | delete_related_insns (insn); |
9c7e2978 RK |
724 | } |
725 | \f | |
726 | /* Counters for delay-slot filling. */ | |
727 | ||
728 | #define NUM_REORG_FUNCTIONS 2 | |
729 | #define MAX_DELAY_HISTOGRAM 3 | |
730 | #define MAX_REORG_PASSES 2 | |
731 | ||
732 | static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES]; | |
733 | ||
734 | static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES]; | |
735 | ||
736 | static int reorg_pass_number; | |
737 | ||
738 | static void | |
0c20a65f | 739 | note_delay_statistics (int slots_filled, int index) |
9c7e2978 RK |
740 | { |
741 | num_insns_needing_delays[index][reorg_pass_number]++; | |
742 | if (slots_filled > MAX_DELAY_HISTOGRAM) | |
743 | slots_filled = MAX_DELAY_HISTOGRAM; | |
744 | num_filled_delays[index][slots_filled][reorg_pass_number]++; | |
745 | } | |
746 | \f | |
747 | #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS) | |
748 | ||
749 | /* Optimize the following cases: | |
750 | ||
751 | 1. When a conditional branch skips over only one instruction, | |
752 | use an annulling branch and put that insn in the delay slot. | |
6dc42e49 RS |
753 | Use either a branch that annuls when the condition if true or |
754 | invert the test with a branch that annuls when the condition is | |
9c7e2978 RK |
755 | false. This saves insns, since otherwise we must copy an insn |
756 | from the L1 target. | |
757 | ||
758 | (orig) (skip) (otherwise) | |
759 | Bcc.n L1 Bcc',a L1 Bcc,a L1' | |
760 | insn insn insn2 | |
761 | L1: L1: L1: | |
762 | insn2 insn2 insn2 | |
763 | insn3 insn3 L1': | |
764 | insn3 | |
765 | ||
766 | 2. When a conditional branch skips over only one instruction, | |
767 | and after that, it unconditionally branches somewhere else, | |
768 | perform the similar optimization. This saves executing the | |
769 | second branch in the case where the inverted condition is true. | |
770 | ||
771 | Bcc.n L1 Bcc',a L2 | |
772 | insn insn | |
773 | L1: L1: | |
774 | Bra L2 Bra L2 | |
775 | ||
776 | INSN is a JUMP_INSN. | |
777 | ||
778 | This should be expanded to skip over N insns, where N is the number | |
779 | of delay slots required. */ | |
780 | ||
f8f0516e | 781 | static rtx_insn_list * |
dc01c3d1 | 782 | optimize_skip (rtx_insn *insn) |
9c7e2978 | 783 | { |
f8f0516e | 784 | rtx_insn *trial = next_nonnote_insn (insn); |
dc01c3d1 | 785 | rtx_insn *next_trial = next_active_insn (trial); |
f8f0516e | 786 | rtx_insn_list *delay_list = 0; |
35523fce JL |
787 | int flags; |
788 | ||
789 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); | |
9c7e2978 RK |
790 | |
791 | if (trial == 0 | |
4b4bf941 | 792 | || !NONJUMP_INSN_P (trial) |
9c7e2978 RK |
793 | || GET_CODE (PATTERN (trial)) == SEQUENCE |
794 | || recog_memoized (trial) < 0 | |
35523fce | 795 | || (! eligible_for_annul_false (insn, 0, trial, flags) |
1db828df DM |
796 | && ! eligible_for_annul_true (insn, 0, trial, flags)) |
797 | || can_throw_internal (trial)) | |
9c7e2978 RK |
798 | return 0; |
799 | ||
800 | /* There are two cases where we are just executing one insn (we assume | |
801 | here that a branch requires only one insn; this should be generalized | |
802 | at some point): Where the branch goes around a single insn or where | |
803 | we have one insn followed by a branch to the same label we branch to. | |
804 | In both of these cases, inverting the jump and annulling the delay | |
805 | slot give the same effect in fewer insns. */ | |
fa967f34 | 806 | if (next_trial == next_active_insn (JUMP_LABEL (insn)) |
9c7e2978 | 807 | || (next_trial != 0 |
26898771 BS |
808 | && simplejump_or_return_p (next_trial) |
809 | && JUMP_LABEL (insn) == JUMP_LABEL (next_trial))) | |
9c7e2978 | 810 | { |
35523fce | 811 | if (eligible_for_annul_false (insn, 0, trial, flags)) |
9c7e2978 | 812 | { |
9ba11d5a | 813 | if (invert_jump (insn, JUMP_LABEL (insn), 1)) |
9c7e2978 | 814 | INSN_FROM_TARGET_P (trial) = 1; |
35523fce | 815 | else if (! eligible_for_annul_true (insn, 0, trial, flags)) |
9c7e2978 RK |
816 | return 0; |
817 | } | |
818 | ||
f8f0516e | 819 | delay_list = add_to_delay_list (trial, NULL); |
9c7e2978 RK |
820 | next_trial = next_active_insn (trial); |
821 | update_block (trial, trial); | |
53c17031 | 822 | delete_related_insns (trial); |
9c7e2978 RK |
823 | |
824 | /* Also, if we are targeting an unconditional | |
825 | branch, thread our jump to the target of that branch. Don't | |
826 | change this into a RETURN here, because it may not accept what | |
827 | we have in the delay slot. We'll fix this up later. */ | |
26898771 | 828 | if (next_trial && simplejump_or_return_p (next_trial)) |
9c7e2978 | 829 | { |
b9185691 | 830 | rtx target_label = JUMP_LABEL (next_trial); |
dc0ff1c8 | 831 | if (ANY_RETURN_P (target_label)) |
26898771 | 832 | target_label = find_end_label (target_label); |
0e5bad53 | 833 | |
b9185691 EB |
834 | if (target_label) |
835 | { | |
836 | /* Recompute the flags based on TARGET_LABEL since threading | |
837 | the jump to TARGET_LABEL may change the direction of the | |
838 | jump (which may change the circumstances in which the | |
839 | delay slot is nullified). */ | |
840 | flags = get_jump_flags (insn, target_label); | |
841 | if (eligible_for_annul_true (insn, 0, trial, flags)) | |
842 | reorg_redirect_jump (insn, target_label); | |
843 | } | |
9c7e2978 RK |
844 | } |
845 | ||
846 | INSN_ANNULLED_BRANCH_P (insn) = 1; | |
847 | } | |
848 | ||
849 | return delay_list; | |
850 | } | |
851 | #endif | |
852 | \f | |
35523fce JL |
853 | /* Encode and return branch direction and prediction information for |
854 | INSN assuming it will jump to LABEL. | |
855 | ||
856 | Non conditional branches return no direction information and | |
857 | are predicted as very likely taken. */ | |
0f41302f | 858 | |
35523fce | 859 | static int |
68a1a6c0 | 860 | get_jump_flags (const rtx_insn *insn, rtx label) |
35523fce JL |
861 | { |
862 | int flags; | |
863 | ||
864 | /* get_jump_flags can be passed any insn with delay slots, these may | |
865 | be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch | |
866 | direction information, and only if they are conditional jumps. | |
867 | ||
dc0ff1c8 | 868 | If LABEL is a return, then there is no way to determine the branch |
35523fce | 869 | direction. */ |
4b4bf941 | 870 | if (JUMP_P (insn) |
3480bb98 | 871 | && (condjump_p (insn) || condjump_in_parallel_p (insn)) |
dc0ff1c8 | 872 | && !ANY_RETURN_P (label) |
35523fce | 873 | && INSN_UID (insn) <= max_uid |
e328af29 | 874 | && INSN_UID (label) <= max_uid) |
f27e6bb2 | 875 | flags |
35523fce JL |
876 | = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)]) |
877 | ? ATTR_FLAG_forward : ATTR_FLAG_backward; | |
878 | /* No valid direction information. */ | |
879 | else | |
880 | flags = 0; | |
f27e6bb2 | 881 | |
35523fce JL |
882 | return flags; |
883 | } | |
884 | ||
9c7e2978 RK |
885 | /* Return truth value of the statement that this branch |
886 | is mostly taken. If we think that the branch is extremely likely | |
887 | to be taken, we return 2. If the branch is slightly more likely to be | |
0275a51b | 888 | taken, return 1. If the branch is slightly less likely to be taken, |
92cfe9d5 | 889 | return 0 and if the branch is highly unlikely to be taken, return -1. */ |
9c7e2978 RK |
890 | |
891 | static int | |
92cfe9d5 | 892 | mostly_true_jump (rtx jump_insn) |
9c7e2978 | 893 | { |
a6c383b0 DE |
894 | /* If branch probabilities are available, then use that number since it |
895 | always gives a correct answer. */ | |
92cfe9d5 | 896 | rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0); |
10f13594 | 897 | if (note) |
a6c383b0 | 898 | { |
e5af9ddd | 899 | int prob = XINT (note, 0); |
10f13594 RH |
900 | |
901 | if (prob >= REG_BR_PROB_BASE * 9 / 10) | |
f27e6bb2 | 902 | return 2; |
10f13594 | 903 | else if (prob >= REG_BR_PROB_BASE / 2) |
f27e6bb2 | 904 | return 1; |
10f13594 | 905 | else if (prob >= REG_BR_PROB_BASE / 10) |
f27e6bb2 | 906 | return 0; |
10f13594 | 907 | else |
f27e6bb2 | 908 | return -1; |
a6c383b0 DE |
909 | } |
910 | ||
92cfe9d5 SB |
911 | /* If there is no note, assume branches are not taken. |
912 | This should be rare. */ | |
9c7e2978 | 913 | return 0; |
9c7e2978 RK |
914 | } |
915 | ||
916 | /* Return the condition under which INSN will branch to TARGET. If TARGET | |
917 | is zero, return the condition under which INSN will return. If INSN is | |
918 | an unconditional branch, return const_true_rtx. If INSN isn't a simple | |
919 | type of jump, or it doesn't go to TARGET, return 0. */ | |
920 | ||
921 | static rtx | |
68a1a6c0 | 922 | get_branch_condition (const rtx_insn *insn, rtx target) |
9c7e2978 RK |
923 | { |
924 | rtx pat = PATTERN (insn); | |
925 | rtx src; | |
f27e6bb2 | 926 | |
3480bb98 JL |
927 | if (condjump_in_parallel_p (insn)) |
928 | pat = XVECEXP (pat, 0, 0); | |
929 | ||
0ee1e3d9 EB |
930 | if (ANY_RETURN_P (pat) && pat == target) |
931 | return const_true_rtx; | |
9c7e2978 | 932 | |
dc0ff1c8 | 933 | if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx) |
9c7e2978 RK |
934 | return 0; |
935 | ||
936 | src = SET_SRC (pat); | |
a827d9b1 | 937 | if (GET_CODE (src) == LABEL_REF && LABEL_REF_LABEL (src) == target) |
9c7e2978 RK |
938 | return const_true_rtx; |
939 | ||
940 | else if (GET_CODE (src) == IF_THEN_ELSE | |
8f06d483 | 941 | && XEXP (src, 2) == pc_rtx |
0ee1e3d9 | 942 | && ((GET_CODE (XEXP (src, 1)) == LABEL_REF |
a827d9b1 | 943 | && LABEL_REF_LABEL (XEXP (src, 1)) == target) |
0ee1e3d9 | 944 | || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target))) |
9c7e2978 RK |
945 | return XEXP (src, 0); |
946 | ||
947 | else if (GET_CODE (src) == IF_THEN_ELSE | |
8f06d483 | 948 | && XEXP (src, 1) == pc_rtx |
0ee1e3d9 | 949 | && ((GET_CODE (XEXP (src, 2)) == LABEL_REF |
a827d9b1 | 950 | && LABEL_REF_LABEL (XEXP (src, 2)) == target) |
0ee1e3d9 | 951 | || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target))) |
34295799 RH |
952 | { |
953 | enum rtx_code rev; | |
954 | rev = reversed_comparison_code (XEXP (src, 0), insn); | |
955 | if (rev != UNKNOWN) | |
956 | return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)), | |
957 | XEXP (XEXP (src, 0), 0), | |
958 | XEXP (XEXP (src, 0), 1)); | |
959 | } | |
58c8c593 RK |
960 | |
961 | return 0; | |
9c7e2978 RK |
962 | } |
963 | ||
40f03658 | 964 | /* Return nonzero if CONDITION is more strict than the condition of |
9c7e2978 RK |
965 | INSN, i.e., if INSN will always branch if CONDITION is true. */ |
966 | ||
967 | static int | |
68a1a6c0 | 968 | condition_dominates_p (rtx condition, const rtx_insn *insn) |
9c7e2978 RK |
969 | { |
970 | rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn)); | |
971 | enum rtx_code code = GET_CODE (condition); | |
972 | enum rtx_code other_code; | |
973 | ||
974 | if (rtx_equal_p (condition, other_condition) | |
975 | || other_condition == const_true_rtx) | |
976 | return 1; | |
977 | ||
978 | else if (condition == const_true_rtx || other_condition == 0) | |
979 | return 0; | |
980 | ||
981 | other_code = GET_CODE (other_condition); | |
982 | if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2 | |
983 | || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0)) | |
984 | || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1))) | |
985 | return 0; | |
986 | ||
987 | return comparison_dominates_p (code, other_code); | |
988 | } | |
83fd5651 | 989 | |
40f03658 | 990 | /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate |
83fd5651 JL |
991 | any insns already in the delay slot of JUMP. */ |
992 | ||
993 | static int | |
b32d5189 | 994 | redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq) |
83fd5651 | 995 | { |
91a51951 | 996 | int flags, i; |
b32d5189 | 997 | rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq)); |
83fd5651 JL |
998 | |
999 | /* Make sure all the delay slots of this jump would still | |
1000 | be valid after threading the jump. If they are still | |
40f03658 | 1001 | valid, then return nonzero. */ |
83fd5651 JL |
1002 | |
1003 | flags = get_jump_flags (jump, newlabel); | |
b32d5189 | 1004 | for (i = 1; i < pat->len (); i++) |
83fd5651 JL |
1005 | if (! ( |
1006 | #ifdef ANNUL_IFFALSE_SLOTS | |
1007 | (INSN_ANNULLED_BRANCH_P (jump) | |
b32d5189 DM |
1008 | && INSN_FROM_TARGET_P (pat->insn (i))) |
1009 | ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) : | |
83fd5651 JL |
1010 | #endif |
1011 | #ifdef ANNUL_IFTRUE_SLOTS | |
1012 | (INSN_ANNULLED_BRANCH_P (jump) | |
1013 | && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i))) | |
b32d5189 | 1014 | ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) : |
83fd5651 | 1015 | #endif |
b32d5189 | 1016 | eligible_for_delay (jump, i - 1, pat->insn (i), flags))) |
83fd5651 JL |
1017 | break; |
1018 | ||
b32d5189 | 1019 | return (i == pat->len ()); |
83fd5651 JL |
1020 | } |
1021 | ||
40f03658 | 1022 | /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate |
b304ad47 JL |
1023 | any insns we wish to place in the delay slot of JUMP. */ |
1024 | ||
1025 | static int | |
b32d5189 DM |
1026 | redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel, |
1027 | rtx_insn_list *delay_list) | |
b304ad47 JL |
1028 | { |
1029 | int flags, i; | |
b32d5189 | 1030 | rtx_insn_list *li; |
b304ad47 JL |
1031 | |
1032 | /* Make sure all the insns in DELAY_LIST would still be | |
1033 | valid after threading the jump. If they are still | |
40f03658 | 1034 | valid, then return nonzero. */ |
b304ad47 JL |
1035 | |
1036 | flags = get_jump_flags (jump, newlabel); | |
b32d5189 | 1037 | for (li = delay_list, i = 0; li; li = li->next (), i++) |
b304ad47 JL |
1038 | if (! ( |
1039 | #ifdef ANNUL_IFFALSE_SLOTS | |
1040 | (INSN_ANNULLED_BRANCH_P (jump) | |
b32d5189 DM |
1041 | && INSN_FROM_TARGET_P (li->insn ())) |
1042 | ? eligible_for_annul_false (jump, i, li->insn (), flags) : | |
b304ad47 JL |
1043 | #endif |
1044 | #ifdef ANNUL_IFTRUE_SLOTS | |
1045 | (INSN_ANNULLED_BRANCH_P (jump) | |
1046 | && ! INSN_FROM_TARGET_P (XEXP (li, 0))) | |
b32d5189 | 1047 | ? eligible_for_annul_true (jump, i, li->insn (), flags) : |
b304ad47 | 1048 | #endif |
b32d5189 | 1049 | eligible_for_delay (jump, i, li->insn (), flags))) |
b304ad47 JL |
1050 | break; |
1051 | ||
1052 | return (li == NULL); | |
1053 | } | |
1054 | ||
96960d10 HB |
1055 | /* DELAY_LIST is a list of insns that have already been placed into delay |
1056 | slots. See if all of them have the same annulling status as ANNUL_TRUE_P. | |
1057 | If not, return 0; otherwise return 1. */ | |
1058 | ||
1059 | static int | |
0c20a65f | 1060 | check_annul_list_true_false (int annul_true_p, rtx delay_list) |
96960d10 | 1061 | { |
f0c76b51 | 1062 | rtx temp; |
96960d10 HB |
1063 | |
1064 | if (delay_list) | |
1065 | { | |
1066 | for (temp = delay_list; temp; temp = XEXP (temp, 1)) | |
f27e6bb2 KH |
1067 | { |
1068 | rtx trial = XEXP (temp, 0); | |
1069 | ||
1070 | if ((annul_true_p && INSN_FROM_TARGET_P (trial)) | |
96960d10 HB |
1071 | || (!annul_true_p && !INSN_FROM_TARGET_P (trial))) |
1072 | return 0; | |
f27e6bb2 | 1073 | } |
96960d10 | 1074 | } |
ab87f8c8 | 1075 | |
96960d10 HB |
1076 | return 1; |
1077 | } | |
9c7e2978 RK |
1078 | \f |
1079 | /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that | |
1080 | the condition tested by INSN is CONDITION and the resources shown in | |
1081 | OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns | |
1082 | from SEQ's delay list, in addition to whatever insns it may execute | |
1083 | (in DELAY_LIST). SETS and NEEDED are denote resources already set and | |
1084 | needed while searching for delay slot insns. Return the concatenated | |
1085 | delay list if possible, otherwise, return 0. | |
1086 | ||
1087 | SLOTS_TO_FILL is the total number of slots required by INSN, and | |
1088 | PSLOTS_FILLED points to the number filled so far (also the number of | |
1089 | insns in DELAY_LIST). It is updated with the number that have been | |
1090 | filled from the SEQUENCE, if any. | |
1091 | ||
40f03658 | 1092 | PANNUL_P points to a nonzero value if we already know that we need |
9c7e2978 | 1093 | to annul INSN. If this routine determines that annulling is needed, |
40f03658 | 1094 | it may set that value nonzero. |
9c7e2978 RK |
1095 | |
1096 | PNEW_THREAD points to a location that is to receive the place at which | |
1097 | execution should continue. */ | |
1098 | ||
f8f0516e | 1099 | static rtx_insn_list * |
b32d5189 | 1100 | steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq, |
f8f0516e | 1101 | rtx_insn_list *delay_list, struct resources *sets, |
0c20a65f AJ |
1102 | struct resources *needed, |
1103 | struct resources *other_needed, | |
1104 | int slots_to_fill, int *pslots_filled, | |
c3f14d55 | 1105 | int *pannul_p, rtx *pnew_thread) |
9c7e2978 | 1106 | { |
9c7e2978 RK |
1107 | int slots_remaining = slots_to_fill - *pslots_filled; |
1108 | int total_slots_filled = *pslots_filled; | |
f8f0516e | 1109 | rtx_insn_list *new_delay_list = 0; |
9c7e2978 | 1110 | int must_annul = *pannul_p; |
f0c76b51 | 1111 | int used_annul = 0; |
ab87f8c8 | 1112 | int i; |
18e765cb | 1113 | struct resources cc_set; |
df6c8808 | 1114 | bool *redundant; |
9c7e2978 RK |
1115 | |
1116 | /* We can't do anything if there are more delay slots in SEQ than we | |
1117 | can handle, or if we don't know that it will be a taken branch. | |
9c7e2978 | 1118 | We know that it will be a taken branch if it is either an unconditional |
fe41a98e JW |
1119 | branch or a conditional branch with a stricter branch condition. |
1120 | ||
1121 | Also, exit if the branch has more than one set, since then it is computing | |
1122 | other results that can't be ignored, e.g. the HPPA mov&branch instruction. | |
1123 | ??? It may be possible to move other sets into INSN in addition to | |
18e765cb JL |
1124 | moving the instructions in the delay slots. |
1125 | ||
1126 | We can not steal the delay list if one of the instructions in the | |
f27e6bb2 | 1127 | current delay_list modifies the condition codes and the jump in the |
18e765cb JL |
1128 | sequence is a conditional jump. We can not do this because we can |
1129 | not change the direction of the jump because the condition codes | |
f27e6bb2 | 1130 | will effect the direction of the jump in the sequence. */ |
18e765cb JL |
1131 | |
1132 | CLEAR_RESOURCE (&cc_set); | |
f8f0516e | 1133 | for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ()) |
18e765cb | 1134 | { |
f8f0516e | 1135 | rtx_insn *trial = temp->insn (); |
18e765cb | 1136 | |
73780b74 | 1137 | mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL); |
f8f0516e | 1138 | if (insn_references_resource_p (seq->insn (0), &cc_set, false)) |
f27e6bb2 | 1139 | return delay_list; |
18e765cb | 1140 | } |
9c7e2978 RK |
1141 | |
1142 | if (XVECLEN (seq, 0) - 1 > slots_remaining | |
f8f0516e DM |
1143 | || ! condition_dominates_p (condition, seq->insn (0)) |
1144 | || ! single_set (seq->insn (0))) | |
9c7e2978 RK |
1145 | return delay_list; |
1146 | ||
6e7b03e1 AH |
1147 | /* On some targets, branches with delay slots can have a limited |
1148 | displacement. Give the back end a chance to tell us we can't do | |
1149 | this. */ | |
cf6186e9 | 1150 | if (! targetm.can_follow_jump (insn, seq->insn (0))) |
6e7b03e1 | 1151 | return delay_list; |
6e7b03e1 | 1152 | |
df6c8808 | 1153 | redundant = XALLOCAVEC (bool, XVECLEN (seq, 0)); |
f8f0516e | 1154 | for (i = 1; i < seq->len (); i++) |
9c7e2978 | 1155 | { |
f8f0516e | 1156 | rtx_insn *trial = seq->insn (i); |
35523fce | 1157 | int flags; |
9c7e2978 | 1158 | |
675f99c9 ILT |
1159 | if (insn_references_resource_p (trial, sets, false) |
1160 | || insn_sets_resource_p (trial, needed, false) | |
1161 | || insn_sets_resource_p (trial, sets, false) | |
9c7e2978 RK |
1162 | /* If TRIAL sets CC0, we can't copy it, so we can't steal this |
1163 | delay list. */ | |
058eb3b0 | 1164 | || (HAVE_cc0 && find_reg_note (trial, REG_CC_USER, NULL_RTX)) |
9c7e2978 RK |
1165 | /* If TRIAL is from the fallthrough code of an annulled branch insn |
1166 | in SEQ, we cannot use it. */ | |
f8f0516e | 1167 | || (INSN_ANNULLED_BRANCH_P (seq->insn (0)) |
9c7e2978 RK |
1168 | && ! INSN_FROM_TARGET_P (trial))) |
1169 | return delay_list; | |
1170 | ||
1171 | /* If this insn was already done (usually in a previous delay slot), | |
1172 | pretend we put it in our delay slot. */ | |
df6c8808 RS |
1173 | redundant[i] = redundant_insn (trial, insn, new_delay_list); |
1174 | if (redundant[i]) | |
9c7e2978 RK |
1175 | continue; |
1176 | ||
35523fce JL |
1177 | /* We will end up re-vectoring this branch, so compute flags |
1178 | based on jumping to the new label. */ | |
f8f0516e | 1179 | flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0))); |
35523fce | 1180 | |
9c7e2978 RK |
1181 | if (! must_annul |
1182 | && ((condition == const_true_rtx | |
675f99c9 | 1183 | || (! insn_sets_resource_p (trial, other_needed, false) |
2358ff91 | 1184 | && ! may_trap_or_fault_p (PATTERN (trial))))) |
35523fce | 1185 | ? eligible_for_delay (insn, total_slots_filled, trial, flags) |
96960d10 HB |
1186 | : (must_annul || (delay_list == NULL && new_delay_list == NULL)) |
1187 | && (must_annul = 1, | |
1188 | check_annul_list_true_false (0, delay_list) | |
1189 | && check_annul_list_true_false (0, new_delay_list) | |
1190 | && eligible_for_annul_false (insn, total_slots_filled, | |
1191 | trial, flags))) | |
9c7e2978 | 1192 | { |
96960d10 HB |
1193 | if (must_annul) |
1194 | used_annul = 1; | |
f8f0516e | 1195 | rtx_insn *temp = copy_delay_slot_insn (trial); |
9c7e2978 RK |
1196 | INSN_FROM_TARGET_P (temp) = 1; |
1197 | new_delay_list = add_to_delay_list (temp, new_delay_list); | |
1198 | total_slots_filled++; | |
1199 | ||
1200 | if (--slots_remaining == 0) | |
1201 | break; | |
1202 | } | |
1203 | else | |
1204 | return delay_list; | |
1205 | } | |
1206 | ||
df6c8808 RS |
1207 | /* Record the effect of the instructions that were redundant and which |
1208 | we therefore decided not to copy. */ | |
a79b674b | 1209 | for (i = 1; i < seq->len (); i++) |
df6c8808 | 1210 | if (redundant[i]) |
a79b674b | 1211 | update_block (seq->insn (i), insn); |
df6c8808 | 1212 | |
9c7e2978 | 1213 | /* Show the place to which we will be branching. */ |
c3f14d55 | 1214 | *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0))); |
9c7e2978 RK |
1215 | |
1216 | /* Add any new insns to the delay list and update the count of the | |
1217 | number of slots filled. */ | |
1218 | *pslots_filled = total_slots_filled; | |
96960d10 HB |
1219 | if (used_annul) |
1220 | *pannul_p = 1; | |
9c7e2978 RK |
1221 | |
1222 | if (delay_list == 0) | |
1223 | return new_delay_list; | |
1224 | ||
f8f0516e DM |
1225 | for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ()) |
1226 | delay_list = add_to_delay_list (temp->insn (), delay_list); | |
9c7e2978 RK |
1227 | |
1228 | return delay_list; | |
1229 | } | |
1230 | \f | |
f27e6bb2 | 1231 | /* Similar to steal_delay_list_from_target except that SEQ is on the |
9c7e2978 RK |
1232 | fallthrough path of INSN. Here we only do something if the delay insn |
1233 | of SEQ is an unconditional branch. In that case we steal its delay slot | |
1234 | for INSN since unconditional branches are much easier to fill. */ | |
1235 | ||
f8f0516e | 1236 | static rtx_insn_list * |
b32d5189 DM |
1237 | steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition, |
1238 | rtx_sequence *seq, | |
f8f0516e DM |
1239 | rtx_insn_list *delay_list, |
1240 | struct resources *sets, | |
0c20a65f AJ |
1241 | struct resources *needed, |
1242 | struct resources *other_needed, | |
1243 | int slots_to_fill, int *pslots_filled, | |
1244 | int *pannul_p) | |
9c7e2978 RK |
1245 | { |
1246 | int i; | |
35523fce | 1247 | int flags; |
96960d10 HB |
1248 | int must_annul = *pannul_p; |
1249 | int used_annul = 0; | |
35523fce JL |
1250 | |
1251 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); | |
9c7e2978 RK |
1252 | |
1253 | /* We can't do anything if SEQ's delay insn isn't an | |
1254 | unconditional branch. */ | |
1255 | ||
f8f0516e | 1256 | if (! simplejump_or_return_p (seq->insn (0))) |
9c7e2978 RK |
1257 | return delay_list; |
1258 | ||
f8f0516e | 1259 | for (i = 1; i < seq->len (); i++) |
9c7e2978 | 1260 | { |
f8f0516e | 1261 | rtx_insn *trial = seq->insn (i); |
9c7e2978 RK |
1262 | |
1263 | /* If TRIAL sets CC0, stealing it will move it too far from the use | |
1264 | of CC0. */ | |
675f99c9 ILT |
1265 | if (insn_references_resource_p (trial, sets, false) |
1266 | || insn_sets_resource_p (trial, needed, false) | |
1267 | || insn_sets_resource_p (trial, sets, false) | |
058eb3b0 | 1268 | || (HAVE_cc0 && sets_cc0_p (PATTERN (trial)))) |
9c7e2978 RK |
1269 | |
1270 | break; | |
1271 | ||
1272 | /* If this insn was already done, we don't need it. */ | |
f898abd7 | 1273 | if (redundant_insn (trial, insn, delay_list)) |
9c7e2978 | 1274 | { |
df6c8808 | 1275 | update_block (trial, insn); |
9c7e2978 RK |
1276 | delete_from_delay_slot (trial); |
1277 | continue; | |
1278 | } | |
1279 | ||
96960d10 | 1280 | if (! must_annul |
9c7e2978 | 1281 | && ((condition == const_true_rtx |
675f99c9 | 1282 | || (! insn_sets_resource_p (trial, other_needed, false) |
2358ff91 | 1283 | && ! may_trap_or_fault_p (PATTERN (trial))))) |
35523fce | 1284 | ? eligible_for_delay (insn, *pslots_filled, trial, flags) |
96960d10 HB |
1285 | : (must_annul || delay_list == NULL) && (must_annul = 1, |
1286 | check_annul_list_true_false (1, delay_list) | |
1287 | && eligible_for_annul_true (insn, *pslots_filled, trial, flags))) | |
9c7e2978 | 1288 | { |
96960d10 HB |
1289 | if (must_annul) |
1290 | used_annul = 1; | |
9c7e2978 RK |
1291 | delete_from_delay_slot (trial); |
1292 | delay_list = add_to_delay_list (trial, delay_list); | |
1293 | ||
1294 | if (++(*pslots_filled) == slots_to_fill) | |
1295 | break; | |
1296 | } | |
1297 | else | |
1298 | break; | |
1299 | } | |
1300 | ||
96960d10 HB |
1301 | if (used_annul) |
1302 | *pannul_p = 1; | |
9c7e2978 RK |
1303 | return delay_list; |
1304 | } | |
1305 | \f | |
1306 | /* Try merging insns starting at THREAD which match exactly the insns in | |
1307 | INSN's delay list. | |
1308 | ||
1309 | If all insns were matched and the insn was previously annulling, the | |
1310 | annul bit will be cleared. | |
1311 | ||
1312 | For each insn that is merged, if the branch is or will be non-annulling, | |
1313 | we delete the merged insn. */ | |
1314 | ||
1315 | static void | |
b32d5189 | 1316 | try_merge_delay_insns (rtx insn, rtx_insn *thread) |
9c7e2978 | 1317 | { |
b32d5189 DM |
1318 | rtx_insn *trial, *next_trial; |
1319 | rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0)); | |
8f06d483 | 1320 | int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn); |
9c7e2978 RK |
1321 | int slot_number = 1; |
1322 | int num_slots = XVECLEN (PATTERN (insn), 0); | |
1323 | rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number); | |
87e0ceb7 | 1324 | struct resources set, needed, modified; |
f8f0516e | 1325 | rtx_insn_list *merged_insns = 0; |
87e0ceb7 | 1326 | int i, j; |
35523fce JL |
1327 | int flags; |
1328 | ||
a2f54138 | 1329 | flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn)); |
9c7e2978 RK |
1330 | |
1331 | CLEAR_RESOURCE (&needed); | |
1332 | CLEAR_RESOURCE (&set); | |
1333 | ||
1334 | /* If this is not an annulling branch, take into account anything needed in | |
96960d10 | 1335 | INSN's delay slot. This prevents two increments from being incorrectly |
9c7e2978 RK |
1336 | folded into one. If we are annulling, this would be the correct |
1337 | thing to do. (The alternative, looking at things set in NEXT_TO_MATCH | |
1338 | will essentially disable this optimization. This method is somewhat of | |
1339 | a kludge, but I don't see a better way.) */ | |
1340 | if (! annul_p) | |
f27e6bb2 | 1341 | for (i = 1 ; i < num_slots; i++) |
96960d10 | 1342 | if (XVECEXP (PATTERN (insn), 0, i)) |
675f99c9 ILT |
1343 | mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed, |
1344 | true); | |
9c7e2978 RK |
1345 | |
1346 | for (trial = thread; !stop_search_p (trial, 1); trial = next_trial) | |
1347 | { | |
1348 | rtx pat = PATTERN (trial); | |
ce15adaa | 1349 | rtx oldtrial = trial; |
9c7e2978 RK |
1350 | |
1351 | next_trial = next_nonnote_insn (trial); | |
1352 | ||
1353 | /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */ | |
4b4bf941 | 1354 | if (NONJUMP_INSN_P (trial) |
9c7e2978 RK |
1355 | && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)) |
1356 | continue; | |
1357 | ||
1358 | if (GET_CODE (next_to_match) == GET_CODE (trial) | |
9c7e2978 | 1359 | /* We can't share an insn that sets cc0. */ |
618f4073 | 1360 | && (!HAVE_cc0 || ! sets_cc0_p (pat)) |
675f99c9 ILT |
1361 | && ! insn_references_resource_p (trial, &set, true) |
1362 | && ! insn_sets_resource_p (trial, &set, true) | |
1363 | && ! insn_sets_resource_p (trial, &needed, true) | |
9c7e2978 | 1364 | && (trial = try_split (pat, trial, 0)) != 0 |
9772d94f JW |
1365 | /* Update next_trial, in case try_split succeeded. */ |
1366 | && (next_trial = next_nonnote_insn (trial)) | |
ce15adaa RK |
1367 | /* Likewise THREAD. */ |
1368 | && (thread = oldtrial == thread ? trial : thread) | |
9c7e2978 RK |
1369 | && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial)) |
1370 | /* Have to test this condition if annul condition is different | |
1371 | from (and less restrictive than) non-annulling one. */ | |
35523fce | 1372 | && eligible_for_delay (delay_insn, slot_number - 1, trial, flags)) |
9c7e2978 | 1373 | { |
9c7e2978 RK |
1374 | |
1375 | if (! annul_p) | |
1376 | { | |
f1f9081a | 1377 | update_block (trial, thread); |
8ad4abfc RK |
1378 | if (trial == thread) |
1379 | thread = next_active_insn (thread); | |
1380 | ||
53c17031 | 1381 | delete_related_insns (trial); |
9c7e2978 RK |
1382 | INSN_FROM_TARGET_P (next_to_match) = 0; |
1383 | } | |
1384 | else | |
38a448ca | 1385 | merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns); |
9c7e2978 RK |
1386 | |
1387 | if (++slot_number == num_slots) | |
1388 | break; | |
1389 | ||
1390 | next_to_match = XVECEXP (PATTERN (insn), 0, slot_number); | |
9c7e2978 RK |
1391 | } |
1392 | ||
73780b74 | 1393 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
675f99c9 | 1394 | mark_referenced_resources (trial, &needed, true); |
9c7e2978 RK |
1395 | } |
1396 | ||
1397 | /* See if we stopped on a filled insn. If we did, try to see if its | |
1398 | delay slots match. */ | |
1399 | if (slot_number != num_slots | |
4b4bf941 | 1400 | && trial && NONJUMP_INSN_P (trial) |
9c7e2978 | 1401 | && GET_CODE (PATTERN (trial)) == SEQUENCE |
8f06d483 RH |
1402 | && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0)) |
1403 | && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0)))) | |
9c7e2978 | 1404 | { |
f8f0516e | 1405 | rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial)); |
058acefd JW |
1406 | rtx filled_insn = XVECEXP (pat, 0, 0); |
1407 | ||
1408 | /* Account for resources set/needed by the filled insn. */ | |
73780b74 | 1409 | mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL); |
675f99c9 | 1410 | mark_referenced_resources (filled_insn, &needed, true); |
9c7e2978 | 1411 | |
f8f0516e | 1412 | for (i = 1; i < pat->len (); i++) |
9c7e2978 | 1413 | { |
f8f0516e | 1414 | rtx_insn *dtrial = pat->insn (i); |
9c7e2978 | 1415 | |
87e0ceb7 SB |
1416 | CLEAR_RESOURCE (&modified); |
1417 | /* Account for resources set by the the insn following NEXT_TO_MATCH | |
1418 | inside INSN's delay list. */ | |
1419 | for (j = 1; slot_number + j < num_slots; j++) | |
1420 | mark_set_resources (XVECEXP (PATTERN (insn), 0, slot_number + j), | |
1421 | &modified, 0, MARK_SRC_DEST_CALL); | |
1422 | /* Account for resources set by the the insn before DTRIAL and inside | |
1423 | TRIAL's delay list. */ | |
1424 | for (j = 1; j < i; j++) | |
1425 | mark_set_resources (XVECEXP (pat, 0, j), | |
1426 | &modified, 0, MARK_SRC_DEST_CALL); | |
675f99c9 ILT |
1427 | if (! insn_references_resource_p (dtrial, &set, true) |
1428 | && ! insn_sets_resource_p (dtrial, &set, true) | |
1429 | && ! insn_sets_resource_p (dtrial, &needed, true) | |
618f4073 | 1430 | && (!HAVE_cc0 || ! sets_cc0_p (PATTERN (dtrial))) |
9c7e2978 | 1431 | && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial)) |
87e0ceb7 SB |
1432 | /* Check that DTRIAL and NEXT_TO_MATCH does not reference a |
1433 | resource modified between them (only dtrial is checked because | |
1434 | next_to_match and dtrial shall to be equal in order to hit | |
1435 | this line) */ | |
1436 | && ! insn_references_resource_p (dtrial, &modified, true) | |
35523fce | 1437 | && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags)) |
9c7e2978 RK |
1438 | { |
1439 | if (! annul_p) | |
1440 | { | |
f8f0516e | 1441 | rtx_insn *new_rtx; |
96960d10 | 1442 | |
f1f9081a | 1443 | update_block (dtrial, thread); |
0a2aaacc | 1444 | new_rtx = delete_from_delay_slot (dtrial); |
4654c0cf | 1445 | if (thread->deleted ()) |
0a2aaacc | 1446 | thread = new_rtx; |
9c7e2978 RK |
1447 | INSN_FROM_TARGET_P (next_to_match) = 0; |
1448 | } | |
1449 | else | |
38a448ca RH |
1450 | merged_insns = gen_rtx_INSN_LIST (SImode, dtrial, |
1451 | merged_insns); | |
9c7e2978 RK |
1452 | |
1453 | if (++slot_number == num_slots) | |
1454 | break; | |
1455 | ||
1456 | next_to_match = XVECEXP (PATTERN (insn), 0, slot_number); | |
1457 | } | |
96960d10 HB |
1458 | else |
1459 | { | |
f0c76b51 JL |
1460 | /* Keep track of the set/referenced resources for the delay |
1461 | slots of any trial insns we encounter. */ | |
f27e6bb2 | 1462 | mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL); |
675f99c9 | 1463 | mark_referenced_resources (dtrial, &needed, true); |
96960d10 | 1464 | } |
9c7e2978 RK |
1465 | } |
1466 | } | |
1467 | ||
1468 | /* If all insns in the delay slot have been matched and we were previously | |
1469 | annulling the branch, we need not any more. In that case delete all the | |
38e01259 | 1470 | merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in |
9c7e2978 RK |
1471 | the delay list so that we know that it isn't only being used at the |
1472 | target. */ | |
d58b6986 | 1473 | if (slot_number == num_slots && annul_p) |
9c7e2978 | 1474 | { |
f8f0516e | 1475 | for (; merged_insns; merged_insns = merged_insns->next ()) |
9c7e2978 RK |
1476 | { |
1477 | if (GET_MODE (merged_insns) == SImode) | |
1478 | { | |
f8f0516e | 1479 | rtx_insn *new_rtx; |
96960d10 | 1480 | |
a79b674b | 1481 | update_block (merged_insns->insn (), thread); |
f8f0516e | 1482 | new_rtx = delete_from_delay_slot (merged_insns->insn ()); |
4654c0cf | 1483 | if (thread->deleted ()) |
0a2aaacc | 1484 | thread = new_rtx; |
9c7e2978 RK |
1485 | } |
1486 | else | |
1487 | { | |
a79b674b DM |
1488 | update_block (merged_insns->insn (), thread); |
1489 | delete_related_insns (merged_insns->insn ()); | |
9c7e2978 RK |
1490 | } |
1491 | } | |
1492 | ||
1493 | INSN_ANNULLED_BRANCH_P (delay_insn) = 0; | |
1494 | ||
1495 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
1496 | INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0; | |
1497 | } | |
1498 | } | |
1499 | \f | |
1500 | /* See if INSN is redundant with an insn in front of TARGET. Often this | |
1501 | is called when INSN is a candidate for a delay slot of TARGET. | |
1502 | DELAY_LIST are insns that will be placed in delay slots of TARGET in front | |
1503 | of INSN. Often INSN will be redundant with an insn in a delay slot of | |
1504 | some previous insn. This happens when we have a series of branches to the | |
1505 | same label; in that case the first insn at the target might want to go | |
1506 | into each of the delay slots. | |
1507 | ||
1508 | If we are not careful, this routine can take up a significant fraction | |
1509 | of the total compilation time (4%), but only wins rarely. Hence we | |
1510 | speed this routine up by making two passes. The first pass goes back | |
5d3cc252 | 1511 | until it hits a label and sees if it finds an insn with an identical |
9c7e2978 RK |
1512 | pattern. Only in this (relatively rare) event does it check for |
1513 | data conflicts. | |
1514 | ||
1515 | We do not split insns we encounter. This could cause us not to find a | |
1516 | redundant insn, but the cost of splitting seems greater than the possible | |
1517 | gain in rare cases. */ | |
1518 | ||
5317d2f8 | 1519 | static rtx |
b32d5189 | 1520 | redundant_insn (rtx insn, rtx_insn *target, rtx delay_list) |
9c7e2978 RK |
1521 | { |
1522 | rtx target_main = target; | |
1523 | rtx ipat = PATTERN (insn); | |
b32d5189 DM |
1524 | rtx_insn *trial; |
1525 | rtx pat; | |
9c7e2978 RK |
1526 | struct resources needed, set; |
1527 | int i; | |
0443f602 | 1528 | unsigned insns_to_search; |
9c7e2978 | 1529 | |
cbae24bc RK |
1530 | /* If INSN has any REG_UNUSED notes, it can't match anything since we |
1531 | are allowed to not actually assign to such a register. */ | |
1532 | if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0) | |
1533 | return 0; | |
1534 | ||
9c7e2978 | 1535 | /* Scan backwards looking for a match. */ |
0443f602 JO |
1536 | for (trial = PREV_INSN (target), |
1537 | insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH; | |
1538 | trial && insns_to_search > 0; | |
e484d1f0 | 1539 | trial = PREV_INSN (trial)) |
9c7e2978 | 1540 | { |
04da5680 RS |
1541 | /* (use (insn))s can come immediately after a barrier if the |
1542 | label that used to precede them has been deleted as dead. | |
1543 | See delete_related_insns. */ | |
1544 | if (LABEL_P (trial) || BARRIER_P (trial)) | |
9c7e2978 RK |
1545 | return 0; |
1546 | ||
90251a62 | 1547 | if (!INSN_P (trial)) |
9c7e2978 | 1548 | continue; |
e484d1f0 | 1549 | --insns_to_search; |
9c7e2978 RK |
1550 | |
1551 | pat = PATTERN (trial); | |
1552 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
1553 | continue; | |
1554 | ||
9e3090e1 | 1555 | if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat)) |
9c7e2978 | 1556 | { |
ca104c13 JL |
1557 | /* Stop for a CALL and its delay slots because it is difficult to |
1558 | track its resource needs correctly. */ | |
9e3090e1 | 1559 | if (CALL_P (seq->element (0))) |
9c7e2978 RK |
1560 | return 0; |
1561 | ||
ca104c13 | 1562 | /* Stop for an INSN or JUMP_INSN with delayed effects and its delay |
f27e6bb2 | 1563 | slots because it is difficult to track its resource needs |
ca104c13 JL |
1564 | correctly. */ |
1565 | ||
84034c69 | 1566 | if (INSN_SETS_ARE_DELAYED (seq->insn (0))) |
f27e6bb2 | 1567 | return 0; |
ca104c13 | 1568 | |
84034c69 | 1569 | if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0))) |
f27e6bb2 | 1570 | return 0; |
ca104c13 JL |
1571 | |
1572 | /* See if any of the insns in the delay slot match, updating | |
1573 | resource requirements as we go. */ | |
9e3090e1 DM |
1574 | for (i = seq->len () - 1; i > 0; i--) |
1575 | if (GET_CODE (seq->element (i)) == GET_CODE (insn) | |
1576 | && rtx_equal_p (PATTERN (seq->element (i)), ipat) | |
1577 | && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX)) | |
9c7e2978 RK |
1578 | break; |
1579 | ||
1580 | /* If found a match, exit this loop early. */ | |
1581 | if (i > 0) | |
1582 | break; | |
1583 | } | |
1584 | ||
cbae24bc RK |
1585 | else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat) |
1586 | && ! find_reg_note (trial, REG_UNUSED, NULL_RTX)) | |
9c7e2978 RK |
1587 | break; |
1588 | } | |
1589 | ||
1590 | /* If we didn't find an insn that matches, return 0. */ | |
1591 | if (trial == 0) | |
1592 | return 0; | |
1593 | ||
1594 | /* See what resources this insn sets and needs. If they overlap, or | |
1595 | if this insn references CC0, it can't be redundant. */ | |
1596 | ||
1597 | CLEAR_RESOURCE (&needed); | |
1598 | CLEAR_RESOURCE (&set); | |
73780b74 | 1599 | mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); |
675f99c9 | 1600 | mark_referenced_resources (insn, &needed, true); |
9c7e2978 RK |
1601 | |
1602 | /* If TARGET is a SEQUENCE, get the main insn. */ | |
4b4bf941 | 1603 | if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE) |
9c7e2978 RK |
1604 | target_main = XVECEXP (PATTERN (target), 0, 0); |
1605 | ||
1606 | if (resource_conflicts_p (&needed, &set) | |
058eb3b0 | 1607 | || (HAVE_cc0 && reg_mentioned_p (cc0_rtx, ipat)) |
9c7e2978 RK |
1608 | /* The insn requiring the delay may not set anything needed or set by |
1609 | INSN. */ | |
675f99c9 ILT |
1610 | || insn_sets_resource_p (target_main, &needed, true) |
1611 | || insn_sets_resource_p (target_main, &set, true)) | |
9c7e2978 RK |
1612 | return 0; |
1613 | ||
1614 | /* Insns we pass may not set either NEEDED or SET, so merge them for | |
1615 | simpler tests. */ | |
1616 | needed.memory |= set.memory; | |
1617 | IOR_HARD_REG_SET (needed.regs, set.regs); | |
1618 | ||
1619 | /* This insn isn't redundant if it conflicts with an insn that either is | |
1620 | or will be in a delay slot of TARGET. */ | |
1621 | ||
1622 | while (delay_list) | |
1623 | { | |
675f99c9 | 1624 | if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true)) |
9c7e2978 RK |
1625 | return 0; |
1626 | delay_list = XEXP (delay_list, 1); | |
1627 | } | |
1628 | ||
4b4bf941 | 1629 | if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE) |
9c7e2978 | 1630 | for (i = 1; i < XVECLEN (PATTERN (target), 0); i++) |
675f99c9 ILT |
1631 | if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, |
1632 | true)) | |
9c7e2978 RK |
1633 | return 0; |
1634 | ||
1635 | /* Scan backwards until we reach a label or an insn that uses something | |
1636 | INSN sets or sets something insn uses or sets. */ | |
1637 | ||
0443f602 JO |
1638 | for (trial = PREV_INSN (target), |
1639 | insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH; | |
4b4bf941 | 1640 | trial && !LABEL_P (trial) && insns_to_search > 0; |
e484d1f0 | 1641 | trial = PREV_INSN (trial)) |
9c7e2978 | 1642 | { |
90251a62 | 1643 | if (!INSN_P (trial)) |
9c7e2978 | 1644 | continue; |
e484d1f0 | 1645 | --insns_to_search; |
9c7e2978 RK |
1646 | |
1647 | pat = PATTERN (trial); | |
1648 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
1649 | continue; | |
1650 | ||
9e3090e1 | 1651 | if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat)) |
9c7e2978 | 1652 | { |
8f06d483 | 1653 | bool annul_p = false; |
84034c69 | 1654 | rtx_insn *control = seq->insn (0); |
8f06d483 | 1655 | |
9c7e2978 RK |
1656 | /* If this is a CALL_INSN and its delay slots, it is hard to track |
1657 | the resource needs properly, so give up. */ | |
8f06d483 | 1658 | if (CALL_P (control)) |
9c7e2978 RK |
1659 | return 0; |
1660 | ||
38e01259 | 1661 | /* If this is an INSN or JUMP_INSN with delayed effects, it |
ca104c13 JL |
1662 | is hard to track the resource needs properly, so give up. */ |
1663 | ||
8f06d483 | 1664 | if (INSN_SETS_ARE_DELAYED (control)) |
f27e6bb2 | 1665 | return 0; |
ca104c13 | 1666 | |
8f06d483 | 1667 | if (INSN_REFERENCES_ARE_DELAYED (control)) |
f27e6bb2 | 1668 | return 0; |
ca104c13 | 1669 | |
8f06d483 RH |
1670 | if (JUMP_P (control)) |
1671 | annul_p = INSN_ANNULLED_BRANCH_P (control); | |
1672 | ||
9c7e2978 RK |
1673 | /* See if any of the insns in the delay slot match, updating |
1674 | resource requirements as we go. */ | |
9e3090e1 | 1675 | for (i = seq->len () - 1; i > 0; i--) |
9c7e2978 | 1676 | { |
9e3090e1 | 1677 | rtx candidate = seq->element (i); |
9c7e2978 RK |
1678 | |
1679 | /* If an insn will be annulled if the branch is false, it isn't | |
1680 | considered as a possible duplicate insn. */ | |
1681 | if (rtx_equal_p (PATTERN (candidate), ipat) | |
8f06d483 | 1682 | && ! (annul_p && INSN_FROM_TARGET_P (candidate))) |
9c7e2978 RK |
1683 | { |
1684 | /* Show that this insn will be used in the sequel. */ | |
1685 | INSN_FROM_TARGET_P (candidate) = 0; | |
5317d2f8 | 1686 | return candidate; |
9c7e2978 RK |
1687 | } |
1688 | ||
1689 | /* Unless this is an annulled insn from the target of a branch, | |
1690 | we must stop if it sets anything needed or set by INSN. */ | |
8f06d483 | 1691 | if ((!annul_p || !INSN_FROM_TARGET_P (candidate)) |
675f99c9 | 1692 | && insn_sets_resource_p (candidate, &needed, true)) |
9c7e2978 RK |
1693 | return 0; |
1694 | } | |
1695 | ||
f27e6bb2 | 1696 | /* If the insn requiring the delay slot conflicts with INSN, we |
9c7e2978 | 1697 | must stop. */ |
8f06d483 | 1698 | if (insn_sets_resource_p (control, &needed, true)) |
9c7e2978 RK |
1699 | return 0; |
1700 | } | |
1701 | else | |
1702 | { | |
1703 | /* See if TRIAL is the same as INSN. */ | |
1704 | pat = PATTERN (trial); | |
1705 | if (rtx_equal_p (pat, ipat)) | |
5317d2f8 | 1706 | return trial; |
9c7e2978 RK |
1707 | |
1708 | /* Can't go any further if TRIAL conflicts with INSN. */ | |
675f99c9 | 1709 | if (insn_sets_resource_p (trial, &needed, true)) |
9c7e2978 RK |
1710 | return 0; |
1711 | } | |
1712 | } | |
1713 | ||
1714 | return 0; | |
1715 | } | |
1716 | \f | |
40f03658 | 1717 | /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero, |
9c7e2978 | 1718 | it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH |
40f03658 | 1719 | is nonzero, we are allowed to fall into this thread; otherwise, we are |
9c7e2978 RK |
1720 | not. |
1721 | ||
1722 | If LABEL is used more than one or we pass a label other than LABEL before | |
1723 | finding an active insn, we do not own this thread. */ | |
1724 | ||
1725 | static int | |
c3f14d55 | 1726 | own_thread_p (rtx thread, rtx label, int allow_fallthrough) |
9c7e2978 | 1727 | { |
b32d5189 DM |
1728 | rtx_insn *active_insn; |
1729 | rtx_insn *insn; | |
9c7e2978 RK |
1730 | |
1731 | /* We don't own the function end. */ | |
dc0ff1c8 | 1732 | if (thread == 0 || ANY_RETURN_P (thread)) |
9c7e2978 RK |
1733 | return 0; |
1734 | ||
c3f14d55 DM |
1735 | /* We have a non-NULL insn. */ |
1736 | rtx_insn *thread_insn = as_a <rtx_insn *> (thread); | |
1737 | ||
1738 | /* Get the first active insn, or THREAD_INSN, if it is an active insn. */ | |
1739 | active_insn = next_active_insn (PREV_INSN (thread_insn)); | |
9c7e2978 | 1740 | |
c3f14d55 | 1741 | for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn)) |
4b4bf941 | 1742 | if (LABEL_P (insn) |
9c7e2978 RK |
1743 | && (insn != label || LABEL_NUSES (insn) != 1)) |
1744 | return 0; | |
1745 | ||
1746 | if (allow_fallthrough) | |
1747 | return 1; | |
1748 | ||
1749 | /* Ensure that we reach a BARRIER before any insn or label. */ | |
c3f14d55 | 1750 | for (insn = prev_nonnote_insn (thread_insn); |
4b4bf941 | 1751 | insn == 0 || !BARRIER_P (insn); |
9c7e2978 RK |
1752 | insn = prev_nonnote_insn (insn)) |
1753 | if (insn == 0 | |
4b4bf941 JQ |
1754 | || LABEL_P (insn) |
1755 | || (NONJUMP_INSN_P (insn) | |
9c7e2978 RK |
1756 | && GET_CODE (PATTERN (insn)) != USE |
1757 | && GET_CODE (PATTERN (insn)) != CLOBBER)) | |
1758 | return 0; | |
1759 | ||
1760 | return 1; | |
1761 | } | |
1762 | \f | |
9c7e2978 | 1763 | /* Called when INSN is being moved from a location near the target of a jump. |
aa2c50d6 | 1764 | We leave a marker of the form (use (INSN)) immediately in front |
9c7e2978 | 1765 | of WHERE for mark_target_live_regs. These markers will be deleted when |
aa2c50d6 RK |
1766 | reorg finishes. |
1767 | ||
1768 | We used to try to update the live status of registers if WHERE is at | |
1769 | the start of a basic block, but that can't work since we may remove a | |
1770 | BARRIER in relax_delay_slots. */ | |
9c7e2978 RK |
1771 | |
1772 | static void | |
a79b674b | 1773 | update_block (rtx_insn *insn, rtx where) |
9c7e2978 | 1774 | { |
f27e6bb2 | 1775 | /* Ignore if this was in a delay slot and it came from the target of |
9c7e2978 RK |
1776 | a branch. */ |
1777 | if (INSN_FROM_TARGET_P (insn)) | |
1778 | return; | |
1779 | ||
38a448ca | 1780 | emit_insn_before (gen_rtx_USE (VOIDmode, insn), where); |
9c7e2978 RK |
1781 | |
1782 | /* INSN might be making a value live in a block where it didn't use to | |
1783 | be. So recompute liveness information for this block. */ | |
aa2c50d6 | 1784 | |
ca545bb5 | 1785 | incr_ticks_for_insn (insn); |
9c7e2978 | 1786 | } |
28c9500b | 1787 | |
326f06f7 RK |
1788 | /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for |
1789 | the basic block containing the jump. */ | |
1790 | ||
1791 | static int | |
a79b674b | 1792 | reorg_redirect_jump (rtx_insn *jump, rtx nlabel) |
326f06f7 | 1793 | { |
ca545bb5 | 1794 | incr_ticks_for_insn (jump); |
9ba11d5a | 1795 | return redirect_jump (jump, nlabel, 1); |
326f06f7 RK |
1796 | } |
1797 | ||
28c9500b JW |
1798 | /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN. |
1799 | We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes | |
1800 | that reference values used in INSN. If we find one, then we move the | |
1801 | REG_DEAD note to INSN. | |
1802 | ||
569b7f6a | 1803 | This is needed to handle the case where a later insn (after INSN) has a |
28c9500b JW |
1804 | REG_DEAD note for a register used by INSN, and this later insn subsequently |
1805 | gets moved before a CODE_LABEL because it is a redundant insn. In this | |
1806 | case, mark_target_live_regs may be confused into thinking the register | |
1807 | is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */ | |
1808 | ||
1809 | static void | |
0c20a65f | 1810 | update_reg_dead_notes (rtx insn, rtx delayed_insn) |
28c9500b | 1811 | { |
21afc57d TS |
1812 | rtx link, next; |
1813 | rtx_insn *p; | |
28c9500b JW |
1814 | |
1815 | for (p = next_nonnote_insn (insn); p != delayed_insn; | |
1816 | p = next_nonnote_insn (p)) | |
1817 | for (link = REG_NOTES (p); link; link = next) | |
1818 | { | |
1819 | next = XEXP (link, 1); | |
1820 | ||
1821 | if (REG_NOTE_KIND (link) != REG_DEAD | |
f8cfc6aa | 1822 | || !REG_P (XEXP (link, 0))) |
28c9500b JW |
1823 | continue; |
1824 | ||
1825 | if (reg_referenced_p (XEXP (link, 0), PATTERN (insn))) | |
1826 | { | |
1827 | /* Move the REG_DEAD note from P to INSN. */ | |
1828 | remove_note (p, link); | |
1829 | XEXP (link, 1) = REG_NOTES (insn); | |
1830 | REG_NOTES (insn) = link; | |
1831 | } | |
1832 | } | |
1833 | } | |
5317d2f8 | 1834 | |
c170c8c2 JW |
1835 | /* Called when an insn redundant with start_insn is deleted. If there |
1836 | is a REG_DEAD note for the target of start_insn between start_insn | |
1837 | and stop_insn, then the REG_DEAD note needs to be deleted since the | |
1838 | value no longer dies there. | |
1839 | ||
1840 | If the REG_DEAD note isn't deleted, then mark_target_live_regs may be | |
1841 | confused into thinking the register is dead. */ | |
1842 | ||
1843 | static void | |
0c20a65f | 1844 | fix_reg_dead_note (rtx start_insn, rtx stop_insn) |
c170c8c2 | 1845 | { |
21afc57d TS |
1846 | rtx link, next; |
1847 | rtx_insn *p; | |
c170c8c2 JW |
1848 | |
1849 | for (p = next_nonnote_insn (start_insn); p != stop_insn; | |
1850 | p = next_nonnote_insn (p)) | |
1851 | for (link = REG_NOTES (p); link; link = next) | |
1852 | { | |
1853 | next = XEXP (link, 1); | |
1854 | ||
1855 | if (REG_NOTE_KIND (link) != REG_DEAD | |
f8cfc6aa | 1856 | || !REG_P (XEXP (link, 0))) |
c170c8c2 JW |
1857 | continue; |
1858 | ||
1859 | if (reg_set_p (XEXP (link, 0), PATTERN (start_insn))) | |
1860 | { | |
1861 | remove_note (p, link); | |
1862 | return; | |
1863 | } | |
1864 | } | |
1865 | } | |
1866 | ||
5317d2f8 RK |
1867 | /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN. |
1868 | ||
1869 | This handles the case of udivmodXi4 instructions which optimize their | |
1870 | output depending on whether any REG_UNUSED notes are present. | |
1871 | we must make sure that INSN calculates as many results as REDUNDANT_INSN | |
1872 | does. */ | |
1873 | ||
1874 | static void | |
0c20a65f | 1875 | update_reg_unused_notes (rtx insn, rtx redundant_insn) |
5317d2f8 | 1876 | { |
91a51951 | 1877 | rtx link, next; |
5317d2f8 RK |
1878 | |
1879 | for (link = REG_NOTES (insn); link; link = next) | |
1880 | { | |
1881 | next = XEXP (link, 1); | |
1882 | ||
1883 | if (REG_NOTE_KIND (link) != REG_UNUSED | |
f8cfc6aa | 1884 | || !REG_P (XEXP (link, 0))) |
5317d2f8 RK |
1885 | continue; |
1886 | ||
1887 | if (! find_regno_note (redundant_insn, REG_UNUSED, | |
1888 | REGNO (XEXP (link, 0)))) | |
1889 | remove_note (insn, link); | |
1890 | } | |
1891 | } | |
9c7e2978 | 1892 | \f |
5cf6635b EB |
1893 | static vec <rtx> sibling_labels; |
1894 | ||
1895 | /* Return the label before INSN, or put a new label there. If SIBLING is | |
1896 | non-zero, it is another label associated with the new label (if any), | |
1897 | typically the former target of the jump that will be redirected to | |
1898 | the new label. */ | |
c47277a6 | 1899 | |
f8f0516e | 1900 | static rtx_insn * |
b32d5189 | 1901 | get_label_before (rtx_insn *insn, rtx sibling) |
c47277a6 | 1902 | { |
f8f0516e | 1903 | rtx_insn *label; |
c47277a6 PB |
1904 | |
1905 | /* Find an existing label at this point | |
1906 | or make a new one if there is none. */ | |
1907 | label = prev_nonnote_insn (insn); | |
1908 | ||
1909 | if (label == 0 || !LABEL_P (label)) | |
1910 | { | |
e60365d3 | 1911 | rtx_insn *prev = PREV_INSN (insn); |
c47277a6 PB |
1912 | |
1913 | label = gen_label_rtx (); | |
1914 | emit_label_after (label, prev); | |
1915 | LABEL_NUSES (label) = 0; | |
5cf6635b EB |
1916 | if (sibling) |
1917 | { | |
1918 | sibling_labels.safe_push (label); | |
1919 | sibling_labels.safe_push (sibling); | |
1920 | } | |
c47277a6 PB |
1921 | } |
1922 | return label; | |
1923 | } | |
1924 | ||
9c7e2978 RK |
1925 | /* Scan a function looking for insns that need a delay slot and find insns to |
1926 | put into the delay slot. | |
1927 | ||
40f03658 | 1928 | NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such |
9c7e2978 RK |
1929 | as calls). We do these first since we don't want jump insns (that are |
1930 | easier to fill) to get the only insns that could be used for non-jump insns. | |
1931 | When it is zero, only try to fill JUMP_INSNs. | |
1932 | ||
1933 | When slots are filled in this manner, the insns (including the | |
1934 | delay_insn) are put together in a SEQUENCE rtx. In this fashion, | |
1935 | it is possible to tell whether a delay slot has really been filled | |
1936 | or not. `final' knows how to deal with this, by communicating | |
1937 | through FINAL_SEQUENCE. */ | |
1938 | ||
1939 | static void | |
0c20a65f | 1940 | fill_simple_delay_slots (int non_jumps_p) |
9c7e2978 | 1941 | { |
f8f0516e DM |
1942 | rtx_insn *insn, *trial, *next_trial; |
1943 | rtx pat; | |
b3694847 | 1944 | int i; |
9c7e2978 RK |
1945 | int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base; |
1946 | struct resources needed, set; | |
126db1fa | 1947 | int slots_to_fill, slots_filled; |
f8f0516e | 1948 | rtx_insn_list *delay_list; |
9c7e2978 RK |
1949 | |
1950 | for (i = 0; i < num_unfilled_slots; i++) | |
1951 | { | |
35523fce | 1952 | int flags; |
9c7e2978 RK |
1953 | /* Get the next insn to fill. If it has already had any slots assigned, |
1954 | we can't do anything with it. Maybe we'll improve this later. */ | |
1955 | ||
1956 | insn = unfilled_slots_base[i]; | |
1957 | if (insn == 0 | |
4654c0cf | 1958 | || insn->deleted () |
4b4bf941 | 1959 | || (NONJUMP_INSN_P (insn) |
9c7e2978 | 1960 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
4b4bf941 JQ |
1961 | || (JUMP_P (insn) && non_jumps_p) |
1962 | || (!JUMP_P (insn) && ! non_jumps_p)) | |
9c7e2978 | 1963 | continue; |
f27e6bb2 | 1964 | |
c5c76735 JL |
1965 | /* It may have been that this insn used to need delay slots, but |
1966 | now doesn't; ignore in that case. This can happen, for example, | |
1967 | on the HP PA RISC, where the number of delay slots depends on | |
1968 | what insns are nearby. */ | |
9c7e2978 | 1969 | slots_to_fill = num_delay_slots (insn); |
c3a3b536 JL |
1970 | |
1971 | /* Some machine description have defined instructions to have | |
1972 | delay slots only in certain circumstances which may depend on | |
1973 | nearby insns (which change due to reorg's actions). | |
1974 | ||
1975 | For example, the PA port normally has delay slots for unconditional | |
1976 | jumps. | |
1977 | ||
1978 | However, the PA port claims such jumps do not have a delay slot | |
1979 | if they are immediate successors of certain CALL_INSNs. This | |
1980 | allows the port to favor filling the delay slot of the call with | |
1981 | the unconditional jump. */ | |
9c7e2978 | 1982 | if (slots_to_fill == 0) |
c3a3b536 | 1983 | continue; |
9c7e2978 RK |
1984 | |
1985 | /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL | |
464b453d TW |
1986 | says how many. After initialization, first try optimizing |
1987 | ||
1988 | call _foo call _foo | |
1989 | nop add %o7,.-L1,%o7 | |
1990 | b,a L1 | |
1991 | nop | |
1992 | ||
1993 | If this case applies, the delay slot of the call is filled with | |
1994 | the unconditional jump. This is done first to avoid having the | |
1995 | delay slot of the call filled in the backward scan. Also, since | |
1996 | the unconditional jump is likely to also have a delay slot, that | |
733fa7ef JL |
1997 | insn must exist when it is subsequently scanned. |
1998 | ||
1999 | This is tried on each insn with delay slots as some machines | |
f27e6bb2 | 2000 | have insns which perform calls, but are not represented as |
733fa7ef | 2001 | CALL_INSNs. */ |
464b453d TW |
2002 | |
2003 | slots_filled = 0; | |
2004 | delay_list = 0; | |
2005 | ||
4b4bf941 | 2006 | if (JUMP_P (insn)) |
c5c76735 JL |
2007 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); |
2008 | else | |
2009 | flags = get_jump_flags (insn, NULL_RTX); | |
2010 | ||
733fa7ef | 2011 | if ((trial = next_active_insn (insn)) |
4b4bf941 | 2012 | && JUMP_P (trial) |
464b453d | 2013 | && simplejump_p (trial) |
35523fce | 2014 | && eligible_for_delay (insn, slots_filled, trial, flags) |
1db828df DM |
2015 | && no_labels_between_p (insn, trial) |
2016 | && ! can_throw_internal (trial)) | |
464b453d | 2017 | { |
f8f0516e | 2018 | rtx_insn **tmp; |
464b453d TW |
2019 | slots_filled++; |
2020 | delay_list = add_to_delay_list (trial, delay_list); | |
45d9a5c6 RK |
2021 | |
2022 | /* TRIAL may have had its delay slot filled, then unfilled. When | |
2023 | the delay slot is unfilled, TRIAL is placed back on the unfilled | |
2024 | slots obstack. Unfortunately, it is placed on the end of the | |
2025 | obstack, not in its original location. Therefore, we must search | |
2026 | from entry i + 1 to the end of the unfilled slots obstack to | |
2027 | try and find TRIAL. */ | |
2028 | tmp = &unfilled_slots_base[i + 1]; | |
2029 | while (*tmp != trial && tmp != unfilled_slots_next) | |
2030 | tmp++; | |
2031 | ||
464b453d | 2032 | /* Remove the unconditional jump from consideration for delay slot |
6d2f8887 | 2033 | filling and unthread it. */ |
45d9a5c6 RK |
2034 | if (*tmp == trial) |
2035 | *tmp = 0; | |
464b453d | 2036 | { |
f8f0516e DM |
2037 | rtx_insn *next = NEXT_INSN (trial); |
2038 | rtx_insn *prev = PREV_INSN (trial); | |
464b453d | 2039 | if (prev) |
0f82e5c9 | 2040 | SET_NEXT_INSN (prev) = next; |
464b453d | 2041 | if (next) |
0f82e5c9 | 2042 | SET_PREV_INSN (next) = prev; |
464b453d TW |
2043 | } |
2044 | } | |
2045 | ||
2046 | /* Now, scan backwards from the insn to search for a potential | |
2047 | delay-slot candidate. Stop searching when a label or jump is hit. | |
2048 | ||
9c7e2978 RK |
2049 | For each candidate, if it is to go into the delay slot (moved |
2050 | forward in execution sequence), it must not need or set any resources | |
2051 | that were set by later insns and must not set any resources that | |
2052 | are needed for those insns. | |
f27e6bb2 | 2053 | |
9c7e2978 RK |
2054 | The delay slot insn itself sets resources unless it is a call |
2055 | (in which case the called routine, not the insn itself, is doing | |
2056 | the setting). */ | |
2057 | ||
464b453d | 2058 | if (slots_filled < slots_to_fill) |
9c7e2978 | 2059 | { |
33c2207d EB |
2060 | /* If the flags register is dead after the insn, then we want to be |
2061 | able to accept a candidate that clobbers it. For this purpose, | |
2062 | we need to filter the flags register during life analysis, so | |
2063 | that it doesn't create RAW and WAW dependencies, while still | |
2064 | creating the necessary WAR dependencies. */ | |
2065 | bool filter_flags | |
2066 | = (slots_to_fill == 1 | |
2067 | && targetm.flags_regnum != INVALID_REGNUM | |
2068 | && find_regno_note (insn, REG_DEAD, targetm.flags_regnum)); | |
2069 | struct resources fset; | |
464b453d TW |
2070 | CLEAR_RESOURCE (&needed); |
2071 | CLEAR_RESOURCE (&set); | |
73780b74 | 2072 | mark_set_resources (insn, &set, 0, MARK_SRC_DEST); |
33c2207d EB |
2073 | if (filter_flags) |
2074 | { | |
2075 | CLEAR_RESOURCE (&fset); | |
2076 | mark_set_resources (insn, &fset, 0, MARK_SRC_DEST); | |
2077 | } | |
675f99c9 | 2078 | mark_referenced_resources (insn, &needed, false); |
9c7e2978 | 2079 | |
464b453d TW |
2080 | for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1); |
2081 | trial = next_trial) | |
2082 | { | |
2083 | next_trial = prev_nonnote_insn (trial); | |
9c7e2978 | 2084 | |
464b453d TW |
2085 | /* This must be an INSN or CALL_INSN. */ |
2086 | pat = PATTERN (trial); | |
2087 | ||
9242213f | 2088 | /* Stand-alone USE and CLOBBER are just for flow. */ |
464b453d TW |
2089 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) |
2090 | continue; | |
9c7e2978 | 2091 | |
f27e6bb2 | 2092 | /* Check for resource conflict first, to avoid unnecessary |
464b453d | 2093 | splitting. */ |
675f99c9 | 2094 | if (! insn_references_resource_p (trial, &set, true) |
33c2207d EB |
2095 | && ! insn_sets_resource_p (trial, |
2096 | filter_flags ? &fset : &set, | |
2097 | true) | |
675f99c9 | 2098 | && ! insn_sets_resource_p (trial, &needed, true) |
464b453d | 2099 | /* Can't separate set of cc0 from its use. */ |
618f4073 | 2100 | && (!HAVE_cc0 || ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))) |
1db828df | 2101 | && ! can_throw_internal (trial)) |
9c7e2978 | 2102 | { |
464b453d TW |
2103 | trial = try_split (pat, trial, 1); |
2104 | next_trial = prev_nonnote_insn (trial); | |
35523fce | 2105 | if (eligible_for_delay (insn, slots_filled, trial, flags)) |
464b453d TW |
2106 | { |
2107 | /* In this case, we are searching backward, so if we | |
2108 | find insns to put on the delay list, we want | |
2109 | to put them at the head, rather than the | |
2110 | tail, of the list. */ | |
2111 | ||
28c9500b | 2112 | update_reg_dead_notes (trial, insn); |
38a448ca RH |
2113 | delay_list = gen_rtx_INSN_LIST (VOIDmode, |
2114 | trial, delay_list); | |
464b453d | 2115 | update_block (trial, trial); |
53c17031 | 2116 | delete_related_insns (trial); |
464b453d TW |
2117 | if (slots_to_fill == ++slots_filled) |
2118 | break; | |
2119 | continue; | |
2120 | } | |
9c7e2978 | 2121 | } |
9c7e2978 | 2122 | |
73780b74 | 2123 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
33c2207d EB |
2124 | if (filter_flags) |
2125 | { | |
2126 | mark_set_resources (trial, &fset, 0, MARK_SRC_DEST_CALL); | |
2127 | /* If the flags register is set, then it doesn't create RAW | |
2128 | dependencies any longer and it also doesn't create WAW | |
2129 | dependencies since it's dead after the original insn. */ | |
2130 | if (TEST_HARD_REG_BIT (fset.regs, targetm.flags_regnum)) | |
2131 | { | |
2132 | CLEAR_HARD_REG_BIT (needed.regs, targetm.flags_regnum); | |
2133 | CLEAR_HARD_REG_BIT (fset.regs, targetm.flags_regnum); | |
2134 | } | |
2135 | } | |
675f99c9 | 2136 | mark_referenced_resources (trial, &needed, true); |
464b453d | 2137 | } |
9c7e2978 RK |
2138 | } |
2139 | ||
9c7e2978 RK |
2140 | /* If all needed slots haven't been filled, we come here. */ |
2141 | ||
2142 | /* Try to optimize case of jumping around a single insn. */ | |
2143 | #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS) | |
2f9ba5a9 JL |
2144 | if (slots_filled != slots_to_fill |
2145 | && delay_list == 0 | |
4b4bf941 | 2146 | && JUMP_P (insn) |
8db13a7f JR |
2147 | && (condjump_p (insn) || condjump_in_parallel_p (insn)) |
2148 | && !ANY_RETURN_P (JUMP_LABEL (insn))) | |
9c7e2978 RK |
2149 | { |
2150 | delay_list = optimize_skip (insn); | |
2151 | if (delay_list) | |
2152 | slots_filled += 1; | |
2153 | } | |
2154 | #endif | |
2155 | ||
9c7e2978 RK |
2156 | /* Try to get insns from beyond the insn needing the delay slot. |
2157 | These insns can neither set or reference resources set in insns being | |
2158 | skipped, cannot set resources in the insn being skipped, and, if this | |
2159 | is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the | |
2160 | call might not return). | |
2161 | ||
f03e51d4 RK |
2162 | There used to be code which continued past the target label if |
2163 | we saw all uses of the target label. This code did not work, | |
2164 | because it failed to account for some instructions which were | |
2165 | both annulled and marked as from the target. This can happen as a | |
2166 | result of optimize_skip. Since this code was redundant with | |
2167 | fill_eager_delay_slots anyways, it was just deleted. */ | |
9c7e2978 | 2168 | |
2f9ba5a9 | 2169 | if (slots_filled != slots_to_fill |
be672de8 MM |
2170 | /* If this instruction could throw an exception which is |
2171 | caught in the same function, then it's not safe to fill | |
2172 | the delay slot with an instruction from beyond this | |
2173 | point. For example, consider: | |
2174 | ||
2175 | int i = 2; | |
2176 | ||
ff81832f | 2177 | try { |
be672de8 MM |
2178 | f(); |
2179 | i = 3; | |
2180 | } catch (...) {} | |
ff81832f | 2181 | |
be672de8 MM |
2182 | return i; |
2183 | ||
2184 | Even though `i' is a local variable, we must be sure not | |
2185 | to put `i = 3' in the delay slot if `f' might throw an | |
2186 | exception. | |
2187 | ||
2188 | Presumably, we should also check to see if we could get | |
2189 | back to this function via `setjmp'. */ | |
1db828df | 2190 | && ! can_throw_internal (insn) |
0ee1e3d9 | 2191 | && !JUMP_P (insn)) |
9c7e2978 | 2192 | { |
9c7e2978 | 2193 | int maybe_never = 0; |
0443f602 | 2194 | rtx pat, trial_delay; |
9c7e2978 RK |
2195 | |
2196 | CLEAR_RESOURCE (&needed); | |
2197 | CLEAR_RESOURCE (&set); | |
0ee1e3d9 EB |
2198 | mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); |
2199 | mark_referenced_resources (insn, &needed, true); | |
9c7e2978 | 2200 | |
4b4bf941 | 2201 | if (CALL_P (insn)) |
0ee1e3d9 | 2202 | maybe_never = 1; |
9c7e2978 | 2203 | |
01007ae0 EB |
2204 | for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1); |
2205 | trial = next_trial) | |
2206 | { | |
2207 | next_trial = next_nonnote_insn (trial); | |
9c7e2978 | 2208 | |
01007ae0 EB |
2209 | /* This must be an INSN or CALL_INSN. */ |
2210 | pat = PATTERN (trial); | |
9c7e2978 | 2211 | |
01007ae0 EB |
2212 | /* Stand-alone USE and CLOBBER are just for flow. */ |
2213 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
2214 | continue; | |
2215 | ||
2216 | /* If this already has filled delay slots, get the insn needing | |
2217 | the delay slots. */ | |
2218 | if (GET_CODE (pat) == SEQUENCE) | |
2219 | trial_delay = XVECEXP (pat, 0, 0); | |
2220 | else | |
2221 | trial_delay = trial; | |
2222 | ||
2223 | /* Stop our search when seeing a jump. */ | |
2224 | if (JUMP_P (trial_delay)) | |
2225 | break; | |
9c7e2978 | 2226 | |
01007ae0 EB |
2227 | /* See if we have a resource problem before we try to split. */ |
2228 | if (GET_CODE (pat) != SEQUENCE | |
2229 | && ! insn_references_resource_p (trial, &set, true) | |
2230 | && ! insn_sets_resource_p (trial, &set, true) | |
2231 | && ! insn_sets_resource_p (trial, &needed, true) | |
618f4073 | 2232 | && (!HAVE_cc0 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))) |
01007ae0 EB |
2233 | && ! (maybe_never && may_trap_or_fault_p (pat)) |
2234 | && (trial = try_split (pat, trial, 0)) | |
2235 | && eligible_for_delay (insn, slots_filled, trial, flags) | |
c3284718 | 2236 | && ! can_throw_internal (trial)) |
01007ae0 EB |
2237 | { |
2238 | next_trial = next_nonnote_insn (trial); | |
2239 | delay_list = add_to_delay_list (trial, delay_list); | |
058eb3b0 | 2240 | if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat)) |
01007ae0 | 2241 | link_cc0_insns (trial); |
058eb3b0 | 2242 | |
01007ae0 EB |
2243 | delete_related_insns (trial); |
2244 | if (slots_to_fill == ++slots_filled) | |
2245 | break; | |
2246 | continue; | |
2247 | } | |
9c7e2978 | 2248 | |
01007ae0 EB |
2249 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
2250 | mark_referenced_resources (trial, &needed, true); | |
9c7e2978 | 2251 | |
01007ae0 EB |
2252 | /* Ensure we don't put insns between the setting of cc and the |
2253 | comparison by moving a setting of cc into an earlier delay | |
2254 | slot since these insns could clobber the condition code. */ | |
2255 | set.cc = 1; | |
9c7e2978 | 2256 | |
01007ae0 EB |
2257 | /* If this is a call, we might not get here. */ |
2258 | if (CALL_P (trial_delay)) | |
2259 | maybe_never = 1; | |
2260 | } | |
9c7e2978 RK |
2261 | |
2262 | /* If there are slots left to fill and our search was stopped by an | |
2263 | unconditional branch, try the insn at the branch target. We can | |
f27e6bb2 | 2264 | redirect the branch if it works. |
6f7775d5 JL |
2265 | |
2266 | Don't do this if the insn at the branch target is a branch. */ | |
9c7e2978 RK |
2267 | if (slots_to_fill != slots_filled |
2268 | && trial | |
dc0ff1c8 | 2269 | && jump_to_label_p (trial) |
9c7e2978 | 2270 | && simplejump_p (trial) |
9c7e2978 | 2271 | && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0 |
4b4bf941 | 2272 | && ! (NONJUMP_INSN_P (next_trial) |
9c7e2978 | 2273 | && GET_CODE (PATTERN (next_trial)) == SEQUENCE) |
4b4bf941 | 2274 | && !JUMP_P (next_trial) |
675f99c9 ILT |
2275 | && ! insn_references_resource_p (next_trial, &set, true) |
2276 | && ! insn_sets_resource_p (next_trial, &set, true) | |
2277 | && ! insn_sets_resource_p (next_trial, &needed, true) | |
618f4073 | 2278 | && (!HAVE_cc0 || ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))) |
2358ff91 | 2279 | && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial))) |
9c7e2978 | 2280 | && (next_trial = try_split (PATTERN (next_trial), next_trial, 0)) |
1db828df DM |
2281 | && eligible_for_delay (insn, slots_filled, next_trial, flags) |
2282 | && ! can_throw_internal (trial)) | |
9c7e2978 | 2283 | { |
afce2847 HPN |
2284 | /* See comment in relax_delay_slots about necessity of using |
2285 | next_real_insn here. */ | |
b32d5189 | 2286 | rtx_insn *new_label = next_real_insn (next_trial); |
9c7e2978 RK |
2287 | |
2288 | if (new_label != 0) | |
5cf6635b | 2289 | new_label = get_label_before (new_label, JUMP_LABEL (trial)); |
99f14de7 | 2290 | else |
26898771 | 2291 | new_label = find_end_label (simple_return_rtx); |
9c7e2978 | 2292 | |
b9185691 EB |
2293 | if (new_label) |
2294 | { | |
2295 | delay_list | |
8e383849 JR |
2296 | = add_to_delay_list (copy_delay_slot_insn (next_trial), |
2297 | delay_list); | |
b9185691 EB |
2298 | slots_filled++; |
2299 | reorg_redirect_jump (trial, new_label); | |
b9185691 | 2300 | } |
9c7e2978 RK |
2301 | } |
2302 | } | |
2303 | ||
126db1fa JL |
2304 | /* If this is an unconditional jump, then try to get insns from the |
2305 | target of the jump. */ | |
4b4bf941 | 2306 | if (JUMP_P (insn) |
126db1fa JL |
2307 | && simplejump_p (insn) |
2308 | && slots_filled != slots_to_fill) | |
2309 | delay_list | |
2310 | = fill_slots_from_thread (insn, const_true_rtx, | |
2311 | next_active_insn (JUMP_LABEL (insn)), | |
2312 | NULL, 1, 1, | |
c3f14d55 DM |
2313 | own_thread_p (JUMP_LABEL (insn), |
2314 | JUMP_LABEL (insn), 0), | |
ab63953e JL |
2315 | slots_to_fill, &slots_filled, |
2316 | delay_list); | |
126db1fa | 2317 | |
9c7e2978 RK |
2318 | if (delay_list) |
2319 | unfilled_slots_base[i] | |
91a51951 | 2320 | = emit_delay_sequence (insn, delay_list, slots_filled); |
9c7e2978 RK |
2321 | |
2322 | if (slots_to_fill == slots_filled) | |
2323 | unfilled_slots_base[i] = 0; | |
2324 | ||
2325 | note_delay_statistics (slots_filled, 0); | |
2326 | } | |
9c7e2978 RK |
2327 | } |
2328 | \f | |
4b4de898 | 2329 | /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP; |
c47277a6 | 2330 | return the ultimate label reached by any such chain of jumps. |
26898771 BS |
2331 | Return a suitable return rtx if the chain ultimately leads to a |
2332 | return instruction. | |
c47277a6 PB |
2333 | If LABEL is not followed by a jump, return LABEL. |
2334 | If the chain loops or we can't find end, return LABEL, | |
4b4de898 | 2335 | since that tells caller to avoid changing the insn. |
339ba33b RS |
2336 | If the returned label is obtained by following a crossing jump, |
2337 | set *CROSSING to true, otherwise set it to false. */ | |
c47277a6 | 2338 | |
c3f14d55 | 2339 | static rtx |
c1ce59ab | 2340 | follow_jumps (rtx label, rtx_insn *jump, bool *crossing) |
c47277a6 | 2341 | { |
f8f0516e DM |
2342 | rtx_insn *insn; |
2343 | rtx_insn *next; | |
c47277a6 PB |
2344 | int depth; |
2345 | ||
4b4de898 | 2346 | *crossing = false; |
dc0ff1c8 BS |
2347 | if (ANY_RETURN_P (label)) |
2348 | return label; | |
c3f14d55 DM |
2349 | |
2350 | rtx_insn *value = as_a <rtx_insn *> (label); | |
2351 | ||
c47277a6 PB |
2352 | for (depth = 0; |
2353 | (depth < 10 | |
2354 | && (insn = next_active_insn (value)) != 0 | |
2355 | && JUMP_P (insn) | |
dc0ff1c8 BS |
2356 | && JUMP_LABEL (insn) != NULL_RTX |
2357 | && ((any_uncondjump_p (insn) && onlyjump_p (insn)) | |
26898771 | 2358 | || ANY_RETURN_P (PATTERN (insn))) |
c47277a6 PB |
2359 | && (next = NEXT_INSN (insn)) |
2360 | && BARRIER_P (next)); | |
2361 | depth++) | |
2362 | { | |
c3f14d55 | 2363 | rtx this_label_or_return = JUMP_LABEL (insn); |
c47277a6 PB |
2364 | |
2365 | /* If we have found a cycle, make the insn jump to itself. */ | |
c3f14d55 | 2366 | if (this_label_or_return == label) |
c47277a6 | 2367 | return label; |
d7b6661b SB |
2368 | |
2369 | /* Cannot follow returns and cannot look through tablejumps. */ | |
c3f14d55 DM |
2370 | if (ANY_RETURN_P (this_label_or_return)) |
2371 | return this_label_or_return; | |
2372 | ||
2373 | rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return); | |
d7b6661b SB |
2374 | if (NEXT_INSN (this_label) |
2375 | && JUMP_TABLE_DATA_P (NEXT_INSN (this_label))) | |
c47277a6 PB |
2376 | break; |
2377 | ||
4b4de898 JR |
2378 | if (!targetm.can_follow_jump (jump, insn)) |
2379 | break; | |
2380 | if (!*crossing) | |
339ba33b | 2381 | *crossing = CROSSING_JUMP_P (jump); |
dc0ff1c8 | 2382 | value = this_label; |
c47277a6 PB |
2383 | } |
2384 | if (depth == 10) | |
2385 | return label; | |
2386 | return value; | |
2387 | } | |
2388 | ||
9c7e2978 RK |
2389 | /* Try to find insns to place in delay slots. |
2390 | ||
2391 | INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION | |
2392 | or is an unconditional branch if CONDITION is const_true_rtx. | |
2393 | *PSLOTS_FILLED is updated with the number of slots that we have filled. | |
2394 | ||
2395 | THREAD is a flow-of-control, either the insns to be executed if the | |
2396 | branch is true or if the branch is false, THREAD_IF_TRUE says which. | |
2397 | ||
2398 | OPPOSITE_THREAD is the thread in the opposite direction. It is used | |
2399 | to see if any potential delay slot insns set things needed there. | |
2400 | ||
40f03658 | 2401 | LIKELY is nonzero if it is extremely likely that the branch will be |
9c7e2978 RK |
2402 | taken and THREAD_IF_TRUE is set. This is used for the branch at the |
2403 | end of a loop back up to the top. | |
2404 | ||
2405 | OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the | |
2406 | thread. I.e., it is the fallthrough code of our jump or the target of the | |
2407 | jump when we are the only jump going there. | |
2408 | ||
2409 | If OWN_THREAD is false, it must be the "true" thread of a jump. In that | |
2410 | case, we can only take insns from the head of the thread for our delay | |
2411 | slot. We then adjust the jump to point after the insns we have taken. */ | |
2412 | ||
f8f0516e | 2413 | static rtx_insn_list * |
c3f14d55 DM |
2414 | fill_slots_from_thread (rtx_insn *insn, rtx condition, rtx thread_or_return, |
2415 | rtx opposite_thread, int likely, | |
f8f0516e | 2416 | int thread_if_true, |
0c20a65f | 2417 | int own_thread, int slots_to_fill, |
f8f0516e | 2418 | int *pslots_filled, rtx_insn_list *delay_list) |
9c7e2978 | 2419 | { |
c3f14d55 | 2420 | rtx new_thread; |
9c7e2978 | 2421 | struct resources opposite_needed, set, needed; |
f8f0516e | 2422 | rtx_insn *trial; |
9c7e2978 RK |
2423 | int lose = 0; |
2424 | int must_annul = 0; | |
35523fce | 2425 | int flags; |
9c7e2978 RK |
2426 | |
2427 | /* Validate our arguments. */ | |
c3284718 RS |
2428 | gcc_assert (condition != const_true_rtx || thread_if_true); |
2429 | gcc_assert (own_thread || thread_if_true); | |
9c7e2978 | 2430 | |
35523fce JL |
2431 | flags = get_jump_flags (insn, JUMP_LABEL (insn)); |
2432 | ||
9c7e2978 RK |
2433 | /* If our thread is the end of subroutine, we can't get any delay |
2434 | insns from that. */ | |
c3f14d55 | 2435 | if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return)) |
f27e6bb2 | 2436 | return delay_list; |
9c7e2978 | 2437 | |
c3f14d55 DM |
2438 | rtx_insn *thread = as_a <rtx_insn *> (thread_or_return); |
2439 | ||
9c7e2978 RK |
2440 | /* If this is an unconditional branch, nothing is needed at the |
2441 | opposite thread. Otherwise, compute what is needed there. */ | |
2442 | if (condition == const_true_rtx) | |
2443 | CLEAR_RESOURCE (&opposite_needed); | |
2444 | else | |
ca545bb5 | 2445 | mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed); |
9c7e2978 | 2446 | |
d674b9e3 RK |
2447 | /* If the insn at THREAD can be split, do it here to avoid having to |
2448 | update THREAD and NEW_THREAD if it is done in the loop below. Also | |
2449 | initialize NEW_THREAD. */ | |
2450 | ||
d45cf215 | 2451 | new_thread = thread = try_split (PATTERN (thread), thread, 0); |
d674b9e3 | 2452 | |
9c7e2978 RK |
2453 | /* Scan insns at THREAD. We are looking for an insn that can be removed |
2454 | from THREAD (it neither sets nor references resources that were set | |
2455 | ahead of it and it doesn't set anything needs by the insns ahead of | |
2456 | it) and that either can be placed in an annulling insn or aren't | |
2457 | needed at OPPOSITE_THREAD. */ | |
2458 | ||
2459 | CLEAR_RESOURCE (&needed); | |
2460 | CLEAR_RESOURCE (&set); | |
2461 | ||
2462 | /* If we do not own this thread, we must stop as soon as we find | |
2463 | something that we can't put in a delay slot, since all we can do | |
2464 | is branch into THREAD at a later point. Therefore, labels stop | |
2465 | the search if this is not the `true' thread. */ | |
2466 | ||
2467 | for (trial = thread; | |
2468 | ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread); | |
2469 | trial = next_nonnote_insn (trial)) | |
2470 | { | |
70011923 | 2471 | rtx pat, old_trial; |
9c7e2978 RK |
2472 | |
2473 | /* If we have passed a label, we no longer own this thread. */ | |
4b4bf941 | 2474 | if (LABEL_P (trial)) |
9c7e2978 RK |
2475 | { |
2476 | own_thread = 0; | |
2477 | continue; | |
2478 | } | |
2479 | ||
2480 | pat = PATTERN (trial); | |
2481 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
2482 | continue; | |
2483 | ||
2484 | /* If TRIAL conflicts with the insns ahead of it, we lose. Also, | |
2485 | don't separate or copy insns that set and use CC0. */ | |
675f99c9 ILT |
2486 | if (! insn_references_resource_p (trial, &set, true) |
2487 | && ! insn_sets_resource_p (trial, &set, true) | |
2488 | && ! insn_sets_resource_p (trial, &needed, true) | |
618f4073 TS |
2489 | && (!HAVE_cc0 || (! (reg_mentioned_p (cc0_rtx, pat) |
2490 | && (! own_thread || ! sets_cc0_p (pat))))) | |
1db828df | 2491 | && ! can_throw_internal (trial)) |
9c7e2978 | 2492 | { |
5317d2f8 RK |
2493 | rtx prior_insn; |
2494 | ||
9c7e2978 RK |
2495 | /* If TRIAL is redundant with some insn before INSN, we don't |
2496 | actually need to add it to the delay list; we can merely pretend | |
2497 | we did. */ | |
91a51951 | 2498 | if ((prior_insn = redundant_insn (trial, insn, delay_list))) |
9c7e2978 | 2499 | { |
c170c8c2 | 2500 | fix_reg_dead_note (prior_insn, insn); |
9c7e2978 RK |
2501 | if (own_thread) |
2502 | { | |
f1f9081a | 2503 | update_block (trial, thread); |
9bfe7965 | 2504 | if (trial == thread) |
8b11645c RK |
2505 | { |
2506 | thread = next_active_insn (thread); | |
2507 | if (new_thread == trial) | |
2508 | new_thread = thread; | |
2509 | } | |
9bfe7965 | 2510 | |
53c17031 | 2511 | delete_related_insns (trial); |
9c7e2978 RK |
2512 | } |
2513 | else | |
5317d2f8 RK |
2514 | { |
2515 | update_reg_unused_notes (prior_insn, trial); | |
088131ee | 2516 | new_thread = next_active_insn (trial); |
5317d2f8 | 2517 | } |
9c7e2978 RK |
2518 | |
2519 | continue; | |
2520 | } | |
2521 | ||
2522 | /* There are two ways we can win: If TRIAL doesn't set anything | |
2523 | needed at the opposite thread and can't trap, or if it can | |
c256f143 EB |
2524 | go into an annulled delay slot. But we want neither to copy |
2525 | nor to speculate frame-related insns. */ | |
96960d10 | 2526 | if (!must_annul |
c256f143 EB |
2527 | && ((condition == const_true_rtx |
2528 | && (own_thread || !RTX_FRAME_RELATED_P (trial))) | |
675f99c9 | 2529 | || (! insn_sets_resource_p (trial, &opposite_needed, true) |
243b92d1 TV |
2530 | && ! may_trap_or_fault_p (pat) |
2531 | && ! RTX_FRAME_RELATED_P (trial)))) | |
9c7e2978 | 2532 | { |
70011923 | 2533 | old_trial = trial; |
9c7e2978 | 2534 | trial = try_split (pat, trial, 0); |
70011923 ILT |
2535 | if (new_thread == old_trial) |
2536 | new_thread = trial; | |
9b9cd81b JW |
2537 | if (thread == old_trial) |
2538 | thread = trial; | |
9c7e2978 | 2539 | pat = PATTERN (trial); |
35523fce | 2540 | if (eligible_for_delay (insn, *pslots_filled, trial, flags)) |
9c7e2978 RK |
2541 | goto winner; |
2542 | } | |
2543 | else if (0 | |
2544 | #ifdef ANNUL_IFTRUE_SLOTS | |
2545 | || ! thread_if_true | |
2546 | #endif | |
2547 | #ifdef ANNUL_IFFALSE_SLOTS | |
2548 | || thread_if_true | |
2549 | #endif | |
2550 | ) | |
2551 | { | |
70011923 | 2552 | old_trial = trial; |
9c7e2978 | 2553 | trial = try_split (pat, trial, 0); |
70011923 ILT |
2554 | if (new_thread == old_trial) |
2555 | new_thread = trial; | |
760607e8 RK |
2556 | if (thread == old_trial) |
2557 | thread = trial; | |
9c7e2978 | 2558 | pat = PATTERN (trial); |
96960d10 HB |
2559 | if ((must_annul || delay_list == NULL) && (thread_if_true |
2560 | ? check_annul_list_true_false (0, delay_list) | |
2561 | && eligible_for_annul_false (insn, *pslots_filled, trial, flags) | |
2562 | : check_annul_list_true_false (1, delay_list) | |
2563 | && eligible_for_annul_true (insn, *pslots_filled, trial, flags))) | |
9c7e2978 | 2564 | { |
f8f0516e | 2565 | rtx_insn *temp; |
9c7e2978 RK |
2566 | |
2567 | must_annul = 1; | |
2568 | winner: | |
2569 | ||
058eb3b0 | 2570 | if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat)) |
9c7e2978 | 2571 | link_cc0_insns (trial); |
9c7e2978 RK |
2572 | |
2573 | /* If we own this thread, delete the insn. If this is the | |
2574 | destination of a branch, show that a basic block status | |
2575 | may have been updated. In any case, mark the new | |
2576 | starting point of this thread. */ | |
2577 | if (own_thread) | |
2578 | { | |
e41c7831 RH |
2579 | rtx note; |
2580 | ||
f1f9081a | 2581 | update_block (trial, thread); |
a7ad699e RK |
2582 | if (trial == thread) |
2583 | { | |
2584 | thread = next_active_insn (thread); | |
2585 | if (new_thread == trial) | |
2586 | new_thread = thread; | |
2587 | } | |
e41c7831 RH |
2588 | |
2589 | /* We are moving this insn, not deleting it. We must | |
2590 | temporarily increment the use count on any referenced | |
2591 | label lest it be deleted by delete_related_insns. */ | |
cf7c4aa6 | 2592 | for (note = REG_NOTES (trial); |
cb2f563b | 2593 | note != NULL_RTX; |
cf7c4aa6 HPN |
2594 | note = XEXP (note, 1)) |
2595 | if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND | |
2596 | || REG_NOTE_KIND (note) == REG_LABEL_TARGET) | |
2597 | { | |
2598 | /* REG_LABEL_OPERAND could be | |
2599 | NOTE_INSN_DELETED_LABEL too. */ | |
2600 | if (LABEL_P (XEXP (note, 0))) | |
2601 | LABEL_NUSES (XEXP (note, 0))++; | |
2602 | else | |
2603 | gcc_assert (REG_NOTE_KIND (note) | |
2604 | == REG_LABEL_OPERAND); | |
2605 | } | |
dc0ff1c8 | 2606 | if (jump_to_label_p (trial)) |
cb2f563b | 2607 | LABEL_NUSES (JUMP_LABEL (trial))++; |
e41c7831 | 2608 | |
53c17031 | 2609 | delete_related_insns (trial); |
e41c7831 | 2610 | |
cf7c4aa6 | 2611 | for (note = REG_NOTES (trial); |
cb2f563b | 2612 | note != NULL_RTX; |
cf7c4aa6 HPN |
2613 | note = XEXP (note, 1)) |
2614 | if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND | |
2615 | || REG_NOTE_KIND (note) == REG_LABEL_TARGET) | |
2616 | { | |
2617 | /* REG_LABEL_OPERAND could be | |
2618 | NOTE_INSN_DELETED_LABEL too. */ | |
2619 | if (LABEL_P (XEXP (note, 0))) | |
2620 | LABEL_NUSES (XEXP (note, 0))--; | |
2621 | else | |
2622 | gcc_assert (REG_NOTE_KIND (note) | |
2623 | == REG_LABEL_OPERAND); | |
2624 | } | |
dc0ff1c8 | 2625 | if (jump_to_label_p (trial)) |
cb2f563b | 2626 | LABEL_NUSES (JUMP_LABEL (trial))--; |
9c7e2978 RK |
2627 | } |
2628 | else | |
2629 | new_thread = next_active_insn (trial); | |
2630 | ||
8e383849 | 2631 | temp = own_thread ? trial : copy_delay_slot_insn (trial); |
9c7e2978 RK |
2632 | if (thread_if_true) |
2633 | INSN_FROM_TARGET_P (temp) = 1; | |
2634 | ||
2635 | delay_list = add_to_delay_list (temp, delay_list); | |
2636 | ||
2637 | if (slots_to_fill == ++(*pslots_filled)) | |
2638 | { | |
2639 | /* Even though we have filled all the slots, we | |
2640 | may be branching to a location that has a | |
2641 | redundant insn. Skip any if so. */ | |
2642 | while (new_thread && ! own_thread | |
675f99c9 ILT |
2643 | && ! insn_sets_resource_p (new_thread, &set, true) |
2644 | && ! insn_sets_resource_p (new_thread, &needed, | |
2645 | true) | |
9c7e2978 | 2646 | && ! insn_references_resource_p (new_thread, |
675f99c9 | 2647 | &set, true) |
f78c792c JL |
2648 | && (prior_insn |
2649 | = redundant_insn (new_thread, insn, | |
2650 | delay_list))) | |
2651 | { | |
2652 | /* We know we do not own the thread, so no need | |
2653 | to call update_block and delete_insn. */ | |
2654 | fix_reg_dead_note (prior_insn, insn); | |
2655 | update_reg_unused_notes (prior_insn, new_thread); | |
2656 | new_thread = next_active_insn (new_thread); | |
2657 | } | |
9c7e2978 RK |
2658 | break; |
2659 | } | |
2660 | ||
2661 | continue; | |
2662 | } | |
2663 | } | |
2664 | } | |
2665 | ||
2666 | /* This insn can't go into a delay slot. */ | |
2667 | lose = 1; | |
73780b74 | 2668 | mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL); |
675f99c9 | 2669 | mark_referenced_resources (trial, &needed, true); |
9c7e2978 RK |
2670 | |
2671 | /* Ensure we don't put insns between the setting of cc and the comparison | |
2672 | by moving a setting of cc into an earlier delay slot since these insns | |
2673 | could clobber the condition code. */ | |
2674 | set.cc = 1; | |
2675 | ||
2676 | /* If this insn is a register-register copy and the next insn has | |
2677 | a use of our destination, change it to use our source. That way, | |
2678 | it will become a candidate for our delay slot the next time | |
2679 | through this loop. This case occurs commonly in loops that | |
2680 | scan a list. | |
2681 | ||
2682 | We could check for more complex cases than those tested below, | |
2683 | but it doesn't seem worth it. It might also be a good idea to try | |
9b72fab4 RK |
2684 | to swap the two insns. That might do better. |
2685 | ||
963d6142 RK |
2686 | We can't do this if the next insn modifies our destination, because |
2687 | that would make the replacement into the insn invalid. We also can't | |
2688 | do this if it modifies our source, because it might be an earlyclobber | |
2689 | operand. This latter test also prevents updating the contents of | |
5a82c0b1 HPN |
2690 | a PRE_INC. We also can't do this if there's overlap of source and |
2691 | destination. Overlap may happen for larger-than-register-size modes. */ | |
9c7e2978 | 2692 | |
4b4bf941 | 2693 | if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET |
f8cfc6aa JQ |
2694 | && REG_P (SET_SRC (pat)) |
2695 | && REG_P (SET_DEST (pat)) | |
5a82c0b1 | 2696 | && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat))) |
9c7e2978 | 2697 | { |
21afc57d | 2698 | rtx_insn *next = next_nonnote_insn (trial); |
9c7e2978 | 2699 | |
4b4bf941 | 2700 | if (next && NONJUMP_INSN_P (next) |
9b72fab4 RK |
2701 | && GET_CODE (PATTERN (next)) != USE |
2702 | && ! reg_set_p (SET_DEST (pat), next) | |
963d6142 | 2703 | && ! reg_set_p (SET_SRC (pat), next) |
b746d31a TM |
2704 | && reg_referenced_p (SET_DEST (pat), PATTERN (next)) |
2705 | && ! modified_in_p (SET_DEST (pat), next)) | |
9c7e2978 RK |
2706 | validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next); |
2707 | } | |
2708 | } | |
2709 | ||
2710 | /* If we stopped on a branch insn that has delay slots, see if we can | |
2711 | steal some of the insns in those slots. */ | |
4b4bf941 | 2712 | if (trial && NONJUMP_INSN_P (trial) |
9c7e2978 | 2713 | && GET_CODE (PATTERN (trial)) == SEQUENCE |
4b4bf941 | 2714 | && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))) |
9c7e2978 | 2715 | { |
f8f0516e | 2716 | rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial)); |
9c7e2978 RK |
2717 | /* If this is the `true' thread, we will want to follow the jump, |
2718 | so we can only do this if we have taken everything up to here. */ | |
18e765cb | 2719 | if (thread_if_true && trial == new_thread) |
86c7007a HPN |
2720 | { |
2721 | delay_list | |
f8f0516e | 2722 | = steal_delay_list_from_target (insn, condition, sequence, |
86c7007a HPN |
2723 | delay_list, &set, &needed, |
2724 | &opposite_needed, slots_to_fill, | |
2725 | pslots_filled, &must_annul, | |
2726 | &new_thread); | |
2727 | /* If we owned the thread and are told that it branched | |
2728 | elsewhere, make sure we own the thread at the new location. */ | |
2729 | if (own_thread && trial != new_thread) | |
2730 | own_thread = own_thread_p (new_thread, new_thread, 0); | |
2731 | } | |
9c7e2978 RK |
2732 | else if (! thread_if_true) |
2733 | delay_list | |
2734 | = steal_delay_list_from_fallthrough (insn, condition, | |
f8f0516e | 2735 | sequence, |
9c7e2978 RK |
2736 | delay_list, &set, &needed, |
2737 | &opposite_needed, slots_to_fill, | |
2738 | pslots_filled, &must_annul); | |
2739 | } | |
2740 | ||
2741 | /* If we haven't found anything for this delay slot and it is very | |
2742 | likely that the branch will be taken, see if the insn at our target | |
d674b9e3 RK |
2743 | increments or decrements a register with an increment that does not |
2744 | depend on the destination register. If so, try to place the opposite | |
9c7e2978 RK |
2745 | arithmetic insn after the jump insn and put the arithmetic insn in the |
2746 | delay slot. If we can't do this, return. */ | |
dc0ff1c8 BS |
2747 | if (delay_list == 0 && likely |
2748 | && new_thread && !ANY_RETURN_P (new_thread) | |
4b4bf941 | 2749 | && NONJUMP_INSN_P (new_thread) |
4cb0fdbc | 2750 | && !RTX_FRAME_RELATED_P (new_thread) |
a0a7cb35 JL |
2751 | && GET_CODE (PATTERN (new_thread)) != ASM_INPUT |
2752 | && asm_noperands (PATTERN (new_thread)) < 0) | |
9c7e2978 RK |
2753 | { |
2754 | rtx pat = PATTERN (new_thread); | |
2755 | rtx dest; | |
2756 | rtx src; | |
2757 | ||
c3f14d55 DM |
2758 | /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread) |
2759 | above. */ | |
2760 | trial = as_a <rtx_insn *> (new_thread); | |
9c7e2978 RK |
2761 | pat = PATTERN (trial); |
2762 | ||
4b4bf941 | 2763 | if (!NONJUMP_INSN_P (trial) |
1db828df DM |
2764 | || GET_CODE (pat) != SET |
2765 | || ! eligible_for_delay (insn, 0, trial, flags) | |
2766 | || can_throw_internal (trial)) | |
9c7e2978 RK |
2767 | return 0; |
2768 | ||
2769 | dest = SET_DEST (pat), src = SET_SRC (pat); | |
2770 | if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS) | |
d674b9e3 | 2771 | && rtx_equal_p (XEXP (src, 0), dest) |
2b3969fa RS |
2772 | && (!FLOAT_MODE_P (GET_MODE (src)) |
2773 | || flag_unsafe_math_optimizations) | |
12d7e99c HPN |
2774 | && ! reg_overlap_mentioned_p (dest, XEXP (src, 1)) |
2775 | && ! side_effects_p (pat)) | |
9c7e2978 RK |
2776 | { |
2777 | rtx other = XEXP (src, 1); | |
2778 | rtx new_arith; | |
f8f0516e | 2779 | rtx_insn *ninsn; |
9c7e2978 RK |
2780 | |
2781 | /* If this is a constant adjustment, use the same code with | |
2782 | the negated constant. Otherwise, reverse the sense of the | |
2783 | arithmetic. */ | |
481683e1 | 2784 | if (CONST_INT_P (other)) |
38a448ca RH |
2785 | new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest, |
2786 | negate_rtx (GET_MODE (src), other)); | |
9c7e2978 | 2787 | else |
38a448ca RH |
2788 | new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS, |
2789 | GET_MODE (src), dest, other); | |
9c7e2978 | 2790 | |
f7df4a84 | 2791 | ninsn = emit_insn_after (gen_rtx_SET (dest, new_arith), insn); |
9c7e2978 RK |
2792 | |
2793 | if (recog_memoized (ninsn) < 0 | |
daca1a96 RS |
2794 | || (extract_insn (ninsn), |
2795 | !constrain_operands (1, get_preferred_alternatives (ninsn)))) | |
9c7e2978 | 2796 | { |
53c17031 | 2797 | delete_related_insns (ninsn); |
9c7e2978 RK |
2798 | return 0; |
2799 | } | |
2800 | ||
2801 | if (own_thread) | |
2802 | { | |
f1f9081a | 2803 | update_block (trial, thread); |
a7ad699e RK |
2804 | if (trial == thread) |
2805 | { | |
2806 | thread = next_active_insn (thread); | |
2807 | if (new_thread == trial) | |
2808 | new_thread = thread; | |
2809 | } | |
53c17031 | 2810 | delete_related_insns (trial); |
9c7e2978 RK |
2811 | } |
2812 | else | |
2813 | new_thread = next_active_insn (trial); | |
2814 | ||
8e383849 | 2815 | ninsn = own_thread ? trial : copy_delay_slot_insn (trial); |
9c7e2978 RK |
2816 | if (thread_if_true) |
2817 | INSN_FROM_TARGET_P (ninsn) = 1; | |
2818 | ||
f8f0516e | 2819 | delay_list = add_to_delay_list (ninsn, NULL); |
9c7e2978 RK |
2820 | (*pslots_filled)++; |
2821 | } | |
2822 | } | |
2823 | ||
2824 | if (delay_list && must_annul) | |
2825 | INSN_ANNULLED_BRANCH_P (insn) = 1; | |
2826 | ||
2827 | /* If we are to branch into the middle of this thread, find an appropriate | |
2828 | label or make a new one if none, and redirect INSN to it. If we hit the | |
2829 | end of the function, use the end-of-function label. */ | |
2830 | if (new_thread != thread) | |
2831 | { | |
2832 | rtx label; | |
4b4de898 | 2833 | bool crossing = false; |
9c7e2978 | 2834 | |
41374e13 | 2835 | gcc_assert (thread_if_true); |
9c7e2978 | 2836 | |
26898771 | 2837 | if (new_thread && simplejump_or_return_p (new_thread) |
b304ad47 JL |
2838 | && redirect_with_delay_list_safe_p (insn, |
2839 | JUMP_LABEL (new_thread), | |
2840 | delay_list)) | |
c3f14d55 | 2841 | new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, |
f8f0516e | 2842 | &crossing); |
9c7e2978 | 2843 | |
dc0ff1c8 | 2844 | if (ANY_RETURN_P (new_thread)) |
26898771 | 2845 | label = find_end_label (new_thread); |
4b4bf941 | 2846 | else if (LABEL_P (new_thread)) |
9c7e2978 RK |
2847 | label = new_thread; |
2848 | else | |
c3f14d55 DM |
2849 | label = get_label_before (as_a <rtx_insn *> (new_thread), |
2850 | JUMP_LABEL (insn)); | |
9c7e2978 | 2851 | |
b9185691 | 2852 | if (label) |
4b4de898 JR |
2853 | { |
2854 | reorg_redirect_jump (insn, label); | |
2855 | if (crossing) | |
339ba33b | 2856 | CROSSING_JUMP_P (insn) = 1; |
4b4de898 | 2857 | } |
9c7e2978 RK |
2858 | } |
2859 | ||
2860 | return delay_list; | |
2861 | } | |
2862 | \f | |
2863 | /* Make another attempt to find insns to place in delay slots. | |
2864 | ||
2865 | We previously looked for insns located in front of the delay insn | |
2866 | and, for non-jump delay insns, located behind the delay insn. | |
2867 | ||
2868 | Here only try to schedule jump insns and try to move insns from either | |
2869 | the target or the following insns into the delay slot. If annulling is | |
2870 | supported, we will be likely to do this. Otherwise, we can do this only | |
2871 | if safe. */ | |
2872 | ||
2873 | static void | |
0c20a65f | 2874 | fill_eager_delay_slots (void) |
9c7e2978 | 2875 | { |
f8f0516e | 2876 | rtx_insn *insn; |
b3694847 | 2877 | int i; |
9c7e2978 RK |
2878 | int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base; |
2879 | ||
2880 | for (i = 0; i < num_unfilled_slots; i++) | |
2881 | { | |
2882 | rtx condition; | |
c3f14d55 DM |
2883 | rtx target_label, insn_at_target; |
2884 | rtx_insn *fallthrough_insn; | |
f8f0516e | 2885 | rtx_insn_list *delay_list = 0; |
9c7e2978 RK |
2886 | int own_target; |
2887 | int own_fallthrough; | |
2888 | int prediction, slots_to_fill, slots_filled; | |
2889 | ||
2890 | insn = unfilled_slots_base[i]; | |
2891 | if (insn == 0 | |
4654c0cf | 2892 | || insn->deleted () |
4b4bf941 | 2893 | || !JUMP_P (insn) |
3480bb98 | 2894 | || ! (condjump_p (insn) || condjump_in_parallel_p (insn))) |
9c7e2978 RK |
2895 | continue; |
2896 | ||
2897 | slots_to_fill = num_delay_slots (insn); | |
c3a3b536 JL |
2898 | /* Some machine description have defined instructions to have |
2899 | delay slots only in certain circumstances which may depend on | |
2900 | nearby insns (which change due to reorg's actions). | |
2901 | ||
0c20a65f | 2902 | For example, the PA port normally has delay slots for unconditional |
c3a3b536 JL |
2903 | jumps. |
2904 | ||
2905 | However, the PA port claims such jumps do not have a delay slot | |
2906 | if they are immediate successors of certain CALL_INSNs. This | |
2907 | allows the port to favor filling the delay slot of the call with | |
2908 | the unconditional jump. */ | |
9c7e2978 | 2909 | if (slots_to_fill == 0) |
c5c76735 | 2910 | continue; |
9c7e2978 RK |
2911 | |
2912 | slots_filled = 0; | |
c3f14d55 | 2913 | target_label = JUMP_LABEL (insn); |
9c7e2978 RK |
2914 | condition = get_branch_condition (insn, target_label); |
2915 | ||
2916 | if (condition == 0) | |
2917 | continue; | |
2918 | ||
abc95ed3 | 2919 | /* Get the next active fallthrough and target insns and see if we own |
9c7e2978 RK |
2920 | them. Then see whether the branch is likely true. We don't need |
2921 | to do a lot of this for unconditional branches. */ | |
2922 | ||
dc0ff1c8 | 2923 | insn_at_target = first_active_target_insn (target_label); |
9c7e2978 RK |
2924 | own_target = own_thread_p (target_label, target_label, 0); |
2925 | ||
2926 | if (condition == const_true_rtx) | |
2927 | { | |
2928 | own_fallthrough = 0; | |
2929 | fallthrough_insn = 0; | |
2930 | prediction = 2; | |
2931 | } | |
2932 | else | |
2933 | { | |
2934 | fallthrough_insn = next_active_insn (insn); | |
fb3821f7 | 2935 | own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1); |
92cfe9d5 | 2936 | prediction = mostly_true_jump (insn); |
9c7e2978 RK |
2937 | } |
2938 | ||
2939 | /* If this insn is expected to branch, first try to get insns from our | |
0443f602 | 2940 | target, then our fallthrough insns. If it is not expected to branch, |
9c7e2978 RK |
2941 | try the other order. */ |
2942 | ||
0275a51b | 2943 | if (prediction > 0) |
9c7e2978 RK |
2944 | { |
2945 | delay_list | |
2946 | = fill_slots_from_thread (insn, condition, insn_at_target, | |
2947 | fallthrough_insn, prediction == 2, 1, | |
91a51951 | 2948 | own_target, |
ab63953e | 2949 | slots_to_fill, &slots_filled, delay_list); |
9c7e2978 RK |
2950 | |
2951 | if (delay_list == 0 && own_fallthrough) | |
2952 | { | |
2953 | /* Even though we didn't find anything for delay slots, | |
2954 | we might have found a redundant insn which we deleted | |
2955 | from the thread that was filled. So we have to recompute | |
2956 | the next insn at the target. */ | |
c3f14d55 | 2957 | target_label = JUMP_LABEL (insn); |
dc0ff1c8 | 2958 | insn_at_target = first_active_target_insn (target_label); |
9c7e2978 RK |
2959 | |
2960 | delay_list | |
2961 | = fill_slots_from_thread (insn, condition, fallthrough_insn, | |
2962 | insn_at_target, 0, 0, | |
91a51951 | 2963 | own_fallthrough, |
ab63953e JL |
2964 | slots_to_fill, &slots_filled, |
2965 | delay_list); | |
9c7e2978 RK |
2966 | } |
2967 | } | |
2968 | else | |
2969 | { | |
2970 | if (own_fallthrough) | |
2971 | delay_list | |
2972 | = fill_slots_from_thread (insn, condition, fallthrough_insn, | |
2973 | insn_at_target, 0, 0, | |
91a51951 | 2974 | own_fallthrough, |
d9f1e3da MH |
2975 | slots_to_fill, &slots_filled, |
2976 | delay_list); | |
9c7e2978 RK |
2977 | |
2978 | if (delay_list == 0) | |
2979 | delay_list | |
2980 | = fill_slots_from_thread (insn, condition, insn_at_target, | |
2981 | next_active_insn (insn), 0, 1, | |
91a51951 | 2982 | own_target, |
ab63953e JL |
2983 | slots_to_fill, &slots_filled, |
2984 | delay_list); | |
9c7e2978 RK |
2985 | } |
2986 | ||
2987 | if (delay_list) | |
2988 | unfilled_slots_base[i] | |
91a51951 | 2989 | = emit_delay_sequence (insn, delay_list, slots_filled); |
9c7e2978 RK |
2990 | |
2991 | if (slots_to_fill == slots_filled) | |
2992 | unfilled_slots_base[i] = 0; | |
2993 | ||
2994 | note_delay_statistics (slots_filled, 1); | |
2995 | } | |
2996 | } | |
c47277a6 PB |
2997 | \f |
2998 | static void delete_computation (rtx insn); | |
2999 | ||
3000 | /* Recursively delete prior insns that compute the value (used only by INSN | |
3001 | which the caller is deleting) stored in the register mentioned by NOTE | |
3002 | which is a REG_DEAD note associated with INSN. */ | |
3003 | ||
3004 | static void | |
3005 | delete_prior_computation (rtx note, rtx insn) | |
3006 | { | |
3007 | rtx our_prev; | |
3008 | rtx reg = XEXP (note, 0); | |
3009 | ||
3010 | for (our_prev = prev_nonnote_insn (insn); | |
3011 | our_prev && (NONJUMP_INSN_P (our_prev) | |
3012 | || CALL_P (our_prev)); | |
3013 | our_prev = prev_nonnote_insn (our_prev)) | |
3014 | { | |
3015 | rtx pat = PATTERN (our_prev); | |
3016 | ||
3017 | /* If we reach a CALL which is not calling a const function | |
3018 | or the callee pops the arguments, then give up. */ | |
3019 | if (CALL_P (our_prev) | |
becfd6e5 | 3020 | && (! RTL_CONST_CALL_P (our_prev) |
c47277a6 PB |
3021 | || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL)) |
3022 | break; | |
3023 | ||
3024 | /* If we reach a SEQUENCE, it is too complex to try to | |
3025 | do anything with it, so give up. We can be run during | |
3026 | and after reorg, so SEQUENCE rtl can legitimately show | |
3027 | up here. */ | |
3028 | if (GET_CODE (pat) == SEQUENCE) | |
3029 | break; | |
3030 | ||
3031 | if (GET_CODE (pat) == USE | |
3032 | && NONJUMP_INSN_P (XEXP (pat, 0))) | |
3033 | /* reorg creates USEs that look like this. We leave them | |
3034 | alone because reorg needs them for its own purposes. */ | |
3035 | break; | |
3036 | ||
3037 | if (reg_set_p (reg, pat)) | |
3038 | { | |
3039 | if (side_effects_p (pat) && !CALL_P (our_prev)) | |
3040 | break; | |
3041 | ||
3042 | if (GET_CODE (pat) == PARALLEL) | |
3043 | { | |
3044 | /* If we find a SET of something else, we can't | |
3045 | delete the insn. */ | |
3046 | ||
3047 | int i; | |
3048 | ||
3049 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3050 | { | |
3051 | rtx part = XVECEXP (pat, 0, i); | |
3052 | ||
3053 | if (GET_CODE (part) == SET | |
3054 | && SET_DEST (part) != reg) | |
3055 | break; | |
3056 | } | |
3057 | ||
3058 | if (i == XVECLEN (pat, 0)) | |
3059 | delete_computation (our_prev); | |
3060 | } | |
3061 | else if (GET_CODE (pat) == SET | |
3062 | && REG_P (SET_DEST (pat))) | |
3063 | { | |
3064 | int dest_regno = REGNO (SET_DEST (pat)); | |
09e18274 | 3065 | int dest_endregno = END_REGNO (SET_DEST (pat)); |
c47277a6 | 3066 | int regno = REGNO (reg); |
09e18274 | 3067 | int endregno = END_REGNO (reg); |
c47277a6 PB |
3068 | |
3069 | if (dest_regno >= regno | |
3070 | && dest_endregno <= endregno) | |
3071 | delete_computation (our_prev); | |
3072 | ||
3073 | /* We may have a multi-word hard register and some, but not | |
3074 | all, of the words of the register are needed in subsequent | |
3075 | insns. Write REG_UNUSED notes for those parts that were not | |
3076 | needed. */ | |
3077 | else if (dest_regno <= regno | |
3078 | && dest_endregno >= endregno) | |
3079 | { | |
3080 | int i; | |
3081 | ||
65c5f2a6 | 3082 | add_reg_note (our_prev, REG_UNUSED, reg); |
c47277a6 PB |
3083 | |
3084 | for (i = dest_regno; i < dest_endregno; i++) | |
3085 | if (! find_regno_note (our_prev, REG_UNUSED, i)) | |
3086 | break; | |
3087 | ||
3088 | if (i == dest_endregno) | |
3089 | delete_computation (our_prev); | |
3090 | } | |
3091 | } | |
3092 | ||
3093 | break; | |
3094 | } | |
3095 | ||
3096 | /* If PAT references the register that dies here, it is an | |
3097 | additional use. Hence any prior SET isn't dead. However, this | |
3098 | insn becomes the new place for the REG_DEAD note. */ | |
3099 | if (reg_overlap_mentioned_p (reg, pat)) | |
3100 | { | |
3101 | XEXP (note, 1) = REG_NOTES (our_prev); | |
3102 | REG_NOTES (our_prev) = note; | |
3103 | break; | |
3104 | } | |
3105 | } | |
3106 | } | |
3107 | ||
3108 | /* Delete INSN and recursively delete insns that compute values used only | |
3109 | by INSN. This uses the REG_DEAD notes computed during flow analysis. | |
c47277a6 | 3110 | |
912eb5a4 SB |
3111 | Look at all our REG_DEAD notes. If a previous insn does nothing other |
3112 | than set a register that dies in this insn, we can delete that insn | |
3113 | as well. | |
c47277a6 PB |
3114 | |
3115 | On machines with CC0, if CC0 is used in this insn, we may be able to | |
3116 | delete the insn that set it. */ | |
3117 | ||
3118 | static void | |
3119 | delete_computation (rtx insn) | |
3120 | { | |
3121 | rtx note, next; | |
3122 | ||
058eb3b0 | 3123 | if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn))) |
c47277a6 | 3124 | { |
21afc57d | 3125 | rtx_insn *prev = prev_nonnote_insn (insn); |
c47277a6 PB |
3126 | /* We assume that at this stage |
3127 | CC's are always set explicitly | |
3128 | and always immediately before the jump that | |
3129 | will use them. So if the previous insn | |
3130 | exists to set the CC's, delete it | |
3131 | (unless it performs auto-increments, etc.). */ | |
3132 | if (prev && NONJUMP_INSN_P (prev) | |
3133 | && sets_cc0_p (PATTERN (prev))) | |
3134 | { | |
3135 | if (sets_cc0_p (PATTERN (prev)) > 0 | |
3136 | && ! side_effects_p (PATTERN (prev))) | |
3137 | delete_computation (prev); | |
3138 | else | |
3139 | /* Otherwise, show that cc0 won't be used. */ | |
65c5f2a6 | 3140 | add_reg_note (prev, REG_UNUSED, cc0_rtx); |
c47277a6 PB |
3141 | } |
3142 | } | |
c47277a6 PB |
3143 | |
3144 | for (note = REG_NOTES (insn); note; note = next) | |
3145 | { | |
3146 | next = XEXP (note, 1); | |
3147 | ||
3148 | if (REG_NOTE_KIND (note) != REG_DEAD | |
3149 | /* Verify that the REG_NOTE is legitimate. */ | |
3150 | || !REG_P (XEXP (note, 0))) | |
3151 | continue; | |
3152 | ||
3153 | delete_prior_computation (note, insn); | |
3154 | } | |
3155 | ||
3156 | delete_related_insns (insn); | |
3157 | } | |
3158 | ||
3159 | /* If all INSN does is set the pc, delete it, | |
3160 | and delete the insn that set the condition codes for it | |
3161 | if that's what the previous thing was. */ | |
3162 | ||
3163 | static void | |
e8a54173 | 3164 | delete_jump (rtx_insn *insn) |
c47277a6 PB |
3165 | { |
3166 | rtx set = single_set (insn); | |
3167 | ||
3168 | if (set && GET_CODE (SET_DEST (set)) == PC) | |
3169 | delete_computation (insn); | |
3170 | } | |
3171 | ||
b32d5189 | 3172 | static rtx_insn * |
dbeee829 DM |
3173 | label_before_next_insn (rtx x, rtx scan_limit) |
3174 | { | |
b32d5189 | 3175 | rtx_insn *insn = next_active_insn (x); |
dbeee829 DM |
3176 | while (insn) |
3177 | { | |
3178 | insn = PREV_INSN (insn); | |
3179 | if (insn == scan_limit || insn == NULL_RTX) | |
b32d5189 | 3180 | return NULL; |
dbeee829 DM |
3181 | if (LABEL_P (insn)) |
3182 | break; | |
3183 | } | |
3184 | return insn; | |
3185 | } | |
3186 | ||
4897b529 KK |
3187 | /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between |
3188 | BEG and END. */ | |
3189 | ||
3190 | static bool | |
3191 | switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end) | |
3192 | { | |
3193 | const rtx_insn *p; | |
3194 | for (p = beg; p != end; p = NEXT_INSN (p)) | |
3195 | if (NOTE_P (p) && NOTE_KIND (p) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
3196 | return true; | |
3197 | return false; | |
3198 | } | |
3199 | ||
9c7e2978 RK |
3200 | \f |
3201 | /* Once we have tried two ways to fill a delay slot, make a pass over the | |
3202 | code to try to improve the results and to do such things as more jump | |
3203 | threading. */ | |
3204 | ||
3205 | static void | |
f8f0516e | 3206 | relax_delay_slots (rtx_insn *first) |
9c7e2978 | 3207 | { |
f8f0516e DM |
3208 | rtx_insn *insn, *next; |
3209 | rtx_sequence *pat; | |
c3f14d55 DM |
3210 | rtx trial; |
3211 | rtx_insn *delay_insn; | |
3212 | rtx target_label; | |
9c7e2978 RK |
3213 | |
3214 | /* Look at every JUMP_INSN and see if we can improve it. */ | |
3215 | for (insn = first; insn; insn = next) | |
3216 | { | |
b32d5189 | 3217 | rtx_insn *other; |
4b4de898 | 3218 | bool crossing; |
9c7e2978 RK |
3219 | |
3220 | next = next_active_insn (insn); | |
3221 | ||
3222 | /* If this is a jump insn, see if it now jumps to a jump, jumps to | |
3223 | the next insn, or jumps to a label that is not the last of a | |
3224 | group of consecutive labels. */ | |
4b4bf941 | 3225 | if (JUMP_P (insn) |
3480bb98 | 3226 | && (condjump_p (insn) || condjump_in_parallel_p (insn)) |
c3f14d55 | 3227 | && !ANY_RETURN_P (target_label = JUMP_LABEL (insn))) |
9c7e2978 | 3228 | { |
4b4de898 JR |
3229 | target_label |
3230 | = skip_consecutive_labels (follow_jumps (target_label, insn, | |
3231 | &crossing)); | |
dc0ff1c8 | 3232 | if (ANY_RETURN_P (target_label)) |
26898771 | 3233 | target_label = find_end_label (target_label); |
de5292c7 | 3234 | |
b9185691 | 3235 | if (target_label && next_active_insn (target_label) == next |
4897b529 KK |
3236 | && ! condjump_in_parallel_p (insn) |
3237 | && ! (next && switch_text_sections_between_p (insn, next))) | |
9c7e2978 RK |
3238 | { |
3239 | delete_jump (insn); | |
3240 | continue; | |
3241 | } | |
3242 | ||
b9185691 | 3243 | if (target_label && target_label != JUMP_LABEL (insn)) |
4b4de898 JR |
3244 | { |
3245 | reorg_redirect_jump (insn, target_label); | |
3246 | if (crossing) | |
339ba33b | 3247 | CROSSING_JUMP_P (insn) = 1; |
4b4de898 | 3248 | } |
9c7e2978 | 3249 | |
7a6b7528 JJ |
3250 | /* See if this jump conditionally branches around an unconditional |
3251 | jump. If so, invert this jump and point it to the target of the | |
4897b529 | 3252 | second jump. Check if it's possible on the target. */ |
26898771 | 3253 | if (next && simplejump_or_return_p (next) |
7a6b7528 | 3254 | && any_condjump_p (insn) |
b9185691 | 3255 | && target_label |
9c7e2978 | 3256 | && next_active_insn (target_label) == next_active_insn (next) |
4897b529 KK |
3257 | && no_labels_between_p (insn, next) |
3258 | && targetm.can_follow_jump (insn, next)) | |
9c7e2978 RK |
3259 | { |
3260 | rtx label = JUMP_LABEL (next); | |
3261 | ||
3262 | /* Be careful how we do this to avoid deleting code or | |
3263 | labels that are momentarily dead. See similar optimization | |
3264 | in jump.c. | |
3265 | ||
3266 | We also need to ensure we properly handle the case when | |
3267 | invert_jump fails. */ | |
3268 | ||
3269 | ++LABEL_NUSES (target_label); | |
dc0ff1c8 | 3270 | if (!ANY_RETURN_P (label)) |
9c7e2978 RK |
3271 | ++LABEL_NUSES (label); |
3272 | ||
9ba11d5a | 3273 | if (invert_jump (insn, label, 1)) |
9c7e2978 | 3274 | { |
53c17031 | 3275 | delete_related_insns (next); |
9c7e2978 RK |
3276 | next = insn; |
3277 | } | |
3278 | ||
dc0ff1c8 | 3279 | if (!ANY_RETURN_P (label)) |
9c7e2978 RK |
3280 | --LABEL_NUSES (label); |
3281 | ||
3282 | if (--LABEL_NUSES (target_label) == 0) | |
53c17031 | 3283 | delete_related_insns (target_label); |
9c7e2978 RK |
3284 | |
3285 | continue; | |
3286 | } | |
3287 | } | |
f27e6bb2 | 3288 | |
9c7e2978 RK |
3289 | /* If this is an unconditional jump and the previous insn is a |
3290 | conditional jump, try reversing the condition of the previous | |
3291 | insn and swapping our targets. The next pass might be able to | |
3292 | fill the slots. | |
3293 | ||
3294 | Don't do this if we expect the conditional branch to be true, because | |
3295 | we would then be making the more common case longer. */ | |
3296 | ||
26898771 | 3297 | if (simplejump_or_return_p (insn) |
9c7e2978 | 3298 | && (other = prev_active_insn (insn)) != 0 |
7a6b7528 | 3299 | && any_condjump_p (other) |
9c7e2978 | 3300 | && no_labels_between_p (other, insn) |
92cfe9d5 | 3301 | && 0 > mostly_true_jump (other)) |
9c7e2978 RK |
3302 | { |
3303 | rtx other_target = JUMP_LABEL (other); | |
c3f14d55 | 3304 | target_label = JUMP_LABEL (insn); |
9c7e2978 | 3305 | |
9ba11d5a | 3306 | if (invert_jump (other, target_label, 0)) |
326f06f7 | 3307 | reorg_redirect_jump (insn, other_target); |
9c7e2978 RK |
3308 | } |
3309 | ||
b7dcf38f EB |
3310 | /* Now look only at cases where we have a filled delay slot. */ |
3311 | if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE) | |
9c7e2978 RK |
3312 | continue; |
3313 | ||
f8f0516e DM |
3314 | pat = as_a <rtx_sequence *> (PATTERN (insn)); |
3315 | delay_insn = pat->insn (0); | |
9c7e2978 RK |
3316 | |
3317 | /* See if the first insn in the delay slot is redundant with some | |
3318 | previous insn. Remove it from the delay slot if so; then set up | |
3319 | to reprocess this insn. */ | |
f8f0516e | 3320 | if (redundant_insn (pat->insn (1), delay_insn, 0)) |
9c7e2978 | 3321 | { |
f8f0516e DM |
3322 | update_block (pat->insn (1), insn); |
3323 | delete_from_delay_slot (pat->insn (1)); | |
9c7e2978 RK |
3324 | next = prev_active_insn (next); |
3325 | continue; | |
3326 | } | |
3327 | ||
9f5a2691 JL |
3328 | /* See if we have a RETURN insn with a filled delay slot followed |
3329 | by a RETURN insn with an unfilled a delay slot. If so, we can delete | |
d1a6adeb | 3330 | the first RETURN (but not its delay insn). This gives the same |
9f5a2691 JL |
3331 | effect in fewer instructions. |
3332 | ||
3333 | Only do so if optimizing for size since this results in slower, but | |
3334 | smaller code. */ | |
efd8f750 | 3335 | if (optimize_function_for_size_p (cfun) |
26898771 | 3336 | && ANY_RETURN_P (PATTERN (delay_insn)) |
9f5a2691 | 3337 | && next |
4b4bf941 | 3338 | && JUMP_P (next) |
26898771 | 3339 | && PATTERN (next) == PATTERN (delay_insn)) |
9f5a2691 | 3340 | { |
a1950df3 | 3341 | rtx_insn *after; |
9f5a2691 JL |
3342 | int i; |
3343 | ||
3344 | /* Delete the RETURN and just execute the delay list insns. | |
3345 | ||
3346 | We do this by deleting the INSN containing the SEQUENCE, then | |
3347 | re-emitting the insns separately, and then deleting the RETURN. | |
3348 | This allows the count of the jump target to be properly | |
9fa07b13 | 3349 | decremented. |
9f5a2691 | 3350 | |
9fa07b13 EB |
3351 | Note that we need to change the INSN_UID of the re-emitted insns |
3352 | since it is used to hash the insns for mark_target_live_regs and | |
3353 | the re-emitted insns will no longer be wrapped up in a SEQUENCE. | |
3354 | ||
3355 | Clear the from target bit, since these insns are no longer | |
9f5a2691 JL |
3356 | in delay slots. */ |
3357 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3358 | INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0; | |
3359 | ||
3360 | trial = PREV_INSN (insn); | |
53c17031 | 3361 | delete_related_insns (insn); |
41374e13 | 3362 | gcc_assert (GET_CODE (pat) == SEQUENCE); |
9fa07b13 EB |
3363 | add_insn_after (delay_insn, trial, NULL); |
3364 | after = delay_insn; | |
a1950df3 DM |
3365 | for (i = 1; i < pat->len (); i++) |
3366 | after = emit_copy_of_insn_after (pat->insn (i), after); | |
9f5a2691 JL |
3367 | delete_scheduled_jump (delay_insn); |
3368 | continue; | |
3369 | } | |
3370 | ||
9c7e2978 | 3371 | /* Now look only at the cases where we have a filled JUMP_INSN. */ |
b7dcf38f EB |
3372 | if (!JUMP_P (delay_insn) |
3373 | || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn))) | |
9c7e2978 RK |
3374 | continue; |
3375 | ||
c3f14d55 | 3376 | target_label = JUMP_LABEL (delay_insn); |
26898771 BS |
3377 | if (target_label && ANY_RETURN_P (target_label)) |
3378 | continue; | |
9c7e2978 | 3379 | |
26898771 BS |
3380 | /* If this jump goes to another unconditional jump, thread it, but |
3381 | don't convert a jump into a RETURN here. */ | |
4b4de898 JR |
3382 | trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn, |
3383 | &crossing)); | |
26898771 BS |
3384 | if (ANY_RETURN_P (trial)) |
3385 | trial = find_end_label (trial); | |
9c7e2978 | 3386 | |
26898771 BS |
3387 | if (trial && trial != target_label |
3388 | && redirect_with_delay_slots_safe_p (delay_insn, trial, insn)) | |
3389 | { | |
3390 | reorg_redirect_jump (delay_insn, trial); | |
3391 | target_label = trial; | |
4b4de898 | 3392 | if (crossing) |
339ba33b | 3393 | CROSSING_JUMP_P (insn) = 1; |
26898771 | 3394 | } |
eed04dff | 3395 | |
26898771 BS |
3396 | /* If the first insn at TARGET_LABEL is redundant with a previous |
3397 | insn, redirect the jump to the following insn and process again. | |
3398 | We use next_real_insn instead of next_active_insn so we | |
3399 | don't skip USE-markers, or we'll end up with incorrect | |
3400 | liveness info. */ | |
3401 | trial = next_real_insn (target_label); | |
3402 | if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE | |
3403 | && redundant_insn (trial, insn, 0) | |
3404 | && ! can_throw_internal (trial)) | |
3405 | { | |
3406 | /* Figure out where to emit the special USE insn so we don't | |
3407 | later incorrectly compute register live/death info. */ | |
b32d5189 | 3408 | rtx_insn *tmp = next_active_insn (trial); |
26898771 BS |
3409 | if (tmp == 0) |
3410 | tmp = find_end_label (simple_return_rtx); | |
eed04dff | 3411 | |
26898771 BS |
3412 | if (tmp) |
3413 | { | |
c3f14d55 DM |
3414 | /* Insert the special USE insn and update dataflow info. |
3415 | We know "trial" is an insn here as it is the output of | |
3416 | next_real_insn () above. */ | |
3417 | update_block (as_a <rtx_insn *> (trial), tmp); | |
26898771 BS |
3418 | |
3419 | /* Now emit a label before the special USE insn, and | |
3420 | redirect our jump to the new label. */ | |
5cf6635b | 3421 | target_label = get_label_before (PREV_INSN (tmp), target_label); |
26898771 BS |
3422 | reorg_redirect_jump (delay_insn, target_label); |
3423 | next = insn; | |
3424 | continue; | |
9c7e2978 | 3425 | } |
26898771 | 3426 | } |
9c7e2978 | 3427 | |
26898771 BS |
3428 | /* Similarly, if it is an unconditional jump with one insn in its |
3429 | delay list and that insn is redundant, thread the jump. */ | |
45700b6a DM |
3430 | rtx_sequence *trial_seq = |
3431 | trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL; | |
3432 | if (trial_seq | |
3433 | && trial_seq->len () == 2 | |
3434 | && JUMP_P (trial_seq->insn (0)) | |
3435 | && simplejump_or_return_p (trial_seq->insn (0)) | |
3436 | && redundant_insn (trial_seq->insn (1), insn, 0)) | |
26898771 | 3437 | { |
c3f14d55 | 3438 | target_label = JUMP_LABEL (trial_seq->insn (0)); |
26898771 BS |
3439 | if (ANY_RETURN_P (target_label)) |
3440 | target_label = find_end_label (target_label); | |
3441 | ||
3442 | if (target_label | |
3443 | && redirect_with_delay_slots_safe_p (delay_insn, target_label, | |
3444 | insn)) | |
9c7e2978 | 3445 | { |
f8f0516e | 3446 | update_block (trial_seq->insn (1), insn); |
26898771 BS |
3447 | reorg_redirect_jump (delay_insn, target_label); |
3448 | next = insn; | |
3449 | continue; | |
9c7e2978 RK |
3450 | } |
3451 | } | |
3452 | ||
b168ced9 | 3453 | /* See if we have a simple (conditional) jump that is useless. */ |
9c7e2978 | 3454 | if (! INSN_ANNULLED_BRANCH_P (delay_insn) |
3480bb98 | 3455 | && ! condjump_in_parallel_p (delay_insn) |
b168ced9 EB |
3456 | && prev_active_insn (target_label) == insn |
3457 | && ! BARRIER_P (prev_nonnote_insn (target_label)) | |
f1e52ed6 | 3458 | #if HAVE_cc0 |
9c7e2978 RK |
3459 | /* If the last insn in the delay slot sets CC0 for some insn, |
3460 | various code assumes that it is in a delay slot. We could | |
3461 | put it back where it belonged and delete the register notes, | |
6dc42e49 | 3462 | but it doesn't seem worthwhile in this uncommon case. */ |
9c7e2978 | 3463 | && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1), |
fb3821f7 | 3464 | REG_CC_USER, NULL_RTX) |
9c7e2978 RK |
3465 | #endif |
3466 | ) | |
3467 | { | |
a1950df3 | 3468 | rtx_insn *after; |
ac224823 RK |
3469 | int i; |
3470 | ||
9c7e2978 RK |
3471 | /* All this insn does is execute its delay list and jump to the |
3472 | following insn. So delete the jump and just execute the delay | |
3473 | list insns. | |
3474 | ||
3475 | We do this by deleting the INSN containing the SEQUENCE, then | |
3476 | re-emitting the insns separately, and then deleting the jump. | |
3477 | This allows the count of the jump target to be properly | |
9fa07b13 | 3478 | decremented. |
9c7e2978 | 3479 | |
9fa07b13 EB |
3480 | Note that we need to change the INSN_UID of the re-emitted insns |
3481 | since it is used to hash the insns for mark_target_live_regs and | |
3482 | the re-emitted insns will no longer be wrapped up in a SEQUENCE. | |
3483 | ||
3484 | Clear the from target bit, since these insns are no longer | |
ac224823 RK |
3485 | in delay slots. */ |
3486 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
3487 | INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0; | |
3488 | ||
9c7e2978 | 3489 | trial = PREV_INSN (insn); |
53c17031 | 3490 | delete_related_insns (insn); |
41374e13 | 3491 | gcc_assert (GET_CODE (pat) == SEQUENCE); |
9fa07b13 EB |
3492 | add_insn_after (delay_insn, trial, NULL); |
3493 | after = delay_insn; | |
a1950df3 DM |
3494 | for (i = 1; i < pat->len (); i++) |
3495 | after = emit_copy_of_insn_after (pat->insn (i), after); | |
9c7e2978 RK |
3496 | delete_scheduled_jump (delay_insn); |
3497 | continue; | |
3498 | } | |
3499 | ||
51ec2375 JW |
3500 | /* See if this is an unconditional jump around a single insn which is |
3501 | identical to the one in its delay slot. In this case, we can just | |
3502 | delete the branch and the insn in its delay slot. */ | |
4b4bf941 | 3503 | if (next && NONJUMP_INSN_P (next) |
dbeee829 | 3504 | && label_before_next_insn (next, insn) == target_label |
51ec2375 JW |
3505 | && simplejump_p (insn) |
3506 | && XVECLEN (pat, 0) == 2 | |
f8f0516e | 3507 | && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1)))) |
51ec2375 | 3508 | { |
53c17031 | 3509 | delete_related_insns (insn); |
51ec2375 JW |
3510 | continue; |
3511 | } | |
3512 | ||
105ebae8 EB |
3513 | /* See if this jump (with its delay slots) conditionally branches |
3514 | around an unconditional jump (without delay slots). If so, invert | |
3515 | this jump and point it to the target of the second jump. We cannot | |
3516 | do this for annulled jumps, though. Again, don't convert a jump to | |
3517 | a RETURN here. */ | |
9c7e2978 | 3518 | if (! INSN_ANNULLED_BRANCH_P (delay_insn) |
4cdc2a35 | 3519 | && any_condjump_p (delay_insn) |
26898771 | 3520 | && next && simplejump_or_return_p (next) |
9c7e2978 RK |
3521 | && next_active_insn (target_label) == next_active_insn (next) |
3522 | && no_labels_between_p (insn, next)) | |
3523 | { | |
3524 | rtx label = JUMP_LABEL (next); | |
3525 | rtx old_label = JUMP_LABEL (delay_insn); | |
3526 | ||
dc0ff1c8 | 3527 | if (ANY_RETURN_P (label)) |
26898771 | 3528 | label = find_end_label (label); |
9c7e2978 | 3529 | |
bf6302f0 | 3530 | /* find_end_label can generate a new label. Check this first. */ |
b9185691 EB |
3531 | if (label |
3532 | && no_labels_between_p (insn, next) | |
bf6302f0 | 3533 | && redirect_with_delay_slots_safe_p (delay_insn, label, insn)) |
9c7e2978 | 3534 | { |
83fd5651 JL |
3535 | /* Be careful how we do this to avoid deleting code or labels |
3536 | that are momentarily dead. See similar optimization in | |
3537 | jump.c */ | |
3538 | if (old_label) | |
3539 | ++LABEL_NUSES (old_label); | |
9c7e2978 | 3540 | |
9ba11d5a | 3541 | if (invert_jump (delay_insn, label, 1)) |
83fd5651 | 3542 | { |
9e8b2461 RK |
3543 | int i; |
3544 | ||
3545 | /* Must update the INSN_FROM_TARGET_P bits now that | |
3546 | the branch is reversed, so that mark_target_live_regs | |
3547 | will handle the delay slot insn correctly. */ | |
3548 | for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++) | |
3549 | { | |
3550 | rtx slot = XVECEXP (PATTERN (insn), 0, i); | |
3551 | INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot); | |
3552 | } | |
3553 | ||
53c17031 | 3554 | delete_related_insns (next); |
83fd5651 JL |
3555 | next = insn; |
3556 | } | |
3557 | ||
3558 | if (old_label && --LABEL_NUSES (old_label) == 0) | |
53c17031 | 3559 | delete_related_insns (old_label); |
83fd5651 JL |
3560 | continue; |
3561 | } | |
9c7e2978 RK |
3562 | } |
3563 | ||
3564 | /* If we own the thread opposite the way this insn branches, see if we | |
3565 | can merge its delay slots with following insns. */ | |
f8f0516e | 3566 | if (INSN_FROM_TARGET_P (pat->insn (1)) |
9c7e2978 RK |
3567 | && own_thread_p (NEXT_INSN (insn), 0, 1)) |
3568 | try_merge_delay_insns (insn, next); | |
f8f0516e | 3569 | else if (! INSN_FROM_TARGET_P (pat->insn (1)) |
9c7e2978 RK |
3570 | && own_thread_p (target_label, target_label, 0)) |
3571 | try_merge_delay_insns (insn, next_active_insn (target_label)); | |
3572 | ||
3573 | /* If we get here, we haven't deleted INSN. But we may have deleted | |
3574 | NEXT, so recompute it. */ | |
3575 | next = next_active_insn (insn); | |
3576 | } | |
3577 | } | |
3578 | \f | |
9c7e2978 RK |
3579 | |
3580 | /* Look for filled jumps to the end of function label. We can try to convert | |
3581 | them into RETURN insns if the insns in the delay slot are valid for the | |
3582 | RETURN as well. */ | |
3583 | ||
3584 | static void | |
b32d5189 | 3585 | make_return_insns (rtx_insn *first) |
9c7e2978 | 3586 | { |
b32d5189 DM |
3587 | rtx_insn *insn; |
3588 | rtx_insn *jump_insn; | |
26898771 BS |
3589 | rtx real_return_label = function_return_label; |
3590 | rtx real_simple_return_label = function_simple_return_label; | |
9c7e2978 RK |
3591 | int slots, i; |
3592 | ||
3593 | /* See if there is a RETURN insn in the function other than the one we | |
3594 | made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change | |
3595 | into a RETURN to jump to it. */ | |
3596 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
26898771 | 3597 | if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn))) |
9c7e2978 | 3598 | { |
5cf6635b | 3599 | rtx t = get_label_before (insn, NULL_RTX); |
26898771 BS |
3600 | if (PATTERN (insn) == ret_rtx) |
3601 | real_return_label = t; | |
3602 | else | |
3603 | real_simple_return_label = t; | |
9c7e2978 RK |
3604 | break; |
3605 | } | |
f27e6bb2 | 3606 | |
9c7e2978 RK |
3607 | /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it |
3608 | was equal to END_OF_FUNCTION_LABEL. */ | |
26898771 BS |
3609 | if (real_return_label) |
3610 | LABEL_NUSES (real_return_label)++; | |
3611 | if (real_simple_return_label) | |
3612 | LABEL_NUSES (real_simple_return_label)++; | |
9c7e2978 RK |
3613 | |
3614 | /* Clear the list of insns to fill so we can use it. */ | |
3615 | obstack_free (&unfilled_slots_obstack, unfilled_firstobj); | |
3616 | ||
3617 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
3618 | { | |
35523fce | 3619 | int flags; |
26898771 | 3620 | rtx kind, real_label; |
35523fce | 3621 | |
9c7e2978 RK |
3622 | /* Only look at filled JUMP_INSNs that go to the end of function |
3623 | label. */ | |
68a1a6c0 | 3624 | if (!NONJUMP_INSN_P (insn)) |
26898771 BS |
3625 | continue; |
3626 | ||
68a1a6c0 DM |
3627 | if (GET_CODE (PATTERN (insn)) != SEQUENCE) |
3628 | continue; | |
3629 | ||
3630 | rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn)); | |
3631 | ||
3632 | if (!jump_to_label_p (pat->insn (0))) | |
3633 | continue; | |
3634 | ||
3635 | if (JUMP_LABEL (pat->insn (0)) == function_return_label) | |
26898771 BS |
3636 | { |
3637 | kind = ret_rtx; | |
3638 | real_label = real_return_label; | |
3639 | } | |
68a1a6c0 | 3640 | else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label) |
26898771 BS |
3641 | { |
3642 | kind = simple_return_rtx; | |
3643 | real_label = real_simple_return_label; | |
3644 | } | |
3645 | else | |
9c7e2978 RK |
3646 | continue; |
3647 | ||
b32d5189 | 3648 | jump_insn = pat->insn (0); |
9c7e2978 | 3649 | |
18beb3e9 | 3650 | /* If we can't make the jump into a RETURN, try to redirect it to the best |
9c7e2978 | 3651 | RETURN and go on to the next insn. */ |
26898771 | 3652 | if (!reorg_redirect_jump (jump_insn, kind)) |
9c7e2978 | 3653 | { |
18beb3e9 JL |
3654 | /* Make sure redirecting the jump will not invalidate the delay |
3655 | slot insns. */ | |
26898771 BS |
3656 | if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn)) |
3657 | reorg_redirect_jump (jump_insn, real_label); | |
9c7e2978 RK |
3658 | continue; |
3659 | } | |
3660 | ||
3661 | /* See if this RETURN can accept the insns current in its delay slot. | |
3662 | It can if it has more or an equal number of slots and the contents | |
3663 | of each is valid. */ | |
3664 | ||
35523fce | 3665 | flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn)); |
9c7e2978 RK |
3666 | slots = num_delay_slots (jump_insn); |
3667 | if (slots >= XVECLEN (pat, 0) - 1) | |
3668 | { | |
3669 | for (i = 1; i < XVECLEN (pat, 0); i++) | |
3670 | if (! ( | |
3671 | #ifdef ANNUL_IFFALSE_SLOTS | |
3672 | (INSN_ANNULLED_BRANCH_P (jump_insn) | |
b32d5189 | 3673 | && INSN_FROM_TARGET_P (pat->insn (i))) |
9c7e2978 | 3674 | ? eligible_for_annul_false (jump_insn, i - 1, |
b32d5189 | 3675 | pat->insn (i), flags) : |
9c7e2978 RK |
3676 | #endif |
3677 | #ifdef ANNUL_IFTRUE_SLOTS | |
3678 | (INSN_ANNULLED_BRANCH_P (jump_insn) | |
b32d5189 | 3679 | && ! INSN_FROM_TARGET_P (pat->insn (i))) |
9c7e2978 | 3680 | ? eligible_for_annul_true (jump_insn, i - 1, |
b32d5189 | 3681 | pat->insn (i), flags) : |
9c7e2978 | 3682 | #endif |
f27e6bb2 | 3683 | eligible_for_delay (jump_insn, i - 1, |
b32d5189 | 3684 | pat->insn (i), flags))) |
9c7e2978 RK |
3685 | break; |
3686 | } | |
3687 | else | |
3688 | i = 0; | |
3689 | ||
3690 | if (i == XVECLEN (pat, 0)) | |
3691 | continue; | |
3692 | ||
3693 | /* We have to do something with this insn. If it is an unconditional | |
3694 | RETURN, delete the SEQUENCE and output the individual insns, | |
3695 | followed by the RETURN. Then set things up so we try to find | |
3696 | insns for its delay slots, if it needs some. */ | |
26898771 | 3697 | if (ANY_RETURN_P (PATTERN (jump_insn))) |
9c7e2978 | 3698 | { |
b32d5189 | 3699 | rtx_insn *prev = PREV_INSN (insn); |
9c7e2978 | 3700 | |
53c17031 | 3701 | delete_related_insns (insn); |
9c7e2978 RK |
3702 | for (i = 1; i < XVECLEN (pat, 0); i++) |
3703 | prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev); | |
3704 | ||
3705 | insn = emit_jump_insn_after (PATTERN (jump_insn), prev); | |
3706 | emit_barrier_after (insn); | |
3707 | ||
3708 | if (slots) | |
3709 | obstack_ptr_grow (&unfilled_slots_obstack, insn); | |
3710 | } | |
3711 | else | |
3712 | /* It is probably more efficient to keep this with its current | |
3713 | delay slot as a branch to a RETURN. */ | |
26898771 | 3714 | reorg_redirect_jump (jump_insn, real_label); |
9c7e2978 RK |
3715 | } |
3716 | ||
3717 | /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any | |
3718 | new delay slots we have created. */ | |
26898771 | 3719 | if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0) |
53c17031 | 3720 | delete_related_insns (real_return_label); |
26898771 BS |
3721 | if (real_simple_return_label != NULL_RTX |
3722 | && --LABEL_NUSES (real_simple_return_label) == 0) | |
3723 | delete_related_insns (real_simple_return_label); | |
9c7e2978 | 3724 | |
91a51951 KG |
3725 | fill_simple_delay_slots (1); |
3726 | fill_simple_delay_slots (0); | |
9c7e2978 | 3727 | } |
9c7e2978 RK |
3728 | \f |
3729 | /* Try to find insns to place in delay slots. */ | |
3730 | ||
fb0d5c60 | 3731 | static void |
f8f0516e | 3732 | dbr_schedule (rtx_insn *first) |
9c7e2978 | 3733 | { |
f8f0516e | 3734 | rtx_insn *insn, *next, *epilogue_insn = 0; |
9c7e2978 | 3735 | int i; |
26898771 | 3736 | bool need_return_insns; |
9c7e2978 | 3737 | |
f27e6bb2 | 3738 | /* If the current function has no insns other than the prologue and |
c3b80729 | 3739 | epilogue, then do not try to fill any delay slots. */ |
0cae8d31 | 3740 | if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS) |
c3b80729 JL |
3741 | return; |
3742 | ||
9c7e2978 RK |
3743 | /* Find the highest INSN_UID and allocate and initialize our map from |
3744 | INSN_UID's to position in code. */ | |
3745 | for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn)) | |
7bd80f37 TW |
3746 | { |
3747 | if (INSN_UID (insn) > max_uid) | |
3748 | max_uid = INSN_UID (insn); | |
4b4bf941 | 3749 | if (NOTE_P (insn) |
a38e7aa5 | 3750 | && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG) |
7bd80f37 TW |
3751 | epilogue_insn = insn; |
3752 | } | |
9c7e2978 | 3753 | |
5ead67f6 | 3754 | uid_to_ruid = XNEWVEC (int, max_uid + 1); |
9c7e2978 RK |
3755 | for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn)) |
3756 | uid_to_ruid[INSN_UID (insn)] = i; | |
f27e6bb2 | 3757 | |
9c7e2978 RK |
3758 | /* Initialize the list of insns that need filling. */ |
3759 | if (unfilled_firstobj == 0) | |
3760 | { | |
3761 | gcc_obstack_init (&unfilled_slots_obstack); | |
5ead67f6 | 3762 | unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0); |
9c7e2978 RK |
3763 | } |
3764 | ||
3765 | for (insn = next_active_insn (first); insn; insn = next_active_insn (insn)) | |
3766 | { | |
3767 | rtx target; | |
3768 | ||
9c7e2978 | 3769 | /* Skip vector tables. We can't get attributes for them. */ |
481683e1 | 3770 | if (JUMP_TABLE_DATA_P (insn)) |
9c7e2978 | 3771 | continue; |
f27e6bb2 | 3772 | |
39718607 SB |
3773 | if (JUMP_P (insn)) |
3774 | INSN_ANNULLED_BRANCH_P (insn) = 0; | |
3775 | INSN_FROM_TARGET_P (insn) = 0; | |
3776 | ||
9c7e2978 RK |
3777 | if (num_delay_slots (insn) > 0) |
3778 | obstack_ptr_grow (&unfilled_slots_obstack, insn); | |
3779 | ||
3780 | /* Ensure all jumps go to the last of a set of consecutive labels. */ | |
4b4bf941 | 3781 | if (JUMP_P (insn) |
3480bb98 | 3782 | && (condjump_p (insn) || condjump_in_parallel_p (insn)) |
dc0ff1c8 | 3783 | && !ANY_RETURN_P (JUMP_LABEL (insn)) |
c3f14d55 | 3784 | && ((target = skip_consecutive_labels (JUMP_LABEL (insn))) |
9c7e2978 | 3785 | != JUMP_LABEL (insn))) |
9ba11d5a | 3786 | redirect_jump (insn, target, 1); |
9c7e2978 RK |
3787 | } |
3788 | ||
ca545bb5 | 3789 | init_resource_info (epilogue_insn); |
7bd80f37 | 3790 | |
9c7e2978 | 3791 | /* Show we haven't computed an end-of-function label yet. */ |
f8f0516e | 3792 | function_return_label = function_simple_return_label = NULL; |
9c7e2978 | 3793 | |
9c7e2978 | 3794 | /* Initialize the statistics for this function. */ |
703ad42b KG |
3795 | memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays); |
3796 | memset (num_filled_delays, 0, sizeof num_filled_delays); | |
9c7e2978 RK |
3797 | |
3798 | /* Now do the delay slot filling. Try everything twice in case earlier | |
3799 | changes make more slots fillable. */ | |
3800 | ||
3801 | for (reorg_pass_number = 0; | |
3802 | reorg_pass_number < MAX_REORG_PASSES; | |
3803 | reorg_pass_number++) | |
3804 | { | |
91a51951 KG |
3805 | fill_simple_delay_slots (1); |
3806 | fill_simple_delay_slots (0); | |
3807 | fill_eager_delay_slots (); | |
9c7e2978 RK |
3808 | relax_delay_slots (first); |
3809 | } | |
3810 | ||
9c7e2978 RK |
3811 | /* If we made an end of function label, indicate that it is now |
3812 | safe to delete it by undoing our prior adjustment to LABEL_NUSES. | |
3813 | If it is now unused, delete it. */ | |
26898771 BS |
3814 | if (function_return_label && --LABEL_NUSES (function_return_label) == 0) |
3815 | delete_related_insns (function_return_label); | |
3816 | if (function_simple_return_label | |
3817 | && --LABEL_NUSES (function_simple_return_label) == 0) | |
3818 | delete_related_insns (function_simple_return_label); | |
9c7e2978 | 3819 | |
26898771 | 3820 | need_return_insns = false; |
26898771 | 3821 | need_return_insns |= HAVE_return && function_return_label != 0; |
26898771 | 3822 | need_return_insns |= HAVE_simple_return && function_simple_return_label != 0; |
26898771 BS |
3823 | if (need_return_insns) |
3824 | make_return_insns (first); | |
9c7e2978 | 3825 | |
74567c2c JH |
3826 | /* Delete any USE insns made by update_block; subsequent passes don't need |
3827 | them or know how to deal with them. */ | |
3828 | for (insn = first; insn; insn = next) | |
3829 | { | |
3830 | next = NEXT_INSN (insn); | |
3831 | ||
3832 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE | |
3833 | && INSN_P (XEXP (PATTERN (insn), 0))) | |
3834 | next = delete_related_insns (insn); | |
3835 | } | |
3836 | ||
9c7e2978 RK |
3837 | obstack_free (&unfilled_slots_obstack, unfilled_firstobj); |
3838 | ||
3839 | /* It is not clear why the line below is needed, but it does seem to be. */ | |
5ead67f6 | 3840 | unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0); |
9c7e2978 | 3841 | |
1d60e59e | 3842 | if (dump_file) |
9c7e2978 | 3843 | { |
b3694847 | 3844 | int i, j, need_comma; |
2e02044a HB |
3845 | int total_delay_slots[MAX_DELAY_HISTOGRAM + 1]; |
3846 | int total_annul_slots[MAX_DELAY_HISTOGRAM + 1]; | |
9c7e2978 RK |
3847 | |
3848 | for (reorg_pass_number = 0; | |
3849 | reorg_pass_number < MAX_REORG_PASSES; | |
3850 | reorg_pass_number++) | |
3851 | { | |
1d60e59e | 3852 | fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1); |
9c7e2978 RK |
3853 | for (i = 0; i < NUM_REORG_FUNCTIONS; i++) |
3854 | { | |
3855 | need_comma = 0; | |
1d60e59e | 3856 | fprintf (dump_file, ";; Reorg function #%d\n", i); |
9c7e2978 | 3857 | |
1d60e59e | 3858 | fprintf (dump_file, ";; %d insns needing delay slots\n;; ", |
9c7e2978 RK |
3859 | num_insns_needing_delays[i][reorg_pass_number]); |
3860 | ||
2e02044a | 3861 | for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++) |
9c7e2978 RK |
3862 | if (num_filled_delays[i][j][reorg_pass_number]) |
3863 | { | |
3864 | if (need_comma) | |
1d60e59e | 3865 | fprintf (dump_file, ", "); |
9c7e2978 | 3866 | need_comma = 1; |
1d60e59e | 3867 | fprintf (dump_file, "%d got %d delays", |
9c7e2978 RK |
3868 | num_filled_delays[i][j][reorg_pass_number], j); |
3869 | } | |
1d60e59e | 3870 | fprintf (dump_file, "\n"); |
9c7e2978 RK |
3871 | } |
3872 | } | |
703ad42b KG |
3873 | memset (total_delay_slots, 0, sizeof total_delay_slots); |
3874 | memset (total_annul_slots, 0, sizeof total_annul_slots); | |
2e02044a HB |
3875 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
3876 | { | |
4654c0cf | 3877 | if (! insn->deleted () |
4b4bf941 | 3878 | && NONJUMP_INSN_P (insn) |
2e02044a HB |
3879 | && GET_CODE (PATTERN (insn)) != USE |
3880 | && GET_CODE (PATTERN (insn)) != CLOBBER) | |
3881 | { | |
3882 | if (GET_CODE (PATTERN (insn)) == SEQUENCE) | |
3883 | { | |
8f06d483 | 3884 | rtx control; |
2e02044a HB |
3885 | j = XVECLEN (PATTERN (insn), 0) - 1; |
3886 | if (j > MAX_DELAY_HISTOGRAM) | |
3887 | j = MAX_DELAY_HISTOGRAM; | |
8f06d483 RH |
3888 | control = XVECEXP (PATTERN (insn), 0, 0); |
3889 | if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control)) | |
2e02044a HB |
3890 | total_annul_slots[j]++; |
3891 | else | |
3892 | total_delay_slots[j]++; | |
3893 | } | |
f27e6bb2 | 3894 | else if (num_delay_slots (insn) > 0) |
2e02044a HB |
3895 | total_delay_slots[0]++; |
3896 | } | |
3897 | } | |
1d60e59e | 3898 | fprintf (dump_file, ";; Reorg totals: "); |
2e02044a HB |
3899 | need_comma = 0; |
3900 | for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++) | |
3901 | { | |
3902 | if (total_delay_slots[j]) | |
3903 | { | |
3904 | if (need_comma) | |
1d60e59e | 3905 | fprintf (dump_file, ", "); |
2e02044a | 3906 | need_comma = 1; |
1d60e59e | 3907 | fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j); |
2e02044a HB |
3908 | } |
3909 | } | |
1d60e59e | 3910 | fprintf (dump_file, "\n"); |
2e02044a | 3911 | #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS) |
1d60e59e | 3912 | fprintf (dump_file, ";; Reorg annuls: "); |
2e02044a HB |
3913 | need_comma = 0; |
3914 | for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++) | |
3915 | { | |
3916 | if (total_annul_slots[j]) | |
3917 | { | |
3918 | if (need_comma) | |
1d60e59e | 3919 | fprintf (dump_file, ", "); |
2e02044a | 3920 | need_comma = 1; |
1d60e59e | 3921 | fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j); |
2e02044a HB |
3922 | } |
3923 | } | |
1d60e59e | 3924 | fprintf (dump_file, "\n"); |
2e02044a | 3925 | #endif |
1d60e59e | 3926 | fprintf (dump_file, "\n"); |
9c7e2978 | 3927 | } |
c107334d | 3928 | |
5cf6635b EB |
3929 | if (!sibling_labels.is_empty ()) |
3930 | { | |
3931 | update_alignments (sibling_labels); | |
3932 | sibling_labels.release (); | |
3933 | } | |
3934 | ||
ca545bb5 | 3935 | free_resource_info (); |
67289ea6 | 3936 | free (uid_to_ruid); |
84b9b872 | 3937 | crtl->dbr_scheduled_p = true; |
9c7e2978 RK |
3938 | } |
3939 | #endif /* DELAY_SLOTS */ | |
ef330312 | 3940 | \f |
ef330312 | 3941 | /* Run delay slot optimization. */ |
c2924966 | 3942 | static unsigned int |
ef330312 PB |
3943 | rest_of_handle_delay_slots (void) |
3944 | { | |
3945 | #ifdef DELAY_SLOTS | |
10d22567 | 3946 | dbr_schedule (get_insns ()); |
ef330312 | 3947 | #endif |
c2924966 | 3948 | return 0; |
6fb5fa3c | 3949 | } |
ef330312 | 3950 | |
27a4cd48 DM |
3951 | namespace { |
3952 | ||
3953 | const pass_data pass_data_delay_slots = | |
ef330312 | 3954 | { |
27a4cd48 DM |
3955 | RTL_PASS, /* type */ |
3956 | "dbr", /* name */ | |
3957 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
3958 | TV_DBR_SCHED, /* tv_id */ |
3959 | 0, /* properties_required */ | |
3960 | 0, /* properties_provided */ | |
3961 | 0, /* properties_destroyed */ | |
3962 | 0, /* todo_flags_start */ | |
3963 | 0, /* todo_flags_finish */ | |
ef330312 PB |
3964 | }; |
3965 | ||
27a4cd48 DM |
3966 | class pass_delay_slots : public rtl_opt_pass |
3967 | { | |
3968 | public: | |
c3284718 RS |
3969 | pass_delay_slots (gcc::context *ctxt) |
3970 | : rtl_opt_pass (pass_data_delay_slots, ctxt) | |
27a4cd48 DM |
3971 | {} |
3972 | ||
3973 | /* opt_pass methods: */ | |
1a3d085c | 3974 | virtual bool gate (function *); |
be55bfe6 TS |
3975 | virtual unsigned int execute (function *) |
3976 | { | |
3977 | return rest_of_handle_delay_slots (); | |
3978 | } | |
27a4cd48 DM |
3979 | |
3980 | }; // class pass_delay_slots | |
3981 | ||
1a3d085c TS |
3982 | bool |
3983 | pass_delay_slots::gate (function *) | |
3984 | { | |
3985 | #ifdef DELAY_SLOTS | |
3986 | /* At -O0 dataflow info isn't updated after RA. */ | |
3987 | return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p; | |
3988 | #else | |
3989 | return 0; | |
3990 | #endif | |
3991 | } | |
3992 | ||
27a4cd48 DM |
3993 | } // anon namespace |
3994 | ||
3995 | rtl_opt_pass * | |
3996 | make_pass_delay_slots (gcc::context *ctxt) | |
3997 | { | |
3998 | return new pass_delay_slots (ctxt); | |
3999 | } | |
4000 | ||
ef330312 | 4001 | /* Machine dependent reorg pass. */ |
ef330312 | 4002 | |
27a4cd48 DM |
4003 | namespace { |
4004 | ||
4005 | const pass_data pass_data_machine_reorg = | |
ef330312 | 4006 | { |
27a4cd48 DM |
4007 | RTL_PASS, /* type */ |
4008 | "mach", /* name */ | |
4009 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4010 | TV_MACH_DEP, /* tv_id */ |
4011 | 0, /* properties_required */ | |
4012 | 0, /* properties_provided */ | |
4013 | 0, /* properties_destroyed */ | |
4014 | 0, /* todo_flags_start */ | |
4015 | 0, /* todo_flags_finish */ | |
ef330312 | 4016 | }; |
27a4cd48 DM |
4017 | |
4018 | class pass_machine_reorg : public rtl_opt_pass | |
4019 | { | |
4020 | public: | |
c3284718 RS |
4021 | pass_machine_reorg (gcc::context *ctxt) |
4022 | : rtl_opt_pass (pass_data_machine_reorg, ctxt) | |
27a4cd48 DM |
4023 | {} |
4024 | ||
4025 | /* opt_pass methods: */ | |
1a3d085c TS |
4026 | virtual bool gate (function *) |
4027 | { | |
4028 | return targetm.machine_dependent_reorg != 0; | |
4029 | } | |
4030 | ||
be55bfe6 TS |
4031 | virtual unsigned int execute (function *) |
4032 | { | |
4033 | targetm.machine_dependent_reorg (); | |
4034 | return 0; | |
4035 | } | |
27a4cd48 DM |
4036 | |
4037 | }; // class pass_machine_reorg | |
4038 | ||
4039 | } // anon namespace | |
4040 | ||
4041 | rtl_opt_pass * | |
4042 | make_pass_machine_reorg (gcc::context *ctxt) | |
4043 | { | |
4044 | return new pass_machine_reorg (ctxt); | |
4045 | } |