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2c88418c | 1 | /* Analyze RTL for C-Compiler |
af841dbd | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
f759eb8b | 3 | 1999, 2000, 2001 Free Software Foundation, Inc. |
2c88418c RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
e99215a3 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
2c88418c RS |
21 | |
22 | ||
23 | #include "config.h" | |
670ee920 | 24 | #include "system.h" |
e35b9579 | 25 | #include "toplev.h" |
2c88418c | 26 | #include "rtl.h" |
3335f1d9 | 27 | #include "hard-reg-set.h" |
2c88418c | 28 | |
e2373f95 | 29 | /* Forward declarations */ |
91b2d119 | 30 | static void set_of_1 PARAMS ((rtx, rtx, void *)); |
4eb00163 | 31 | static void insn_dependent_p_1 PARAMS ((rtx, rtx, void *)); |
fce7e199 | 32 | static int computed_jump_p_1 PARAMS ((rtx)); |
e5c56fd9 | 33 | static int operand_preference PARAMS ((rtx)); |
2a1777af | 34 | |
2c88418c RS |
35 | /* Bit flags that specify the machine subtype we are compiling for. |
36 | Bits are tested using macros TARGET_... defined in the tm.h file | |
37 | and set by `-m...' switches. Must be defined in rtlanal.c. */ | |
38 | ||
39 | int target_flags; | |
40 | \f | |
41 | /* Return 1 if the value of X is unstable | |
42 | (would be different at a different point in the program). | |
43 | The frame pointer, arg pointer, etc. are considered stable | |
44 | (within one function) and so is anything marked `unchanging'. */ | |
45 | ||
46 | int | |
47 | rtx_unstable_p (x) | |
48 | rtx x; | |
49 | { | |
50 | register RTX_CODE code = GET_CODE (x); | |
51 | register int i; | |
6f7d635c | 52 | register const char *fmt; |
2c88418c | 53 | |
ae0fb1b9 JW |
54 | switch (code) |
55 | { | |
56 | case MEM: | |
57 | return ! RTX_UNCHANGING_P (x) || rtx_unstable_p (XEXP (x, 0)); | |
2c88418c | 58 | |
ae0fb1b9 JW |
59 | case QUEUED: |
60 | return 1; | |
2c88418c | 61 | |
ae0fb1b9 JW |
62 | case CONST: |
63 | case CONST_INT: | |
64 | case CONST_DOUBLE: | |
65 | case SYMBOL_REF: | |
66 | case LABEL_REF: | |
67 | return 0; | |
2c88418c | 68 | |
ae0fb1b9 JW |
69 | case REG: |
70 | /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ | |
c0fc376b | 71 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
3335f1d9 JL |
72 | /* The arg pointer varies if it is not a fixed register. */ |
73 | || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) | |
74 | || RTX_UNCHANGING_P (x)) | |
c0fc376b RH |
75 | return 0; |
76 | #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED | |
77 | /* ??? When call-clobbered, the value is stable modulo the restore | |
78 | that must happen after a call. This currently screws up local-alloc | |
79 | into believing that the restore is not needed. */ | |
80 | if (x == pic_offset_table_rtx) | |
81 | return 0; | |
82 | #endif | |
83 | return 1; | |
ae0fb1b9 JW |
84 | |
85 | case ASM_OPERANDS: | |
86 | if (MEM_VOLATILE_P (x)) | |
87 | return 1; | |
88 | ||
89 | /* FALLTHROUGH */ | |
90 | ||
91 | default: | |
92 | break; | |
93 | } | |
2c88418c RS |
94 | |
95 | fmt = GET_RTX_FORMAT (code); | |
96 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
97 | if (fmt[i] == 'e') | |
9c82ac6b JW |
98 | { |
99 | if (rtx_unstable_p (XEXP (x, i))) | |
100 | return 1; | |
101 | } | |
102 | else if (fmt[i] == 'E') | |
103 | { | |
104 | int j; | |
105 | for (j = 0; j < XVECLEN (x, i); j++) | |
106 | if (rtx_unstable_p (XVECEXP (x, i, j))) | |
107 | return 1; | |
108 | } | |
109 | ||
2c88418c RS |
110 | return 0; |
111 | } | |
112 | ||
113 | /* Return 1 if X has a value that can vary even between two | |
114 | executions of the program. 0 means X can be compared reliably | |
115 | against certain constants or near-constants. | |
e38fe8e0 BS |
116 | FOR_ALIAS is nonzero if we are called from alias analysis; if it is |
117 | zero, we are slightly more conservative. | |
2c88418c RS |
118 | The frame pointer and the arg pointer are considered constant. */ |
119 | ||
120 | int | |
e38fe8e0 | 121 | rtx_varies_p (x, for_alias) |
2c88418c | 122 | rtx x; |
e38fe8e0 | 123 | int for_alias; |
2c88418c RS |
124 | { |
125 | register RTX_CODE code = GET_CODE (x); | |
126 | register int i; | |
6f7d635c | 127 | register const char *fmt; |
2c88418c RS |
128 | |
129 | switch (code) | |
130 | { | |
131 | case MEM: | |
e38fe8e0 | 132 | return ! RTX_UNCHANGING_P (x) || rtx_varies_p (XEXP (x, 0), for_alias); |
55efb413 | 133 | |
2c88418c RS |
134 | case QUEUED: |
135 | return 1; | |
136 | ||
137 | case CONST: | |
138 | case CONST_INT: | |
139 | case CONST_DOUBLE: | |
140 | case SYMBOL_REF: | |
141 | case LABEL_REF: | |
142 | return 0; | |
143 | ||
144 | case REG: | |
145 | /* Note that we have to test for the actual rtx used for the frame | |
146 | and arg pointers and not just the register number in case we have | |
147 | eliminated the frame and/or arg pointer and are using it | |
148 | for pseudos. */ | |
c0fc376b | 149 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
3335f1d9 JL |
150 | /* The arg pointer varies if it is not a fixed register. */ |
151 | || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])) | |
c0fc376b | 152 | return 0; |
e38fe8e0 BS |
153 | if (x == pic_offset_table_rtx |
154 | #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED | |
155 | /* ??? When call-clobbered, the value is stable modulo the restore | |
156 | that must happen after a call. This currently screws up | |
157 | local-alloc into believing that the restore is not needed, so we | |
158 | must return 0 only if we are called from alias analysis. */ | |
159 | && for_alias | |
c0fc376b | 160 | #endif |
e38fe8e0 BS |
161 | ) |
162 | return 0; | |
c0fc376b | 163 | return 1; |
2c88418c RS |
164 | |
165 | case LO_SUM: | |
166 | /* The operand 0 of a LO_SUM is considered constant | |
e7d96a83 JW |
167 | (in fact it is related specifically to operand 1) |
168 | during alias analysis. */ | |
169 | return (! for_alias && rtx_varies_p (XEXP (x, 0), for_alias)) | |
170 | || rtx_varies_p (XEXP (x, 1), for_alias); | |
e9a25f70 | 171 | |
ae0fb1b9 JW |
172 | case ASM_OPERANDS: |
173 | if (MEM_VOLATILE_P (x)) | |
174 | return 1; | |
175 | ||
176 | /* FALLTHROUGH */ | |
177 | ||
e9a25f70 JL |
178 | default: |
179 | break; | |
2c88418c RS |
180 | } |
181 | ||
182 | fmt = GET_RTX_FORMAT (code); | |
183 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
184 | if (fmt[i] == 'e') | |
9c82ac6b | 185 | { |
e38fe8e0 | 186 | if (rtx_varies_p (XEXP (x, i), for_alias)) |
9c82ac6b JW |
187 | return 1; |
188 | } | |
189 | else if (fmt[i] == 'E') | |
190 | { | |
191 | int j; | |
192 | for (j = 0; j < XVECLEN (x, i); j++) | |
e38fe8e0 | 193 | if (rtx_varies_p (XVECEXP (x, i, j), for_alias)) |
9c82ac6b JW |
194 | return 1; |
195 | } | |
196 | ||
2c88418c RS |
197 | return 0; |
198 | } | |
199 | ||
200 | /* Return 0 if the use of X as an address in a MEM can cause a trap. */ | |
201 | ||
e38fe8e0 | 202 | int |
2c88418c RS |
203 | rtx_addr_can_trap_p (x) |
204 | register rtx x; | |
205 | { | |
206 | register enum rtx_code code = GET_CODE (x); | |
207 | ||
208 | switch (code) | |
209 | { | |
210 | case SYMBOL_REF: | |
ff0b6b99 FS |
211 | return SYMBOL_REF_WEAK (x); |
212 | ||
2c88418c | 213 | case LABEL_REF: |
2c88418c RS |
214 | return 0; |
215 | ||
216 | case REG: | |
217 | /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ | |
4f73495e RH |
218 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
219 | || x == stack_pointer_rtx | |
220 | /* The arg pointer varies if it is not a fixed register. */ | |
221 | || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])) | |
222 | return 0; | |
223 | /* All of the virtual frame registers are stack references. */ | |
224 | if (REGNO (x) >= FIRST_VIRTUAL_REGISTER | |
225 | && REGNO (x) <= LAST_VIRTUAL_REGISTER) | |
226 | return 0; | |
227 | return 1; | |
2c88418c RS |
228 | |
229 | case CONST: | |
230 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
231 | ||
232 | case PLUS: | |
233 | /* An address is assumed not to trap if it is an address that can't | |
55efb413 JW |
234 | trap plus a constant integer or it is the pic register plus a |
235 | constant. */ | |
236 | return ! ((! rtx_addr_can_trap_p (XEXP (x, 0)) | |
237 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
238 | || (XEXP (x, 0) == pic_offset_table_rtx | |
239 | && CONSTANT_P (XEXP (x, 1)))); | |
2c88418c RS |
240 | |
241 | case LO_SUM: | |
4f73495e | 242 | case PRE_MODIFY: |
2c88418c | 243 | return rtx_addr_can_trap_p (XEXP (x, 1)); |
4f73495e RH |
244 | |
245 | case PRE_DEC: | |
246 | case PRE_INC: | |
247 | case POST_DEC: | |
248 | case POST_INC: | |
249 | case POST_MODIFY: | |
250 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
251 | ||
e9a25f70 JL |
252 | default: |
253 | break; | |
2c88418c RS |
254 | } |
255 | ||
256 | /* If it isn't one of the case above, it can cause a trap. */ | |
257 | return 1; | |
258 | } | |
259 | ||
260 | /* Return 1 if X refers to a memory location whose address | |
261 | cannot be compared reliably with constant addresses, | |
e38fe8e0 BS |
262 | or if X refers to a BLKmode memory object. |
263 | FOR_ALIAS is nonzero if we are called from alias analysis; if it is | |
264 | zero, we are slightly more conservative. */ | |
2c88418c RS |
265 | |
266 | int | |
e38fe8e0 | 267 | rtx_addr_varies_p (x, for_alias) |
2c88418c | 268 | rtx x; |
e38fe8e0 | 269 | int for_alias; |
2c88418c RS |
270 | { |
271 | register enum rtx_code code; | |
272 | register int i; | |
6f7d635c | 273 | register const char *fmt; |
2c88418c RS |
274 | |
275 | if (x == 0) | |
276 | return 0; | |
277 | ||
278 | code = GET_CODE (x); | |
279 | if (code == MEM) | |
e38fe8e0 | 280 | return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0), for_alias); |
2c88418c RS |
281 | |
282 | fmt = GET_RTX_FORMAT (code); | |
283 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
284 | if (fmt[i] == 'e') | |
833c0b26 | 285 | { |
e38fe8e0 | 286 | if (rtx_addr_varies_p (XEXP (x, i), for_alias)) |
833c0b26 RK |
287 | return 1; |
288 | } | |
289 | else if (fmt[i] == 'E') | |
290 | { | |
291 | int j; | |
292 | for (j = 0; j < XVECLEN (x, i); j++) | |
e38fe8e0 | 293 | if (rtx_addr_varies_p (XVECEXP (x, i, j), for_alias)) |
833c0b26 RK |
294 | return 1; |
295 | } | |
2c88418c RS |
296 | return 0; |
297 | } | |
298 | \f | |
299 | /* Return the value of the integer term in X, if one is apparent; | |
300 | otherwise return 0. | |
301 | Only obvious integer terms are detected. | |
302 | This is used in cse.c with the `related_value' field.*/ | |
303 | ||
c166a311 | 304 | HOST_WIDE_INT |
2c88418c RS |
305 | get_integer_term (x) |
306 | rtx x; | |
307 | { | |
308 | if (GET_CODE (x) == CONST) | |
309 | x = XEXP (x, 0); | |
310 | ||
311 | if (GET_CODE (x) == MINUS | |
312 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
313 | return - INTVAL (XEXP (x, 1)); | |
314 | if (GET_CODE (x) == PLUS | |
315 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
316 | return INTVAL (XEXP (x, 1)); | |
317 | return 0; | |
318 | } | |
319 | ||
320 | /* If X is a constant, return the value sans apparent integer term; | |
321 | otherwise return 0. | |
322 | Only obvious integer terms are detected. */ | |
323 | ||
324 | rtx | |
325 | get_related_value (x) | |
326 | rtx x; | |
327 | { | |
328 | if (GET_CODE (x) != CONST) | |
329 | return 0; | |
330 | x = XEXP (x, 0); | |
331 | if (GET_CODE (x) == PLUS | |
332 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
333 | return XEXP (x, 0); | |
334 | else if (GET_CODE (x) == MINUS | |
335 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
336 | return XEXP (x, 0); | |
337 | return 0; | |
338 | } | |
339 | \f | |
4b983fdc RH |
340 | /* Return the number of places FIND appears within X. If COUNT_DEST is |
341 | zero, we do not count occurrences inside the destination of a SET. */ | |
342 | ||
343 | int | |
344 | count_occurrences (x, find, count_dest) | |
345 | rtx x, find; | |
346 | int count_dest; | |
347 | { | |
348 | int i, j; | |
349 | enum rtx_code code; | |
350 | const char *format_ptr; | |
351 | int count; | |
352 | ||
353 | if (x == find) | |
354 | return 1; | |
355 | ||
356 | code = GET_CODE (x); | |
357 | ||
358 | switch (code) | |
359 | { | |
360 | case REG: | |
361 | case CONST_INT: | |
362 | case CONST_DOUBLE: | |
363 | case SYMBOL_REF: | |
364 | case CODE_LABEL: | |
365 | case PC: | |
366 | case CC0: | |
367 | return 0; | |
368 | ||
369 | case MEM: | |
370 | if (GET_CODE (find) == MEM && rtx_equal_p (x, find)) | |
371 | return 1; | |
372 | break; | |
373 | ||
374 | case SET: | |
375 | if (SET_DEST (x) == find && ! count_dest) | |
376 | return count_occurrences (SET_SRC (x), find, count_dest); | |
377 | break; | |
378 | ||
379 | default: | |
380 | break; | |
381 | } | |
382 | ||
383 | format_ptr = GET_RTX_FORMAT (code); | |
384 | count = 0; | |
385 | ||
386 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
387 | { | |
388 | switch (*format_ptr++) | |
389 | { | |
390 | case 'e': | |
391 | count += count_occurrences (XEXP (x, i), find, count_dest); | |
392 | break; | |
393 | ||
394 | case 'E': | |
395 | for (j = 0; j < XVECLEN (x, i); j++) | |
396 | count += count_occurrences (XVECEXP (x, i, j), find, count_dest); | |
397 | break; | |
398 | } | |
399 | } | |
400 | return count; | |
401 | } | |
402 | \f | |
2c88418c RS |
403 | /* Nonzero if register REG appears somewhere within IN. |
404 | Also works if REG is not a register; in this case it checks | |
405 | for a subexpression of IN that is Lisp "equal" to REG. */ | |
406 | ||
407 | int | |
408 | reg_mentioned_p (reg, in) | |
409 | register rtx reg, in; | |
410 | { | |
6f7d635c | 411 | register const char *fmt; |
2c88418c RS |
412 | register int i; |
413 | register enum rtx_code code; | |
414 | ||
415 | if (in == 0) | |
416 | return 0; | |
417 | ||
418 | if (reg == in) | |
419 | return 1; | |
420 | ||
421 | if (GET_CODE (in) == LABEL_REF) | |
422 | return reg == XEXP (in, 0); | |
423 | ||
424 | code = GET_CODE (in); | |
425 | ||
426 | switch (code) | |
427 | { | |
428 | /* Compare registers by number. */ | |
429 | case REG: | |
430 | return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); | |
431 | ||
432 | /* These codes have no constituent expressions | |
433 | and are unique. */ | |
434 | case SCRATCH: | |
435 | case CC0: | |
436 | case PC: | |
437 | return 0; | |
438 | ||
439 | case CONST_INT: | |
440 | return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); | |
441 | ||
442 | case CONST_DOUBLE: | |
443 | /* These are kept unique for a given value. */ | |
444 | return 0; | |
e9a25f70 JL |
445 | |
446 | default: | |
447 | break; | |
2c88418c RS |
448 | } |
449 | ||
450 | if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) | |
451 | return 1; | |
452 | ||
453 | fmt = GET_RTX_FORMAT (code); | |
454 | ||
455 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
456 | { | |
457 | if (fmt[i] == 'E') | |
458 | { | |
459 | register int j; | |
460 | for (j = XVECLEN (in, i) - 1; j >= 0; j--) | |
461 | if (reg_mentioned_p (reg, XVECEXP (in, i, j))) | |
462 | return 1; | |
463 | } | |
464 | else if (fmt[i] == 'e' | |
465 | && reg_mentioned_p (reg, XEXP (in, i))) | |
466 | return 1; | |
467 | } | |
468 | return 0; | |
469 | } | |
470 | \f | |
471 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is | |
472 | no CODE_LABEL insn. */ | |
473 | ||
474 | int | |
475 | no_labels_between_p (beg, end) | |
476 | rtx beg, end; | |
477 | { | |
478 | register rtx p; | |
479 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
480 | if (GET_CODE (p) == CODE_LABEL) | |
481 | return 0; | |
482 | return 1; | |
483 | } | |
484 | ||
3ec2b590 R |
485 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is |
486 | no JUMP_INSN insn. */ | |
487 | ||
488 | int | |
489 | no_jumps_between_p (beg, end) | |
490 | rtx beg, end; | |
491 | { | |
492 | register rtx p; | |
493 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
494 | if (GET_CODE (p) == JUMP_INSN) | |
495 | return 0; | |
496 | return 1; | |
497 | } | |
498 | ||
2c88418c RS |
499 | /* Nonzero if register REG is used in an insn between |
500 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
501 | ||
502 | int | |
503 | reg_used_between_p (reg, from_insn, to_insn) | |
504 | rtx reg, from_insn, to_insn; | |
505 | { | |
506 | register rtx insn; | |
507 | ||
508 | if (from_insn == to_insn) | |
509 | return 0; | |
510 | ||
511 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 512 | if (INSN_P (insn) |
8f3e7a26 RK |
513 | && (reg_overlap_mentioned_p (reg, PATTERN (insn)) |
514 | || (GET_CODE (insn) == CALL_INSN | |
515 | && (find_reg_fusage (insn, USE, reg) | |
516 | || find_reg_fusage (insn, CLOBBER, reg))))) | |
2c88418c RS |
517 | return 1; |
518 | return 0; | |
519 | } | |
520 | \f | |
521 | /* Nonzero if the old value of X, a register, is referenced in BODY. If X | |
522 | is entirely replaced by a new value and the only use is as a SET_DEST, | |
523 | we do not consider it a reference. */ | |
524 | ||
525 | int | |
526 | reg_referenced_p (x, body) | |
527 | rtx x; | |
528 | rtx body; | |
529 | { | |
530 | int i; | |
531 | ||
532 | switch (GET_CODE (body)) | |
533 | { | |
534 | case SET: | |
535 | if (reg_overlap_mentioned_p (x, SET_SRC (body))) | |
536 | return 1; | |
537 | ||
538 | /* If the destination is anything other than CC0, PC, a REG or a SUBREG | |
539 | of a REG that occupies all of the REG, the insn references X if | |
540 | it is mentioned in the destination. */ | |
541 | if (GET_CODE (SET_DEST (body)) != CC0 | |
542 | && GET_CODE (SET_DEST (body)) != PC | |
543 | && GET_CODE (SET_DEST (body)) != REG | |
544 | && ! (GET_CODE (SET_DEST (body)) == SUBREG | |
545 | && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG | |
546 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) | |
547 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
548 | == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) | |
549 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) | |
550 | && reg_overlap_mentioned_p (x, SET_DEST (body))) | |
551 | return 1; | |
e9a25f70 | 552 | return 0; |
2c88418c RS |
553 | |
554 | case ASM_OPERANDS: | |
555 | for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) | |
556 | if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) | |
557 | return 1; | |
e9a25f70 | 558 | return 0; |
2c88418c RS |
559 | |
560 | case CALL: | |
561 | case USE: | |
14a774a9 | 562 | case IF_THEN_ELSE: |
2c88418c RS |
563 | return reg_overlap_mentioned_p (x, body); |
564 | ||
565 | case TRAP_IF: | |
566 | return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); | |
567 | ||
2ac4fed0 RK |
568 | case UNSPEC: |
569 | case UNSPEC_VOLATILE: | |
2f9fb4c2 R |
570 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) |
571 | if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i))) | |
572 | return 1; | |
573 | return 0; | |
574 | ||
2c88418c RS |
575 | case PARALLEL: |
576 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) | |
577 | if (reg_referenced_p (x, XVECEXP (body, 0, i))) | |
578 | return 1; | |
e9a25f70 JL |
579 | return 0; |
580 | ||
0d3ffb5a GK |
581 | case CLOBBER: |
582 | if (GET_CODE (XEXP (body, 0)) == MEM) | |
583 | if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0))) | |
584 | return 1; | |
585 | return 0; | |
586 | ||
0c99ec5c RH |
587 | case COND_EXEC: |
588 | if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body))) | |
589 | return 1; | |
590 | return reg_referenced_p (x, COND_EXEC_CODE (body)); | |
591 | ||
e9a25f70 JL |
592 | default: |
593 | return 0; | |
2c88418c | 594 | } |
2c88418c RS |
595 | } |
596 | ||
597 | /* Nonzero if register REG is referenced in an insn between | |
598 | FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do | |
0f41302f | 599 | not count. */ |
2c88418c RS |
600 | |
601 | int | |
602 | reg_referenced_between_p (reg, from_insn, to_insn) | |
603 | rtx reg, from_insn, to_insn; | |
604 | { | |
605 | register rtx insn; | |
606 | ||
607 | if (from_insn == to_insn) | |
608 | return 0; | |
609 | ||
610 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 611 | if (INSN_P (insn) |
8f3e7a26 RK |
612 | && (reg_referenced_p (reg, PATTERN (insn)) |
613 | || (GET_CODE (insn) == CALL_INSN | |
614 | && find_reg_fusage (insn, USE, reg)))) | |
2c88418c RS |
615 | return 1; |
616 | return 0; | |
617 | } | |
618 | \f | |
619 | /* Nonzero if register REG is set or clobbered in an insn between | |
620 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
621 | ||
622 | int | |
623 | reg_set_between_p (reg, from_insn, to_insn) | |
624 | rtx reg, from_insn, to_insn; | |
625 | { | |
626 | register rtx insn; | |
627 | ||
628 | if (from_insn == to_insn) | |
629 | return 0; | |
630 | ||
631 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 632 | if (INSN_P (insn) && reg_set_p (reg, insn)) |
2c88418c RS |
633 | return 1; |
634 | return 0; | |
635 | } | |
636 | ||
637 | /* Internals of reg_set_between_p. */ | |
2c88418c RS |
638 | int |
639 | reg_set_p (reg, insn) | |
640 | rtx reg, insn; | |
641 | { | |
642 | rtx body = insn; | |
643 | ||
644 | /* We can be passed an insn or part of one. If we are passed an insn, | |
645 | check if a side-effect of the insn clobbers REG. */ | |
2c3c49de | 646 | if (INSN_P (insn)) |
2c88418c RS |
647 | { |
648 | if (FIND_REG_INC_NOTE (insn, reg) | |
649 | || (GET_CODE (insn) == CALL_INSN | |
650 | /* We'd like to test call_used_regs here, but rtlanal.c can't | |
651 | reference that variable due to its use in genattrtab. So | |
8f3e7a26 RK |
652 | we'll just be more conservative. |
653 | ||
654 | ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE | |
655 | information holds all clobbered registers. */ | |
2c88418c RS |
656 | && ((GET_CODE (reg) == REG |
657 | && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
8f3e7a26 RK |
658 | || GET_CODE (reg) == MEM |
659 | || find_reg_fusage (insn, CLOBBER, reg)))) | |
2c88418c RS |
660 | return 1; |
661 | ||
662 | body = PATTERN (insn); | |
663 | } | |
664 | ||
91b2d119 | 665 | return set_of (reg, insn) != NULL_RTX; |
2c88418c RS |
666 | } |
667 | ||
a2e1a0bf RH |
668 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
669 | only if none of them are modified between START and END. Do not | |
670 | consider non-registers one way or the other. */ | |
671 | ||
672 | int | |
673 | regs_set_between_p (x, start, end) | |
674 | rtx x; | |
675 | rtx start, end; | |
676 | { | |
677 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 678 | const char *fmt; |
a2e1a0bf RH |
679 | int i, j; |
680 | ||
681 | switch (code) | |
682 | { | |
683 | case CONST_INT: | |
684 | case CONST_DOUBLE: | |
685 | case CONST: | |
686 | case SYMBOL_REF: | |
687 | case LABEL_REF: | |
688 | case PC: | |
689 | case CC0: | |
690 | return 0; | |
691 | ||
692 | case REG: | |
693 | return reg_set_between_p (x, start, end); | |
694 | ||
695 | default: | |
696 | break; | |
697 | } | |
698 | ||
699 | fmt = GET_RTX_FORMAT (code); | |
700 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
701 | { | |
702 | if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end)) | |
703 | return 1; | |
704 | ||
705 | else if (fmt[i] == 'E') | |
706 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
707 | if (regs_set_between_p (XVECEXP (x, i, j), start, end)) | |
708 | return 1; | |
709 | } | |
710 | ||
711 | return 0; | |
712 | } | |
713 | ||
2c88418c RS |
714 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
715 | only if none of them are modified between START and END. Return 1 if | |
716 | X contains a MEM; this routine does not perform any memory aliasing. */ | |
717 | ||
718 | int | |
719 | modified_between_p (x, start, end) | |
720 | rtx x; | |
721 | rtx start, end; | |
722 | { | |
723 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 724 | const char *fmt; |
f8163c92 | 725 | int i, j; |
2c88418c RS |
726 | |
727 | switch (code) | |
728 | { | |
729 | case CONST_INT: | |
730 | case CONST_DOUBLE: | |
731 | case CONST: | |
732 | case SYMBOL_REF: | |
733 | case LABEL_REF: | |
734 | return 0; | |
735 | ||
736 | case PC: | |
737 | case CC0: | |
738 | return 1; | |
739 | ||
740 | case MEM: | |
741 | /* If the memory is not constant, assume it is modified. If it is | |
742 | constant, we still have to check the address. */ | |
743 | if (! RTX_UNCHANGING_P (x)) | |
744 | return 1; | |
745 | break; | |
746 | ||
747 | case REG: | |
748 | return reg_set_between_p (x, start, end); | |
e9a25f70 JL |
749 | |
750 | default: | |
751 | break; | |
2c88418c RS |
752 | } |
753 | ||
754 | fmt = GET_RTX_FORMAT (code); | |
755 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
f8163c92 RK |
756 | { |
757 | if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) | |
758 | return 1; | |
759 | ||
d4757e6a | 760 | else if (fmt[i] == 'E') |
f8163c92 RK |
761 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
762 | if (modified_between_p (XVECEXP (x, i, j), start, end)) | |
763 | return 1; | |
764 | } | |
765 | ||
766 | return 0; | |
767 | } | |
768 | ||
769 | /* Similar to reg_set_p, but check all registers in X. Return 0 only if none | |
770 | of them are modified in INSN. Return 1 if X contains a MEM; this routine | |
771 | does not perform any memory aliasing. */ | |
772 | ||
773 | int | |
774 | modified_in_p (x, insn) | |
775 | rtx x; | |
776 | rtx insn; | |
777 | { | |
778 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 779 | const char *fmt; |
f8163c92 RK |
780 | int i, j; |
781 | ||
782 | switch (code) | |
783 | { | |
784 | case CONST_INT: | |
785 | case CONST_DOUBLE: | |
786 | case CONST: | |
787 | case SYMBOL_REF: | |
788 | case LABEL_REF: | |
789 | return 0; | |
790 | ||
791 | case PC: | |
792 | case CC0: | |
2c88418c RS |
793 | return 1; |
794 | ||
f8163c92 RK |
795 | case MEM: |
796 | /* If the memory is not constant, assume it is modified. If it is | |
797 | constant, we still have to check the address. */ | |
798 | if (! RTX_UNCHANGING_P (x)) | |
799 | return 1; | |
800 | break; | |
801 | ||
802 | case REG: | |
803 | return reg_set_p (x, insn); | |
e9a25f70 JL |
804 | |
805 | default: | |
806 | break; | |
f8163c92 RK |
807 | } |
808 | ||
809 | fmt = GET_RTX_FORMAT (code); | |
810 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
811 | { | |
812 | if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) | |
813 | return 1; | |
814 | ||
d4757e6a | 815 | else if (fmt[i] == 'E') |
f8163c92 RK |
816 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
817 | if (modified_in_p (XVECEXP (x, i, j), insn)) | |
818 | return 1; | |
819 | } | |
820 | ||
2c88418c RS |
821 | return 0; |
822 | } | |
a8393d5d | 823 | |
4eb00163 | 824 | /* Return true if anything in insn X is (anti,output,true) dependent on |
a8393d5d RH |
825 | anything in insn Y. */ |
826 | ||
827 | int | |
4eb00163 | 828 | insn_dependent_p (x, y) |
a8393d5d RH |
829 | rtx x, y; |
830 | { | |
831 | rtx tmp; | |
832 | ||
833 | if (! INSN_P (x) || ! INSN_P (y)) | |
834 | abort (); | |
835 | ||
836 | tmp = PATTERN (y); | |
4eb00163 | 837 | note_stores (PATTERN (x), insn_dependent_p_1, &tmp); |
a8393d5d RH |
838 | if (tmp == NULL_RTX) |
839 | return 1; | |
840 | ||
841 | tmp = PATTERN (x); | |
4eb00163 | 842 | note_stores (PATTERN (y), insn_dependent_p_1, &tmp); |
a8393d5d RH |
843 | if (tmp == NULL_RTX) |
844 | return 1; | |
845 | ||
846 | return 0; | |
847 | } | |
848 | ||
4eb00163 | 849 | /* A helper routine for insn_dependent_p called through note_stores. */ |
a8393d5d RH |
850 | |
851 | static void | |
4eb00163 | 852 | insn_dependent_p_1 (x, pat, data) |
a8393d5d RH |
853 | rtx x; |
854 | rtx pat ATTRIBUTE_UNUSED; | |
855 | void *data; | |
856 | { | |
857 | rtx * pinsn = (rtx *) data; | |
858 | ||
859 | if (*pinsn && reg_mentioned_p (x, *pinsn)) | |
860 | *pinsn = NULL_RTX; | |
861 | } | |
2c88418c | 862 | \f |
91b2d119 JH |
863 | /* Helper function for set_of. */ |
864 | struct set_of_data | |
865 | { | |
866 | rtx found; | |
867 | rtx pat; | |
868 | }; | |
869 | ||
870 | static void | |
871 | set_of_1 (x, pat, data1) | |
872 | rtx x; | |
873 | rtx pat; | |
874 | void *data1; | |
875 | { | |
876 | struct set_of_data *data = (struct set_of_data *) (data1); | |
877 | if (rtx_equal_p (x, data->pat) | |
878 | || (GET_CODE (x) != MEM && reg_overlap_mentioned_p (data->pat, x))) | |
879 | data->found = pat; | |
880 | } | |
881 | ||
882 | /* Give an INSN, return a SET or CLOBBER expression that does modify PAT | |
883 | (eighter directly or via STRICT_LOW_PART and similar modifiers). */ | |
884 | rtx | |
885 | set_of (pat, insn) | |
886 | rtx pat, insn; | |
887 | { | |
888 | struct set_of_data data; | |
889 | data.found = NULL_RTX; | |
890 | data.pat = pat; | |
891 | note_stores (INSN_P (insn) ? PATTERN (insn) : insn, set_of_1, &data); | |
892 | return data.found; | |
893 | } | |
894 | \f | |
2c88418c RS |
895 | /* Given an INSN, return a SET expression if this insn has only a single SET. |
896 | It may also have CLOBBERs, USEs, or SET whose output | |
897 | will not be used, which we ignore. */ | |
898 | ||
899 | rtx | |
2130b7fb BS |
900 | single_set_2 (insn, pat) |
901 | rtx insn, pat; | |
2c88418c | 902 | { |
c9b89a21 JH |
903 | rtx set = NULL; |
904 | int set_verified = 1; | |
2c88418c | 905 | int i; |
c9b89a21 | 906 | |
b1cdafbb | 907 | if (GET_CODE (pat) == PARALLEL) |
2c88418c | 908 | { |
c9b89a21 | 909 | for (i = 0; i < XVECLEN (pat, 0); i++) |
b1cdafbb | 910 | { |
c9b89a21 JH |
911 | rtx sub = XVECEXP (pat, 0, i); |
912 | switch (GET_CODE (sub)) | |
913 | { | |
914 | case USE: | |
915 | case CLOBBER: | |
916 | break; | |
917 | ||
918 | case SET: | |
919 | /* We can consider insns having multiple sets, where all | |
920 | but one are dead as single set insns. In common case | |
921 | only single set is present in the pattern so we want | |
922 | to avoid checking for REG_UNUSED notes unless neccesary. | |
923 | ||
924 | When we reach set first time, we just expect this is | |
925 | the single set we are looking for and only when more | |
926 | sets are found in the insn, we check them. */ | |
927 | if (!set_verified) | |
928 | { | |
929 | if (find_reg_note (insn, REG_UNUSED, SET_DEST (set)) | |
930 | && !side_effects_p (set)) | |
931 | set = NULL; | |
932 | else | |
933 | set_verified = 1; | |
934 | } | |
935 | if (!set) | |
936 | set = sub, set_verified = 0; | |
937 | else if (!find_reg_note (insn, REG_UNUSED, SET_DEST (sub)) | |
938 | || side_effects_p (sub)) | |
939 | return NULL_RTX; | |
940 | break; | |
941 | ||
942 | default: | |
943 | return NULL_RTX; | |
944 | } | |
787ccee0 | 945 | } |
2c88418c | 946 | } |
c9b89a21 | 947 | return set; |
2c88418c | 948 | } |
941c63ac JL |
949 | |
950 | /* Given an INSN, return nonzero if it has more than one SET, else return | |
951 | zero. */ | |
952 | ||
5f7d3786 | 953 | int |
941c63ac JL |
954 | multiple_sets (insn) |
955 | rtx insn; | |
956 | { | |
cae8acdd | 957 | int found; |
941c63ac JL |
958 | int i; |
959 | ||
960 | /* INSN must be an insn. */ | |
2c3c49de | 961 | if (! INSN_P (insn)) |
941c63ac JL |
962 | return 0; |
963 | ||
964 | /* Only a PARALLEL can have multiple SETs. */ | |
965 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
966 | { | |
967 | for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
968 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) | |
969 | { | |
970 | /* If we have already found a SET, then return now. */ | |
971 | if (found) | |
972 | return 1; | |
973 | else | |
974 | found = 1; | |
975 | } | |
976 | } | |
977 | ||
978 | /* Either zero or one SET. */ | |
979 | return 0; | |
980 | } | |
2c88418c | 981 | \f |
7142e318 JW |
982 | /* Return nonzero if the destination of SET equals the source |
983 | and there are no side effects. */ | |
984 | ||
985 | int | |
986 | set_noop_p (set) | |
987 | rtx set; | |
988 | { | |
989 | rtx src = SET_SRC (set); | |
990 | rtx dst = SET_DEST (set); | |
991 | ||
992 | if (side_effects_p (src) || side_effects_p (dst)) | |
993 | return 0; | |
994 | ||
995 | if (GET_CODE (dst) == MEM && GET_CODE (src) == MEM) | |
996 | return rtx_equal_p (dst, src); | |
997 | ||
998 | if (GET_CODE (dst) == SIGN_EXTRACT | |
999 | || GET_CODE (dst) == ZERO_EXTRACT) | |
1000 | return rtx_equal_p (XEXP (dst, 0), src) | |
1001 | && ! BYTES_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx; | |
1002 | ||
1003 | if (GET_CODE (dst) == STRICT_LOW_PART) | |
1004 | dst = XEXP (dst, 0); | |
1005 | ||
1006 | if (GET_CODE (src) == SUBREG && GET_CODE (dst) == SUBREG) | |
1007 | { | |
1008 | if (SUBREG_BYTE (src) != SUBREG_BYTE (dst)) | |
1009 | return 0; | |
1010 | src = SUBREG_REG (src); | |
1011 | dst = SUBREG_REG (dst); | |
1012 | } | |
1013 | ||
1014 | return (GET_CODE (src) == REG && GET_CODE (dst) == REG | |
1015 | && REGNO (src) == REGNO (dst)); | |
1016 | } | |
1017 | ||
63be01fb JW |
1018 | /* Return the last thing that X was assigned from before *PINSN. If VALID_TO |
1019 | is not NULL_RTX then verify that the object is not modified up to VALID_TO. | |
1020 | If the object was modified, if we hit a partial assignment to X, or hit a | |
1021 | CODE_LABEL first, return X. If we found an assignment, update *PINSN to | |
1022 | point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to | |
1023 | be the src. */ | |
2c88418c RS |
1024 | |
1025 | rtx | |
89d3d442 | 1026 | find_last_value (x, pinsn, valid_to, allow_hwreg) |
2c88418c RS |
1027 | rtx x; |
1028 | rtx *pinsn; | |
1029 | rtx valid_to; | |
89d3d442 | 1030 | int allow_hwreg; |
2c88418c RS |
1031 | { |
1032 | rtx p; | |
1033 | ||
1034 | for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL; | |
1035 | p = PREV_INSN (p)) | |
2c3c49de | 1036 | if (INSN_P (p)) |
2c88418c RS |
1037 | { |
1038 | rtx set = single_set (p); | |
c166a311 | 1039 | rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); |
2c88418c RS |
1040 | |
1041 | if (set && rtx_equal_p (x, SET_DEST (set))) | |
1042 | { | |
1043 | rtx src = SET_SRC (set); | |
1044 | ||
1045 | if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST) | |
1046 | src = XEXP (note, 0); | |
1047 | ||
63be01fb JW |
1048 | if ((valid_to == NULL_RTX |
1049 | || ! modified_between_p (src, PREV_INSN (p), valid_to)) | |
2c88418c RS |
1050 | /* Reject hard registers because we don't usually want |
1051 | to use them; we'd rather use a pseudo. */ | |
89d3d442 AM |
1052 | && (! (GET_CODE (src) == REG |
1053 | && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg)) | |
2c88418c RS |
1054 | { |
1055 | *pinsn = p; | |
1056 | return src; | |
1057 | } | |
1058 | } | |
1059 | ||
1060 | /* If set in non-simple way, we don't have a value. */ | |
1061 | if (reg_set_p (x, p)) | |
1062 | break; | |
1063 | } | |
1064 | ||
1065 | return x; | |
1066 | } | |
1067 | \f | |
1068 | /* Return nonzero if register in range [REGNO, ENDREGNO) | |
1069 | appears either explicitly or implicitly in X | |
1070 | other than being stored into. | |
1071 | ||
1072 | References contained within the substructure at LOC do not count. | |
1073 | LOC may be zero, meaning don't ignore anything. */ | |
1074 | ||
1075 | int | |
1076 | refers_to_regno_p (regno, endregno, x, loc) | |
770ae6cc | 1077 | unsigned int regno, endregno; |
2c88418c RS |
1078 | rtx x; |
1079 | rtx *loc; | |
1080 | { | |
770ae6cc RK |
1081 | int i; |
1082 | unsigned int x_regno; | |
1083 | RTX_CODE code; | |
1084 | const char *fmt; | |
2c88418c RS |
1085 | |
1086 | repeat: | |
1087 | /* The contents of a REG_NONNEG note is always zero, so we must come here | |
1088 | upon repeat in case the last REG_NOTE is a REG_NONNEG note. */ | |
1089 | if (x == 0) | |
1090 | return 0; | |
1091 | ||
1092 | code = GET_CODE (x); | |
1093 | ||
1094 | switch (code) | |
1095 | { | |
1096 | case REG: | |
770ae6cc | 1097 | x_regno = REGNO (x); |
f8163c92 RK |
1098 | |
1099 | /* If we modifying the stack, frame, or argument pointer, it will | |
1100 | clobber a virtual register. In fact, we could be more precise, | |
1101 | but it isn't worth it. */ | |
770ae6cc | 1102 | if ((x_regno == STACK_POINTER_REGNUM |
f8163c92 | 1103 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
770ae6cc | 1104 | || x_regno == ARG_POINTER_REGNUM |
f8163c92 | 1105 | #endif |
770ae6cc | 1106 | || x_regno == FRAME_POINTER_REGNUM) |
f8163c92 RK |
1107 | && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER) |
1108 | return 1; | |
1109 | ||
770ae6cc RK |
1110 | return (endregno > x_regno |
1111 | && regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER | |
1112 | ? HARD_REGNO_NREGS (x_regno, GET_MODE (x)) | |
2c88418c RS |
1113 | : 1)); |
1114 | ||
1115 | case SUBREG: | |
1116 | /* If this is a SUBREG of a hard reg, we can see exactly which | |
1117 | registers are being modified. Otherwise, handle normally. */ | |
1118 | if (GET_CODE (SUBREG_REG (x)) == REG | |
1119 | && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) | |
1120 | { | |
ddef6bc7 | 1121 | unsigned int inner_regno = subreg_regno (x); |
770ae6cc | 1122 | unsigned int inner_endregno |
2c88418c RS |
1123 | = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER |
1124 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
1125 | ||
1126 | return endregno > inner_regno && regno < inner_endregno; | |
1127 | } | |
1128 | break; | |
1129 | ||
1130 | case CLOBBER: | |
1131 | case SET: | |
1132 | if (&SET_DEST (x) != loc | |
1133 | /* Note setting a SUBREG counts as referring to the REG it is in for | |
1134 | a pseudo but not for hard registers since we can | |
1135 | treat each word individually. */ | |
1136 | && ((GET_CODE (SET_DEST (x)) == SUBREG | |
1137 | && loc != &SUBREG_REG (SET_DEST (x)) | |
1138 | && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG | |
1139 | && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER | |
1140 | && refers_to_regno_p (regno, endregno, | |
1141 | SUBREG_REG (SET_DEST (x)), loc)) | |
1142 | || (GET_CODE (SET_DEST (x)) != REG | |
1143 | && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) | |
1144 | return 1; | |
1145 | ||
1146 | if (code == CLOBBER || loc == &SET_SRC (x)) | |
1147 | return 0; | |
1148 | x = SET_SRC (x); | |
1149 | goto repeat; | |
e9a25f70 JL |
1150 | |
1151 | default: | |
1152 | break; | |
2c88418c RS |
1153 | } |
1154 | ||
1155 | /* X does not match, so try its subexpressions. */ | |
1156 | ||
1157 | fmt = GET_RTX_FORMAT (code); | |
1158 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1159 | { | |
1160 | if (fmt[i] == 'e' && loc != &XEXP (x, i)) | |
1161 | { | |
1162 | if (i == 0) | |
1163 | { | |
1164 | x = XEXP (x, 0); | |
1165 | goto repeat; | |
1166 | } | |
1167 | else | |
1168 | if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc)) | |
1169 | return 1; | |
1170 | } | |
1171 | else if (fmt[i] == 'E') | |
1172 | { | |
1173 | register int j; | |
1174 | for (j = XVECLEN (x, i) - 1; j >=0; j--) | |
1175 | if (loc != &XVECEXP (x, i, j) | |
1176 | && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc)) | |
1177 | return 1; | |
1178 | } | |
1179 | } | |
1180 | return 0; | |
1181 | } | |
1182 | ||
1183 | /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, | |
1184 | we check if any register number in X conflicts with the relevant register | |
1185 | numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN | |
1186 | contains a MEM (we don't bother checking for memory addresses that can't | |
1187 | conflict because we expect this to be a rare case. */ | |
1188 | ||
1189 | int | |
1190 | reg_overlap_mentioned_p (x, in) | |
1191 | rtx x, in; | |
1192 | { | |
770ae6cc | 1193 | unsigned int regno, endregno; |
2c88418c | 1194 | |
b98b49ac JL |
1195 | /* Overly conservative. */ |
1196 | if (GET_CODE (x) == STRICT_LOW_PART) | |
1197 | x = XEXP (x, 0); | |
1198 | ||
1199 | /* If either argument is a constant, then modifying X can not affect IN. */ | |
1200 | if (CONSTANT_P (x) || CONSTANT_P (in)) | |
1201 | return 0; | |
0c99ec5c RH |
1202 | |
1203 | switch (GET_CODE (x)) | |
2c88418c | 1204 | { |
0c99ec5c | 1205 | case SUBREG: |
2c88418c RS |
1206 | regno = REGNO (SUBREG_REG (x)); |
1207 | if (regno < FIRST_PSEUDO_REGISTER) | |
ddef6bc7 | 1208 | regno = subreg_regno (x); |
0c99ec5c | 1209 | goto do_reg; |
2c88418c | 1210 | |
0c99ec5c RH |
1211 | case REG: |
1212 | regno = REGNO (x); | |
1213 | do_reg: | |
1214 | endregno = regno + (regno < FIRST_PSEUDO_REGISTER | |
1215 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
9714cf43 | 1216 | return refers_to_regno_p (regno, endregno, in, (rtx*)0); |
2c88418c | 1217 | |
0c99ec5c RH |
1218 | case MEM: |
1219 | { | |
1220 | const char *fmt; | |
1221 | int i; | |
2c88418c | 1222 | |
0c99ec5c | 1223 | if (GET_CODE (in) == MEM) |
2c88418c RS |
1224 | return 1; |
1225 | ||
0c99ec5c RH |
1226 | fmt = GET_RTX_FORMAT (GET_CODE (in)); |
1227 | for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) | |
1228 | if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i))) | |
1229 | return 1; | |
c0222c21 | 1230 | |
0c99ec5c RH |
1231 | return 0; |
1232 | } | |
1233 | ||
1234 | case SCRATCH: | |
1235 | case PC: | |
1236 | case CC0: | |
1237 | return reg_mentioned_p (x, in); | |
1238 | ||
1239 | case PARALLEL: | |
37ceff9d | 1240 | { |
90d036a0 | 1241 | int i; |
37ceff9d RH |
1242 | |
1243 | /* If any register in here refers to it we return true. */ | |
7193d1dc RK |
1244 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
1245 | if (XEXP (XVECEXP (x, 0, i), 0) != 0 | |
1246 | && reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in)) | |
90d036a0 | 1247 | return 1; |
7193d1dc | 1248 | return 0; |
37ceff9d | 1249 | } |
2c88418c | 1250 | |
0c99ec5c RH |
1251 | default: |
1252 | break; | |
1253 | } | |
2c88418c | 1254 | |
0c99ec5c | 1255 | abort (); |
2c88418c RS |
1256 | } |
1257 | \f | |
2c88418c RS |
1258 | /* Return the last value to which REG was set prior to INSN. If we can't |
1259 | find it easily, return 0. | |
1260 | ||
4d9d7d9d RK |
1261 | We only return a REG, SUBREG, or constant because it is too hard to |
1262 | check if a MEM remains unchanged. */ | |
2c88418c RS |
1263 | |
1264 | rtx | |
1265 | reg_set_last (x, insn) | |
1266 | rtx x; | |
1267 | rtx insn; | |
1268 | { | |
1269 | rtx orig_insn = insn; | |
1270 | ||
2c88418c RS |
1271 | /* Scan backwards until reg_set_last_1 changed one of the above flags. |
1272 | Stop when we reach a label or X is a hard reg and we reach a | |
1273 | CALL_INSN (if reg_set_last_last_regno is a hard reg). | |
1274 | ||
1275 | If we find a set of X, ensure that its SET_SRC remains unchanged. */ | |
1276 | ||
6b02c316 RS |
1277 | /* We compare with <= here, because reg_set_last_last_regno |
1278 | is actually the number of the first reg *not* in X. */ | |
2c88418c RS |
1279 | for (; |
1280 | insn && GET_CODE (insn) != CODE_LABEL | |
1281 | && ! (GET_CODE (insn) == CALL_INSN | |
91b2d119 | 1282 | && REGNO (x) <= FIRST_PSEUDO_REGISTER); |
2c88418c | 1283 | insn = PREV_INSN (insn)) |
2c3c49de | 1284 | if (INSN_P (insn)) |
2c88418c | 1285 | { |
91b2d119 JH |
1286 | rtx set = set_of (x, insn); |
1287 | /* OK, this function modify our register. See if we understand it. */ | |
1288 | if (set) | |
2c88418c | 1289 | { |
91b2d119 JH |
1290 | rtx last_value; |
1291 | if (GET_CODE (set) != SET || SET_DEST (set) != x) | |
1292 | return 0; | |
1293 | last_value = SET_SRC (x); | |
1294 | if (CONSTANT_P (last_value) | |
1295 | || ((GET_CODE (last_value) == REG | |
1296 | || GET_CODE (last_value) == SUBREG) | |
1297 | && ! reg_set_between_p (last_value, | |
ce9c8df2 | 1298 | insn, orig_insn))) |
91b2d119 | 1299 | return last_value; |
2c88418c RS |
1300 | else |
1301 | return 0; | |
1302 | } | |
1303 | } | |
1304 | ||
1305 | return 0; | |
1306 | } | |
1307 | \f | |
2c88418c RS |
1308 | /* Call FUN on each register or MEM that is stored into or clobbered by X. |
1309 | (X would be the pattern of an insn). | |
1310 | FUN receives two arguments: | |
1311 | the REG, MEM, CC0 or PC being stored in or clobbered, | |
1312 | the SET or CLOBBER rtx that does the store. | |
1313 | ||
1314 | If the item being stored in or clobbered is a SUBREG of a hard register, | |
1315 | the SUBREG will be passed. */ | |
1316 | ||
1317 | void | |
84832317 | 1318 | note_stores (x, fun, data) |
2c88418c | 1319 | register rtx x; |
cdadb1dd | 1320 | void (*fun) PARAMS ((rtx, rtx, void *)); |
84832317 | 1321 | void *data; |
2c88418c | 1322 | { |
90d036a0 RK |
1323 | int i; |
1324 | ||
0c99ec5c RH |
1325 | if (GET_CODE (x) == COND_EXEC) |
1326 | x = COND_EXEC_CODE (x); | |
90d036a0 | 1327 | |
0c99ec5c | 1328 | if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) |
2c88418c RS |
1329 | { |
1330 | register rtx dest = SET_DEST (x); | |
90d036a0 | 1331 | |
2c88418c RS |
1332 | while ((GET_CODE (dest) == SUBREG |
1333 | && (GET_CODE (SUBREG_REG (dest)) != REG | |
1334 | || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) | |
1335 | || GET_CODE (dest) == ZERO_EXTRACT | |
1336 | || GET_CODE (dest) == SIGN_EXTRACT | |
1337 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1338 | dest = XEXP (dest, 0); | |
86465af7 | 1339 | |
7193d1dc RK |
1340 | /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions, |
1341 | each of whose first operand is a register. We can't know what | |
1342 | precisely is being set in these cases, so make up a CLOBBER to pass | |
1343 | to the function. */ | |
1344 | if (GET_CODE (dest) == PARALLEL) | |
1345 | { | |
1346 | for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) | |
1347 | if (XEXP (XVECEXP (dest, 0, i), 0) != 0) | |
1348 | (*fun) (XEXP (XVECEXP (dest, 0, i), 0), | |
1349 | gen_rtx_CLOBBER (VOIDmode, | |
1350 | XEXP (XVECEXP (dest, 0, i), 0)), | |
1351 | data); | |
1352 | } | |
86465af7 | 1353 | else |
84832317 | 1354 | (*fun) (dest, x, data); |
2c88418c | 1355 | } |
770ae6cc | 1356 | |
90d036a0 RK |
1357 | else if (GET_CODE (x) == PARALLEL) |
1358 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
1359 | note_stores (XVECEXP (x, 0, i), fun, data); | |
2c88418c RS |
1360 | } |
1361 | \f | |
e2373f95 RK |
1362 | /* Like notes_stores, but call FUN for each expression that is being |
1363 | referenced in PBODY, a pointer to the PATTERN of an insn. We only call | |
1364 | FUN for each expression, not any interior subexpressions. FUN receives a | |
1365 | pointer to the expression and the DATA passed to this function. | |
1366 | ||
1367 | Note that this is not quite the same test as that done in reg_referenced_p | |
1368 | since that considers something as being referenced if it is being | |
1369 | partially set, while we do not. */ | |
1370 | ||
1371 | void | |
1372 | note_uses (pbody, fun, data) | |
1373 | rtx *pbody; | |
1374 | void (*fun) PARAMS ((rtx *, void *)); | |
1375 | void *data; | |
1376 | { | |
1377 | rtx body = *pbody; | |
1378 | int i; | |
1379 | ||
1380 | switch (GET_CODE (body)) | |
1381 | { | |
1382 | case COND_EXEC: | |
1383 | (*fun) (&COND_EXEC_TEST (body), data); | |
1384 | note_uses (&COND_EXEC_CODE (body), fun, data); | |
1385 | return; | |
1386 | ||
1387 | case PARALLEL: | |
1388 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) | |
1389 | note_uses (&XVECEXP (body, 0, i), fun, data); | |
1390 | return; | |
1391 | ||
1392 | case USE: | |
1393 | (*fun) (&XEXP (body, 0), data); | |
1394 | return; | |
1395 | ||
1396 | case ASM_OPERANDS: | |
1397 | for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) | |
1398 | (*fun) (&ASM_OPERANDS_INPUT (body, i), data); | |
1399 | return; | |
1400 | ||
1401 | case TRAP_IF: | |
1402 | (*fun) (&TRAP_CONDITION (body), data); | |
1403 | return; | |
1404 | ||
1405 | case UNSPEC: | |
1406 | case UNSPEC_VOLATILE: | |
1407 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) | |
1408 | (*fun) (&XVECEXP (body, 0, i), data); | |
1409 | return; | |
1410 | ||
1411 | case CLOBBER: | |
1412 | if (GET_CODE (XEXP (body, 0)) == MEM) | |
1413 | (*fun) (&XEXP (XEXP (body, 0), 0), data); | |
1414 | return; | |
1415 | ||
1416 | case SET: | |
1417 | { | |
1418 | rtx dest = SET_DEST (body); | |
1419 | ||
1420 | /* For sets we replace everything in source plus registers in memory | |
1421 | expression in store and operands of a ZERO_EXTRACT. */ | |
1422 | (*fun) (&SET_SRC (body), data); | |
1423 | ||
1424 | if (GET_CODE (dest) == ZERO_EXTRACT) | |
1425 | { | |
1426 | (*fun) (&XEXP (dest, 1), data); | |
1427 | (*fun) (&XEXP (dest, 2), data); | |
1428 | } | |
1429 | ||
1430 | while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART) | |
1431 | dest = XEXP (dest, 0); | |
1432 | ||
1433 | if (GET_CODE (dest) == MEM) | |
1434 | (*fun) (&XEXP (dest, 0), data); | |
1435 | } | |
1436 | return; | |
1437 | ||
1438 | default: | |
1439 | /* All the other possibilities never store. */ | |
1440 | (*fun) (pbody, data); | |
1441 | return; | |
1442 | } | |
1443 | } | |
1444 | \f | |
2c88418c RS |
1445 | /* Return nonzero if X's old contents don't survive after INSN. |
1446 | This will be true if X is (cc0) or if X is a register and | |
1447 | X dies in INSN or because INSN entirely sets X. | |
1448 | ||
1449 | "Entirely set" means set directly and not through a SUBREG, | |
1450 | ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. | |
1451 | Likewise, REG_INC does not count. | |
1452 | ||
1453 | REG may be a hard or pseudo reg. Renumbering is not taken into account, | |
1454 | but for this use that makes no difference, since regs don't overlap | |
1455 | during their lifetimes. Therefore, this function may be used | |
1456 | at any time after deaths have been computed (in flow.c). | |
1457 | ||
1458 | If REG is a hard reg that occupies multiple machine registers, this | |
1459 | function will only return 1 if each of those registers will be replaced | |
1460 | by INSN. */ | |
1461 | ||
1462 | int | |
1463 | dead_or_set_p (insn, x) | |
1464 | rtx insn; | |
1465 | rtx x; | |
1466 | { | |
770ae6cc RK |
1467 | unsigned int regno, last_regno; |
1468 | unsigned int i; | |
2c88418c RS |
1469 | |
1470 | /* Can't use cc0_rtx below since this file is used by genattrtab.c. */ | |
1471 | if (GET_CODE (x) == CC0) | |
1472 | return 1; | |
1473 | ||
1474 | if (GET_CODE (x) != REG) | |
1475 | abort (); | |
1476 | ||
1477 | regno = REGNO (x); | |
1478 | last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno | |
1479 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1); | |
1480 | ||
1481 | for (i = regno; i <= last_regno; i++) | |
1482 | if (! dead_or_set_regno_p (insn, i)) | |
1483 | return 0; | |
1484 | ||
1485 | return 1; | |
1486 | } | |
1487 | ||
1488 | /* Utility function for dead_or_set_p to check an individual register. Also | |
1489 | called from flow.c. */ | |
1490 | ||
1491 | int | |
1492 | dead_or_set_regno_p (insn, test_regno) | |
1493 | rtx insn; | |
770ae6cc | 1494 | unsigned int test_regno; |
2c88418c | 1495 | { |
770ae6cc | 1496 | unsigned int regno, endregno; |
8c8de5fc | 1497 | rtx pattern; |
2c88418c | 1498 | |
0a2287bf RH |
1499 | /* See if there is a death note for something that includes TEST_REGNO. */ |
1500 | if (find_regno_note (insn, REG_DEAD, test_regno)) | |
1501 | return 1; | |
2c88418c | 1502 | |
8f3e7a26 RK |
1503 | if (GET_CODE (insn) == CALL_INSN |
1504 | && find_regno_fusage (insn, CLOBBER, test_regno)) | |
1505 | return 1; | |
1506 | ||
0c99ec5c RH |
1507 | pattern = PATTERN (insn); |
1508 | ||
1509 | if (GET_CODE (pattern) == COND_EXEC) | |
1510 | pattern = COND_EXEC_CODE (pattern); | |
1511 | ||
1512 | if (GET_CODE (pattern) == SET) | |
2c88418c RS |
1513 | { |
1514 | rtx dest = SET_DEST (PATTERN (insn)); | |
1515 | ||
1516 | /* A value is totally replaced if it is the destination or the | |
1517 | destination is a SUBREG of REGNO that does not change the number of | |
1518 | words in it. */ | |
6764d250 | 1519 | if (GET_CODE (dest) == SUBREG |
2c88418c RS |
1520 | && (((GET_MODE_SIZE (GET_MODE (dest)) |
1521 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1522 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1523 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1524 | dest = SUBREG_REG (dest); | |
1525 | ||
1526 | if (GET_CODE (dest) != REG) | |
1527 | return 0; | |
1528 | ||
1529 | regno = REGNO (dest); | |
1530 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1531 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1532 | ||
1533 | return (test_regno >= regno && test_regno < endregno); | |
1534 | } | |
0c99ec5c | 1535 | else if (GET_CODE (pattern) == PARALLEL) |
2c88418c RS |
1536 | { |
1537 | register int i; | |
1538 | ||
0c99ec5c | 1539 | for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--) |
2c88418c | 1540 | { |
0c99ec5c RH |
1541 | rtx body = XVECEXP (pattern, 0, i); |
1542 | ||
1543 | if (GET_CODE (body) == COND_EXEC) | |
1544 | body = COND_EXEC_CODE (body); | |
2c88418c RS |
1545 | |
1546 | if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) | |
1547 | { | |
1548 | rtx dest = SET_DEST (body); | |
1549 | ||
1550 | if (GET_CODE (dest) == SUBREG | |
1551 | && (((GET_MODE_SIZE (GET_MODE (dest)) | |
1552 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1553 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1554 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1555 | dest = SUBREG_REG (dest); | |
1556 | ||
1557 | if (GET_CODE (dest) != REG) | |
1558 | continue; | |
1559 | ||
1560 | regno = REGNO (dest); | |
1561 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1562 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1563 | ||
1564 | if (test_regno >= regno && test_regno < endregno) | |
1565 | return 1; | |
1566 | } | |
1567 | } | |
1568 | } | |
1569 | ||
1570 | return 0; | |
1571 | } | |
1572 | ||
1573 | /* Return the reg-note of kind KIND in insn INSN, if there is one. | |
1574 | If DATUM is nonzero, look for one whose datum is DATUM. */ | |
1575 | ||
1576 | rtx | |
1577 | find_reg_note (insn, kind, datum) | |
1578 | rtx insn; | |
1579 | enum reg_note kind; | |
1580 | rtx datum; | |
1581 | { | |
1582 | register rtx link; | |
1583 | ||
ae78d276 | 1584 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
2c3c49de | 1585 | if (! INSN_P (insn)) |
ae78d276 MM |
1586 | return 0; |
1587 | ||
2c88418c RS |
1588 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1589 | if (REG_NOTE_KIND (link) == kind | |
1590 | && (datum == 0 || datum == XEXP (link, 0))) | |
1591 | return link; | |
1592 | return 0; | |
1593 | } | |
1594 | ||
1595 | /* Return the reg-note of kind KIND in insn INSN which applies to register | |
99309f3b RK |
1596 | number REGNO, if any. Return 0 if there is no such reg-note. Note that |
1597 | the REGNO of this NOTE need not be REGNO if REGNO is a hard register; | |
1598 | it might be the case that the note overlaps REGNO. */ | |
2c88418c RS |
1599 | |
1600 | rtx | |
1601 | find_regno_note (insn, kind, regno) | |
1602 | rtx insn; | |
1603 | enum reg_note kind; | |
770ae6cc | 1604 | unsigned int regno; |
2c88418c RS |
1605 | { |
1606 | register rtx link; | |
1607 | ||
ae78d276 | 1608 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
2c3c49de | 1609 | if (! INSN_P (insn)) |
ae78d276 MM |
1610 | return 0; |
1611 | ||
2c88418c RS |
1612 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1613 | if (REG_NOTE_KIND (link) == kind | |
1614 | /* Verify that it is a register, so that scratch and MEM won't cause a | |
1615 | problem here. */ | |
1616 | && GET_CODE (XEXP (link, 0)) == REG | |
99309f3b RK |
1617 | && REGNO (XEXP (link, 0)) <= regno |
1618 | && ((REGNO (XEXP (link, 0)) | |
1619 | + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 | |
1620 | : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)), | |
1621 | GET_MODE (XEXP (link, 0))))) | |
1622 | > regno)) | |
2c88418c RS |
1623 | return link; |
1624 | return 0; | |
1625 | } | |
8f3e7a26 | 1626 | |
d9c695ff RK |
1627 | /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and |
1628 | has such a note. */ | |
1629 | ||
1630 | rtx | |
1631 | find_reg_equal_equiv_note (insn) | |
1632 | rtx insn; | |
1633 | { | |
1634 | rtx note; | |
1635 | ||
1636 | if (single_set (insn) == 0) | |
1637 | return 0; | |
1638 | else if ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0) | |
1639 | return note; | |
1640 | else | |
1641 | return find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
1642 | } | |
1643 | ||
8f3e7a26 RK |
1644 | /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found |
1645 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1646 | ||
1647 | int | |
1648 | find_reg_fusage (insn, code, datum) | |
1649 | rtx insn; | |
1650 | enum rtx_code code; | |
1651 | rtx datum; | |
1652 | { | |
1653 | /* If it's not a CALL_INSN, it can't possibly have a | |
1654 | CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ | |
1655 | if (GET_CODE (insn) != CALL_INSN) | |
1656 | return 0; | |
1657 | ||
1658 | if (! datum) | |
1659 | abort(); | |
1660 | ||
1661 | if (GET_CODE (datum) != REG) | |
1662 | { | |
1663 | register rtx link; | |
1664 | ||
1665 | for (link = CALL_INSN_FUNCTION_USAGE (insn); | |
1666 | link; | |
1667 | link = XEXP (link, 1)) | |
1668 | if (GET_CODE (XEXP (link, 0)) == code | |
1669 | && rtx_equal_p (datum, SET_DEST (XEXP (link, 0)))) | |
1670 | return 1; | |
1671 | } | |
1672 | else | |
1673 | { | |
770ae6cc | 1674 | unsigned int regno = REGNO (datum); |
8f3e7a26 RK |
1675 | |
1676 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1677 | to pseudo registers, so don't bother checking. */ | |
1678 | ||
1679 | if (regno < FIRST_PSEUDO_REGISTER) | |
1680 | { | |
770ae6cc RK |
1681 | unsigned int end_regno |
1682 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum)); | |
1683 | unsigned int i; | |
8f3e7a26 RK |
1684 | |
1685 | for (i = regno; i < end_regno; i++) | |
1686 | if (find_regno_fusage (insn, code, i)) | |
1687 | return 1; | |
1688 | } | |
1689 | } | |
1690 | ||
1691 | return 0; | |
1692 | } | |
1693 | ||
1694 | /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found | |
1695 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1696 | ||
1697 | int | |
1698 | find_regno_fusage (insn, code, regno) | |
1699 | rtx insn; | |
1700 | enum rtx_code code; | |
770ae6cc | 1701 | unsigned int regno; |
8f3e7a26 RK |
1702 | { |
1703 | register rtx link; | |
1704 | ||
1705 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1706 | to pseudo registers, so don't bother checking. */ | |
1707 | ||
1708 | if (regno >= FIRST_PSEUDO_REGISTER | |
1709 | || GET_CODE (insn) != CALL_INSN ) | |
1710 | return 0; | |
1711 | ||
1712 | for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) | |
83ab3839 | 1713 | { |
770ae6cc RK |
1714 | unsigned int regnote; |
1715 | rtx op, reg; | |
83ab3839 RH |
1716 | |
1717 | if (GET_CODE (op = XEXP (link, 0)) == code | |
1718 | && GET_CODE (reg = XEXP (op, 0)) == REG | |
1719 | && (regnote = REGNO (reg)) <= regno | |
1720 | && regnote + HARD_REGNO_NREGS (regnote, GET_MODE (reg)) > regno) | |
1721 | return 1; | |
1722 | } | |
8f3e7a26 RK |
1723 | |
1724 | return 0; | |
1725 | } | |
2c88418c RS |
1726 | \f |
1727 | /* Remove register note NOTE from the REG_NOTES of INSN. */ | |
1728 | ||
1729 | void | |
1730 | remove_note (insn, note) | |
2c88418c | 1731 | register rtx insn; |
49c3bb12 | 1732 | register rtx note; |
2c88418c RS |
1733 | { |
1734 | register rtx link; | |
1735 | ||
49c3bb12 RH |
1736 | if (note == NULL_RTX) |
1737 | return; | |
1738 | ||
2c88418c RS |
1739 | if (REG_NOTES (insn) == note) |
1740 | { | |
1741 | REG_NOTES (insn) = XEXP (note, 1); | |
1742 | return; | |
1743 | } | |
1744 | ||
1745 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
1746 | if (XEXP (link, 1) == note) | |
1747 | { | |
1748 | XEXP (link, 1) = XEXP (note, 1); | |
1749 | return; | |
1750 | } | |
1751 | ||
1752 | abort (); | |
1753 | } | |
55a98783 | 1754 | |
dd248abd RK |
1755 | /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and |
1756 | remove that entry from the list if it is found. | |
55a98783 | 1757 | |
dd248abd | 1758 | A simple equality test is used to determine if NODE matches. */ |
55a98783 JL |
1759 | |
1760 | void | |
1761 | remove_node_from_expr_list (node, listp) | |
1762 | rtx node; | |
1763 | rtx *listp; | |
1764 | { | |
1765 | rtx temp = *listp; | |
1766 | rtx prev = NULL_RTX; | |
1767 | ||
1768 | while (temp) | |
1769 | { | |
1770 | if (node == XEXP (temp, 0)) | |
1771 | { | |
1772 | /* Splice the node out of the list. */ | |
1773 | if (prev) | |
1774 | XEXP (prev, 1) = XEXP (temp, 1); | |
1775 | else | |
1776 | *listp = XEXP (temp, 1); | |
1777 | ||
1778 | return; | |
1779 | } | |
dd248abd RK |
1780 | |
1781 | prev = temp; | |
55a98783 JL |
1782 | temp = XEXP (temp, 1); |
1783 | } | |
1784 | } | |
2c88418c | 1785 | \f |
2b067faf RS |
1786 | /* Nonzero if X contains any volatile instructions. These are instructions |
1787 | which may cause unpredictable machine state instructions, and thus no | |
1788 | instructions should be moved or combined across them. This includes | |
1789 | only volatile asms and UNSPEC_VOLATILE instructions. */ | |
1790 | ||
1791 | int | |
1792 | volatile_insn_p (x) | |
1793 | rtx x; | |
1794 | { | |
1795 | register RTX_CODE code; | |
1796 | ||
1797 | code = GET_CODE (x); | |
1798 | switch (code) | |
1799 | { | |
1800 | case LABEL_REF: | |
1801 | case SYMBOL_REF: | |
1802 | case CONST_INT: | |
1803 | case CONST: | |
1804 | case CONST_DOUBLE: | |
1805 | case CC0: | |
1806 | case PC: | |
1807 | case REG: | |
1808 | case SCRATCH: | |
1809 | case CLOBBER: | |
1810 | case ASM_INPUT: | |
1811 | case ADDR_VEC: | |
1812 | case ADDR_DIFF_VEC: | |
1813 | case CALL: | |
1814 | case MEM: | |
1815 | return 0; | |
1816 | ||
1817 | case UNSPEC_VOLATILE: | |
1818 | /* case TRAP_IF: This isn't clear yet. */ | |
1819 | return 1; | |
1820 | ||
1821 | case ASM_OPERANDS: | |
1822 | if (MEM_VOLATILE_P (x)) | |
1823 | return 1; | |
e9a25f70 JL |
1824 | |
1825 | default: | |
1826 | break; | |
2b067faf RS |
1827 | } |
1828 | ||
1829 | /* Recursively scan the operands of this expression. */ | |
1830 | ||
1831 | { | |
6f7d635c | 1832 | register const char *fmt = GET_RTX_FORMAT (code); |
2b067faf RS |
1833 | register int i; |
1834 | ||
1835 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1836 | { | |
1837 | if (fmt[i] == 'e') | |
1838 | { | |
31001f72 | 1839 | if (volatile_insn_p (XEXP (x, i))) |
2b067faf RS |
1840 | return 1; |
1841 | } | |
d4757e6a | 1842 | else if (fmt[i] == 'E') |
2b067faf RS |
1843 | { |
1844 | register int j; | |
1845 | for (j = 0; j < XVECLEN (x, i); j++) | |
31001f72 | 1846 | if (volatile_insn_p (XVECEXP (x, i, j))) |
2b067faf RS |
1847 | return 1; |
1848 | } | |
1849 | } | |
1850 | } | |
1851 | return 0; | |
1852 | } | |
1853 | ||
2c88418c | 1854 | /* Nonzero if X contains any volatile memory references |
2ac4fed0 | 1855 | UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ |
2c88418c RS |
1856 | |
1857 | int | |
1858 | volatile_refs_p (x) | |
1859 | rtx x; | |
1860 | { | |
1861 | register RTX_CODE code; | |
1862 | ||
1863 | code = GET_CODE (x); | |
1864 | switch (code) | |
1865 | { | |
1866 | case LABEL_REF: | |
1867 | case SYMBOL_REF: | |
1868 | case CONST_INT: | |
1869 | case CONST: | |
1870 | case CONST_DOUBLE: | |
1871 | case CC0: | |
1872 | case PC: | |
1873 | case REG: | |
1874 | case SCRATCH: | |
1875 | case CLOBBER: | |
1876 | case ASM_INPUT: | |
1877 | case ADDR_VEC: | |
1878 | case ADDR_DIFF_VEC: | |
1879 | return 0; | |
1880 | ||
1881 | case CALL: | |
2ac4fed0 | 1882 | case UNSPEC_VOLATILE: |
2c88418c RS |
1883 | /* case TRAP_IF: This isn't clear yet. */ |
1884 | return 1; | |
1885 | ||
1886 | case MEM: | |
1887 | case ASM_OPERANDS: | |
1888 | if (MEM_VOLATILE_P (x)) | |
1889 | return 1; | |
e9a25f70 JL |
1890 | |
1891 | default: | |
1892 | break; | |
2c88418c RS |
1893 | } |
1894 | ||
1895 | /* Recursively scan the operands of this expression. */ | |
1896 | ||
1897 | { | |
6f7d635c | 1898 | register const char *fmt = GET_RTX_FORMAT (code); |
2c88418c RS |
1899 | register int i; |
1900 | ||
1901 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1902 | { | |
1903 | if (fmt[i] == 'e') | |
1904 | { | |
1905 | if (volatile_refs_p (XEXP (x, i))) | |
1906 | return 1; | |
1907 | } | |
d4757e6a | 1908 | else if (fmt[i] == 'E') |
2c88418c RS |
1909 | { |
1910 | register int j; | |
1911 | for (j = 0; j < XVECLEN (x, i); j++) | |
1912 | if (volatile_refs_p (XVECEXP (x, i, j))) | |
1913 | return 1; | |
1914 | } | |
1915 | } | |
1916 | } | |
1917 | return 0; | |
1918 | } | |
1919 | ||
1920 | /* Similar to above, except that it also rejects register pre- and post- | |
1921 | incrementing. */ | |
1922 | ||
1923 | int | |
1924 | side_effects_p (x) | |
1925 | rtx x; | |
1926 | { | |
1927 | register RTX_CODE code; | |
1928 | ||
1929 | code = GET_CODE (x); | |
1930 | switch (code) | |
1931 | { | |
1932 | case LABEL_REF: | |
1933 | case SYMBOL_REF: | |
1934 | case CONST_INT: | |
1935 | case CONST: | |
1936 | case CONST_DOUBLE: | |
1937 | case CC0: | |
1938 | case PC: | |
1939 | case REG: | |
1940 | case SCRATCH: | |
1941 | case ASM_INPUT: | |
1942 | case ADDR_VEC: | |
1943 | case ADDR_DIFF_VEC: | |
1944 | return 0; | |
1945 | ||
1946 | case CLOBBER: | |
1947 | /* Reject CLOBBER with a non-VOID mode. These are made by combine.c | |
1948 | when some combination can't be done. If we see one, don't think | |
1949 | that we can simplify the expression. */ | |
1950 | return (GET_MODE (x) != VOIDmode); | |
1951 | ||
1952 | case PRE_INC: | |
1953 | case PRE_DEC: | |
1954 | case POST_INC: | |
1955 | case POST_DEC: | |
1fb9c5cd MH |
1956 | case PRE_MODIFY: |
1957 | case POST_MODIFY: | |
2c88418c | 1958 | case CALL: |
2ac4fed0 | 1959 | case UNSPEC_VOLATILE: |
2c88418c RS |
1960 | /* case TRAP_IF: This isn't clear yet. */ |
1961 | return 1; | |
1962 | ||
1963 | case MEM: | |
1964 | case ASM_OPERANDS: | |
1965 | if (MEM_VOLATILE_P (x)) | |
1966 | return 1; | |
e9a25f70 JL |
1967 | |
1968 | default: | |
1969 | break; | |
2c88418c RS |
1970 | } |
1971 | ||
1972 | /* Recursively scan the operands of this expression. */ | |
1973 | ||
1974 | { | |
6f7d635c | 1975 | register const char *fmt = GET_RTX_FORMAT (code); |
2c88418c RS |
1976 | register int i; |
1977 | ||
1978 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1979 | { | |
1980 | if (fmt[i] == 'e') | |
1981 | { | |
1982 | if (side_effects_p (XEXP (x, i))) | |
1983 | return 1; | |
1984 | } | |
d4757e6a | 1985 | else if (fmt[i] == 'E') |
2c88418c RS |
1986 | { |
1987 | register int j; | |
1988 | for (j = 0; j < XVECLEN (x, i); j++) | |
1989 | if (side_effects_p (XVECEXP (x, i, j))) | |
1990 | return 1; | |
1991 | } | |
1992 | } | |
1993 | } | |
1994 | return 0; | |
1995 | } | |
1996 | \f | |
1997 | /* Return nonzero if evaluating rtx X might cause a trap. */ | |
1998 | ||
1999 | int | |
2000 | may_trap_p (x) | |
2001 | rtx x; | |
2002 | { | |
2003 | int i; | |
2004 | enum rtx_code code; | |
6f7d635c | 2005 | const char *fmt; |
2c88418c RS |
2006 | |
2007 | if (x == 0) | |
2008 | return 0; | |
2009 | code = GET_CODE (x); | |
2010 | switch (code) | |
2011 | { | |
2012 | /* Handle these cases quickly. */ | |
2013 | case CONST_INT: | |
2014 | case CONST_DOUBLE: | |
2015 | case SYMBOL_REF: | |
2016 | case LABEL_REF: | |
2017 | case CONST: | |
2018 | case PC: | |
2019 | case CC0: | |
2020 | case REG: | |
2021 | case SCRATCH: | |
2022 | return 0; | |
2023 | ||
22aa60a1 | 2024 | case ASM_INPUT: |
2ac4fed0 | 2025 | case UNSPEC_VOLATILE: |
2c88418c RS |
2026 | case TRAP_IF: |
2027 | return 1; | |
2028 | ||
22aa60a1 RH |
2029 | case ASM_OPERANDS: |
2030 | return MEM_VOLATILE_P (x); | |
2031 | ||
2c88418c RS |
2032 | /* Memory ref can trap unless it's a static var or a stack slot. */ |
2033 | case MEM: | |
2034 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
2035 | ||
2036 | /* Division by a non-constant might trap. */ | |
2037 | case DIV: | |
2038 | case MOD: | |
2039 | case UDIV: | |
2040 | case UMOD: | |
e9a25f70 JL |
2041 | if (! CONSTANT_P (XEXP (x, 1)) |
2042 | || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
2c88418c RS |
2043 | return 1; |
2044 | /* This was const0_rtx, but by not using that, | |
2045 | we can link this file into other programs. */ | |
2046 | if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0) | |
2047 | return 1; | |
e9a25f70 JL |
2048 | break; |
2049 | ||
b278301b RK |
2050 | case EXPR_LIST: |
2051 | /* An EXPR_LIST is used to represent a function call. This | |
2052 | certainly may trap. */ | |
2053 | return 1; | |
e9a25f70 | 2054 | |
734508ea JW |
2055 | case GE: |
2056 | case GT: | |
2057 | case LE: | |
2058 | case LT: | |
55143861 | 2059 | case COMPARE: |
734508ea JW |
2060 | /* Some floating point comparisons may trap. */ |
2061 | /* ??? There is no machine independent way to check for tests that trap | |
2062 | when COMPARE is used, though many targets do make this distinction. | |
2063 | For instance, sparc uses CCFPE for compares which generate exceptions | |
2064 | and CCFP for compares which do not generate exceptions. */ | |
55143861 JJ |
2065 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) |
2066 | return 1; | |
2067 | /* But often the compare has some CC mode, so check operand | |
2068 | modes as well. */ | |
2069 | if (GET_MODE_CLASS (GET_MODE (XEXP (x, 0))) == MODE_FLOAT | |
2070 | || GET_MODE_CLASS (GET_MODE (XEXP (x, 1))) == MODE_FLOAT) | |
2071 | return 1; | |
2072 | break; | |
2073 | ||
05cc23e8 RH |
2074 | case NEG: |
2075 | case ABS: | |
2076 | /* These operations don't trap even with floating point. */ | |
2077 | break; | |
2078 | ||
2c88418c RS |
2079 | default: |
2080 | /* Any floating arithmetic may trap. */ | |
2081 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
2082 | return 1; | |
2083 | } | |
2084 | ||
2085 | fmt = GET_RTX_FORMAT (code); | |
2086 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2087 | { | |
2088 | if (fmt[i] == 'e') | |
2089 | { | |
2090 | if (may_trap_p (XEXP (x, i))) | |
2091 | return 1; | |
2092 | } | |
2093 | else if (fmt[i] == 'E') | |
2094 | { | |
2095 | register int j; | |
2096 | for (j = 0; j < XVECLEN (x, i); j++) | |
2097 | if (may_trap_p (XVECEXP (x, i, j))) | |
2098 | return 1; | |
2099 | } | |
2100 | } | |
2101 | return 0; | |
2102 | } | |
2103 | \f | |
2104 | /* Return nonzero if X contains a comparison that is not either EQ or NE, | |
2105 | i.e., an inequality. */ | |
2106 | ||
2107 | int | |
2108 | inequality_comparisons_p (x) | |
2109 | rtx x; | |
2110 | { | |
6f7d635c | 2111 | register const char *fmt; |
2c88418c RS |
2112 | register int len, i; |
2113 | register enum rtx_code code = GET_CODE (x); | |
2114 | ||
2115 | switch (code) | |
2116 | { | |
2117 | case REG: | |
2118 | case SCRATCH: | |
2119 | case PC: | |
2120 | case CC0: | |
2121 | case CONST_INT: | |
2122 | case CONST_DOUBLE: | |
2123 | case CONST: | |
2124 | case LABEL_REF: | |
2125 | case SYMBOL_REF: | |
2126 | return 0; | |
2127 | ||
2128 | case LT: | |
2129 | case LTU: | |
2130 | case GT: | |
2131 | case GTU: | |
2132 | case LE: | |
2133 | case LEU: | |
2134 | case GE: | |
2135 | case GEU: | |
2136 | return 1; | |
e9a25f70 JL |
2137 | |
2138 | default: | |
2139 | break; | |
2c88418c RS |
2140 | } |
2141 | ||
2142 | len = GET_RTX_LENGTH (code); | |
2143 | fmt = GET_RTX_FORMAT (code); | |
2144 | ||
2145 | for (i = 0; i < len; i++) | |
2146 | { | |
2147 | if (fmt[i] == 'e') | |
2148 | { | |
2149 | if (inequality_comparisons_p (XEXP (x, i))) | |
2150 | return 1; | |
2151 | } | |
2152 | else if (fmt[i] == 'E') | |
2153 | { | |
2154 | register int j; | |
2155 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2156 | if (inequality_comparisons_p (XVECEXP (x, i, j))) | |
2157 | return 1; | |
2158 | } | |
2159 | } | |
2160 | ||
2161 | return 0; | |
2162 | } | |
2163 | \f | |
1ed0205e VM |
2164 | /* Replace any occurrence of FROM in X with TO. The function does |
2165 | not enter into CONST_DOUBLE for the replace. | |
2c88418c RS |
2166 | |
2167 | Note that copying is not done so X must not be shared unless all copies | |
2168 | are to be modified. */ | |
2169 | ||
2170 | rtx | |
2171 | replace_rtx (x, from, to) | |
2172 | rtx x, from, to; | |
2173 | { | |
2174 | register int i, j; | |
6f7d635c | 2175 | register const char *fmt; |
2c88418c | 2176 | |
1ed0205e VM |
2177 | /* The following prevents loops occurrence when we change MEM in |
2178 | CONST_DOUBLE onto the same CONST_DOUBLE. */ | |
2179 | if (x != 0 && GET_CODE (x) == CONST_DOUBLE) | |
2180 | return x; | |
2181 | ||
2c88418c RS |
2182 | if (x == from) |
2183 | return to; | |
2184 | ||
2185 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2186 | if (x == 0) | |
2187 | return 0; | |
2188 | ||
2189 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2190 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2191 | { | |
2192 | if (fmt[i] == 'e') | |
2193 | XEXP (x, i) = replace_rtx (XEXP (x, i), from, to); | |
2194 | else if (fmt[i] == 'E') | |
2195 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2196 | XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to); | |
2197 | } | |
2198 | ||
2199 | return x; | |
2200 | } | |
2201 | \f | |
2202 | /* Throughout the rtx X, replace many registers according to REG_MAP. | |
2203 | Return the replacement for X (which may be X with altered contents). | |
2204 | REG_MAP[R] is the replacement for register R, or 0 for don't replace. | |
2205 | NREGS is the length of REG_MAP; regs >= NREGS are not mapped. | |
2206 | ||
2207 | We only support REG_MAP entries of REG or SUBREG. Also, hard registers | |
2208 | should not be mapped to pseudos or vice versa since validate_change | |
2209 | is not called. | |
2210 | ||
2211 | If REPLACE_DEST is 1, replacements are also done in destinations; | |
2212 | otherwise, only sources are replaced. */ | |
2213 | ||
2214 | rtx | |
2215 | replace_regs (x, reg_map, nregs, replace_dest) | |
2216 | rtx x; | |
2217 | rtx *reg_map; | |
770ae6cc | 2218 | unsigned int nregs; |
2c88418c RS |
2219 | int replace_dest; |
2220 | { | |
2221 | register enum rtx_code code; | |
2222 | register int i; | |
6f7d635c | 2223 | register const char *fmt; |
2c88418c RS |
2224 | |
2225 | if (x == 0) | |
2226 | return x; | |
2227 | ||
2228 | code = GET_CODE (x); | |
2229 | switch (code) | |
2230 | { | |
2231 | case SCRATCH: | |
2232 | case PC: | |
2233 | case CC0: | |
2234 | case CONST_INT: | |
2235 | case CONST_DOUBLE: | |
2236 | case CONST: | |
2237 | case SYMBOL_REF: | |
2238 | case LABEL_REF: | |
2239 | return x; | |
2240 | ||
2241 | case REG: | |
2242 | /* Verify that the register has an entry before trying to access it. */ | |
2243 | if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0) | |
3eb8f14c JW |
2244 | { |
2245 | /* SUBREGs can't be shared. Always return a copy to ensure that if | |
2246 | this replacement occurs more than once then each instance will | |
2247 | get distinct rtx. */ | |
2248 | if (GET_CODE (reg_map[REGNO (x)]) == SUBREG) | |
2249 | return copy_rtx (reg_map[REGNO (x)]); | |
2250 | return reg_map[REGNO (x)]; | |
2251 | } | |
2c88418c RS |
2252 | return x; |
2253 | ||
2254 | case SUBREG: | |
2255 | /* Prevent making nested SUBREGs. */ | |
2256 | if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs | |
2257 | && reg_map[REGNO (SUBREG_REG (x))] != 0 | |
2258 | && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) | |
2259 | { | |
2260 | rtx map_val = reg_map[REGNO (SUBREG_REG (x))]; | |
e0e08ac2 JH |
2261 | return simplify_gen_subreg (GET_MODE (x), map_val, |
2262 | GET_MODE (SUBREG_REG (x)), | |
2263 | SUBREG_BYTE (x)); | |
2c88418c RS |
2264 | } |
2265 | break; | |
2266 | ||
2267 | case SET: | |
2268 | if (replace_dest) | |
2269 | SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0); | |
2270 | ||
2271 | else if (GET_CODE (SET_DEST (x)) == MEM | |
2272 | || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART) | |
2273 | /* Even if we are not to replace destinations, replace register if it | |
2274 | is CONTAINED in destination (destination is memory or | |
2275 | STRICT_LOW_PART). */ | |
2276 | XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0), | |
2277 | reg_map, nregs, 0); | |
2278 | else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
2279 | /* Similarly, for ZERO_EXTRACT we replace all operands. */ | |
2280 | break; | |
2281 | ||
2282 | SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0); | |
2283 | return x; | |
e9a25f70 JL |
2284 | |
2285 | default: | |
2286 | break; | |
2c88418c RS |
2287 | } |
2288 | ||
2289 | fmt = GET_RTX_FORMAT (code); | |
2290 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2291 | { | |
2292 | if (fmt[i] == 'e') | |
2293 | XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest); | |
d4757e6a | 2294 | else if (fmt[i] == 'E') |
2c88418c RS |
2295 | { |
2296 | register int j; | |
2297 | for (j = 0; j < XVECLEN (x, i); j++) | |
2298 | XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map, | |
2299 | nregs, replace_dest); | |
2300 | } | |
2301 | } | |
2302 | return x; | |
2303 | } | |
2a1777af | 2304 | |
fce7e199 RH |
2305 | /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or |
2306 | constant that is not in the constant pool and not in the condition | |
2307 | of an IF_THEN_ELSE. */ | |
2a1777af JL |
2308 | |
2309 | static int | |
fce7e199 | 2310 | computed_jump_p_1 (x) |
2a1777af JL |
2311 | rtx x; |
2312 | { | |
2313 | enum rtx_code code = GET_CODE (x); | |
2314 | int i, j; | |
6f7d635c | 2315 | const char *fmt; |
2a1777af JL |
2316 | |
2317 | switch (code) | |
2318 | { | |
2a1777af JL |
2319 | case LABEL_REF: |
2320 | case PC: | |
2321 | return 0; | |
2322 | ||
fce7e199 RH |
2323 | case CONST: |
2324 | case CONST_INT: | |
2325 | case CONST_DOUBLE: | |
2326 | case SYMBOL_REF: | |
2a1777af JL |
2327 | case REG: |
2328 | return 1; | |
2329 | ||
2330 | case MEM: | |
2331 | return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
2332 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); | |
2333 | ||
2334 | case IF_THEN_ELSE: | |
fce7e199 RH |
2335 | return (computed_jump_p_1 (XEXP (x, 1)) |
2336 | || computed_jump_p_1 (XEXP (x, 2))); | |
1d300e19 KG |
2337 | |
2338 | default: | |
2339 | break; | |
2a1777af JL |
2340 | } |
2341 | ||
2342 | fmt = GET_RTX_FORMAT (code); | |
2343 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2344 | { | |
2345 | if (fmt[i] == 'e' | |
fce7e199 | 2346 | && computed_jump_p_1 (XEXP (x, i))) |
2a1777af JL |
2347 | return 1; |
2348 | ||
d4757e6a | 2349 | else if (fmt[i] == 'E') |
2a1777af | 2350 | for (j = 0; j < XVECLEN (x, i); j++) |
fce7e199 | 2351 | if (computed_jump_p_1 (XVECEXP (x, i, j))) |
2a1777af JL |
2352 | return 1; |
2353 | } | |
2354 | ||
2355 | return 0; | |
2356 | } | |
2357 | ||
2358 | /* Return nonzero if INSN is an indirect jump (aka computed jump). | |
2359 | ||
2360 | Tablejumps and casesi insns are not considered indirect jumps; | |
4eb00163 | 2361 | we can recognize them by a (use (label_ref)). */ |
2a1777af JL |
2362 | |
2363 | int | |
2364 | computed_jump_p (insn) | |
2365 | rtx insn; | |
2366 | { | |
2367 | int i; | |
2368 | if (GET_CODE (insn) == JUMP_INSN) | |
2369 | { | |
2370 | rtx pat = PATTERN (insn); | |
2a1777af | 2371 | |
f759eb8b AO |
2372 | if (find_reg_note (insn, REG_LABEL, NULL_RTX)) |
2373 | return 0; | |
2374 | else if (GET_CODE (pat) == PARALLEL) | |
2a1777af JL |
2375 | { |
2376 | int len = XVECLEN (pat, 0); | |
2377 | int has_use_labelref = 0; | |
2378 | ||
2379 | for (i = len - 1; i >= 0; i--) | |
2380 | if (GET_CODE (XVECEXP (pat, 0, i)) == USE | |
2381 | && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) | |
2382 | == LABEL_REF)) | |
2383 | has_use_labelref = 1; | |
2384 | ||
2385 | if (! has_use_labelref) | |
2386 | for (i = len - 1; i >= 0; i--) | |
2387 | if (GET_CODE (XVECEXP (pat, 0, i)) == SET | |
2388 | && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx | |
fce7e199 | 2389 | && computed_jump_p_1 (SET_SRC (XVECEXP (pat, 0, i)))) |
2a1777af JL |
2390 | return 1; |
2391 | } | |
2392 | else if (GET_CODE (pat) == SET | |
2393 | && SET_DEST (pat) == pc_rtx | |
fce7e199 | 2394 | && computed_jump_p_1 (SET_SRC (pat))) |
2a1777af JL |
2395 | return 1; |
2396 | } | |
2397 | return 0; | |
2398 | } | |
ccc2d6d0 MM |
2399 | |
2400 | /* Traverse X via depth-first search, calling F for each | |
2401 | sub-expression (including X itself). F is also passed the DATA. | |
2402 | If F returns -1, do not traverse sub-expressions, but continue | |
2403 | traversing the rest of the tree. If F ever returns any other | |
2404 | non-zero value, stop the traversal, and return the value returned | |
2405 | by F. Otherwise, return 0. This function does not traverse inside | |
2406 | tree structure that contains RTX_EXPRs, or into sub-expressions | |
2407 | whose format code is `0' since it is not known whether or not those | |
2408 | codes are actually RTL. | |
2409 | ||
2410 | This routine is very general, and could (should?) be used to | |
2411 | implement many of the other routines in this file. */ | |
2412 | ||
ae0b51ef JL |
2413 | int |
2414 | for_each_rtx (x, f, data) | |
ef30399b | 2415 | rtx *x; |
ccc2d6d0 | 2416 | rtx_function f; |
ef30399b | 2417 | void *data; |
ccc2d6d0 MM |
2418 | { |
2419 | int result; | |
2420 | int length; | |
6f7d635c | 2421 | const char* format; |
ccc2d6d0 MM |
2422 | int i; |
2423 | ||
2424 | /* Call F on X. */ | |
2425 | result = (*f)(x, data); | |
2426 | if (result == -1) | |
2427 | /* Do not traverse sub-expressions. */ | |
2428 | return 0; | |
2429 | else if (result != 0) | |
2430 | /* Stop the traversal. */ | |
2431 | return result; | |
2432 | ||
2433 | if (*x == NULL_RTX) | |
2434 | /* There are no sub-expressions. */ | |
2435 | return 0; | |
2436 | ||
2437 | length = GET_RTX_LENGTH (GET_CODE (*x)); | |
2438 | format = GET_RTX_FORMAT (GET_CODE (*x)); | |
2439 | ||
2440 | for (i = 0; i < length; ++i) | |
2441 | { | |
2442 | switch (format[i]) | |
2443 | { | |
2444 | case 'e': | |
2445 | result = for_each_rtx (&XEXP (*x, i), f, data); | |
2446 | if (result != 0) | |
2447 | return result; | |
2448 | break; | |
2449 | ||
2450 | case 'V': | |
2451 | case 'E': | |
2452 | if (XVEC (*x, i) != 0) | |
2453 | { | |
2454 | int j; | |
2455 | for (j = 0; j < XVECLEN (*x, i); ++j) | |
2456 | { | |
2457 | result = for_each_rtx (&XVECEXP (*x, i, j), f, data); | |
2458 | if (result != 0) | |
2459 | return result; | |
2460 | } | |
2461 | } | |
2462 | break; | |
2463 | ||
2464 | default: | |
2465 | /* Nothing to do. */ | |
2466 | break; | |
2467 | } | |
2468 | ||
2469 | } | |
2470 | ||
2471 | return 0; | |
2472 | } | |
3ec2b590 | 2473 | |
777b1b71 RH |
2474 | /* Searches X for any reference to REGNO, returning the rtx of the |
2475 | reference found if any. Otherwise, returns NULL_RTX. */ | |
2476 | ||
2477 | rtx | |
2478 | regno_use_in (regno, x) | |
770ae6cc | 2479 | unsigned int regno; |
777b1b71 RH |
2480 | rtx x; |
2481 | { | |
6f7d635c | 2482 | register const char *fmt; |
777b1b71 RH |
2483 | int i, j; |
2484 | rtx tem; | |
2485 | ||
2486 | if (GET_CODE (x) == REG && REGNO (x) == regno) | |
2487 | return x; | |
2488 | ||
2489 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2490 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2491 | { | |
2492 | if (fmt[i] == 'e') | |
2493 | { | |
2494 | if ((tem = regno_use_in (regno, XEXP (x, i)))) | |
2495 | return tem; | |
2496 | } | |
2497 | else if (fmt[i] == 'E') | |
2498 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2499 | if ((tem = regno_use_in (regno , XVECEXP (x, i, j)))) | |
2500 | return tem; | |
2501 | } | |
2502 | ||
2503 | return NULL_RTX; | |
2504 | } | |
2dfa9a87 | 2505 | |
e5c56fd9 JH |
2506 | /* Return a value indicating whether OP, an operand of a commutative |
2507 | operation, is preferred as the first or second operand. The higher | |
2508 | the value, the stronger the preference for being the first operand. | |
2509 | We use negative values to indicate a preference for the first operand | |
2510 | and positive values for the second operand. */ | |
2511 | ||
2512 | static int | |
2513 | operand_preference (op) | |
2514 | rtx op; | |
2515 | { | |
2516 | /* Constants always come the second operand. Prefer "nice" constants. */ | |
2517 | if (GET_CODE (op) == CONST_INT) | |
0631e0bf | 2518 | return -5; |
e5c56fd9 | 2519 | if (GET_CODE (op) == CONST_DOUBLE) |
0631e0bf | 2520 | return -4; |
e5c56fd9 | 2521 | if (CONSTANT_P (op)) |
0631e0bf | 2522 | return -3; |
e5c56fd9 JH |
2523 | |
2524 | /* SUBREGs of objects should come second. */ | |
2525 | if (GET_CODE (op) == SUBREG | |
2526 | && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op))) == 'o') | |
0631e0bf | 2527 | return -2; |
e5c56fd9 JH |
2528 | |
2529 | /* If only one operand is a `neg', `not', | |
2530 | `mult', `plus', or `minus' expression, it will be the first | |
2531 | operand. */ | |
2532 | if (GET_CODE (op) == NEG || GET_CODE (op) == NOT | |
2533 | || GET_CODE (op) == MULT || GET_CODE (op) == PLUS | |
2534 | || GET_CODE (op) == MINUS) | |
2535 | return 2; | |
2536 | ||
0631e0bf JH |
2537 | /* Complex expressions should be the first, so decrease priority |
2538 | of objects. */ | |
e5c56fd9 | 2539 | if (GET_RTX_CLASS (GET_CODE (op)) == 'o') |
0631e0bf | 2540 | return -1; |
e5c56fd9 JH |
2541 | return 0; |
2542 | } | |
2543 | ||
2544 | /* Return 1 iff it is neccesary to swap operands of commutative operation | |
2545 | in order to canonicalize expression. */ | |
2546 | ||
2547 | int | |
2548 | swap_commutative_operands_p (x, y) | |
2549 | rtx x, y; | |
2550 | { | |
2551 | return operand_preference (x) < operand_preference (y); | |
2552 | } | |
2dfa9a87 MH |
2553 | |
2554 | /* Return 1 if X is an autoincrement side effect and the register is | |
2555 | not the stack pointer. */ | |
2556 | int | |
2557 | auto_inc_p (x) | |
2558 | rtx x; | |
2559 | { | |
2560 | switch (GET_CODE (x)) | |
2561 | { | |
2562 | case PRE_INC: | |
2563 | case POST_INC: | |
2564 | case PRE_DEC: | |
2565 | case POST_DEC: | |
2566 | case PRE_MODIFY: | |
2567 | case POST_MODIFY: | |
2568 | /* There are no REG_INC notes for SP. */ | |
2569 | if (XEXP (x, 0) != stack_pointer_rtx) | |
2570 | return 1; | |
2571 | default: | |
2572 | break; | |
2573 | } | |
2574 | return 0; | |
2575 | } | |
3b10cf4b MM |
2576 | |
2577 | /* Return 1 if the sequence of instructions beginning with FROM and up | |
2578 | to and including TO is safe to move. If NEW_TO is non-NULL, and | |
2579 | the sequence is not already safe to move, but can be easily | |
2580 | extended to a sequence which is safe, then NEW_TO will point to the | |
7015a814 MM |
2581 | end of the extended sequence. |
2582 | ||
2583 | For now, this function only checks that the region contains whole | |
5bea1ccf | 2584 | exception regions, but it could be extended to check additional |
7015a814 | 2585 | conditions as well. */ |
3b10cf4b MM |
2586 | |
2587 | int | |
2588 | insns_safe_to_move_p (from, to, new_to) | |
2589 | rtx from; | |
2590 | rtx to; | |
2591 | rtx *new_to; | |
2592 | { | |
2593 | int eh_region_count = 0; | |
2594 | int past_to_p = 0; | |
2595 | rtx r = from; | |
2596 | ||
7015a814 MM |
2597 | /* By default, assume the end of the region will be what was |
2598 | suggested. */ | |
2599 | if (new_to) | |
2600 | *new_to = to; | |
2601 | ||
3b10cf4b MM |
2602 | while (r) |
2603 | { | |
2604 | if (GET_CODE (r) == NOTE) | |
2605 | { | |
2606 | switch (NOTE_LINE_NUMBER (r)) | |
2607 | { | |
2608 | case NOTE_INSN_EH_REGION_BEG: | |
2609 | ++eh_region_count; | |
2610 | break; | |
2611 | ||
2612 | case NOTE_INSN_EH_REGION_END: | |
2613 | if (eh_region_count == 0) | |
2614 | /* This sequence of instructions contains the end of | |
2615 | an exception region, but not he beginning. Moving | |
2616 | it will cause chaos. */ | |
2617 | return 0; | |
2618 | ||
2619 | --eh_region_count; | |
2620 | break; | |
2621 | ||
2622 | default: | |
2623 | break; | |
2624 | } | |
2625 | } | |
2626 | else if (past_to_p) | |
2627 | /* If we've passed TO, and we see a non-note instruction, we | |
2628 | can't extend the sequence to a movable sequence. */ | |
2629 | return 0; | |
2630 | ||
2631 | if (r == to) | |
2632 | { | |
2633 | if (!new_to) | |
2634 | /* It's OK to move the sequence if there were matched sets of | |
2635 | exception region notes. */ | |
2636 | return eh_region_count == 0; | |
2637 | ||
2638 | past_to_p = 1; | |
2639 | } | |
2640 | ||
2641 | /* It's OK to move the sequence if there were matched sets of | |
2642 | exception region notes. */ | |
2643 | if (past_to_p && eh_region_count == 0) | |
2644 | { | |
2645 | *new_to = r; | |
2646 | return 1; | |
2647 | } | |
2648 | ||
2649 | /* Go to the next instruction. */ | |
2650 | r = NEXT_INSN (r); | |
2651 | } | |
2652 | ||
2653 | return 0; | |
2654 | } | |
db7ba742 R |
2655 | |
2656 | /* Return non-zero if IN contains a piece of rtl that has the address LOC */ | |
2657 | int | |
2658 | loc_mentioned_in_p (loc, in) | |
2659 | rtx *loc, in; | |
2660 | { | |
2661 | enum rtx_code code = GET_CODE (in); | |
2662 | const char *fmt = GET_RTX_FORMAT (code); | |
2663 | int i, j; | |
2664 | ||
2665 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2666 | { | |
2667 | if (loc == &in->fld[i].rtx) | |
2668 | return 1; | |
2669 | if (fmt[i] == 'e') | |
2670 | { | |
2671 | if (loc_mentioned_in_p (loc, XEXP (in, i))) | |
2672 | return 1; | |
2673 | } | |
2674 | else if (fmt[i] == 'E') | |
2675 | for (j = XVECLEN (in, i) - 1; j >= 0; j--) | |
2676 | if (loc_mentioned_in_p (loc, XVECEXP (in, i, j))) | |
2677 | return 1; | |
2678 | } | |
2679 | return 0; | |
2680 | } | |
ddef6bc7 JJ |
2681 | |
2682 | /* This function returns the regno offset of a subreg expression. | |
2683 | xregno - A regno of an inner hard subreg_reg (or what will become one). | |
2684 | xmode - The mode of xregno. | |
2685 | offset - The byte offset. | |
2686 | ymode - The mode of a top level SUBREG (or what may become one). | |
2687 | RETURN - The regno offset which would be used. | |
2688 | This function can be overridden by defining SUBREG_REGNO_OFFSET, | |
2689 | taking the same parameters. */ | |
2690 | unsigned int | |
2691 | subreg_regno_offset (xregno, xmode, offset, ymode) | |
2692 | unsigned int xregno; | |
2693 | enum machine_mode xmode; | |
2694 | unsigned int offset; | |
2695 | enum machine_mode ymode; | |
2696 | { | |
2697 | unsigned ret; | |
2698 | int nregs_xmode, nregs_ymode; | |
2699 | int mode_multiple, nregs_multiple; | |
2700 | int y_offset; | |
2701 | ||
2702 | /* Check for an override, and use it instead. */ | |
2703 | #ifdef SUBREG_REGNO_OFFSET | |
2704 | ret = SUBREG_REGNO_OFFSET (xregno, xmode, offset, ymode) | |
2705 | #else | |
2706 | if (xregno >= FIRST_PSEUDO_REGISTER) | |
2707 | abort (); | |
2708 | ||
2709 | nregs_xmode = HARD_REGNO_NREGS (xregno, xmode); | |
2710 | nregs_ymode = HARD_REGNO_NREGS (xregno, ymode); | |
2711 | if (offset == 0 || nregs_xmode == nregs_ymode) | |
2712 | return 0; | |
2713 | ||
2714 | /* size of ymode must not be greater than the size of xmode. */ | |
2715 | mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode); | |
2716 | if (mode_multiple == 0) | |
2717 | abort (); | |
2718 | ||
2719 | y_offset = offset / GET_MODE_SIZE (ymode); | |
2720 | nregs_multiple = nregs_xmode / nregs_ymode; | |
2721 | ret = (y_offset / (mode_multiple / nregs_multiple)) * nregs_ymode; | |
2722 | #endif | |
2723 | ||
2724 | return ret; | |
2725 | } | |
2726 | ||
2727 | /* Return the final regno that a subreg expression refers to. */ | |
2728 | unsigned int | |
2729 | subreg_regno (x) | |
2730 | rtx x; | |
2731 | { | |
2732 | unsigned int ret; | |
2733 | rtx subreg = SUBREG_REG (x); | |
2734 | int regno = REGNO (subreg); | |
2735 | ||
2736 | ret = regno + subreg_regno_offset (regno, | |
2737 | GET_MODE (subreg), | |
2738 | SUBREG_BYTE (x), | |
2739 | GET_MODE (x)); | |
2740 | return ret; | |
2741 | ||
2742 | } |