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2c88418c | 1 | /* Analyze RTL for C-Compiler |
af841dbd JL |
2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
3 | 1999, 2000 Free Software Foundation, Inc. | |
2c88418c RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
e99215a3 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
2c88418c RS |
21 | |
22 | ||
23 | #include "config.h" | |
670ee920 | 24 | #include "system.h" |
2c88418c RS |
25 | #include "rtl.h" |
26 | ||
cdadb1dd KG |
27 | static int rtx_addr_can_trap_p PARAMS ((rtx)); |
28 | static void reg_set_p_1 PARAMS ((rtx, rtx, void *)); | |
29 | static void reg_set_last_1 PARAMS ((rtx, rtx, void *)); | |
2c88418c | 30 | |
2a1777af JL |
31 | |
32 | /* Forward declarations */ | |
cdadb1dd | 33 | static int jmp_uses_reg_or_mem PARAMS ((rtx)); |
2a1777af | 34 | |
2c88418c RS |
35 | /* Bit flags that specify the machine subtype we are compiling for. |
36 | Bits are tested using macros TARGET_... defined in the tm.h file | |
37 | and set by `-m...' switches. Must be defined in rtlanal.c. */ | |
38 | ||
39 | int target_flags; | |
40 | \f | |
41 | /* Return 1 if the value of X is unstable | |
42 | (would be different at a different point in the program). | |
43 | The frame pointer, arg pointer, etc. are considered stable | |
44 | (within one function) and so is anything marked `unchanging'. */ | |
45 | ||
46 | int | |
47 | rtx_unstable_p (x) | |
48 | rtx x; | |
49 | { | |
50 | register RTX_CODE code = GET_CODE (x); | |
51 | register int i; | |
6f7d635c | 52 | register const char *fmt; |
2c88418c RS |
53 | |
54 | if (code == MEM) | |
55 | return ! RTX_UNCHANGING_P (x); | |
56 | ||
57 | if (code == QUEUED) | |
58 | return 1; | |
59 | ||
60 | if (code == CONST || code == CONST_INT) | |
61 | return 0; | |
62 | ||
63 | if (code == REG) | |
64 | return ! (REGNO (x) == FRAME_POINTER_REGNUM | |
b3b6c9b3 | 65 | || REGNO (x) == HARD_FRAME_POINTER_REGNUM |
2c88418c RS |
66 | || REGNO (x) == ARG_POINTER_REGNUM |
67 | || RTX_UNCHANGING_P (x)); | |
68 | ||
69 | fmt = GET_RTX_FORMAT (code); | |
70 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
71 | if (fmt[i] == 'e') | |
72 | if (rtx_unstable_p (XEXP (x, i))) | |
73 | return 1; | |
74 | return 0; | |
75 | } | |
76 | ||
77 | /* Return 1 if X has a value that can vary even between two | |
78 | executions of the program. 0 means X can be compared reliably | |
79 | against certain constants or near-constants. | |
80 | The frame pointer and the arg pointer are considered constant. */ | |
81 | ||
82 | int | |
83 | rtx_varies_p (x) | |
84 | rtx x; | |
85 | { | |
86 | register RTX_CODE code = GET_CODE (x); | |
87 | register int i; | |
6f7d635c | 88 | register const char *fmt; |
2c88418c RS |
89 | |
90 | switch (code) | |
91 | { | |
92 | case MEM: | |
93 | case QUEUED: | |
94 | return 1; | |
95 | ||
96 | case CONST: | |
97 | case CONST_INT: | |
98 | case CONST_DOUBLE: | |
99 | case SYMBOL_REF: | |
100 | case LABEL_REF: | |
101 | return 0; | |
102 | ||
103 | case REG: | |
104 | /* Note that we have to test for the actual rtx used for the frame | |
105 | and arg pointers and not just the register number in case we have | |
106 | eliminated the frame and/or arg pointer and are using it | |
107 | for pseudos. */ | |
b3b6c9b3 | 108 | return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
e5e809f4 | 109 | || x == arg_pointer_rtx || x == pic_offset_table_rtx); |
2c88418c RS |
110 | |
111 | case LO_SUM: | |
112 | /* The operand 0 of a LO_SUM is considered constant | |
113 | (in fact is it related specifically to operand 1). */ | |
114 | return rtx_varies_p (XEXP (x, 1)); | |
e9a25f70 JL |
115 | |
116 | default: | |
117 | break; | |
2c88418c RS |
118 | } |
119 | ||
120 | fmt = GET_RTX_FORMAT (code); | |
121 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
122 | if (fmt[i] == 'e') | |
123 | if (rtx_varies_p (XEXP (x, i))) | |
124 | return 1; | |
125 | return 0; | |
126 | } | |
127 | ||
128 | /* Return 0 if the use of X as an address in a MEM can cause a trap. */ | |
129 | ||
e9a25f70 | 130 | static int |
2c88418c RS |
131 | rtx_addr_can_trap_p (x) |
132 | register rtx x; | |
133 | { | |
134 | register enum rtx_code code = GET_CODE (x); | |
135 | ||
136 | switch (code) | |
137 | { | |
138 | case SYMBOL_REF: | |
139 | case LABEL_REF: | |
140 | /* SYMBOL_REF is problematic due to the possible presence of | |
141 | a #pragma weak, but to say that loads from symbols can trap is | |
142 | *very* costly. It's not at all clear what's best here. For | |
143 | now, we ignore the impact of #pragma weak. */ | |
144 | return 0; | |
145 | ||
146 | case REG: | |
147 | /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ | |
b3b6c9b3 DE |
148 | return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
149 | || x == stack_pointer_rtx || x == arg_pointer_rtx); | |
2c88418c RS |
150 | |
151 | case CONST: | |
152 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
153 | ||
154 | case PLUS: | |
155 | /* An address is assumed not to trap if it is an address that can't | |
156 | trap plus a constant integer. */ | |
157 | return (rtx_addr_can_trap_p (XEXP (x, 0)) | |
158 | || GET_CODE (XEXP (x, 1)) != CONST_INT); | |
159 | ||
160 | case LO_SUM: | |
161 | return rtx_addr_can_trap_p (XEXP (x, 1)); | |
e9a25f70 JL |
162 | |
163 | default: | |
164 | break; | |
2c88418c RS |
165 | } |
166 | ||
167 | /* If it isn't one of the case above, it can cause a trap. */ | |
168 | return 1; | |
169 | } | |
170 | ||
171 | /* Return 1 if X refers to a memory location whose address | |
172 | cannot be compared reliably with constant addresses, | |
173 | or if X refers to a BLKmode memory object. */ | |
174 | ||
175 | int | |
176 | rtx_addr_varies_p (x) | |
177 | rtx x; | |
178 | { | |
179 | register enum rtx_code code; | |
180 | register int i; | |
6f7d635c | 181 | register const char *fmt; |
2c88418c RS |
182 | |
183 | if (x == 0) | |
184 | return 0; | |
185 | ||
186 | code = GET_CODE (x); | |
187 | if (code == MEM) | |
188 | return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0)); | |
189 | ||
190 | fmt = GET_RTX_FORMAT (code); | |
191 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
192 | if (fmt[i] == 'e') | |
833c0b26 RK |
193 | { |
194 | if (rtx_addr_varies_p (XEXP (x, i))) | |
195 | return 1; | |
196 | } | |
197 | else if (fmt[i] == 'E') | |
198 | { | |
199 | int j; | |
200 | for (j = 0; j < XVECLEN (x, i); j++) | |
201 | if (rtx_addr_varies_p (XVECEXP (x, i, j))) | |
202 | return 1; | |
203 | } | |
2c88418c RS |
204 | return 0; |
205 | } | |
206 | \f | |
207 | /* Return the value of the integer term in X, if one is apparent; | |
208 | otherwise return 0. | |
209 | Only obvious integer terms are detected. | |
210 | This is used in cse.c with the `related_value' field.*/ | |
211 | ||
c166a311 | 212 | HOST_WIDE_INT |
2c88418c RS |
213 | get_integer_term (x) |
214 | rtx x; | |
215 | { | |
216 | if (GET_CODE (x) == CONST) | |
217 | x = XEXP (x, 0); | |
218 | ||
219 | if (GET_CODE (x) == MINUS | |
220 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
221 | return - INTVAL (XEXP (x, 1)); | |
222 | if (GET_CODE (x) == PLUS | |
223 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
224 | return INTVAL (XEXP (x, 1)); | |
225 | return 0; | |
226 | } | |
227 | ||
228 | /* If X is a constant, return the value sans apparent integer term; | |
229 | otherwise return 0. | |
230 | Only obvious integer terms are detected. */ | |
231 | ||
232 | rtx | |
233 | get_related_value (x) | |
234 | rtx x; | |
235 | { | |
236 | if (GET_CODE (x) != CONST) | |
237 | return 0; | |
238 | x = XEXP (x, 0); | |
239 | if (GET_CODE (x) == PLUS | |
240 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
241 | return XEXP (x, 0); | |
242 | else if (GET_CODE (x) == MINUS | |
243 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
244 | return XEXP (x, 0); | |
245 | return 0; | |
246 | } | |
247 | \f | |
248 | /* Nonzero if register REG appears somewhere within IN. | |
249 | Also works if REG is not a register; in this case it checks | |
250 | for a subexpression of IN that is Lisp "equal" to REG. */ | |
251 | ||
252 | int | |
253 | reg_mentioned_p (reg, in) | |
254 | register rtx reg, in; | |
255 | { | |
6f7d635c | 256 | register const char *fmt; |
2c88418c RS |
257 | register int i; |
258 | register enum rtx_code code; | |
259 | ||
260 | if (in == 0) | |
261 | return 0; | |
262 | ||
263 | if (reg == in) | |
264 | return 1; | |
265 | ||
266 | if (GET_CODE (in) == LABEL_REF) | |
267 | return reg == XEXP (in, 0); | |
268 | ||
269 | code = GET_CODE (in); | |
270 | ||
271 | switch (code) | |
272 | { | |
273 | /* Compare registers by number. */ | |
274 | case REG: | |
275 | return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); | |
276 | ||
277 | /* These codes have no constituent expressions | |
278 | and are unique. */ | |
279 | case SCRATCH: | |
280 | case CC0: | |
281 | case PC: | |
282 | return 0; | |
283 | ||
284 | case CONST_INT: | |
285 | return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); | |
286 | ||
287 | case CONST_DOUBLE: | |
288 | /* These are kept unique for a given value. */ | |
289 | return 0; | |
e9a25f70 JL |
290 | |
291 | default: | |
292 | break; | |
2c88418c RS |
293 | } |
294 | ||
295 | if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) | |
296 | return 1; | |
297 | ||
298 | fmt = GET_RTX_FORMAT (code); | |
299 | ||
300 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
301 | { | |
302 | if (fmt[i] == 'E') | |
303 | { | |
304 | register int j; | |
305 | for (j = XVECLEN (in, i) - 1; j >= 0; j--) | |
306 | if (reg_mentioned_p (reg, XVECEXP (in, i, j))) | |
307 | return 1; | |
308 | } | |
309 | else if (fmt[i] == 'e' | |
310 | && reg_mentioned_p (reg, XEXP (in, i))) | |
311 | return 1; | |
312 | } | |
313 | return 0; | |
314 | } | |
315 | \f | |
316 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is | |
317 | no CODE_LABEL insn. */ | |
318 | ||
319 | int | |
320 | no_labels_between_p (beg, end) | |
321 | rtx beg, end; | |
322 | { | |
323 | register rtx p; | |
324 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
325 | if (GET_CODE (p) == CODE_LABEL) | |
326 | return 0; | |
327 | return 1; | |
328 | } | |
329 | ||
3ec2b590 R |
330 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is |
331 | no JUMP_INSN insn. */ | |
332 | ||
333 | int | |
334 | no_jumps_between_p (beg, end) | |
335 | rtx beg, end; | |
336 | { | |
337 | register rtx p; | |
338 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
339 | if (GET_CODE (p) == JUMP_INSN) | |
340 | return 0; | |
341 | return 1; | |
342 | } | |
343 | ||
2c88418c RS |
344 | /* Nonzero if register REG is used in an insn between |
345 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
346 | ||
347 | int | |
348 | reg_used_between_p (reg, from_insn, to_insn) | |
349 | rtx reg, from_insn, to_insn; | |
350 | { | |
351 | register rtx insn; | |
352 | ||
353 | if (from_insn == to_insn) | |
354 | return 0; | |
355 | ||
356 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
357 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
8f3e7a26 RK |
358 | && (reg_overlap_mentioned_p (reg, PATTERN (insn)) |
359 | || (GET_CODE (insn) == CALL_INSN | |
360 | && (find_reg_fusage (insn, USE, reg) | |
361 | || find_reg_fusage (insn, CLOBBER, reg))))) | |
2c88418c RS |
362 | return 1; |
363 | return 0; | |
364 | } | |
365 | \f | |
366 | /* Nonzero if the old value of X, a register, is referenced in BODY. If X | |
367 | is entirely replaced by a new value and the only use is as a SET_DEST, | |
368 | we do not consider it a reference. */ | |
369 | ||
370 | int | |
371 | reg_referenced_p (x, body) | |
372 | rtx x; | |
373 | rtx body; | |
374 | { | |
375 | int i; | |
376 | ||
377 | switch (GET_CODE (body)) | |
378 | { | |
379 | case SET: | |
380 | if (reg_overlap_mentioned_p (x, SET_SRC (body))) | |
381 | return 1; | |
382 | ||
383 | /* If the destination is anything other than CC0, PC, a REG or a SUBREG | |
384 | of a REG that occupies all of the REG, the insn references X if | |
385 | it is mentioned in the destination. */ | |
386 | if (GET_CODE (SET_DEST (body)) != CC0 | |
387 | && GET_CODE (SET_DEST (body)) != PC | |
388 | && GET_CODE (SET_DEST (body)) != REG | |
389 | && ! (GET_CODE (SET_DEST (body)) == SUBREG | |
390 | && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG | |
391 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) | |
392 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
393 | == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) | |
394 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) | |
395 | && reg_overlap_mentioned_p (x, SET_DEST (body))) | |
396 | return 1; | |
e9a25f70 | 397 | return 0; |
2c88418c RS |
398 | |
399 | case ASM_OPERANDS: | |
400 | for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) | |
401 | if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) | |
402 | return 1; | |
e9a25f70 | 403 | return 0; |
2c88418c RS |
404 | |
405 | case CALL: | |
406 | case USE: | |
14a774a9 | 407 | case IF_THEN_ELSE: |
2c88418c RS |
408 | return reg_overlap_mentioned_p (x, body); |
409 | ||
410 | case TRAP_IF: | |
411 | return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); | |
412 | ||
2ac4fed0 RK |
413 | case UNSPEC: |
414 | case UNSPEC_VOLATILE: | |
2f9fb4c2 R |
415 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) |
416 | if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i))) | |
417 | return 1; | |
418 | return 0; | |
419 | ||
2c88418c RS |
420 | case PARALLEL: |
421 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) | |
422 | if (reg_referenced_p (x, XVECEXP (body, 0, i))) | |
423 | return 1; | |
e9a25f70 JL |
424 | return 0; |
425 | ||
0d3ffb5a GK |
426 | case CLOBBER: |
427 | if (GET_CODE (XEXP (body, 0)) == MEM) | |
428 | if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0))) | |
429 | return 1; | |
430 | return 0; | |
431 | ||
0c99ec5c RH |
432 | case COND_EXEC: |
433 | if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body))) | |
434 | return 1; | |
435 | return reg_referenced_p (x, COND_EXEC_CODE (body)); | |
436 | ||
e9a25f70 JL |
437 | default: |
438 | return 0; | |
2c88418c | 439 | } |
2c88418c RS |
440 | } |
441 | ||
442 | /* Nonzero if register REG is referenced in an insn between | |
443 | FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do | |
0f41302f | 444 | not count. */ |
2c88418c RS |
445 | |
446 | int | |
447 | reg_referenced_between_p (reg, from_insn, to_insn) | |
448 | rtx reg, from_insn, to_insn; | |
449 | { | |
450 | register rtx insn; | |
451 | ||
452 | if (from_insn == to_insn) | |
453 | return 0; | |
454 | ||
455 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
456 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
8f3e7a26 RK |
457 | && (reg_referenced_p (reg, PATTERN (insn)) |
458 | || (GET_CODE (insn) == CALL_INSN | |
459 | && find_reg_fusage (insn, USE, reg)))) | |
2c88418c RS |
460 | return 1; |
461 | return 0; | |
462 | } | |
463 | \f | |
464 | /* Nonzero if register REG is set or clobbered in an insn between | |
465 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
466 | ||
467 | int | |
468 | reg_set_between_p (reg, from_insn, to_insn) | |
469 | rtx reg, from_insn, to_insn; | |
470 | { | |
471 | register rtx insn; | |
472 | ||
473 | if (from_insn == to_insn) | |
474 | return 0; | |
475 | ||
476 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
477 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
84607dc1 | 478 | && reg_set_p (reg, insn)) |
2c88418c RS |
479 | return 1; |
480 | return 0; | |
481 | } | |
482 | ||
483 | /* Internals of reg_set_between_p. */ | |
484 | ||
485 | static rtx reg_set_reg; | |
486 | static int reg_set_flag; | |
487 | ||
5f91c709 | 488 | static void |
84832317 | 489 | reg_set_p_1 (x, pat, data) |
d6f4ec51 KG |
490 | rtx x; |
491 | rtx pat ATTRIBUTE_UNUSED; | |
84832317 | 492 | void *data ATTRIBUTE_UNUSED; |
2c88418c RS |
493 | { |
494 | /* We don't want to return 1 if X is a MEM that contains a register | |
495 | within REG_SET_REG. */ | |
496 | ||
497 | if ((GET_CODE (x) != MEM) | |
498 | && reg_overlap_mentioned_p (reg_set_reg, x)) | |
499 | reg_set_flag = 1; | |
500 | } | |
501 | ||
502 | int | |
503 | reg_set_p (reg, insn) | |
504 | rtx reg, insn; | |
505 | { | |
506 | rtx body = insn; | |
507 | ||
508 | /* We can be passed an insn or part of one. If we are passed an insn, | |
509 | check if a side-effect of the insn clobbers REG. */ | |
510 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
511 | { | |
512 | if (FIND_REG_INC_NOTE (insn, reg) | |
513 | || (GET_CODE (insn) == CALL_INSN | |
514 | /* We'd like to test call_used_regs here, but rtlanal.c can't | |
515 | reference that variable due to its use in genattrtab. So | |
8f3e7a26 RK |
516 | we'll just be more conservative. |
517 | ||
518 | ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE | |
519 | information holds all clobbered registers. */ | |
2c88418c RS |
520 | && ((GET_CODE (reg) == REG |
521 | && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
8f3e7a26 RK |
522 | || GET_CODE (reg) == MEM |
523 | || find_reg_fusage (insn, CLOBBER, reg)))) | |
2c88418c RS |
524 | return 1; |
525 | ||
526 | body = PATTERN (insn); | |
527 | } | |
528 | ||
529 | reg_set_reg = reg; | |
530 | reg_set_flag = 0; | |
84832317 | 531 | note_stores (body, reg_set_p_1, NULL); |
2c88418c RS |
532 | return reg_set_flag; |
533 | } | |
534 | ||
a2e1a0bf RH |
535 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
536 | only if none of them are modified between START and END. Do not | |
537 | consider non-registers one way or the other. */ | |
538 | ||
539 | int | |
540 | regs_set_between_p (x, start, end) | |
541 | rtx x; | |
542 | rtx start, end; | |
543 | { | |
544 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 545 | const char *fmt; |
a2e1a0bf RH |
546 | int i, j; |
547 | ||
548 | switch (code) | |
549 | { | |
550 | case CONST_INT: | |
551 | case CONST_DOUBLE: | |
552 | case CONST: | |
553 | case SYMBOL_REF: | |
554 | case LABEL_REF: | |
555 | case PC: | |
556 | case CC0: | |
557 | return 0; | |
558 | ||
559 | case REG: | |
560 | return reg_set_between_p (x, start, end); | |
561 | ||
562 | default: | |
563 | break; | |
564 | } | |
565 | ||
566 | fmt = GET_RTX_FORMAT (code); | |
567 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
568 | { | |
569 | if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end)) | |
570 | return 1; | |
571 | ||
572 | else if (fmt[i] == 'E') | |
573 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
574 | if (regs_set_between_p (XVECEXP (x, i, j), start, end)) | |
575 | return 1; | |
576 | } | |
577 | ||
578 | return 0; | |
579 | } | |
580 | ||
2c88418c RS |
581 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
582 | only if none of them are modified between START and END. Return 1 if | |
583 | X contains a MEM; this routine does not perform any memory aliasing. */ | |
584 | ||
585 | int | |
586 | modified_between_p (x, start, end) | |
587 | rtx x; | |
588 | rtx start, end; | |
589 | { | |
590 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 591 | const char *fmt; |
f8163c92 | 592 | int i, j; |
2c88418c RS |
593 | |
594 | switch (code) | |
595 | { | |
596 | case CONST_INT: | |
597 | case CONST_DOUBLE: | |
598 | case CONST: | |
599 | case SYMBOL_REF: | |
600 | case LABEL_REF: | |
601 | return 0; | |
602 | ||
603 | case PC: | |
604 | case CC0: | |
605 | return 1; | |
606 | ||
607 | case MEM: | |
608 | /* If the memory is not constant, assume it is modified. If it is | |
609 | constant, we still have to check the address. */ | |
610 | if (! RTX_UNCHANGING_P (x)) | |
611 | return 1; | |
612 | break; | |
613 | ||
614 | case REG: | |
615 | return reg_set_between_p (x, start, end); | |
e9a25f70 JL |
616 | |
617 | default: | |
618 | break; | |
2c88418c RS |
619 | } |
620 | ||
621 | fmt = GET_RTX_FORMAT (code); | |
622 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
f8163c92 RK |
623 | { |
624 | if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) | |
625 | return 1; | |
626 | ||
d4757e6a | 627 | else if (fmt[i] == 'E') |
f8163c92 RK |
628 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
629 | if (modified_between_p (XVECEXP (x, i, j), start, end)) | |
630 | return 1; | |
631 | } | |
632 | ||
633 | return 0; | |
634 | } | |
635 | ||
636 | /* Similar to reg_set_p, but check all registers in X. Return 0 only if none | |
637 | of them are modified in INSN. Return 1 if X contains a MEM; this routine | |
638 | does not perform any memory aliasing. */ | |
639 | ||
640 | int | |
641 | modified_in_p (x, insn) | |
642 | rtx x; | |
643 | rtx insn; | |
644 | { | |
645 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 646 | const char *fmt; |
f8163c92 RK |
647 | int i, j; |
648 | ||
649 | switch (code) | |
650 | { | |
651 | case CONST_INT: | |
652 | case CONST_DOUBLE: | |
653 | case CONST: | |
654 | case SYMBOL_REF: | |
655 | case LABEL_REF: | |
656 | return 0; | |
657 | ||
658 | case PC: | |
659 | case CC0: | |
2c88418c RS |
660 | return 1; |
661 | ||
f8163c92 RK |
662 | case MEM: |
663 | /* If the memory is not constant, assume it is modified. If it is | |
664 | constant, we still have to check the address. */ | |
665 | if (! RTX_UNCHANGING_P (x)) | |
666 | return 1; | |
667 | break; | |
668 | ||
669 | case REG: | |
670 | return reg_set_p (x, insn); | |
e9a25f70 JL |
671 | |
672 | default: | |
673 | break; | |
f8163c92 RK |
674 | } |
675 | ||
676 | fmt = GET_RTX_FORMAT (code); | |
677 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
678 | { | |
679 | if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) | |
680 | return 1; | |
681 | ||
d4757e6a | 682 | else if (fmt[i] == 'E') |
f8163c92 RK |
683 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
684 | if (modified_in_p (XVECEXP (x, i, j), insn)) | |
685 | return 1; | |
686 | } | |
687 | ||
2c88418c RS |
688 | return 0; |
689 | } | |
690 | \f | |
691 | /* Given an INSN, return a SET expression if this insn has only a single SET. | |
692 | It may also have CLOBBERs, USEs, or SET whose output | |
693 | will not be used, which we ignore. */ | |
694 | ||
695 | rtx | |
696 | single_set (insn) | |
697 | rtx insn; | |
698 | { | |
699 | rtx set; | |
700 | int i; | |
701 | ||
702 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
703 | return 0; | |
704 | ||
705 | if (GET_CODE (PATTERN (insn)) == SET) | |
706 | return PATTERN (insn); | |
707 | ||
708 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
709 | { | |
710 | for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
787ccee0 RH |
711 | { |
712 | rtx sub = XVECEXP (PATTERN (insn), 0, i); | |
713 | ||
714 | switch (GET_CODE (sub)) | |
715 | { | |
716 | case USE: | |
717 | case CLOBBER: | |
718 | break; | |
719 | ||
720 | case SET: | |
721 | if (! find_reg_note (insn, REG_UNUSED, SET_DEST (sub)) | |
722 | || side_effects_p (sub)) | |
723 | { | |
724 | if (set) | |
725 | return 0; | |
726 | else | |
727 | set = sub; | |
728 | } | |
729 | break; | |
730 | ||
731 | default: | |
2c88418c | 732 | return 0; |
787ccee0 RH |
733 | } |
734 | } | |
2c88418c RS |
735 | return set; |
736 | } | |
737 | ||
738 | return 0; | |
739 | } | |
941c63ac JL |
740 | |
741 | /* Given an INSN, return nonzero if it has more than one SET, else return | |
742 | zero. */ | |
743 | ||
5f7d3786 | 744 | int |
941c63ac JL |
745 | multiple_sets (insn) |
746 | rtx insn; | |
747 | { | |
cae8acdd | 748 | int found; |
941c63ac JL |
749 | int i; |
750 | ||
751 | /* INSN must be an insn. */ | |
752 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
753 | return 0; | |
754 | ||
755 | /* Only a PARALLEL can have multiple SETs. */ | |
756 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
757 | { | |
758 | for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
759 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) | |
760 | { | |
761 | /* If we have already found a SET, then return now. */ | |
762 | if (found) | |
763 | return 1; | |
764 | else | |
765 | found = 1; | |
766 | } | |
767 | } | |
768 | ||
769 | /* Either zero or one SET. */ | |
770 | return 0; | |
771 | } | |
2c88418c | 772 | \f |
63be01fb JW |
773 | /* Return the last thing that X was assigned from before *PINSN. If VALID_TO |
774 | is not NULL_RTX then verify that the object is not modified up to VALID_TO. | |
775 | If the object was modified, if we hit a partial assignment to X, or hit a | |
776 | CODE_LABEL first, return X. If we found an assignment, update *PINSN to | |
777 | point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to | |
778 | be the src. */ | |
2c88418c RS |
779 | |
780 | rtx | |
89d3d442 | 781 | find_last_value (x, pinsn, valid_to, allow_hwreg) |
2c88418c RS |
782 | rtx x; |
783 | rtx *pinsn; | |
784 | rtx valid_to; | |
89d3d442 | 785 | int allow_hwreg; |
2c88418c RS |
786 | { |
787 | rtx p; | |
788 | ||
789 | for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL; | |
790 | p = PREV_INSN (p)) | |
791 | if (GET_RTX_CLASS (GET_CODE (p)) == 'i') | |
792 | { | |
793 | rtx set = single_set (p); | |
c166a311 | 794 | rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); |
2c88418c RS |
795 | |
796 | if (set && rtx_equal_p (x, SET_DEST (set))) | |
797 | { | |
798 | rtx src = SET_SRC (set); | |
799 | ||
800 | if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST) | |
801 | src = XEXP (note, 0); | |
802 | ||
63be01fb JW |
803 | if ((valid_to == NULL_RTX |
804 | || ! modified_between_p (src, PREV_INSN (p), valid_to)) | |
2c88418c RS |
805 | /* Reject hard registers because we don't usually want |
806 | to use them; we'd rather use a pseudo. */ | |
89d3d442 AM |
807 | && (! (GET_CODE (src) == REG |
808 | && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg)) | |
2c88418c RS |
809 | { |
810 | *pinsn = p; | |
811 | return src; | |
812 | } | |
813 | } | |
814 | ||
815 | /* If set in non-simple way, we don't have a value. */ | |
816 | if (reg_set_p (x, p)) | |
817 | break; | |
818 | } | |
819 | ||
820 | return x; | |
821 | } | |
822 | \f | |
823 | /* Return nonzero if register in range [REGNO, ENDREGNO) | |
824 | appears either explicitly or implicitly in X | |
825 | other than being stored into. | |
826 | ||
827 | References contained within the substructure at LOC do not count. | |
828 | LOC may be zero, meaning don't ignore anything. */ | |
829 | ||
830 | int | |
831 | refers_to_regno_p (regno, endregno, x, loc) | |
770ae6cc | 832 | unsigned int regno, endregno; |
2c88418c RS |
833 | rtx x; |
834 | rtx *loc; | |
835 | { | |
770ae6cc RK |
836 | int i; |
837 | unsigned int x_regno; | |
838 | RTX_CODE code; | |
839 | const char *fmt; | |
2c88418c RS |
840 | |
841 | repeat: | |
842 | /* The contents of a REG_NONNEG note is always zero, so we must come here | |
843 | upon repeat in case the last REG_NOTE is a REG_NONNEG note. */ | |
844 | if (x == 0) | |
845 | return 0; | |
846 | ||
847 | code = GET_CODE (x); | |
848 | ||
849 | switch (code) | |
850 | { | |
851 | case REG: | |
770ae6cc | 852 | x_regno = REGNO (x); |
f8163c92 RK |
853 | |
854 | /* If we modifying the stack, frame, or argument pointer, it will | |
855 | clobber a virtual register. In fact, we could be more precise, | |
856 | but it isn't worth it. */ | |
770ae6cc | 857 | if ((x_regno == STACK_POINTER_REGNUM |
f8163c92 | 858 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
770ae6cc | 859 | || x_regno == ARG_POINTER_REGNUM |
f8163c92 | 860 | #endif |
770ae6cc | 861 | || x_regno == FRAME_POINTER_REGNUM) |
f8163c92 RK |
862 | && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER) |
863 | return 1; | |
864 | ||
770ae6cc RK |
865 | return (endregno > x_regno |
866 | && regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER | |
867 | ? HARD_REGNO_NREGS (x_regno, GET_MODE (x)) | |
2c88418c RS |
868 | : 1)); |
869 | ||
870 | case SUBREG: | |
871 | /* If this is a SUBREG of a hard reg, we can see exactly which | |
872 | registers are being modified. Otherwise, handle normally. */ | |
873 | if (GET_CODE (SUBREG_REG (x)) == REG | |
874 | && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) | |
875 | { | |
770ae6cc RK |
876 | unsigned int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); |
877 | unsigned int inner_endregno | |
2c88418c RS |
878 | = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER |
879 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
880 | ||
881 | return endregno > inner_regno && regno < inner_endregno; | |
882 | } | |
883 | break; | |
884 | ||
885 | case CLOBBER: | |
886 | case SET: | |
887 | if (&SET_DEST (x) != loc | |
888 | /* Note setting a SUBREG counts as referring to the REG it is in for | |
889 | a pseudo but not for hard registers since we can | |
890 | treat each word individually. */ | |
891 | && ((GET_CODE (SET_DEST (x)) == SUBREG | |
892 | && loc != &SUBREG_REG (SET_DEST (x)) | |
893 | && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG | |
894 | && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER | |
895 | && refers_to_regno_p (regno, endregno, | |
896 | SUBREG_REG (SET_DEST (x)), loc)) | |
897 | || (GET_CODE (SET_DEST (x)) != REG | |
898 | && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) | |
899 | return 1; | |
900 | ||
901 | if (code == CLOBBER || loc == &SET_SRC (x)) | |
902 | return 0; | |
903 | x = SET_SRC (x); | |
904 | goto repeat; | |
e9a25f70 JL |
905 | |
906 | default: | |
907 | break; | |
2c88418c RS |
908 | } |
909 | ||
910 | /* X does not match, so try its subexpressions. */ | |
911 | ||
912 | fmt = GET_RTX_FORMAT (code); | |
913 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
914 | { | |
915 | if (fmt[i] == 'e' && loc != &XEXP (x, i)) | |
916 | { | |
917 | if (i == 0) | |
918 | { | |
919 | x = XEXP (x, 0); | |
920 | goto repeat; | |
921 | } | |
922 | else | |
923 | if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc)) | |
924 | return 1; | |
925 | } | |
926 | else if (fmt[i] == 'E') | |
927 | { | |
928 | register int j; | |
929 | for (j = XVECLEN (x, i) - 1; j >=0; j--) | |
930 | if (loc != &XVECEXP (x, i, j) | |
931 | && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc)) | |
932 | return 1; | |
933 | } | |
934 | } | |
935 | return 0; | |
936 | } | |
937 | ||
938 | /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, | |
939 | we check if any register number in X conflicts with the relevant register | |
940 | numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN | |
941 | contains a MEM (we don't bother checking for memory addresses that can't | |
942 | conflict because we expect this to be a rare case. */ | |
943 | ||
944 | int | |
945 | reg_overlap_mentioned_p (x, in) | |
946 | rtx x, in; | |
947 | { | |
770ae6cc | 948 | unsigned int regno, endregno; |
2c88418c | 949 | |
b98b49ac JL |
950 | /* Overly conservative. */ |
951 | if (GET_CODE (x) == STRICT_LOW_PART) | |
952 | x = XEXP (x, 0); | |
953 | ||
954 | /* If either argument is a constant, then modifying X can not affect IN. */ | |
955 | if (CONSTANT_P (x) || CONSTANT_P (in)) | |
956 | return 0; | |
0c99ec5c RH |
957 | |
958 | switch (GET_CODE (x)) | |
2c88418c | 959 | { |
0c99ec5c | 960 | case SUBREG: |
2c88418c RS |
961 | regno = REGNO (SUBREG_REG (x)); |
962 | if (regno < FIRST_PSEUDO_REGISTER) | |
963 | regno += SUBREG_WORD (x); | |
0c99ec5c | 964 | goto do_reg; |
2c88418c | 965 | |
0c99ec5c RH |
966 | case REG: |
967 | regno = REGNO (x); | |
968 | do_reg: | |
969 | endregno = regno + (regno < FIRST_PSEUDO_REGISTER | |
970 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
971 | return refers_to_regno_p (regno, endregno, in, NULL_PTR); | |
2c88418c | 972 | |
0c99ec5c RH |
973 | case MEM: |
974 | { | |
975 | const char *fmt; | |
976 | int i; | |
2c88418c | 977 | |
0c99ec5c | 978 | if (GET_CODE (in) == MEM) |
2c88418c RS |
979 | return 1; |
980 | ||
0c99ec5c RH |
981 | fmt = GET_RTX_FORMAT (GET_CODE (in)); |
982 | for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) | |
983 | if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i))) | |
984 | return 1; | |
c0222c21 | 985 | |
0c99ec5c RH |
986 | return 0; |
987 | } | |
988 | ||
989 | case SCRATCH: | |
990 | case PC: | |
991 | case CC0: | |
992 | return reg_mentioned_p (x, in); | |
993 | ||
994 | case PARALLEL: | |
995 | if (GET_MODE (x) == BLKmode) | |
996 | { | |
997 | register int i; | |
998 | ||
999 | /* If any register in here refers to it we return true. */ | |
1000 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
1001 | if (reg_overlap_mentioned_p (SET_DEST (XVECEXP (x, 0, i)), in)) | |
1002 | return 1; | |
1003 | return 0; | |
1004 | } | |
1005 | break; | |
2c88418c | 1006 | |
0c99ec5c RH |
1007 | default: |
1008 | break; | |
1009 | } | |
2c88418c | 1010 | |
0c99ec5c | 1011 | abort (); |
2c88418c RS |
1012 | } |
1013 | \f | |
1014 | /* Used for communications between the next few functions. */ | |
1015 | ||
1016 | static int reg_set_last_unknown; | |
1017 | static rtx reg_set_last_value; | |
770ae6cc | 1018 | static unsigned int reg_set_last_first_regno, reg_set_last_last_regno; |
2c88418c RS |
1019 | |
1020 | /* Called via note_stores from reg_set_last. */ | |
1021 | ||
1022 | static void | |
84832317 | 1023 | reg_set_last_1 (x, pat, data) |
2c88418c RS |
1024 | rtx x; |
1025 | rtx pat; | |
84832317 | 1026 | void *data ATTRIBUTE_UNUSED; |
2c88418c | 1027 | { |
770ae6cc | 1028 | unsigned int first, last; |
2c88418c RS |
1029 | |
1030 | /* If X is not a register, or is not one in the range we care | |
1031 | about, ignore. */ | |
1032 | if (GET_CODE (x) != REG) | |
1033 | return; | |
1034 | ||
1035 | first = REGNO (x); | |
1036 | last = first + (first < FIRST_PSEUDO_REGISTER | |
1037 | ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1); | |
1038 | ||
1039 | if (first >= reg_set_last_last_regno | |
1040 | || last <= reg_set_last_first_regno) | |
1041 | return; | |
1042 | ||
1043 | /* If this is a CLOBBER or is some complex LHS, or doesn't modify | |
1044 | exactly the registers we care about, show we don't know the value. */ | |
1045 | if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x | |
1046 | || first != reg_set_last_first_regno | |
1047 | || last != reg_set_last_last_regno) | |
1048 | reg_set_last_unknown = 1; | |
1049 | else | |
1050 | reg_set_last_value = SET_SRC (pat); | |
1051 | } | |
1052 | ||
1053 | /* Return the last value to which REG was set prior to INSN. If we can't | |
1054 | find it easily, return 0. | |
1055 | ||
4d9d7d9d RK |
1056 | We only return a REG, SUBREG, or constant because it is too hard to |
1057 | check if a MEM remains unchanged. */ | |
2c88418c RS |
1058 | |
1059 | rtx | |
1060 | reg_set_last (x, insn) | |
1061 | rtx x; | |
1062 | rtx insn; | |
1063 | { | |
1064 | rtx orig_insn = insn; | |
1065 | ||
1066 | reg_set_last_first_regno = REGNO (x); | |
1067 | ||
1068 | reg_set_last_last_regno | |
1069 | = reg_set_last_first_regno | |
1070 | + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER | |
1071 | ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1); | |
1072 | ||
1073 | reg_set_last_unknown = 0; | |
1074 | reg_set_last_value = 0; | |
1075 | ||
1076 | /* Scan backwards until reg_set_last_1 changed one of the above flags. | |
1077 | Stop when we reach a label or X is a hard reg and we reach a | |
1078 | CALL_INSN (if reg_set_last_last_regno is a hard reg). | |
1079 | ||
1080 | If we find a set of X, ensure that its SET_SRC remains unchanged. */ | |
1081 | ||
6b02c316 RS |
1082 | /* We compare with <= here, because reg_set_last_last_regno |
1083 | is actually the number of the first reg *not* in X. */ | |
2c88418c RS |
1084 | for (; |
1085 | insn && GET_CODE (insn) != CODE_LABEL | |
1086 | && ! (GET_CODE (insn) == CALL_INSN | |
1087 | && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER); | |
1088 | insn = PREV_INSN (insn)) | |
1089 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1090 | { | |
84832317 | 1091 | note_stores (PATTERN (insn), reg_set_last_1, NULL); |
2c88418c RS |
1092 | if (reg_set_last_unknown) |
1093 | return 0; | |
1094 | else if (reg_set_last_value) | |
1095 | { | |
1096 | if (CONSTANT_P (reg_set_last_value) | |
4d9d7d9d RK |
1097 | || ((GET_CODE (reg_set_last_value) == REG |
1098 | || GET_CODE (reg_set_last_value) == SUBREG) | |
2c88418c | 1099 | && ! reg_set_between_p (reg_set_last_value, |
ce9c8df2 | 1100 | insn, orig_insn))) |
2c88418c RS |
1101 | return reg_set_last_value; |
1102 | else | |
1103 | return 0; | |
1104 | } | |
1105 | } | |
1106 | ||
1107 | return 0; | |
1108 | } | |
1109 | \f | |
2c88418c RS |
1110 | /* Call FUN on each register or MEM that is stored into or clobbered by X. |
1111 | (X would be the pattern of an insn). | |
1112 | FUN receives two arguments: | |
1113 | the REG, MEM, CC0 or PC being stored in or clobbered, | |
1114 | the SET or CLOBBER rtx that does the store. | |
1115 | ||
1116 | If the item being stored in or clobbered is a SUBREG of a hard register, | |
1117 | the SUBREG will be passed. */ | |
1118 | ||
1119 | void | |
84832317 | 1120 | note_stores (x, fun, data) |
2c88418c | 1121 | register rtx x; |
cdadb1dd | 1122 | void (*fun) PARAMS ((rtx, rtx, void *)); |
84832317 | 1123 | void *data; |
2c88418c | 1124 | { |
0c99ec5c RH |
1125 | if (GET_CODE (x) == COND_EXEC) |
1126 | x = COND_EXEC_CODE (x); | |
1127 | if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) | |
2c88418c RS |
1128 | { |
1129 | register rtx dest = SET_DEST (x); | |
1130 | while ((GET_CODE (dest) == SUBREG | |
1131 | && (GET_CODE (SUBREG_REG (dest)) != REG | |
1132 | || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) | |
1133 | || GET_CODE (dest) == ZERO_EXTRACT | |
1134 | || GET_CODE (dest) == SIGN_EXTRACT | |
1135 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1136 | dest = XEXP (dest, 0); | |
86465af7 DM |
1137 | |
1138 | if (GET_CODE (dest) == PARALLEL | |
1139 | && GET_MODE (dest) == BLKmode) | |
1140 | { | |
1141 | register int i; | |
1142 | for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) | |
84832317 | 1143 | (*fun) (SET_DEST (XVECEXP (dest, 0, i)), x, data); |
86465af7 DM |
1144 | } |
1145 | else | |
84832317 | 1146 | (*fun) (dest, x, data); |
2c88418c RS |
1147 | } |
1148 | else if (GET_CODE (x) == PARALLEL) | |
1149 | { | |
1150 | register int i; | |
1151 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
1152 | { | |
1153 | register rtx y = XVECEXP (x, 0, i); | |
0c99ec5c RH |
1154 | if (GET_CODE (y) == COND_EXEC) |
1155 | y = COND_EXEC_CODE (y); | |
2c88418c RS |
1156 | if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER) |
1157 | { | |
1158 | register rtx dest = SET_DEST (y); | |
1159 | while ((GET_CODE (dest) == SUBREG | |
1160 | && (GET_CODE (SUBREG_REG (dest)) != REG | |
1161 | || (REGNO (SUBREG_REG (dest)) | |
1162 | >= FIRST_PSEUDO_REGISTER))) | |
1163 | || GET_CODE (dest) == ZERO_EXTRACT | |
1164 | || GET_CODE (dest) == SIGN_EXTRACT | |
1165 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1166 | dest = XEXP (dest, 0); | |
86465af7 DM |
1167 | if (GET_CODE (dest) == PARALLEL |
1168 | && GET_MODE (dest) == BLKmode) | |
1169 | { | |
1170 | register int i; | |
770ae6cc | 1171 | |
86465af7 | 1172 | for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) |
84832317 | 1173 | (*fun) (SET_DEST (XVECEXP (dest, 0, i)), y, data); |
86465af7 DM |
1174 | } |
1175 | else | |
84832317 | 1176 | (*fun) (dest, y, data); |
2c88418c RS |
1177 | } |
1178 | } | |
1179 | } | |
1180 | } | |
1181 | \f | |
1182 | /* Return nonzero if X's old contents don't survive after INSN. | |
1183 | This will be true if X is (cc0) or if X is a register and | |
1184 | X dies in INSN or because INSN entirely sets X. | |
1185 | ||
1186 | "Entirely set" means set directly and not through a SUBREG, | |
1187 | ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. | |
1188 | Likewise, REG_INC does not count. | |
1189 | ||
1190 | REG may be a hard or pseudo reg. Renumbering is not taken into account, | |
1191 | but for this use that makes no difference, since regs don't overlap | |
1192 | during their lifetimes. Therefore, this function may be used | |
1193 | at any time after deaths have been computed (in flow.c). | |
1194 | ||
1195 | If REG is a hard reg that occupies multiple machine registers, this | |
1196 | function will only return 1 if each of those registers will be replaced | |
1197 | by INSN. */ | |
1198 | ||
1199 | int | |
1200 | dead_or_set_p (insn, x) | |
1201 | rtx insn; | |
1202 | rtx x; | |
1203 | { | |
770ae6cc RK |
1204 | unsigned int regno, last_regno; |
1205 | unsigned int i; | |
2c88418c RS |
1206 | |
1207 | /* Can't use cc0_rtx below since this file is used by genattrtab.c. */ | |
1208 | if (GET_CODE (x) == CC0) | |
1209 | return 1; | |
1210 | ||
1211 | if (GET_CODE (x) != REG) | |
1212 | abort (); | |
1213 | ||
1214 | regno = REGNO (x); | |
1215 | last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno | |
1216 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1); | |
1217 | ||
1218 | for (i = regno; i <= last_regno; i++) | |
1219 | if (! dead_or_set_regno_p (insn, i)) | |
1220 | return 0; | |
1221 | ||
1222 | return 1; | |
1223 | } | |
1224 | ||
1225 | /* Utility function for dead_or_set_p to check an individual register. Also | |
1226 | called from flow.c. */ | |
1227 | ||
1228 | int | |
1229 | dead_or_set_regno_p (insn, test_regno) | |
1230 | rtx insn; | |
770ae6cc | 1231 | unsigned int test_regno; |
2c88418c | 1232 | { |
770ae6cc | 1233 | unsigned int regno, endregno; |
0c99ec5c | 1234 | rtx link, pattern; |
2c88418c | 1235 | |
0a2287bf RH |
1236 | /* See if there is a death note for something that includes TEST_REGNO. */ |
1237 | if (find_regno_note (insn, REG_DEAD, test_regno)) | |
1238 | return 1; | |
2c88418c | 1239 | |
8f3e7a26 RK |
1240 | if (GET_CODE (insn) == CALL_INSN |
1241 | && find_regno_fusage (insn, CLOBBER, test_regno)) | |
1242 | return 1; | |
1243 | ||
0c99ec5c RH |
1244 | pattern = PATTERN (insn); |
1245 | ||
1246 | if (GET_CODE (pattern) == COND_EXEC) | |
1247 | pattern = COND_EXEC_CODE (pattern); | |
1248 | ||
1249 | if (GET_CODE (pattern) == SET) | |
2c88418c RS |
1250 | { |
1251 | rtx dest = SET_DEST (PATTERN (insn)); | |
1252 | ||
1253 | /* A value is totally replaced if it is the destination or the | |
1254 | destination is a SUBREG of REGNO that does not change the number of | |
1255 | words in it. */ | |
6764d250 | 1256 | if (GET_CODE (dest) == SUBREG |
2c88418c RS |
1257 | && (((GET_MODE_SIZE (GET_MODE (dest)) |
1258 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1259 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1260 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1261 | dest = SUBREG_REG (dest); | |
1262 | ||
1263 | if (GET_CODE (dest) != REG) | |
1264 | return 0; | |
1265 | ||
1266 | regno = REGNO (dest); | |
1267 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1268 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1269 | ||
1270 | return (test_regno >= regno && test_regno < endregno); | |
1271 | } | |
0c99ec5c | 1272 | else if (GET_CODE (pattern) == PARALLEL) |
2c88418c RS |
1273 | { |
1274 | register int i; | |
1275 | ||
0c99ec5c | 1276 | for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--) |
2c88418c | 1277 | { |
0c99ec5c RH |
1278 | rtx body = XVECEXP (pattern, 0, i); |
1279 | ||
1280 | if (GET_CODE (body) == COND_EXEC) | |
1281 | body = COND_EXEC_CODE (body); | |
2c88418c RS |
1282 | |
1283 | if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) | |
1284 | { | |
1285 | rtx dest = SET_DEST (body); | |
1286 | ||
1287 | if (GET_CODE (dest) == SUBREG | |
1288 | && (((GET_MODE_SIZE (GET_MODE (dest)) | |
1289 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1290 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1291 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1292 | dest = SUBREG_REG (dest); | |
1293 | ||
1294 | if (GET_CODE (dest) != REG) | |
1295 | continue; | |
1296 | ||
1297 | regno = REGNO (dest); | |
1298 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1299 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1300 | ||
1301 | if (test_regno >= regno && test_regno < endregno) | |
1302 | return 1; | |
1303 | } | |
1304 | } | |
1305 | } | |
1306 | ||
1307 | return 0; | |
1308 | } | |
1309 | ||
1310 | /* Return the reg-note of kind KIND in insn INSN, if there is one. | |
1311 | If DATUM is nonzero, look for one whose datum is DATUM. */ | |
1312 | ||
1313 | rtx | |
1314 | find_reg_note (insn, kind, datum) | |
1315 | rtx insn; | |
1316 | enum reg_note kind; | |
1317 | rtx datum; | |
1318 | { | |
1319 | register rtx link; | |
1320 | ||
ae78d276 MM |
1321 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
1322 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
1323 | return 0; | |
1324 | ||
2c88418c RS |
1325 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1326 | if (REG_NOTE_KIND (link) == kind | |
1327 | && (datum == 0 || datum == XEXP (link, 0))) | |
1328 | return link; | |
1329 | return 0; | |
1330 | } | |
1331 | ||
1332 | /* Return the reg-note of kind KIND in insn INSN which applies to register | |
99309f3b RK |
1333 | number REGNO, if any. Return 0 if there is no such reg-note. Note that |
1334 | the REGNO of this NOTE need not be REGNO if REGNO is a hard register; | |
1335 | it might be the case that the note overlaps REGNO. */ | |
2c88418c RS |
1336 | |
1337 | rtx | |
1338 | find_regno_note (insn, kind, regno) | |
1339 | rtx insn; | |
1340 | enum reg_note kind; | |
770ae6cc | 1341 | unsigned int regno; |
2c88418c RS |
1342 | { |
1343 | register rtx link; | |
1344 | ||
ae78d276 MM |
1345 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
1346 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
1347 | return 0; | |
1348 | ||
2c88418c RS |
1349 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1350 | if (REG_NOTE_KIND (link) == kind | |
1351 | /* Verify that it is a register, so that scratch and MEM won't cause a | |
1352 | problem here. */ | |
1353 | && GET_CODE (XEXP (link, 0)) == REG | |
99309f3b RK |
1354 | && REGNO (XEXP (link, 0)) <= regno |
1355 | && ((REGNO (XEXP (link, 0)) | |
1356 | + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 | |
1357 | : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)), | |
1358 | GET_MODE (XEXP (link, 0))))) | |
1359 | > regno)) | |
2c88418c RS |
1360 | return link; |
1361 | return 0; | |
1362 | } | |
8f3e7a26 RK |
1363 | |
1364 | /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found | |
1365 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1366 | ||
1367 | int | |
1368 | find_reg_fusage (insn, code, datum) | |
1369 | rtx insn; | |
1370 | enum rtx_code code; | |
1371 | rtx datum; | |
1372 | { | |
1373 | /* If it's not a CALL_INSN, it can't possibly have a | |
1374 | CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ | |
1375 | if (GET_CODE (insn) != CALL_INSN) | |
1376 | return 0; | |
1377 | ||
1378 | if (! datum) | |
1379 | abort(); | |
1380 | ||
1381 | if (GET_CODE (datum) != REG) | |
1382 | { | |
1383 | register rtx link; | |
1384 | ||
1385 | for (link = CALL_INSN_FUNCTION_USAGE (insn); | |
1386 | link; | |
1387 | link = XEXP (link, 1)) | |
1388 | if (GET_CODE (XEXP (link, 0)) == code | |
1389 | && rtx_equal_p (datum, SET_DEST (XEXP (link, 0)))) | |
1390 | return 1; | |
1391 | } | |
1392 | else | |
1393 | { | |
770ae6cc | 1394 | unsigned int regno = REGNO (datum); |
8f3e7a26 RK |
1395 | |
1396 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1397 | to pseudo registers, so don't bother checking. */ | |
1398 | ||
1399 | if (regno < FIRST_PSEUDO_REGISTER) | |
1400 | { | |
770ae6cc RK |
1401 | unsigned int end_regno |
1402 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum)); | |
1403 | unsigned int i; | |
8f3e7a26 RK |
1404 | |
1405 | for (i = regno; i < end_regno; i++) | |
1406 | if (find_regno_fusage (insn, code, i)) | |
1407 | return 1; | |
1408 | } | |
1409 | } | |
1410 | ||
1411 | return 0; | |
1412 | } | |
1413 | ||
1414 | /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found | |
1415 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1416 | ||
1417 | int | |
1418 | find_regno_fusage (insn, code, regno) | |
1419 | rtx insn; | |
1420 | enum rtx_code code; | |
770ae6cc | 1421 | unsigned int regno; |
8f3e7a26 RK |
1422 | { |
1423 | register rtx link; | |
1424 | ||
1425 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1426 | to pseudo registers, so don't bother checking. */ | |
1427 | ||
1428 | if (regno >= FIRST_PSEUDO_REGISTER | |
1429 | || GET_CODE (insn) != CALL_INSN ) | |
1430 | return 0; | |
1431 | ||
1432 | for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) | |
83ab3839 | 1433 | { |
770ae6cc RK |
1434 | unsigned int regnote; |
1435 | rtx op, reg; | |
83ab3839 RH |
1436 | |
1437 | if (GET_CODE (op = XEXP (link, 0)) == code | |
1438 | && GET_CODE (reg = XEXP (op, 0)) == REG | |
1439 | && (regnote = REGNO (reg)) <= regno | |
1440 | && regnote + HARD_REGNO_NREGS (regnote, GET_MODE (reg)) > regno) | |
1441 | return 1; | |
1442 | } | |
8f3e7a26 RK |
1443 | |
1444 | return 0; | |
1445 | } | |
2c88418c RS |
1446 | \f |
1447 | /* Remove register note NOTE from the REG_NOTES of INSN. */ | |
1448 | ||
1449 | void | |
1450 | remove_note (insn, note) | |
2c88418c | 1451 | register rtx insn; |
49c3bb12 | 1452 | register rtx note; |
2c88418c RS |
1453 | { |
1454 | register rtx link; | |
1455 | ||
49c3bb12 RH |
1456 | if (note == NULL_RTX) |
1457 | return; | |
1458 | ||
2c88418c RS |
1459 | if (REG_NOTES (insn) == note) |
1460 | { | |
1461 | REG_NOTES (insn) = XEXP (note, 1); | |
1462 | return; | |
1463 | } | |
1464 | ||
1465 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
1466 | if (XEXP (link, 1) == note) | |
1467 | { | |
1468 | XEXP (link, 1) = XEXP (note, 1); | |
1469 | return; | |
1470 | } | |
1471 | ||
1472 | abort (); | |
1473 | } | |
55a98783 JL |
1474 | |
1475 | /* Search LISTP (an EXPR_LIST) for NODE and remove NODE from the list | |
1476 | if it is found. | |
1477 | ||
1478 | A simple equality test is used to determine if NODE is on the | |
1479 | EXPR_LIST. */ | |
1480 | ||
1481 | void | |
1482 | remove_node_from_expr_list (node, listp) | |
1483 | rtx node; | |
1484 | rtx *listp; | |
1485 | { | |
1486 | rtx temp = *listp; | |
1487 | rtx prev = NULL_RTX; | |
1488 | ||
1489 | while (temp) | |
1490 | { | |
1491 | if (node == XEXP (temp, 0)) | |
1492 | { | |
1493 | /* Splice the node out of the list. */ | |
1494 | if (prev) | |
1495 | XEXP (prev, 1) = XEXP (temp, 1); | |
1496 | else | |
1497 | *listp = XEXP (temp, 1); | |
1498 | ||
1499 | return; | |
1500 | } | |
1501 | temp = XEXP (temp, 1); | |
1502 | } | |
1503 | } | |
2c88418c | 1504 | \f |
2b067faf RS |
1505 | /* Nonzero if X contains any volatile instructions. These are instructions |
1506 | which may cause unpredictable machine state instructions, and thus no | |
1507 | instructions should be moved or combined across them. This includes | |
1508 | only volatile asms and UNSPEC_VOLATILE instructions. */ | |
1509 | ||
1510 | int | |
1511 | volatile_insn_p (x) | |
1512 | rtx x; | |
1513 | { | |
1514 | register RTX_CODE code; | |
1515 | ||
1516 | code = GET_CODE (x); | |
1517 | switch (code) | |
1518 | { | |
1519 | case LABEL_REF: | |
1520 | case SYMBOL_REF: | |
1521 | case CONST_INT: | |
1522 | case CONST: | |
1523 | case CONST_DOUBLE: | |
1524 | case CC0: | |
1525 | case PC: | |
1526 | case REG: | |
1527 | case SCRATCH: | |
1528 | case CLOBBER: | |
1529 | case ASM_INPUT: | |
1530 | case ADDR_VEC: | |
1531 | case ADDR_DIFF_VEC: | |
1532 | case CALL: | |
1533 | case MEM: | |
1534 | return 0; | |
1535 | ||
1536 | case UNSPEC_VOLATILE: | |
1537 | /* case TRAP_IF: This isn't clear yet. */ | |
1538 | return 1; | |
1539 | ||
1540 | case ASM_OPERANDS: | |
1541 | if (MEM_VOLATILE_P (x)) | |
1542 | return 1; | |
e9a25f70 JL |
1543 | |
1544 | default: | |
1545 | break; | |
2b067faf RS |
1546 | } |
1547 | ||
1548 | /* Recursively scan the operands of this expression. */ | |
1549 | ||
1550 | { | |
6f7d635c | 1551 | register const char *fmt = GET_RTX_FORMAT (code); |
2b067faf RS |
1552 | register int i; |
1553 | ||
1554 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1555 | { | |
1556 | if (fmt[i] == 'e') | |
1557 | { | |
31001f72 | 1558 | if (volatile_insn_p (XEXP (x, i))) |
2b067faf RS |
1559 | return 1; |
1560 | } | |
d4757e6a | 1561 | else if (fmt[i] == 'E') |
2b067faf RS |
1562 | { |
1563 | register int j; | |
1564 | for (j = 0; j < XVECLEN (x, i); j++) | |
31001f72 | 1565 | if (volatile_insn_p (XVECEXP (x, i, j))) |
2b067faf RS |
1566 | return 1; |
1567 | } | |
1568 | } | |
1569 | } | |
1570 | return 0; | |
1571 | } | |
1572 | ||
2c88418c | 1573 | /* Nonzero if X contains any volatile memory references |
2ac4fed0 | 1574 | UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ |
2c88418c RS |
1575 | |
1576 | int | |
1577 | volatile_refs_p (x) | |
1578 | rtx x; | |
1579 | { | |
1580 | register RTX_CODE code; | |
1581 | ||
1582 | code = GET_CODE (x); | |
1583 | switch (code) | |
1584 | { | |
1585 | case LABEL_REF: | |
1586 | case SYMBOL_REF: | |
1587 | case CONST_INT: | |
1588 | case CONST: | |
1589 | case CONST_DOUBLE: | |
1590 | case CC0: | |
1591 | case PC: | |
1592 | case REG: | |
1593 | case SCRATCH: | |
1594 | case CLOBBER: | |
1595 | case ASM_INPUT: | |
1596 | case ADDR_VEC: | |
1597 | case ADDR_DIFF_VEC: | |
1598 | return 0; | |
1599 | ||
1600 | case CALL: | |
2ac4fed0 | 1601 | case UNSPEC_VOLATILE: |
2c88418c RS |
1602 | /* case TRAP_IF: This isn't clear yet. */ |
1603 | return 1; | |
1604 | ||
1605 | case MEM: | |
1606 | case ASM_OPERANDS: | |
1607 | if (MEM_VOLATILE_P (x)) | |
1608 | return 1; | |
e9a25f70 JL |
1609 | |
1610 | default: | |
1611 | break; | |
2c88418c RS |
1612 | } |
1613 | ||
1614 | /* Recursively scan the operands of this expression. */ | |
1615 | ||
1616 | { | |
6f7d635c | 1617 | register const char *fmt = GET_RTX_FORMAT (code); |
2c88418c RS |
1618 | register int i; |
1619 | ||
1620 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1621 | { | |
1622 | if (fmt[i] == 'e') | |
1623 | { | |
1624 | if (volatile_refs_p (XEXP (x, i))) | |
1625 | return 1; | |
1626 | } | |
d4757e6a | 1627 | else if (fmt[i] == 'E') |
2c88418c RS |
1628 | { |
1629 | register int j; | |
1630 | for (j = 0; j < XVECLEN (x, i); j++) | |
1631 | if (volatile_refs_p (XVECEXP (x, i, j))) | |
1632 | return 1; | |
1633 | } | |
1634 | } | |
1635 | } | |
1636 | return 0; | |
1637 | } | |
1638 | ||
1639 | /* Similar to above, except that it also rejects register pre- and post- | |
1640 | incrementing. */ | |
1641 | ||
1642 | int | |
1643 | side_effects_p (x) | |
1644 | rtx x; | |
1645 | { | |
1646 | register RTX_CODE code; | |
1647 | ||
1648 | code = GET_CODE (x); | |
1649 | switch (code) | |
1650 | { | |
1651 | case LABEL_REF: | |
1652 | case SYMBOL_REF: | |
1653 | case CONST_INT: | |
1654 | case CONST: | |
1655 | case CONST_DOUBLE: | |
1656 | case CC0: | |
1657 | case PC: | |
1658 | case REG: | |
1659 | case SCRATCH: | |
1660 | case ASM_INPUT: | |
1661 | case ADDR_VEC: | |
1662 | case ADDR_DIFF_VEC: | |
1663 | return 0; | |
1664 | ||
1665 | case CLOBBER: | |
1666 | /* Reject CLOBBER with a non-VOID mode. These are made by combine.c | |
1667 | when some combination can't be done. If we see one, don't think | |
1668 | that we can simplify the expression. */ | |
1669 | return (GET_MODE (x) != VOIDmode); | |
1670 | ||
1671 | case PRE_INC: | |
1672 | case PRE_DEC: | |
1673 | case POST_INC: | |
1674 | case POST_DEC: | |
1675 | case CALL: | |
2ac4fed0 | 1676 | case UNSPEC_VOLATILE: |
2c88418c RS |
1677 | /* case TRAP_IF: This isn't clear yet. */ |
1678 | return 1; | |
1679 | ||
1680 | case MEM: | |
1681 | case ASM_OPERANDS: | |
1682 | if (MEM_VOLATILE_P (x)) | |
1683 | return 1; | |
e9a25f70 JL |
1684 | |
1685 | default: | |
1686 | break; | |
2c88418c RS |
1687 | } |
1688 | ||
1689 | /* Recursively scan the operands of this expression. */ | |
1690 | ||
1691 | { | |
6f7d635c | 1692 | register const char *fmt = GET_RTX_FORMAT (code); |
2c88418c RS |
1693 | register int i; |
1694 | ||
1695 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1696 | { | |
1697 | if (fmt[i] == 'e') | |
1698 | { | |
1699 | if (side_effects_p (XEXP (x, i))) | |
1700 | return 1; | |
1701 | } | |
d4757e6a | 1702 | else if (fmt[i] == 'E') |
2c88418c RS |
1703 | { |
1704 | register int j; | |
1705 | for (j = 0; j < XVECLEN (x, i); j++) | |
1706 | if (side_effects_p (XVECEXP (x, i, j))) | |
1707 | return 1; | |
1708 | } | |
1709 | } | |
1710 | } | |
1711 | return 0; | |
1712 | } | |
1713 | \f | |
1714 | /* Return nonzero if evaluating rtx X might cause a trap. */ | |
1715 | ||
1716 | int | |
1717 | may_trap_p (x) | |
1718 | rtx x; | |
1719 | { | |
1720 | int i; | |
1721 | enum rtx_code code; | |
6f7d635c | 1722 | const char *fmt; |
2c88418c RS |
1723 | |
1724 | if (x == 0) | |
1725 | return 0; | |
1726 | code = GET_CODE (x); | |
1727 | switch (code) | |
1728 | { | |
1729 | /* Handle these cases quickly. */ | |
1730 | case CONST_INT: | |
1731 | case CONST_DOUBLE: | |
1732 | case SYMBOL_REF: | |
1733 | case LABEL_REF: | |
1734 | case CONST: | |
1735 | case PC: | |
1736 | case CC0: | |
1737 | case REG: | |
1738 | case SCRATCH: | |
1739 | return 0; | |
1740 | ||
1741 | /* Conditional trap can trap! */ | |
2ac4fed0 | 1742 | case UNSPEC_VOLATILE: |
2c88418c RS |
1743 | case TRAP_IF: |
1744 | return 1; | |
1745 | ||
1746 | /* Memory ref can trap unless it's a static var or a stack slot. */ | |
1747 | case MEM: | |
1748 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
1749 | ||
1750 | /* Division by a non-constant might trap. */ | |
1751 | case DIV: | |
1752 | case MOD: | |
1753 | case UDIV: | |
1754 | case UMOD: | |
e9a25f70 JL |
1755 | if (! CONSTANT_P (XEXP (x, 1)) |
1756 | || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
2c88418c RS |
1757 | return 1; |
1758 | /* This was const0_rtx, but by not using that, | |
1759 | we can link this file into other programs. */ | |
1760 | if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0) | |
1761 | return 1; | |
e9a25f70 JL |
1762 | break; |
1763 | ||
b278301b RK |
1764 | case EXPR_LIST: |
1765 | /* An EXPR_LIST is used to represent a function call. This | |
1766 | certainly may trap. */ | |
1767 | return 1; | |
e9a25f70 | 1768 | |
2c88418c RS |
1769 | default: |
1770 | /* Any floating arithmetic may trap. */ | |
1771 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1772 | return 1; | |
1773 | } | |
1774 | ||
1775 | fmt = GET_RTX_FORMAT (code); | |
1776 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1777 | { | |
1778 | if (fmt[i] == 'e') | |
1779 | { | |
1780 | if (may_trap_p (XEXP (x, i))) | |
1781 | return 1; | |
1782 | } | |
1783 | else if (fmt[i] == 'E') | |
1784 | { | |
1785 | register int j; | |
1786 | for (j = 0; j < XVECLEN (x, i); j++) | |
1787 | if (may_trap_p (XVECEXP (x, i, j))) | |
1788 | return 1; | |
1789 | } | |
1790 | } | |
1791 | return 0; | |
1792 | } | |
1793 | \f | |
1794 | /* Return nonzero if X contains a comparison that is not either EQ or NE, | |
1795 | i.e., an inequality. */ | |
1796 | ||
1797 | int | |
1798 | inequality_comparisons_p (x) | |
1799 | rtx x; | |
1800 | { | |
6f7d635c | 1801 | register const char *fmt; |
2c88418c RS |
1802 | register int len, i; |
1803 | register enum rtx_code code = GET_CODE (x); | |
1804 | ||
1805 | switch (code) | |
1806 | { | |
1807 | case REG: | |
1808 | case SCRATCH: | |
1809 | case PC: | |
1810 | case CC0: | |
1811 | case CONST_INT: | |
1812 | case CONST_DOUBLE: | |
1813 | case CONST: | |
1814 | case LABEL_REF: | |
1815 | case SYMBOL_REF: | |
1816 | return 0; | |
1817 | ||
1818 | case LT: | |
1819 | case LTU: | |
1820 | case GT: | |
1821 | case GTU: | |
1822 | case LE: | |
1823 | case LEU: | |
1824 | case GE: | |
1825 | case GEU: | |
1826 | return 1; | |
e9a25f70 JL |
1827 | |
1828 | default: | |
1829 | break; | |
2c88418c RS |
1830 | } |
1831 | ||
1832 | len = GET_RTX_LENGTH (code); | |
1833 | fmt = GET_RTX_FORMAT (code); | |
1834 | ||
1835 | for (i = 0; i < len; i++) | |
1836 | { | |
1837 | if (fmt[i] == 'e') | |
1838 | { | |
1839 | if (inequality_comparisons_p (XEXP (x, i))) | |
1840 | return 1; | |
1841 | } | |
1842 | else if (fmt[i] == 'E') | |
1843 | { | |
1844 | register int j; | |
1845 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
1846 | if (inequality_comparisons_p (XVECEXP (x, i, j))) | |
1847 | return 1; | |
1848 | } | |
1849 | } | |
1850 | ||
1851 | return 0; | |
1852 | } | |
1853 | \f | |
1ed0205e VM |
1854 | /* Replace any occurrence of FROM in X with TO. The function does |
1855 | not enter into CONST_DOUBLE for the replace. | |
2c88418c RS |
1856 | |
1857 | Note that copying is not done so X must not be shared unless all copies | |
1858 | are to be modified. */ | |
1859 | ||
1860 | rtx | |
1861 | replace_rtx (x, from, to) | |
1862 | rtx x, from, to; | |
1863 | { | |
1864 | register int i, j; | |
6f7d635c | 1865 | register const char *fmt; |
2c88418c | 1866 | |
1ed0205e VM |
1867 | /* The following prevents loops occurrence when we change MEM in |
1868 | CONST_DOUBLE onto the same CONST_DOUBLE. */ | |
1869 | if (x != 0 && GET_CODE (x) == CONST_DOUBLE) | |
1870 | return x; | |
1871 | ||
2c88418c RS |
1872 | if (x == from) |
1873 | return to; | |
1874 | ||
1875 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
1876 | if (x == 0) | |
1877 | return 0; | |
1878 | ||
1879 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
1880 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
1881 | { | |
1882 | if (fmt[i] == 'e') | |
1883 | XEXP (x, i) = replace_rtx (XEXP (x, i), from, to); | |
1884 | else if (fmt[i] == 'E') | |
1885 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
1886 | XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to); | |
1887 | } | |
1888 | ||
1889 | return x; | |
1890 | } | |
1891 | \f | |
1892 | /* Throughout the rtx X, replace many registers according to REG_MAP. | |
1893 | Return the replacement for X (which may be X with altered contents). | |
1894 | REG_MAP[R] is the replacement for register R, or 0 for don't replace. | |
1895 | NREGS is the length of REG_MAP; regs >= NREGS are not mapped. | |
1896 | ||
1897 | We only support REG_MAP entries of REG or SUBREG. Also, hard registers | |
1898 | should not be mapped to pseudos or vice versa since validate_change | |
1899 | is not called. | |
1900 | ||
1901 | If REPLACE_DEST is 1, replacements are also done in destinations; | |
1902 | otherwise, only sources are replaced. */ | |
1903 | ||
1904 | rtx | |
1905 | replace_regs (x, reg_map, nregs, replace_dest) | |
1906 | rtx x; | |
1907 | rtx *reg_map; | |
770ae6cc | 1908 | unsigned int nregs; |
2c88418c RS |
1909 | int replace_dest; |
1910 | { | |
1911 | register enum rtx_code code; | |
1912 | register int i; | |
6f7d635c | 1913 | register const char *fmt; |
2c88418c RS |
1914 | |
1915 | if (x == 0) | |
1916 | return x; | |
1917 | ||
1918 | code = GET_CODE (x); | |
1919 | switch (code) | |
1920 | { | |
1921 | case SCRATCH: | |
1922 | case PC: | |
1923 | case CC0: | |
1924 | case CONST_INT: | |
1925 | case CONST_DOUBLE: | |
1926 | case CONST: | |
1927 | case SYMBOL_REF: | |
1928 | case LABEL_REF: | |
1929 | return x; | |
1930 | ||
1931 | case REG: | |
1932 | /* Verify that the register has an entry before trying to access it. */ | |
1933 | if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0) | |
3eb8f14c JW |
1934 | { |
1935 | /* SUBREGs can't be shared. Always return a copy to ensure that if | |
1936 | this replacement occurs more than once then each instance will | |
1937 | get distinct rtx. */ | |
1938 | if (GET_CODE (reg_map[REGNO (x)]) == SUBREG) | |
1939 | return copy_rtx (reg_map[REGNO (x)]); | |
1940 | return reg_map[REGNO (x)]; | |
1941 | } | |
2c88418c RS |
1942 | return x; |
1943 | ||
1944 | case SUBREG: | |
1945 | /* Prevent making nested SUBREGs. */ | |
1946 | if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs | |
1947 | && reg_map[REGNO (SUBREG_REG (x))] != 0 | |
1948 | && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) | |
1949 | { | |
1950 | rtx map_val = reg_map[REGNO (SUBREG_REG (x))]; | |
1951 | rtx map_inner = SUBREG_REG (map_val); | |
1952 | ||
1953 | if (GET_MODE (x) == GET_MODE (map_inner)) | |
1954 | return map_inner; | |
1955 | else | |
1956 | { | |
1957 | /* We cannot call gen_rtx here since we may be linked with | |
1958 | genattrtab.c. */ | |
1959 | /* Let's try clobbering the incoming SUBREG and see | |
1960 | if this is really safe. */ | |
1961 | SUBREG_REG (x) = map_inner; | |
1962 | SUBREG_WORD (x) += SUBREG_WORD (map_val); | |
1963 | return x; | |
1964 | #if 0 | |
1965 | rtx new = rtx_alloc (SUBREG); | |
1966 | PUT_MODE (new, GET_MODE (x)); | |
1967 | SUBREG_REG (new) = map_inner; | |
1968 | SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val); | |
1969 | #endif | |
1970 | } | |
1971 | } | |
1972 | break; | |
1973 | ||
1974 | case SET: | |
1975 | if (replace_dest) | |
1976 | SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0); | |
1977 | ||
1978 | else if (GET_CODE (SET_DEST (x)) == MEM | |
1979 | || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART) | |
1980 | /* Even if we are not to replace destinations, replace register if it | |
1981 | is CONTAINED in destination (destination is memory or | |
1982 | STRICT_LOW_PART). */ | |
1983 | XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0), | |
1984 | reg_map, nregs, 0); | |
1985 | else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
1986 | /* Similarly, for ZERO_EXTRACT we replace all operands. */ | |
1987 | break; | |
1988 | ||
1989 | SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0); | |
1990 | return x; | |
e9a25f70 JL |
1991 | |
1992 | default: | |
1993 | break; | |
2c88418c RS |
1994 | } |
1995 | ||
1996 | fmt = GET_RTX_FORMAT (code); | |
1997 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1998 | { | |
1999 | if (fmt[i] == 'e') | |
2000 | XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest); | |
d4757e6a | 2001 | else if (fmt[i] == 'E') |
2c88418c RS |
2002 | { |
2003 | register int j; | |
2004 | for (j = 0; j < XVECLEN (x, i); j++) | |
2005 | XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map, | |
2006 | nregs, replace_dest); | |
2007 | } | |
2008 | } | |
2009 | return x; | |
2010 | } | |
2a1777af | 2011 | |
2a1777af JL |
2012 | /* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is |
2013 | not in the constant pool and not in the condition of an IF_THEN_ELSE. */ | |
2014 | ||
2015 | static int | |
2016 | jmp_uses_reg_or_mem (x) | |
2017 | rtx x; | |
2018 | { | |
2019 | enum rtx_code code = GET_CODE (x); | |
2020 | int i, j; | |
6f7d635c | 2021 | const char *fmt; |
2a1777af JL |
2022 | |
2023 | switch (code) | |
2024 | { | |
2025 | case CONST: | |
2026 | case LABEL_REF: | |
2027 | case PC: | |
2028 | return 0; | |
2029 | ||
2030 | case REG: | |
2031 | return 1; | |
2032 | ||
2033 | case MEM: | |
2034 | return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
2035 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); | |
2036 | ||
2037 | case IF_THEN_ELSE: | |
2038 | return (jmp_uses_reg_or_mem (XEXP (x, 1)) | |
2039 | || jmp_uses_reg_or_mem (XEXP (x, 2))); | |
2040 | ||
2041 | case PLUS: case MINUS: case MULT: | |
2042 | return (jmp_uses_reg_or_mem (XEXP (x, 0)) | |
2043 | || jmp_uses_reg_or_mem (XEXP (x, 1))); | |
1d300e19 KG |
2044 | |
2045 | default: | |
2046 | break; | |
2a1777af JL |
2047 | } |
2048 | ||
2049 | fmt = GET_RTX_FORMAT (code); | |
2050 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2051 | { | |
2052 | if (fmt[i] == 'e' | |
2053 | && jmp_uses_reg_or_mem (XEXP (x, i))) | |
2054 | return 1; | |
2055 | ||
d4757e6a | 2056 | else if (fmt[i] == 'E') |
2a1777af JL |
2057 | for (j = 0; j < XVECLEN (x, i); j++) |
2058 | if (jmp_uses_reg_or_mem (XVECEXP (x, i, j))) | |
2059 | return 1; | |
2060 | } | |
2061 | ||
2062 | return 0; | |
2063 | } | |
2064 | ||
2065 | /* Return nonzero if INSN is an indirect jump (aka computed jump). | |
2066 | ||
2067 | Tablejumps and casesi insns are not considered indirect jumps; | |
2068 | we can recognize them by a (use (lael_ref)). */ | |
2069 | ||
2070 | int | |
2071 | computed_jump_p (insn) | |
2072 | rtx insn; | |
2073 | { | |
2074 | int i; | |
2075 | if (GET_CODE (insn) == JUMP_INSN) | |
2076 | { | |
2077 | rtx pat = PATTERN (insn); | |
2a1777af JL |
2078 | |
2079 | if (GET_CODE (pat) == PARALLEL) | |
2080 | { | |
2081 | int len = XVECLEN (pat, 0); | |
2082 | int has_use_labelref = 0; | |
2083 | ||
2084 | for (i = len - 1; i >= 0; i--) | |
2085 | if (GET_CODE (XVECEXP (pat, 0, i)) == USE | |
2086 | && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) | |
2087 | == LABEL_REF)) | |
2088 | has_use_labelref = 1; | |
2089 | ||
2090 | if (! has_use_labelref) | |
2091 | for (i = len - 1; i >= 0; i--) | |
2092 | if (GET_CODE (XVECEXP (pat, 0, i)) == SET | |
2093 | && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx | |
8d7532d9 | 2094 | && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) |
2a1777af JL |
2095 | return 1; |
2096 | } | |
2097 | else if (GET_CODE (pat) == SET | |
2098 | && SET_DEST (pat) == pc_rtx | |
2099 | && jmp_uses_reg_or_mem (SET_SRC (pat))) | |
2100 | return 1; | |
2101 | } | |
2102 | return 0; | |
2103 | } | |
ccc2d6d0 MM |
2104 | |
2105 | /* Traverse X via depth-first search, calling F for each | |
2106 | sub-expression (including X itself). F is also passed the DATA. | |
2107 | If F returns -1, do not traverse sub-expressions, but continue | |
2108 | traversing the rest of the tree. If F ever returns any other | |
2109 | non-zero value, stop the traversal, and return the value returned | |
2110 | by F. Otherwise, return 0. This function does not traverse inside | |
2111 | tree structure that contains RTX_EXPRs, or into sub-expressions | |
2112 | whose format code is `0' since it is not known whether or not those | |
2113 | codes are actually RTL. | |
2114 | ||
2115 | This routine is very general, and could (should?) be used to | |
2116 | implement many of the other routines in this file. */ | |
2117 | ||
ae0b51ef JL |
2118 | int |
2119 | for_each_rtx (x, f, data) | |
ef30399b | 2120 | rtx *x; |
ccc2d6d0 | 2121 | rtx_function f; |
ef30399b | 2122 | void *data; |
ccc2d6d0 MM |
2123 | { |
2124 | int result; | |
2125 | int length; | |
6f7d635c | 2126 | const char* format; |
ccc2d6d0 MM |
2127 | int i; |
2128 | ||
2129 | /* Call F on X. */ | |
2130 | result = (*f)(x, data); | |
2131 | if (result == -1) | |
2132 | /* Do not traverse sub-expressions. */ | |
2133 | return 0; | |
2134 | else if (result != 0) | |
2135 | /* Stop the traversal. */ | |
2136 | return result; | |
2137 | ||
2138 | if (*x == NULL_RTX) | |
2139 | /* There are no sub-expressions. */ | |
2140 | return 0; | |
2141 | ||
2142 | length = GET_RTX_LENGTH (GET_CODE (*x)); | |
2143 | format = GET_RTX_FORMAT (GET_CODE (*x)); | |
2144 | ||
2145 | for (i = 0; i < length; ++i) | |
2146 | { | |
2147 | switch (format[i]) | |
2148 | { | |
2149 | case 'e': | |
2150 | result = for_each_rtx (&XEXP (*x, i), f, data); | |
2151 | if (result != 0) | |
2152 | return result; | |
2153 | break; | |
2154 | ||
2155 | case 'V': | |
2156 | case 'E': | |
2157 | if (XVEC (*x, i) != 0) | |
2158 | { | |
2159 | int j; | |
2160 | for (j = 0; j < XVECLEN (*x, i); ++j) | |
2161 | { | |
2162 | result = for_each_rtx (&XVECEXP (*x, i, j), f, data); | |
2163 | if (result != 0) | |
2164 | return result; | |
2165 | } | |
2166 | } | |
2167 | break; | |
2168 | ||
2169 | default: | |
2170 | /* Nothing to do. */ | |
2171 | break; | |
2172 | } | |
2173 | ||
2174 | } | |
2175 | ||
2176 | return 0; | |
2177 | } | |
3ec2b590 | 2178 | |
777b1b71 RH |
2179 | /* Searches X for any reference to REGNO, returning the rtx of the |
2180 | reference found if any. Otherwise, returns NULL_RTX. */ | |
2181 | ||
2182 | rtx | |
2183 | regno_use_in (regno, x) | |
770ae6cc | 2184 | unsigned int regno; |
777b1b71 RH |
2185 | rtx x; |
2186 | { | |
6f7d635c | 2187 | register const char *fmt; |
777b1b71 RH |
2188 | int i, j; |
2189 | rtx tem; | |
2190 | ||
2191 | if (GET_CODE (x) == REG && REGNO (x) == regno) | |
2192 | return x; | |
2193 | ||
2194 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2195 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2196 | { | |
2197 | if (fmt[i] == 'e') | |
2198 | { | |
2199 | if ((tem = regno_use_in (regno, XEXP (x, i)))) | |
2200 | return tem; | |
2201 | } | |
2202 | else if (fmt[i] == 'E') | |
2203 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2204 | if ((tem = regno_use_in (regno , XVECEXP (x, i, j)))) | |
2205 | return tem; | |
2206 | } | |
2207 | ||
2208 | return NULL_RTX; | |
2209 | } | |
2dfa9a87 MH |
2210 | |
2211 | ||
2212 | /* Return 1 if X is an autoincrement side effect and the register is | |
2213 | not the stack pointer. */ | |
2214 | int | |
2215 | auto_inc_p (x) | |
2216 | rtx x; | |
2217 | { | |
2218 | switch (GET_CODE (x)) | |
2219 | { | |
2220 | case PRE_INC: | |
2221 | case POST_INC: | |
2222 | case PRE_DEC: | |
2223 | case POST_DEC: | |
2224 | case PRE_MODIFY: | |
2225 | case POST_MODIFY: | |
2226 | /* There are no REG_INC notes for SP. */ | |
2227 | if (XEXP (x, 0) != stack_pointer_rtx) | |
2228 | return 1; | |
2229 | default: | |
2230 | break; | |
2231 | } | |
2232 | return 0; | |
2233 | } | |
3b10cf4b MM |
2234 | |
2235 | /* Return 1 if the sequence of instructions beginning with FROM and up | |
2236 | to and including TO is safe to move. If NEW_TO is non-NULL, and | |
2237 | the sequence is not already safe to move, but can be easily | |
2238 | extended to a sequence which is safe, then NEW_TO will point to the | |
7015a814 MM |
2239 | end of the extended sequence. |
2240 | ||
2241 | For now, this function only checks that the region contains whole | |
2242 | exception regiongs, but it could be extended to check additional | |
2243 | conditions as well. */ | |
3b10cf4b MM |
2244 | |
2245 | int | |
2246 | insns_safe_to_move_p (from, to, new_to) | |
2247 | rtx from; | |
2248 | rtx to; | |
2249 | rtx *new_to; | |
2250 | { | |
2251 | int eh_region_count = 0; | |
2252 | int past_to_p = 0; | |
2253 | rtx r = from; | |
2254 | ||
7015a814 MM |
2255 | /* By default, assume the end of the region will be what was |
2256 | suggested. */ | |
2257 | if (new_to) | |
2258 | *new_to = to; | |
2259 | ||
3b10cf4b MM |
2260 | while (r) |
2261 | { | |
2262 | if (GET_CODE (r) == NOTE) | |
2263 | { | |
2264 | switch (NOTE_LINE_NUMBER (r)) | |
2265 | { | |
2266 | case NOTE_INSN_EH_REGION_BEG: | |
2267 | ++eh_region_count; | |
2268 | break; | |
2269 | ||
2270 | case NOTE_INSN_EH_REGION_END: | |
2271 | if (eh_region_count == 0) | |
2272 | /* This sequence of instructions contains the end of | |
2273 | an exception region, but not he beginning. Moving | |
2274 | it will cause chaos. */ | |
2275 | return 0; | |
2276 | ||
2277 | --eh_region_count; | |
2278 | break; | |
2279 | ||
2280 | default: | |
2281 | break; | |
2282 | } | |
2283 | } | |
2284 | else if (past_to_p) | |
2285 | /* If we've passed TO, and we see a non-note instruction, we | |
2286 | can't extend the sequence to a movable sequence. */ | |
2287 | return 0; | |
2288 | ||
2289 | if (r == to) | |
2290 | { | |
2291 | if (!new_to) | |
2292 | /* It's OK to move the sequence if there were matched sets of | |
2293 | exception region notes. */ | |
2294 | return eh_region_count == 0; | |
2295 | ||
2296 | past_to_p = 1; | |
2297 | } | |
2298 | ||
2299 | /* It's OK to move the sequence if there were matched sets of | |
2300 | exception region notes. */ | |
2301 | if (past_to_p && eh_region_count == 0) | |
2302 | { | |
2303 | *new_to = r; | |
2304 | return 1; | |
2305 | } | |
2306 | ||
2307 | /* Go to the next instruction. */ | |
2308 | r = NEXT_INSN (r); | |
2309 | } | |
2310 | ||
2311 | return 0; | |
2312 | } |