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2c88418c | 1 | /* Analyze RTL for C-Compiler |
5e5c9768 | 2 | Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc. |
2c88418c RS |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
e99215a3 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
2c88418c RS |
20 | |
21 | ||
22 | #include "config.h" | |
670ee920 | 23 | #include "system.h" |
2c88418c RS |
24 | #include "rtl.h" |
25 | ||
e9a25f70 | 26 | static int rtx_addr_can_trap_p PROTO((rtx)); |
0e05e8ea JL |
27 | static void reg_set_p_1 PROTO((rtx, rtx)); |
28 | static void reg_set_last_1 PROTO((rtx, rtx)); | |
2c88418c | 29 | |
2a1777af JL |
30 | |
31 | /* Forward declarations */ | |
32 | static int jmp_uses_reg_or_mem PROTO((rtx)); | |
33 | ||
2c88418c RS |
34 | /* Bit flags that specify the machine subtype we are compiling for. |
35 | Bits are tested using macros TARGET_... defined in the tm.h file | |
36 | and set by `-m...' switches. Must be defined in rtlanal.c. */ | |
37 | ||
38 | int target_flags; | |
39 | \f | |
40 | /* Return 1 if the value of X is unstable | |
41 | (would be different at a different point in the program). | |
42 | The frame pointer, arg pointer, etc. are considered stable | |
43 | (within one function) and so is anything marked `unchanging'. */ | |
44 | ||
45 | int | |
46 | rtx_unstable_p (x) | |
47 | rtx x; | |
48 | { | |
49 | register RTX_CODE code = GET_CODE (x); | |
50 | register int i; | |
51 | register char *fmt; | |
52 | ||
53 | if (code == MEM) | |
54 | return ! RTX_UNCHANGING_P (x); | |
55 | ||
56 | if (code == QUEUED) | |
57 | return 1; | |
58 | ||
59 | if (code == CONST || code == CONST_INT) | |
60 | return 0; | |
61 | ||
62 | if (code == REG) | |
63 | return ! (REGNO (x) == FRAME_POINTER_REGNUM | |
b3b6c9b3 | 64 | || REGNO (x) == HARD_FRAME_POINTER_REGNUM |
2c88418c RS |
65 | || REGNO (x) == ARG_POINTER_REGNUM |
66 | || RTX_UNCHANGING_P (x)); | |
67 | ||
68 | fmt = GET_RTX_FORMAT (code); | |
69 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
70 | if (fmt[i] == 'e') | |
71 | if (rtx_unstable_p (XEXP (x, i))) | |
72 | return 1; | |
73 | return 0; | |
74 | } | |
75 | ||
76 | /* Return 1 if X has a value that can vary even between two | |
77 | executions of the program. 0 means X can be compared reliably | |
78 | against certain constants or near-constants. | |
79 | The frame pointer and the arg pointer are considered constant. */ | |
80 | ||
81 | int | |
82 | rtx_varies_p (x) | |
83 | rtx x; | |
84 | { | |
85 | register RTX_CODE code = GET_CODE (x); | |
86 | register int i; | |
87 | register char *fmt; | |
88 | ||
89 | switch (code) | |
90 | { | |
91 | case MEM: | |
92 | case QUEUED: | |
93 | return 1; | |
94 | ||
95 | case CONST: | |
96 | case CONST_INT: | |
97 | case CONST_DOUBLE: | |
98 | case SYMBOL_REF: | |
99 | case LABEL_REF: | |
100 | return 0; | |
101 | ||
102 | case REG: | |
103 | /* Note that we have to test for the actual rtx used for the frame | |
104 | and arg pointers and not just the register number in case we have | |
105 | eliminated the frame and/or arg pointer and are using it | |
106 | for pseudos. */ | |
b3b6c9b3 | 107 | return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
e5e809f4 | 108 | || x == arg_pointer_rtx || x == pic_offset_table_rtx); |
2c88418c RS |
109 | |
110 | case LO_SUM: | |
111 | /* The operand 0 of a LO_SUM is considered constant | |
112 | (in fact is it related specifically to operand 1). */ | |
113 | return rtx_varies_p (XEXP (x, 1)); | |
e9a25f70 JL |
114 | |
115 | default: | |
116 | break; | |
2c88418c RS |
117 | } |
118 | ||
119 | fmt = GET_RTX_FORMAT (code); | |
120 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
121 | if (fmt[i] == 'e') | |
122 | if (rtx_varies_p (XEXP (x, i))) | |
123 | return 1; | |
124 | return 0; | |
125 | } | |
126 | ||
127 | /* Return 0 if the use of X as an address in a MEM can cause a trap. */ | |
128 | ||
e9a25f70 | 129 | static int |
2c88418c RS |
130 | rtx_addr_can_trap_p (x) |
131 | register rtx x; | |
132 | { | |
133 | register enum rtx_code code = GET_CODE (x); | |
134 | ||
135 | switch (code) | |
136 | { | |
137 | case SYMBOL_REF: | |
138 | case LABEL_REF: | |
139 | /* SYMBOL_REF is problematic due to the possible presence of | |
140 | a #pragma weak, but to say that loads from symbols can trap is | |
141 | *very* costly. It's not at all clear what's best here. For | |
142 | now, we ignore the impact of #pragma weak. */ | |
143 | return 0; | |
144 | ||
145 | case REG: | |
146 | /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ | |
b3b6c9b3 DE |
147 | return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
148 | || x == stack_pointer_rtx || x == arg_pointer_rtx); | |
2c88418c RS |
149 | |
150 | case CONST: | |
151 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
152 | ||
153 | case PLUS: | |
154 | /* An address is assumed not to trap if it is an address that can't | |
155 | trap plus a constant integer. */ | |
156 | return (rtx_addr_can_trap_p (XEXP (x, 0)) | |
157 | || GET_CODE (XEXP (x, 1)) != CONST_INT); | |
158 | ||
159 | case LO_SUM: | |
160 | return rtx_addr_can_trap_p (XEXP (x, 1)); | |
e9a25f70 JL |
161 | |
162 | default: | |
163 | break; | |
2c88418c RS |
164 | } |
165 | ||
166 | /* If it isn't one of the case above, it can cause a trap. */ | |
167 | return 1; | |
168 | } | |
169 | ||
170 | /* Return 1 if X refers to a memory location whose address | |
171 | cannot be compared reliably with constant addresses, | |
172 | or if X refers to a BLKmode memory object. */ | |
173 | ||
174 | int | |
175 | rtx_addr_varies_p (x) | |
176 | rtx x; | |
177 | { | |
178 | register enum rtx_code code; | |
179 | register int i; | |
180 | register char *fmt; | |
181 | ||
182 | if (x == 0) | |
183 | return 0; | |
184 | ||
185 | code = GET_CODE (x); | |
186 | if (code == MEM) | |
187 | return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0)); | |
188 | ||
189 | fmt = GET_RTX_FORMAT (code); | |
190 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
191 | if (fmt[i] == 'e') | |
833c0b26 RK |
192 | { |
193 | if (rtx_addr_varies_p (XEXP (x, i))) | |
194 | return 1; | |
195 | } | |
196 | else if (fmt[i] == 'E') | |
197 | { | |
198 | int j; | |
199 | for (j = 0; j < XVECLEN (x, i); j++) | |
200 | if (rtx_addr_varies_p (XVECEXP (x, i, j))) | |
201 | return 1; | |
202 | } | |
2c88418c RS |
203 | return 0; |
204 | } | |
205 | \f | |
206 | /* Return the value of the integer term in X, if one is apparent; | |
207 | otherwise return 0. | |
208 | Only obvious integer terms are detected. | |
209 | This is used in cse.c with the `related_value' field.*/ | |
210 | ||
c166a311 | 211 | HOST_WIDE_INT |
2c88418c RS |
212 | get_integer_term (x) |
213 | rtx x; | |
214 | { | |
215 | if (GET_CODE (x) == CONST) | |
216 | x = XEXP (x, 0); | |
217 | ||
218 | if (GET_CODE (x) == MINUS | |
219 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
220 | return - INTVAL (XEXP (x, 1)); | |
221 | if (GET_CODE (x) == PLUS | |
222 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
223 | return INTVAL (XEXP (x, 1)); | |
224 | return 0; | |
225 | } | |
226 | ||
227 | /* If X is a constant, return the value sans apparent integer term; | |
228 | otherwise return 0. | |
229 | Only obvious integer terms are detected. */ | |
230 | ||
231 | rtx | |
232 | get_related_value (x) | |
233 | rtx x; | |
234 | { | |
235 | if (GET_CODE (x) != CONST) | |
236 | return 0; | |
237 | x = XEXP (x, 0); | |
238 | if (GET_CODE (x) == PLUS | |
239 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
240 | return XEXP (x, 0); | |
241 | else if (GET_CODE (x) == MINUS | |
242 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
243 | return XEXP (x, 0); | |
244 | return 0; | |
245 | } | |
246 | \f | |
247 | /* Nonzero if register REG appears somewhere within IN. | |
248 | Also works if REG is not a register; in this case it checks | |
249 | for a subexpression of IN that is Lisp "equal" to REG. */ | |
250 | ||
251 | int | |
252 | reg_mentioned_p (reg, in) | |
253 | register rtx reg, in; | |
254 | { | |
255 | register char *fmt; | |
256 | register int i; | |
257 | register enum rtx_code code; | |
258 | ||
259 | if (in == 0) | |
260 | return 0; | |
261 | ||
262 | if (reg == in) | |
263 | return 1; | |
264 | ||
265 | if (GET_CODE (in) == LABEL_REF) | |
266 | return reg == XEXP (in, 0); | |
267 | ||
268 | code = GET_CODE (in); | |
269 | ||
270 | switch (code) | |
271 | { | |
272 | /* Compare registers by number. */ | |
273 | case REG: | |
274 | return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); | |
275 | ||
276 | /* These codes have no constituent expressions | |
277 | and are unique. */ | |
278 | case SCRATCH: | |
279 | case CC0: | |
280 | case PC: | |
281 | return 0; | |
282 | ||
283 | case CONST_INT: | |
284 | return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); | |
285 | ||
286 | case CONST_DOUBLE: | |
287 | /* These are kept unique for a given value. */ | |
288 | return 0; | |
e9a25f70 JL |
289 | |
290 | default: | |
291 | break; | |
2c88418c RS |
292 | } |
293 | ||
294 | if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) | |
295 | return 1; | |
296 | ||
297 | fmt = GET_RTX_FORMAT (code); | |
298 | ||
299 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
300 | { | |
301 | if (fmt[i] == 'E') | |
302 | { | |
303 | register int j; | |
304 | for (j = XVECLEN (in, i) - 1; j >= 0; j--) | |
305 | if (reg_mentioned_p (reg, XVECEXP (in, i, j))) | |
306 | return 1; | |
307 | } | |
308 | else if (fmt[i] == 'e' | |
309 | && reg_mentioned_p (reg, XEXP (in, i))) | |
310 | return 1; | |
311 | } | |
312 | return 0; | |
313 | } | |
314 | \f | |
315 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is | |
316 | no CODE_LABEL insn. */ | |
317 | ||
318 | int | |
319 | no_labels_between_p (beg, end) | |
320 | rtx beg, end; | |
321 | { | |
322 | register rtx p; | |
323 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
324 | if (GET_CODE (p) == CODE_LABEL) | |
325 | return 0; | |
326 | return 1; | |
327 | } | |
328 | ||
3ec2b590 R |
329 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is |
330 | no JUMP_INSN insn. */ | |
331 | ||
332 | int | |
333 | no_jumps_between_p (beg, end) | |
334 | rtx beg, end; | |
335 | { | |
336 | register rtx p; | |
337 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
338 | if (GET_CODE (p) == JUMP_INSN) | |
339 | return 0; | |
340 | return 1; | |
341 | } | |
342 | ||
2c88418c RS |
343 | /* Nonzero if register REG is used in an insn between |
344 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
345 | ||
346 | int | |
347 | reg_used_between_p (reg, from_insn, to_insn) | |
348 | rtx reg, from_insn, to_insn; | |
349 | { | |
350 | register rtx insn; | |
351 | ||
352 | if (from_insn == to_insn) | |
353 | return 0; | |
354 | ||
355 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
356 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
8f3e7a26 RK |
357 | && (reg_overlap_mentioned_p (reg, PATTERN (insn)) |
358 | || (GET_CODE (insn) == CALL_INSN | |
359 | && (find_reg_fusage (insn, USE, reg) | |
360 | || find_reg_fusage (insn, CLOBBER, reg))))) | |
2c88418c RS |
361 | return 1; |
362 | return 0; | |
363 | } | |
364 | \f | |
365 | /* Nonzero if the old value of X, a register, is referenced in BODY. If X | |
366 | is entirely replaced by a new value and the only use is as a SET_DEST, | |
367 | we do not consider it a reference. */ | |
368 | ||
369 | int | |
370 | reg_referenced_p (x, body) | |
371 | rtx x; | |
372 | rtx body; | |
373 | { | |
374 | int i; | |
375 | ||
376 | switch (GET_CODE (body)) | |
377 | { | |
378 | case SET: | |
379 | if (reg_overlap_mentioned_p (x, SET_SRC (body))) | |
380 | return 1; | |
381 | ||
382 | /* If the destination is anything other than CC0, PC, a REG or a SUBREG | |
383 | of a REG that occupies all of the REG, the insn references X if | |
384 | it is mentioned in the destination. */ | |
385 | if (GET_CODE (SET_DEST (body)) != CC0 | |
386 | && GET_CODE (SET_DEST (body)) != PC | |
387 | && GET_CODE (SET_DEST (body)) != REG | |
388 | && ! (GET_CODE (SET_DEST (body)) == SUBREG | |
389 | && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG | |
390 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) | |
391 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
392 | == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) | |
393 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) | |
394 | && reg_overlap_mentioned_p (x, SET_DEST (body))) | |
395 | return 1; | |
e9a25f70 | 396 | return 0; |
2c88418c RS |
397 | |
398 | case ASM_OPERANDS: | |
399 | for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) | |
400 | if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) | |
401 | return 1; | |
e9a25f70 | 402 | return 0; |
2c88418c RS |
403 | |
404 | case CALL: | |
405 | case USE: | |
406 | return reg_overlap_mentioned_p (x, body); | |
407 | ||
408 | case TRAP_IF: | |
409 | return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); | |
410 | ||
2ac4fed0 RK |
411 | case UNSPEC: |
412 | case UNSPEC_VOLATILE: | |
2c88418c RS |
413 | case PARALLEL: |
414 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) | |
415 | if (reg_referenced_p (x, XVECEXP (body, 0, i))) | |
416 | return 1; | |
e9a25f70 JL |
417 | return 0; |
418 | ||
419 | default: | |
420 | return 0; | |
2c88418c | 421 | } |
2c88418c RS |
422 | } |
423 | ||
424 | /* Nonzero if register REG is referenced in an insn between | |
425 | FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do | |
0f41302f | 426 | not count. */ |
2c88418c RS |
427 | |
428 | int | |
429 | reg_referenced_between_p (reg, from_insn, to_insn) | |
430 | rtx reg, from_insn, to_insn; | |
431 | { | |
432 | register rtx insn; | |
433 | ||
434 | if (from_insn == to_insn) | |
435 | return 0; | |
436 | ||
437 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
438 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
8f3e7a26 RK |
439 | && (reg_referenced_p (reg, PATTERN (insn)) |
440 | || (GET_CODE (insn) == CALL_INSN | |
441 | && find_reg_fusage (insn, USE, reg)))) | |
2c88418c RS |
442 | return 1; |
443 | return 0; | |
444 | } | |
445 | \f | |
446 | /* Nonzero if register REG is set or clobbered in an insn between | |
447 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
448 | ||
449 | int | |
450 | reg_set_between_p (reg, from_insn, to_insn) | |
451 | rtx reg, from_insn, to_insn; | |
452 | { | |
453 | register rtx insn; | |
454 | ||
455 | if (from_insn == to_insn) | |
456 | return 0; | |
457 | ||
458 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
459 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
84607dc1 | 460 | && reg_set_p (reg, insn)) |
2c88418c RS |
461 | return 1; |
462 | return 0; | |
463 | } | |
464 | ||
465 | /* Internals of reg_set_between_p. */ | |
466 | ||
467 | static rtx reg_set_reg; | |
468 | static int reg_set_flag; | |
469 | ||
5f91c709 RK |
470 | static void |
471 | reg_set_p_1 (x, pat) | |
d6f4ec51 KG |
472 | rtx x; |
473 | rtx pat ATTRIBUTE_UNUSED; | |
2c88418c RS |
474 | { |
475 | /* We don't want to return 1 if X is a MEM that contains a register | |
476 | within REG_SET_REG. */ | |
477 | ||
478 | if ((GET_CODE (x) != MEM) | |
479 | && reg_overlap_mentioned_p (reg_set_reg, x)) | |
480 | reg_set_flag = 1; | |
481 | } | |
482 | ||
483 | int | |
484 | reg_set_p (reg, insn) | |
485 | rtx reg, insn; | |
486 | { | |
487 | rtx body = insn; | |
488 | ||
489 | /* We can be passed an insn or part of one. If we are passed an insn, | |
490 | check if a side-effect of the insn clobbers REG. */ | |
491 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
492 | { | |
493 | if (FIND_REG_INC_NOTE (insn, reg) | |
494 | || (GET_CODE (insn) == CALL_INSN | |
495 | /* We'd like to test call_used_regs here, but rtlanal.c can't | |
496 | reference that variable due to its use in genattrtab. So | |
8f3e7a26 RK |
497 | we'll just be more conservative. |
498 | ||
499 | ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE | |
500 | information holds all clobbered registers. */ | |
2c88418c RS |
501 | && ((GET_CODE (reg) == REG |
502 | && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
8f3e7a26 RK |
503 | || GET_CODE (reg) == MEM |
504 | || find_reg_fusage (insn, CLOBBER, reg)))) | |
2c88418c RS |
505 | return 1; |
506 | ||
507 | body = PATTERN (insn); | |
508 | } | |
509 | ||
510 | reg_set_reg = reg; | |
511 | reg_set_flag = 0; | |
512 | note_stores (body, reg_set_p_1); | |
513 | return reg_set_flag; | |
514 | } | |
515 | ||
a2e1a0bf RH |
516 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
517 | only if none of them are modified between START and END. Do not | |
518 | consider non-registers one way or the other. */ | |
519 | ||
520 | int | |
521 | regs_set_between_p (x, start, end) | |
522 | rtx x; | |
523 | rtx start, end; | |
524 | { | |
525 | enum rtx_code code = GET_CODE (x); | |
526 | char *fmt; | |
527 | int i, j; | |
528 | ||
529 | switch (code) | |
530 | { | |
531 | case CONST_INT: | |
532 | case CONST_DOUBLE: | |
533 | case CONST: | |
534 | case SYMBOL_REF: | |
535 | case LABEL_REF: | |
536 | case PC: | |
537 | case CC0: | |
538 | return 0; | |
539 | ||
540 | case REG: | |
541 | return reg_set_between_p (x, start, end); | |
542 | ||
543 | default: | |
544 | break; | |
545 | } | |
546 | ||
547 | fmt = GET_RTX_FORMAT (code); | |
548 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
549 | { | |
550 | if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end)) | |
551 | return 1; | |
552 | ||
553 | else if (fmt[i] == 'E') | |
554 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
555 | if (regs_set_between_p (XVECEXP (x, i, j), start, end)) | |
556 | return 1; | |
557 | } | |
558 | ||
559 | return 0; | |
560 | } | |
561 | ||
2c88418c RS |
562 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
563 | only if none of them are modified between START and END. Return 1 if | |
564 | X contains a MEM; this routine does not perform any memory aliasing. */ | |
565 | ||
566 | int | |
567 | modified_between_p (x, start, end) | |
568 | rtx x; | |
569 | rtx start, end; | |
570 | { | |
571 | enum rtx_code code = GET_CODE (x); | |
572 | char *fmt; | |
f8163c92 | 573 | int i, j; |
2c88418c RS |
574 | |
575 | switch (code) | |
576 | { | |
577 | case CONST_INT: | |
578 | case CONST_DOUBLE: | |
579 | case CONST: | |
580 | case SYMBOL_REF: | |
581 | case LABEL_REF: | |
582 | return 0; | |
583 | ||
584 | case PC: | |
585 | case CC0: | |
586 | return 1; | |
587 | ||
588 | case MEM: | |
589 | /* If the memory is not constant, assume it is modified. If it is | |
590 | constant, we still have to check the address. */ | |
591 | if (! RTX_UNCHANGING_P (x)) | |
592 | return 1; | |
593 | break; | |
594 | ||
595 | case REG: | |
596 | return reg_set_between_p (x, start, end); | |
e9a25f70 JL |
597 | |
598 | default: | |
599 | break; | |
2c88418c RS |
600 | } |
601 | ||
602 | fmt = GET_RTX_FORMAT (code); | |
603 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
f8163c92 RK |
604 | { |
605 | if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) | |
606 | return 1; | |
607 | ||
608 | if (fmt[i] == 'E') | |
609 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
610 | if (modified_between_p (XVECEXP (x, i, j), start, end)) | |
611 | return 1; | |
612 | } | |
613 | ||
614 | return 0; | |
615 | } | |
616 | ||
617 | /* Similar to reg_set_p, but check all registers in X. Return 0 only if none | |
618 | of them are modified in INSN. Return 1 if X contains a MEM; this routine | |
619 | does not perform any memory aliasing. */ | |
620 | ||
621 | int | |
622 | modified_in_p (x, insn) | |
623 | rtx x; | |
624 | rtx insn; | |
625 | { | |
626 | enum rtx_code code = GET_CODE (x); | |
627 | char *fmt; | |
628 | int i, j; | |
629 | ||
630 | switch (code) | |
631 | { | |
632 | case CONST_INT: | |
633 | case CONST_DOUBLE: | |
634 | case CONST: | |
635 | case SYMBOL_REF: | |
636 | case LABEL_REF: | |
637 | return 0; | |
638 | ||
639 | case PC: | |
640 | case CC0: | |
2c88418c RS |
641 | return 1; |
642 | ||
f8163c92 RK |
643 | case MEM: |
644 | /* If the memory is not constant, assume it is modified. If it is | |
645 | constant, we still have to check the address. */ | |
646 | if (! RTX_UNCHANGING_P (x)) | |
647 | return 1; | |
648 | break; | |
649 | ||
650 | case REG: | |
651 | return reg_set_p (x, insn); | |
e9a25f70 JL |
652 | |
653 | default: | |
654 | break; | |
f8163c92 RK |
655 | } |
656 | ||
657 | fmt = GET_RTX_FORMAT (code); | |
658 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
659 | { | |
660 | if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) | |
661 | return 1; | |
662 | ||
663 | if (fmt[i] == 'E') | |
664 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
665 | if (modified_in_p (XVECEXP (x, i, j), insn)) | |
666 | return 1; | |
667 | } | |
668 | ||
2c88418c RS |
669 | return 0; |
670 | } | |
671 | \f | |
672 | /* Given an INSN, return a SET expression if this insn has only a single SET. | |
673 | It may also have CLOBBERs, USEs, or SET whose output | |
674 | will not be used, which we ignore. */ | |
675 | ||
676 | rtx | |
677 | single_set (insn) | |
678 | rtx insn; | |
679 | { | |
680 | rtx set; | |
681 | int i; | |
682 | ||
683 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
684 | return 0; | |
685 | ||
686 | if (GET_CODE (PATTERN (insn)) == SET) | |
687 | return PATTERN (insn); | |
688 | ||
689 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
690 | { | |
691 | for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
692 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET | |
fb3ef382 RS |
693 | && (! find_reg_note (insn, REG_UNUSED, |
694 | SET_DEST (XVECEXP (PATTERN (insn), 0, i))) | |
695 | || side_effects_p (XVECEXP (PATTERN (insn), 0, i)))) | |
2c88418c RS |
696 | { |
697 | if (set) | |
698 | return 0; | |
699 | else | |
700 | set = XVECEXP (PATTERN (insn), 0, i); | |
701 | } | |
702 | return set; | |
703 | } | |
704 | ||
705 | return 0; | |
706 | } | |
941c63ac JL |
707 | |
708 | /* Given an INSN, return nonzero if it has more than one SET, else return | |
709 | zero. */ | |
710 | ||
5f7d3786 | 711 | int |
941c63ac JL |
712 | multiple_sets (insn) |
713 | rtx insn; | |
714 | { | |
cae8acdd | 715 | int found; |
941c63ac JL |
716 | int i; |
717 | ||
718 | /* INSN must be an insn. */ | |
719 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
720 | return 0; | |
721 | ||
722 | /* Only a PARALLEL can have multiple SETs. */ | |
723 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
724 | { | |
725 | for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
726 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) | |
727 | { | |
728 | /* If we have already found a SET, then return now. */ | |
729 | if (found) | |
730 | return 1; | |
731 | else | |
732 | found = 1; | |
733 | } | |
734 | } | |
735 | ||
736 | /* Either zero or one SET. */ | |
737 | return 0; | |
738 | } | |
2c88418c RS |
739 | \f |
740 | /* Return the last thing that X was assigned from before *PINSN. Verify that | |
741 | the object is not modified up to VALID_TO. If it was, if we hit | |
742 | a partial assignment to X, or hit a CODE_LABEL first, return X. If we | |
743 | found an assignment, update *PINSN to point to it. */ | |
744 | ||
745 | rtx | |
746 | find_last_value (x, pinsn, valid_to) | |
747 | rtx x; | |
748 | rtx *pinsn; | |
749 | rtx valid_to; | |
750 | { | |
751 | rtx p; | |
752 | ||
753 | for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL; | |
754 | p = PREV_INSN (p)) | |
755 | if (GET_RTX_CLASS (GET_CODE (p)) == 'i') | |
756 | { | |
757 | rtx set = single_set (p); | |
c166a311 | 758 | rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); |
2c88418c RS |
759 | |
760 | if (set && rtx_equal_p (x, SET_DEST (set))) | |
761 | { | |
762 | rtx src = SET_SRC (set); | |
763 | ||
764 | if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST) | |
765 | src = XEXP (note, 0); | |
766 | ||
767 | if (! modified_between_p (src, PREV_INSN (p), valid_to) | |
768 | /* Reject hard registers because we don't usually want | |
769 | to use them; we'd rather use a pseudo. */ | |
770 | && ! (GET_CODE (src) == REG | |
771 | && REGNO (src) < FIRST_PSEUDO_REGISTER)) | |
772 | { | |
773 | *pinsn = p; | |
774 | return src; | |
775 | } | |
776 | } | |
777 | ||
778 | /* If set in non-simple way, we don't have a value. */ | |
779 | if (reg_set_p (x, p)) | |
780 | break; | |
781 | } | |
782 | ||
783 | return x; | |
784 | } | |
785 | \f | |
786 | /* Return nonzero if register in range [REGNO, ENDREGNO) | |
787 | appears either explicitly or implicitly in X | |
788 | other than being stored into. | |
789 | ||
790 | References contained within the substructure at LOC do not count. | |
791 | LOC may be zero, meaning don't ignore anything. */ | |
792 | ||
793 | int | |
794 | refers_to_regno_p (regno, endregno, x, loc) | |
795 | int regno, endregno; | |
796 | rtx x; | |
797 | rtx *loc; | |
798 | { | |
799 | register int i; | |
800 | register RTX_CODE code; | |
801 | register char *fmt; | |
802 | ||
803 | repeat: | |
804 | /* The contents of a REG_NONNEG note is always zero, so we must come here | |
805 | upon repeat in case the last REG_NOTE is a REG_NONNEG note. */ | |
806 | if (x == 0) | |
807 | return 0; | |
808 | ||
809 | code = GET_CODE (x); | |
810 | ||
811 | switch (code) | |
812 | { | |
813 | case REG: | |
814 | i = REGNO (x); | |
f8163c92 RK |
815 | |
816 | /* If we modifying the stack, frame, or argument pointer, it will | |
817 | clobber a virtual register. In fact, we could be more precise, | |
818 | but it isn't worth it. */ | |
819 | if ((i == STACK_POINTER_REGNUM | |
820 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
821 | || i == ARG_POINTER_REGNUM | |
822 | #endif | |
823 | || i == FRAME_POINTER_REGNUM) | |
824 | && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER) | |
825 | return 1; | |
826 | ||
2c88418c RS |
827 | return (endregno > i |
828 | && regno < i + (i < FIRST_PSEUDO_REGISTER | |
829 | ? HARD_REGNO_NREGS (i, GET_MODE (x)) | |
830 | : 1)); | |
831 | ||
832 | case SUBREG: | |
833 | /* If this is a SUBREG of a hard reg, we can see exactly which | |
834 | registers are being modified. Otherwise, handle normally. */ | |
835 | if (GET_CODE (SUBREG_REG (x)) == REG | |
836 | && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) | |
837 | { | |
838 | int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); | |
839 | int inner_endregno | |
840 | = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER | |
841 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
842 | ||
843 | return endregno > inner_regno && regno < inner_endregno; | |
844 | } | |
845 | break; | |
846 | ||
847 | case CLOBBER: | |
848 | case SET: | |
849 | if (&SET_DEST (x) != loc | |
850 | /* Note setting a SUBREG counts as referring to the REG it is in for | |
851 | a pseudo but not for hard registers since we can | |
852 | treat each word individually. */ | |
853 | && ((GET_CODE (SET_DEST (x)) == SUBREG | |
854 | && loc != &SUBREG_REG (SET_DEST (x)) | |
855 | && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG | |
856 | && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER | |
857 | && refers_to_regno_p (regno, endregno, | |
858 | SUBREG_REG (SET_DEST (x)), loc)) | |
859 | || (GET_CODE (SET_DEST (x)) != REG | |
860 | && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) | |
861 | return 1; | |
862 | ||
863 | if (code == CLOBBER || loc == &SET_SRC (x)) | |
864 | return 0; | |
865 | x = SET_SRC (x); | |
866 | goto repeat; | |
e9a25f70 JL |
867 | |
868 | default: | |
869 | break; | |
2c88418c RS |
870 | } |
871 | ||
872 | /* X does not match, so try its subexpressions. */ | |
873 | ||
874 | fmt = GET_RTX_FORMAT (code); | |
875 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
876 | { | |
877 | if (fmt[i] == 'e' && loc != &XEXP (x, i)) | |
878 | { | |
879 | if (i == 0) | |
880 | { | |
881 | x = XEXP (x, 0); | |
882 | goto repeat; | |
883 | } | |
884 | else | |
885 | if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc)) | |
886 | return 1; | |
887 | } | |
888 | else if (fmt[i] == 'E') | |
889 | { | |
890 | register int j; | |
891 | for (j = XVECLEN (x, i) - 1; j >=0; j--) | |
892 | if (loc != &XVECEXP (x, i, j) | |
893 | && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc)) | |
894 | return 1; | |
895 | } | |
896 | } | |
897 | return 0; | |
898 | } | |
899 | ||
900 | /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, | |
901 | we check if any register number in X conflicts with the relevant register | |
902 | numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN | |
903 | contains a MEM (we don't bother checking for memory addresses that can't | |
904 | conflict because we expect this to be a rare case. */ | |
905 | ||
906 | int | |
907 | reg_overlap_mentioned_p (x, in) | |
908 | rtx x, in; | |
909 | { | |
910 | int regno, endregno; | |
911 | ||
b98b49ac JL |
912 | /* Overly conservative. */ |
913 | if (GET_CODE (x) == STRICT_LOW_PART) | |
914 | x = XEXP (x, 0); | |
915 | ||
916 | /* If either argument is a constant, then modifying X can not affect IN. */ | |
917 | if (CONSTANT_P (x) || CONSTANT_P (in)) | |
918 | return 0; | |
919 | else if (GET_CODE (x) == SUBREG) | |
2c88418c RS |
920 | { |
921 | regno = REGNO (SUBREG_REG (x)); | |
922 | if (regno < FIRST_PSEUDO_REGISTER) | |
923 | regno += SUBREG_WORD (x); | |
924 | } | |
925 | else if (GET_CODE (x) == REG) | |
926 | regno = REGNO (x); | |
2c88418c RS |
927 | else if (GET_CODE (x) == MEM) |
928 | { | |
929 | char *fmt; | |
930 | int i; | |
931 | ||
932 | if (GET_CODE (in) == MEM) | |
933 | return 1; | |
934 | ||
935 | fmt = GET_RTX_FORMAT (GET_CODE (in)); | |
936 | ||
937 | for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) | |
938 | if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i))) | |
939 | return 1; | |
940 | ||
941 | return 0; | |
942 | } | |
943 | else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC | |
944 | || GET_CODE (x) == CC0) | |
945 | return reg_mentioned_p (x, in); | |
c0222c21 DM |
946 | else if (GET_CODE (x) == PARALLEL |
947 | && GET_MODE (x) == BLKmode) | |
948 | { | |
949 | register int i; | |
950 | ||
951 | /* If any register in here refers to it | |
952 | we return true. */ | |
953 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
954 | if (reg_overlap_mentioned_p (SET_DEST (XVECEXP (x, 0, i)), in)) | |
955 | return 1; | |
956 | return 0; | |
957 | } | |
2c88418c RS |
958 | else |
959 | abort (); | |
960 | ||
961 | endregno = regno + (regno < FIRST_PSEUDO_REGISTER | |
962 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
963 | ||
c166a311 | 964 | return refers_to_regno_p (regno, endregno, in, NULL_PTR); |
2c88418c RS |
965 | } |
966 | \f | |
967 | /* Used for communications between the next few functions. */ | |
968 | ||
969 | static int reg_set_last_unknown; | |
970 | static rtx reg_set_last_value; | |
971 | static int reg_set_last_first_regno, reg_set_last_last_regno; | |
972 | ||
973 | /* Called via note_stores from reg_set_last. */ | |
974 | ||
975 | static void | |
976 | reg_set_last_1 (x, pat) | |
977 | rtx x; | |
978 | rtx pat; | |
979 | { | |
980 | int first, last; | |
981 | ||
982 | /* If X is not a register, or is not one in the range we care | |
983 | about, ignore. */ | |
984 | if (GET_CODE (x) != REG) | |
985 | return; | |
986 | ||
987 | first = REGNO (x); | |
988 | last = first + (first < FIRST_PSEUDO_REGISTER | |
989 | ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1); | |
990 | ||
991 | if (first >= reg_set_last_last_regno | |
992 | || last <= reg_set_last_first_regno) | |
993 | return; | |
994 | ||
995 | /* If this is a CLOBBER or is some complex LHS, or doesn't modify | |
996 | exactly the registers we care about, show we don't know the value. */ | |
997 | if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x | |
998 | || first != reg_set_last_first_regno | |
999 | || last != reg_set_last_last_regno) | |
1000 | reg_set_last_unknown = 1; | |
1001 | else | |
1002 | reg_set_last_value = SET_SRC (pat); | |
1003 | } | |
1004 | ||
1005 | /* Return the last value to which REG was set prior to INSN. If we can't | |
1006 | find it easily, return 0. | |
1007 | ||
4d9d7d9d RK |
1008 | We only return a REG, SUBREG, or constant because it is too hard to |
1009 | check if a MEM remains unchanged. */ | |
2c88418c RS |
1010 | |
1011 | rtx | |
1012 | reg_set_last (x, insn) | |
1013 | rtx x; | |
1014 | rtx insn; | |
1015 | { | |
1016 | rtx orig_insn = insn; | |
1017 | ||
1018 | reg_set_last_first_regno = REGNO (x); | |
1019 | ||
1020 | reg_set_last_last_regno | |
1021 | = reg_set_last_first_regno | |
1022 | + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER | |
1023 | ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1); | |
1024 | ||
1025 | reg_set_last_unknown = 0; | |
1026 | reg_set_last_value = 0; | |
1027 | ||
1028 | /* Scan backwards until reg_set_last_1 changed one of the above flags. | |
1029 | Stop when we reach a label or X is a hard reg and we reach a | |
1030 | CALL_INSN (if reg_set_last_last_regno is a hard reg). | |
1031 | ||
1032 | If we find a set of X, ensure that its SET_SRC remains unchanged. */ | |
1033 | ||
6b02c316 RS |
1034 | /* We compare with <= here, because reg_set_last_last_regno |
1035 | is actually the number of the first reg *not* in X. */ | |
2c88418c RS |
1036 | for (; |
1037 | insn && GET_CODE (insn) != CODE_LABEL | |
1038 | && ! (GET_CODE (insn) == CALL_INSN | |
1039 | && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER); | |
1040 | insn = PREV_INSN (insn)) | |
1041 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1042 | { | |
1043 | note_stores (PATTERN (insn), reg_set_last_1); | |
1044 | if (reg_set_last_unknown) | |
1045 | return 0; | |
1046 | else if (reg_set_last_value) | |
1047 | { | |
1048 | if (CONSTANT_P (reg_set_last_value) | |
4d9d7d9d RK |
1049 | || ((GET_CODE (reg_set_last_value) == REG |
1050 | || GET_CODE (reg_set_last_value) == SUBREG) | |
2c88418c | 1051 | && ! reg_set_between_p (reg_set_last_value, |
ce9c8df2 | 1052 | insn, orig_insn))) |
2c88418c RS |
1053 | return reg_set_last_value; |
1054 | else | |
1055 | return 0; | |
1056 | } | |
1057 | } | |
1058 | ||
1059 | return 0; | |
1060 | } | |
1061 | \f | |
935ddcf5 | 1062 | /* This is 1 until after the rtl generation pass. */ |
2c88418c RS |
1063 | int rtx_equal_function_value_matters; |
1064 | ||
1065 | /* Return 1 if X and Y are identical-looking rtx's. | |
1066 | This is the Lisp function EQUAL for rtx arguments. */ | |
1067 | ||
1068 | int | |
1069 | rtx_equal_p (x, y) | |
1070 | rtx x, y; | |
1071 | { | |
1072 | register int i; | |
1073 | register int j; | |
1074 | register enum rtx_code code; | |
1075 | register char *fmt; | |
1076 | ||
1077 | if (x == y) | |
1078 | return 1; | |
1079 | if (x == 0 || y == 0) | |
1080 | return 0; | |
1081 | ||
1082 | code = GET_CODE (x); | |
1083 | /* Rtx's of different codes cannot be equal. */ | |
1084 | if (code != GET_CODE (y)) | |
1085 | return 0; | |
1086 | ||
1087 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. | |
1088 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ | |
1089 | ||
1090 | if (GET_MODE (x) != GET_MODE (y)) | |
1091 | return 0; | |
1092 | ||
1093 | /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */ | |
1094 | ||
1095 | if (code == REG) | |
1096 | /* Until rtl generation is complete, don't consider a reference to the | |
1097 | return register of the current function the same as the return from a | |
1098 | called function. This eases the job of function integration. Once the | |
1099 | distinction is no longer needed, they can be considered equivalent. */ | |
1100 | return (REGNO (x) == REGNO (y) | |
1101 | && (! rtx_equal_function_value_matters | |
1102 | || REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y))); | |
1103 | else if (code == LABEL_REF) | |
1104 | return XEXP (x, 0) == XEXP (y, 0); | |
1105 | else if (code == SYMBOL_REF) | |
1106 | return XSTR (x, 0) == XSTR (y, 0); | |
1107 | else if (code == SCRATCH || code == CONST_DOUBLE) | |
1108 | return 0; | |
1109 | ||
1110 | /* Compare the elements. If any pair of corresponding elements | |
1111 | fail to match, return 0 for the whole things. */ | |
1112 | ||
1113 | fmt = GET_RTX_FORMAT (code); | |
1114 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1115 | { | |
1116 | switch (fmt[i]) | |
1117 | { | |
c166a311 CH |
1118 | case 'w': |
1119 | if (XWINT (x, i) != XWINT (y, i)) | |
1120 | return 0; | |
1121 | break; | |
1122 | ||
2c88418c RS |
1123 | case 'n': |
1124 | case 'i': | |
1125 | if (XINT (x, i) != XINT (y, i)) | |
1126 | return 0; | |
1127 | break; | |
1128 | ||
1129 | case 'V': | |
1130 | case 'E': | |
1131 | /* Two vectors must have the same length. */ | |
1132 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
1133 | return 0; | |
1134 | ||
1135 | /* And the corresponding elements must match. */ | |
1136 | for (j = 0; j < XVECLEN (x, i); j++) | |
1137 | if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0) | |
1138 | return 0; | |
1139 | break; | |
1140 | ||
1141 | case 'e': | |
1142 | if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0) | |
1143 | return 0; | |
1144 | break; | |
1145 | ||
1146 | case 'S': | |
1147 | case 's': | |
1148 | if (strcmp (XSTR (x, i), XSTR (y, i))) | |
1149 | return 0; | |
1150 | break; | |
1151 | ||
1152 | case 'u': | |
1153 | /* These are just backpointers, so they don't matter. */ | |
1154 | break; | |
1155 | ||
1156 | case '0': | |
1157 | break; | |
1158 | ||
1159 | /* It is believed that rtx's at this level will never | |
1160 | contain anything but integers and other rtx's, | |
1161 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
1162 | default: | |
1163 | abort (); | |
1164 | } | |
1165 | } | |
1166 | return 1; | |
1167 | } | |
1168 | \f | |
1169 | /* Call FUN on each register or MEM that is stored into or clobbered by X. | |
1170 | (X would be the pattern of an insn). | |
1171 | FUN receives two arguments: | |
1172 | the REG, MEM, CC0 or PC being stored in or clobbered, | |
1173 | the SET or CLOBBER rtx that does the store. | |
1174 | ||
1175 | If the item being stored in or clobbered is a SUBREG of a hard register, | |
1176 | the SUBREG will be passed. */ | |
1177 | ||
1178 | void | |
1179 | note_stores (x, fun) | |
1180 | register rtx x; | |
1181 | void (*fun) (); | |
1182 | { | |
1183 | if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)) | |
1184 | { | |
1185 | register rtx dest = SET_DEST (x); | |
1186 | while ((GET_CODE (dest) == SUBREG | |
1187 | && (GET_CODE (SUBREG_REG (dest)) != REG | |
1188 | || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) | |
1189 | || GET_CODE (dest) == ZERO_EXTRACT | |
1190 | || GET_CODE (dest) == SIGN_EXTRACT | |
1191 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1192 | dest = XEXP (dest, 0); | |
86465af7 DM |
1193 | |
1194 | if (GET_CODE (dest) == PARALLEL | |
1195 | && GET_MODE (dest) == BLKmode) | |
1196 | { | |
1197 | register int i; | |
1198 | for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) | |
1199 | (*fun) (SET_DEST (XVECEXP (dest, 0, i)), x); | |
1200 | } | |
1201 | else | |
1202 | (*fun) (dest, x); | |
2c88418c RS |
1203 | } |
1204 | else if (GET_CODE (x) == PARALLEL) | |
1205 | { | |
1206 | register int i; | |
1207 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
1208 | { | |
1209 | register rtx y = XVECEXP (x, 0, i); | |
1210 | if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER) | |
1211 | { | |
1212 | register rtx dest = SET_DEST (y); | |
1213 | while ((GET_CODE (dest) == SUBREG | |
1214 | && (GET_CODE (SUBREG_REG (dest)) != REG | |
1215 | || (REGNO (SUBREG_REG (dest)) | |
1216 | >= FIRST_PSEUDO_REGISTER))) | |
1217 | || GET_CODE (dest) == ZERO_EXTRACT | |
1218 | || GET_CODE (dest) == SIGN_EXTRACT | |
1219 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1220 | dest = XEXP (dest, 0); | |
86465af7 DM |
1221 | if (GET_CODE (dest) == PARALLEL |
1222 | && GET_MODE (dest) == BLKmode) | |
1223 | { | |
1224 | register int i; | |
1225 | for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) | |
1226 | (*fun) (SET_DEST (XVECEXP (dest, 0, i)), y); | |
1227 | } | |
1228 | else | |
1229 | (*fun) (dest, y); | |
2c88418c RS |
1230 | } |
1231 | } | |
1232 | } | |
1233 | } | |
1234 | \f | |
1235 | /* Return nonzero if X's old contents don't survive after INSN. | |
1236 | This will be true if X is (cc0) or if X is a register and | |
1237 | X dies in INSN or because INSN entirely sets X. | |
1238 | ||
1239 | "Entirely set" means set directly and not through a SUBREG, | |
1240 | ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. | |
1241 | Likewise, REG_INC does not count. | |
1242 | ||
1243 | REG may be a hard or pseudo reg. Renumbering is not taken into account, | |
1244 | but for this use that makes no difference, since regs don't overlap | |
1245 | during their lifetimes. Therefore, this function may be used | |
1246 | at any time after deaths have been computed (in flow.c). | |
1247 | ||
1248 | If REG is a hard reg that occupies multiple machine registers, this | |
1249 | function will only return 1 if each of those registers will be replaced | |
1250 | by INSN. */ | |
1251 | ||
1252 | int | |
1253 | dead_or_set_p (insn, x) | |
1254 | rtx insn; | |
1255 | rtx x; | |
1256 | { | |
1257 | register int regno, last_regno; | |
1258 | register int i; | |
1259 | ||
1260 | /* Can't use cc0_rtx below since this file is used by genattrtab.c. */ | |
1261 | if (GET_CODE (x) == CC0) | |
1262 | return 1; | |
1263 | ||
1264 | if (GET_CODE (x) != REG) | |
1265 | abort (); | |
1266 | ||
1267 | regno = REGNO (x); | |
1268 | last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno | |
1269 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1); | |
1270 | ||
1271 | for (i = regno; i <= last_regno; i++) | |
1272 | if (! dead_or_set_regno_p (insn, i)) | |
1273 | return 0; | |
1274 | ||
1275 | return 1; | |
1276 | } | |
1277 | ||
1278 | /* Utility function for dead_or_set_p to check an individual register. Also | |
1279 | called from flow.c. */ | |
1280 | ||
1281 | int | |
1282 | dead_or_set_regno_p (insn, test_regno) | |
1283 | rtx insn; | |
1284 | int test_regno; | |
1285 | { | |
1286 | int regno, endregno; | |
1287 | rtx link; | |
1288 | ||
6764d250 BS |
1289 | /* See if there is a death note for something that includes |
1290 | TEST_REGNO. */ | |
1291 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2c88418c | 1292 | { |
6764d250 BS |
1293 | if (REG_NOTE_KIND (link) != REG_DEAD |
1294 | || GET_CODE (XEXP (link, 0)) != REG) | |
1295 | continue; | |
2c88418c | 1296 | |
6764d250 BS |
1297 | regno = REGNO (XEXP (link, 0)); |
1298 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1299 | : regno + HARD_REGNO_NREGS (regno, | |
1300 | GET_MODE (XEXP (link, 0)))); | |
2c88418c | 1301 | |
6764d250 BS |
1302 | if (test_regno >= regno && test_regno < endregno) |
1303 | return 1; | |
2c88418c RS |
1304 | } |
1305 | ||
8f3e7a26 RK |
1306 | if (GET_CODE (insn) == CALL_INSN |
1307 | && find_regno_fusage (insn, CLOBBER, test_regno)) | |
1308 | return 1; | |
1309 | ||
2c88418c RS |
1310 | if (GET_CODE (PATTERN (insn)) == SET) |
1311 | { | |
1312 | rtx dest = SET_DEST (PATTERN (insn)); | |
1313 | ||
1314 | /* A value is totally replaced if it is the destination or the | |
1315 | destination is a SUBREG of REGNO that does not change the number of | |
1316 | words in it. */ | |
6764d250 | 1317 | if (GET_CODE (dest) == SUBREG |
2c88418c RS |
1318 | && (((GET_MODE_SIZE (GET_MODE (dest)) |
1319 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1320 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1321 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1322 | dest = SUBREG_REG (dest); | |
1323 | ||
1324 | if (GET_CODE (dest) != REG) | |
1325 | return 0; | |
1326 | ||
1327 | regno = REGNO (dest); | |
1328 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1329 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1330 | ||
1331 | return (test_regno >= regno && test_regno < endregno); | |
1332 | } | |
1333 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
1334 | { | |
1335 | register int i; | |
1336 | ||
1337 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
1338 | { | |
1339 | rtx body = XVECEXP (PATTERN (insn), 0, i); | |
1340 | ||
1341 | if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) | |
1342 | { | |
1343 | rtx dest = SET_DEST (body); | |
1344 | ||
1345 | if (GET_CODE (dest) == SUBREG | |
1346 | && (((GET_MODE_SIZE (GET_MODE (dest)) | |
1347 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1348 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1349 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1350 | dest = SUBREG_REG (dest); | |
1351 | ||
1352 | if (GET_CODE (dest) != REG) | |
1353 | continue; | |
1354 | ||
1355 | regno = REGNO (dest); | |
1356 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1357 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1358 | ||
1359 | if (test_regno >= regno && test_regno < endregno) | |
1360 | return 1; | |
1361 | } | |
1362 | } | |
1363 | } | |
1364 | ||
1365 | return 0; | |
1366 | } | |
1367 | ||
1368 | /* Return the reg-note of kind KIND in insn INSN, if there is one. | |
1369 | If DATUM is nonzero, look for one whose datum is DATUM. */ | |
1370 | ||
1371 | rtx | |
1372 | find_reg_note (insn, kind, datum) | |
1373 | rtx insn; | |
1374 | enum reg_note kind; | |
1375 | rtx datum; | |
1376 | { | |
1377 | register rtx link; | |
1378 | ||
ae78d276 MM |
1379 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
1380 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
1381 | return 0; | |
1382 | ||
2c88418c RS |
1383 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1384 | if (REG_NOTE_KIND (link) == kind | |
1385 | && (datum == 0 || datum == XEXP (link, 0))) | |
1386 | return link; | |
1387 | return 0; | |
1388 | } | |
1389 | ||
1390 | /* Return the reg-note of kind KIND in insn INSN which applies to register | |
99309f3b RK |
1391 | number REGNO, if any. Return 0 if there is no such reg-note. Note that |
1392 | the REGNO of this NOTE need not be REGNO if REGNO is a hard register; | |
1393 | it might be the case that the note overlaps REGNO. */ | |
2c88418c RS |
1394 | |
1395 | rtx | |
1396 | find_regno_note (insn, kind, regno) | |
1397 | rtx insn; | |
1398 | enum reg_note kind; | |
1399 | int regno; | |
1400 | { | |
1401 | register rtx link; | |
1402 | ||
ae78d276 MM |
1403 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
1404 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
1405 | return 0; | |
1406 | ||
2c88418c RS |
1407 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1408 | if (REG_NOTE_KIND (link) == kind | |
1409 | /* Verify that it is a register, so that scratch and MEM won't cause a | |
1410 | problem here. */ | |
1411 | && GET_CODE (XEXP (link, 0)) == REG | |
99309f3b RK |
1412 | && REGNO (XEXP (link, 0)) <= regno |
1413 | && ((REGNO (XEXP (link, 0)) | |
1414 | + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 | |
1415 | : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)), | |
1416 | GET_MODE (XEXP (link, 0))))) | |
1417 | > regno)) | |
2c88418c RS |
1418 | return link; |
1419 | return 0; | |
1420 | } | |
8f3e7a26 RK |
1421 | |
1422 | /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found | |
1423 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1424 | ||
1425 | int | |
1426 | find_reg_fusage (insn, code, datum) | |
1427 | rtx insn; | |
1428 | enum rtx_code code; | |
1429 | rtx datum; | |
1430 | { | |
1431 | /* If it's not a CALL_INSN, it can't possibly have a | |
1432 | CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ | |
1433 | if (GET_CODE (insn) != CALL_INSN) | |
1434 | return 0; | |
1435 | ||
1436 | if (! datum) | |
1437 | abort(); | |
1438 | ||
1439 | if (GET_CODE (datum) != REG) | |
1440 | { | |
1441 | register rtx link; | |
1442 | ||
1443 | for (link = CALL_INSN_FUNCTION_USAGE (insn); | |
1444 | link; | |
1445 | link = XEXP (link, 1)) | |
1446 | if (GET_CODE (XEXP (link, 0)) == code | |
1447 | && rtx_equal_p (datum, SET_DEST (XEXP (link, 0)))) | |
1448 | return 1; | |
1449 | } | |
1450 | else | |
1451 | { | |
1452 | register int regno = REGNO (datum); | |
1453 | ||
1454 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1455 | to pseudo registers, so don't bother checking. */ | |
1456 | ||
1457 | if (regno < FIRST_PSEUDO_REGISTER) | |
1458 | { | |
1459 | int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum)); | |
1460 | int i; | |
1461 | ||
1462 | for (i = regno; i < end_regno; i++) | |
1463 | if (find_regno_fusage (insn, code, i)) | |
1464 | return 1; | |
1465 | } | |
1466 | } | |
1467 | ||
1468 | return 0; | |
1469 | } | |
1470 | ||
1471 | /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found | |
1472 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1473 | ||
1474 | int | |
1475 | find_regno_fusage (insn, code, regno) | |
1476 | rtx insn; | |
1477 | enum rtx_code code; | |
1478 | int regno; | |
1479 | { | |
1480 | register rtx link; | |
1481 | ||
1482 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1483 | to pseudo registers, so don't bother checking. */ | |
1484 | ||
1485 | if (regno >= FIRST_PSEUDO_REGISTER | |
1486 | || GET_CODE (insn) != CALL_INSN ) | |
1487 | return 0; | |
1488 | ||
1489 | for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) | |
1490 | { | |
1491 | register int regnote; | |
1492 | register rtx op; | |
1493 | ||
1494 | if (GET_CODE (op = XEXP (link, 0)) == code | |
1495 | && GET_CODE (SET_DEST (op)) == REG | |
1496 | && (regnote = REGNO (SET_DEST (op))) <= regno | |
1497 | && regnote | |
1498 | + HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op))) | |
1499 | > regno) | |
1500 | return 1; | |
1501 | } | |
1502 | ||
1503 | return 0; | |
1504 | } | |
2c88418c RS |
1505 | \f |
1506 | /* Remove register note NOTE from the REG_NOTES of INSN. */ | |
1507 | ||
1508 | void | |
1509 | remove_note (insn, note) | |
1510 | register rtx note; | |
1511 | register rtx insn; | |
1512 | { | |
1513 | register rtx link; | |
1514 | ||
1515 | if (REG_NOTES (insn) == note) | |
1516 | { | |
1517 | REG_NOTES (insn) = XEXP (note, 1); | |
1518 | return; | |
1519 | } | |
1520 | ||
1521 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
1522 | if (XEXP (link, 1) == note) | |
1523 | { | |
1524 | XEXP (link, 1) = XEXP (note, 1); | |
1525 | return; | |
1526 | } | |
1527 | ||
1528 | abort (); | |
1529 | } | |
1530 | \f | |
2b067faf RS |
1531 | /* Nonzero if X contains any volatile instructions. These are instructions |
1532 | which may cause unpredictable machine state instructions, and thus no | |
1533 | instructions should be moved or combined across them. This includes | |
1534 | only volatile asms and UNSPEC_VOLATILE instructions. */ | |
1535 | ||
1536 | int | |
1537 | volatile_insn_p (x) | |
1538 | rtx x; | |
1539 | { | |
1540 | register RTX_CODE code; | |
1541 | ||
1542 | code = GET_CODE (x); | |
1543 | switch (code) | |
1544 | { | |
1545 | case LABEL_REF: | |
1546 | case SYMBOL_REF: | |
1547 | case CONST_INT: | |
1548 | case CONST: | |
1549 | case CONST_DOUBLE: | |
1550 | case CC0: | |
1551 | case PC: | |
1552 | case REG: | |
1553 | case SCRATCH: | |
1554 | case CLOBBER: | |
1555 | case ASM_INPUT: | |
1556 | case ADDR_VEC: | |
1557 | case ADDR_DIFF_VEC: | |
1558 | case CALL: | |
1559 | case MEM: | |
1560 | return 0; | |
1561 | ||
1562 | case UNSPEC_VOLATILE: | |
1563 | /* case TRAP_IF: This isn't clear yet. */ | |
1564 | return 1; | |
1565 | ||
1566 | case ASM_OPERANDS: | |
1567 | if (MEM_VOLATILE_P (x)) | |
1568 | return 1; | |
e9a25f70 JL |
1569 | |
1570 | default: | |
1571 | break; | |
2b067faf RS |
1572 | } |
1573 | ||
1574 | /* Recursively scan the operands of this expression. */ | |
1575 | ||
1576 | { | |
1577 | register char *fmt = GET_RTX_FORMAT (code); | |
1578 | register int i; | |
1579 | ||
1580 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1581 | { | |
1582 | if (fmt[i] == 'e') | |
1583 | { | |
31001f72 | 1584 | if (volatile_insn_p (XEXP (x, i))) |
2b067faf RS |
1585 | return 1; |
1586 | } | |
1587 | if (fmt[i] == 'E') | |
1588 | { | |
1589 | register int j; | |
1590 | for (j = 0; j < XVECLEN (x, i); j++) | |
31001f72 | 1591 | if (volatile_insn_p (XVECEXP (x, i, j))) |
2b067faf RS |
1592 | return 1; |
1593 | } | |
1594 | } | |
1595 | } | |
1596 | return 0; | |
1597 | } | |
1598 | ||
2c88418c | 1599 | /* Nonzero if X contains any volatile memory references |
2ac4fed0 | 1600 | UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ |
2c88418c RS |
1601 | |
1602 | int | |
1603 | volatile_refs_p (x) | |
1604 | rtx x; | |
1605 | { | |
1606 | register RTX_CODE code; | |
1607 | ||
1608 | code = GET_CODE (x); | |
1609 | switch (code) | |
1610 | { | |
1611 | case LABEL_REF: | |
1612 | case SYMBOL_REF: | |
1613 | case CONST_INT: | |
1614 | case CONST: | |
1615 | case CONST_DOUBLE: | |
1616 | case CC0: | |
1617 | case PC: | |
1618 | case REG: | |
1619 | case SCRATCH: | |
1620 | case CLOBBER: | |
1621 | case ASM_INPUT: | |
1622 | case ADDR_VEC: | |
1623 | case ADDR_DIFF_VEC: | |
1624 | return 0; | |
1625 | ||
1626 | case CALL: | |
2ac4fed0 | 1627 | case UNSPEC_VOLATILE: |
2c88418c RS |
1628 | /* case TRAP_IF: This isn't clear yet. */ |
1629 | return 1; | |
1630 | ||
1631 | case MEM: | |
1632 | case ASM_OPERANDS: | |
1633 | if (MEM_VOLATILE_P (x)) | |
1634 | return 1; | |
e9a25f70 JL |
1635 | |
1636 | default: | |
1637 | break; | |
2c88418c RS |
1638 | } |
1639 | ||
1640 | /* Recursively scan the operands of this expression. */ | |
1641 | ||
1642 | { | |
1643 | register char *fmt = GET_RTX_FORMAT (code); | |
1644 | register int i; | |
1645 | ||
1646 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1647 | { | |
1648 | if (fmt[i] == 'e') | |
1649 | { | |
1650 | if (volatile_refs_p (XEXP (x, i))) | |
1651 | return 1; | |
1652 | } | |
1653 | if (fmt[i] == 'E') | |
1654 | { | |
1655 | register int j; | |
1656 | for (j = 0; j < XVECLEN (x, i); j++) | |
1657 | if (volatile_refs_p (XVECEXP (x, i, j))) | |
1658 | return 1; | |
1659 | } | |
1660 | } | |
1661 | } | |
1662 | return 0; | |
1663 | } | |
1664 | ||
1665 | /* Similar to above, except that it also rejects register pre- and post- | |
1666 | incrementing. */ | |
1667 | ||
1668 | int | |
1669 | side_effects_p (x) | |
1670 | rtx x; | |
1671 | { | |
1672 | register RTX_CODE code; | |
1673 | ||
1674 | code = GET_CODE (x); | |
1675 | switch (code) | |
1676 | { | |
1677 | case LABEL_REF: | |
1678 | case SYMBOL_REF: | |
1679 | case CONST_INT: | |
1680 | case CONST: | |
1681 | case CONST_DOUBLE: | |
1682 | case CC0: | |
1683 | case PC: | |
1684 | case REG: | |
1685 | case SCRATCH: | |
1686 | case ASM_INPUT: | |
1687 | case ADDR_VEC: | |
1688 | case ADDR_DIFF_VEC: | |
1689 | return 0; | |
1690 | ||
1691 | case CLOBBER: | |
1692 | /* Reject CLOBBER with a non-VOID mode. These are made by combine.c | |
1693 | when some combination can't be done. If we see one, don't think | |
1694 | that we can simplify the expression. */ | |
1695 | return (GET_MODE (x) != VOIDmode); | |
1696 | ||
1697 | case PRE_INC: | |
1698 | case PRE_DEC: | |
1699 | case POST_INC: | |
1700 | case POST_DEC: | |
1701 | case CALL: | |
2ac4fed0 | 1702 | case UNSPEC_VOLATILE: |
2c88418c RS |
1703 | /* case TRAP_IF: This isn't clear yet. */ |
1704 | return 1; | |
1705 | ||
1706 | case MEM: | |
1707 | case ASM_OPERANDS: | |
1708 | if (MEM_VOLATILE_P (x)) | |
1709 | return 1; | |
e9a25f70 JL |
1710 | |
1711 | default: | |
1712 | break; | |
2c88418c RS |
1713 | } |
1714 | ||
1715 | /* Recursively scan the operands of this expression. */ | |
1716 | ||
1717 | { | |
1718 | register char *fmt = GET_RTX_FORMAT (code); | |
1719 | register int i; | |
1720 | ||
1721 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1722 | { | |
1723 | if (fmt[i] == 'e') | |
1724 | { | |
1725 | if (side_effects_p (XEXP (x, i))) | |
1726 | return 1; | |
1727 | } | |
1728 | if (fmt[i] == 'E') | |
1729 | { | |
1730 | register int j; | |
1731 | for (j = 0; j < XVECLEN (x, i); j++) | |
1732 | if (side_effects_p (XVECEXP (x, i, j))) | |
1733 | return 1; | |
1734 | } | |
1735 | } | |
1736 | } | |
1737 | return 0; | |
1738 | } | |
1739 | \f | |
1740 | /* Return nonzero if evaluating rtx X might cause a trap. */ | |
1741 | ||
1742 | int | |
1743 | may_trap_p (x) | |
1744 | rtx x; | |
1745 | { | |
1746 | int i; | |
1747 | enum rtx_code code; | |
1748 | char *fmt; | |
1749 | ||
1750 | if (x == 0) | |
1751 | return 0; | |
1752 | code = GET_CODE (x); | |
1753 | switch (code) | |
1754 | { | |
1755 | /* Handle these cases quickly. */ | |
1756 | case CONST_INT: | |
1757 | case CONST_DOUBLE: | |
1758 | case SYMBOL_REF: | |
1759 | case LABEL_REF: | |
1760 | case CONST: | |
1761 | case PC: | |
1762 | case CC0: | |
1763 | case REG: | |
1764 | case SCRATCH: | |
1765 | return 0; | |
1766 | ||
1767 | /* Conditional trap can trap! */ | |
2ac4fed0 | 1768 | case UNSPEC_VOLATILE: |
2c88418c RS |
1769 | case TRAP_IF: |
1770 | return 1; | |
1771 | ||
1772 | /* Memory ref can trap unless it's a static var or a stack slot. */ | |
1773 | case MEM: | |
1774 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
1775 | ||
1776 | /* Division by a non-constant might trap. */ | |
1777 | case DIV: | |
1778 | case MOD: | |
1779 | case UDIV: | |
1780 | case UMOD: | |
e9a25f70 JL |
1781 | if (! CONSTANT_P (XEXP (x, 1)) |
1782 | || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
2c88418c RS |
1783 | return 1; |
1784 | /* This was const0_rtx, but by not using that, | |
1785 | we can link this file into other programs. */ | |
1786 | if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0) | |
1787 | return 1; | |
e9a25f70 JL |
1788 | break; |
1789 | ||
b278301b RK |
1790 | case EXPR_LIST: |
1791 | /* An EXPR_LIST is used to represent a function call. This | |
1792 | certainly may trap. */ | |
1793 | return 1; | |
e9a25f70 | 1794 | |
2c88418c RS |
1795 | default: |
1796 | /* Any floating arithmetic may trap. */ | |
1797 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1798 | return 1; | |
1799 | } | |
1800 | ||
1801 | fmt = GET_RTX_FORMAT (code); | |
1802 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1803 | { | |
1804 | if (fmt[i] == 'e') | |
1805 | { | |
1806 | if (may_trap_p (XEXP (x, i))) | |
1807 | return 1; | |
1808 | } | |
1809 | else if (fmt[i] == 'E') | |
1810 | { | |
1811 | register int j; | |
1812 | for (j = 0; j < XVECLEN (x, i); j++) | |
1813 | if (may_trap_p (XVECEXP (x, i, j))) | |
1814 | return 1; | |
1815 | } | |
1816 | } | |
1817 | return 0; | |
1818 | } | |
1819 | \f | |
1820 | /* Return nonzero if X contains a comparison that is not either EQ or NE, | |
1821 | i.e., an inequality. */ | |
1822 | ||
1823 | int | |
1824 | inequality_comparisons_p (x) | |
1825 | rtx x; | |
1826 | { | |
1827 | register char *fmt; | |
1828 | register int len, i; | |
1829 | register enum rtx_code code = GET_CODE (x); | |
1830 | ||
1831 | switch (code) | |
1832 | { | |
1833 | case REG: | |
1834 | case SCRATCH: | |
1835 | case PC: | |
1836 | case CC0: | |
1837 | case CONST_INT: | |
1838 | case CONST_DOUBLE: | |
1839 | case CONST: | |
1840 | case LABEL_REF: | |
1841 | case SYMBOL_REF: | |
1842 | return 0; | |
1843 | ||
1844 | case LT: | |
1845 | case LTU: | |
1846 | case GT: | |
1847 | case GTU: | |
1848 | case LE: | |
1849 | case LEU: | |
1850 | case GE: | |
1851 | case GEU: | |
1852 | return 1; | |
e9a25f70 JL |
1853 | |
1854 | default: | |
1855 | break; | |
2c88418c RS |
1856 | } |
1857 | ||
1858 | len = GET_RTX_LENGTH (code); | |
1859 | fmt = GET_RTX_FORMAT (code); | |
1860 | ||
1861 | for (i = 0; i < len; i++) | |
1862 | { | |
1863 | if (fmt[i] == 'e') | |
1864 | { | |
1865 | if (inequality_comparisons_p (XEXP (x, i))) | |
1866 | return 1; | |
1867 | } | |
1868 | else if (fmt[i] == 'E') | |
1869 | { | |
1870 | register int j; | |
1871 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
1872 | if (inequality_comparisons_p (XVECEXP (x, i, j))) | |
1873 | return 1; | |
1874 | } | |
1875 | } | |
1876 | ||
1877 | return 0; | |
1878 | } | |
1879 | \f | |
1ed0205e VM |
1880 | /* Replace any occurrence of FROM in X with TO. The function does |
1881 | not enter into CONST_DOUBLE for the replace. | |
2c88418c RS |
1882 | |
1883 | Note that copying is not done so X must not be shared unless all copies | |
1884 | are to be modified. */ | |
1885 | ||
1886 | rtx | |
1887 | replace_rtx (x, from, to) | |
1888 | rtx x, from, to; | |
1889 | { | |
1890 | register int i, j; | |
1891 | register char *fmt; | |
1892 | ||
1ed0205e VM |
1893 | /* The following prevents loops occurrence when we change MEM in |
1894 | CONST_DOUBLE onto the same CONST_DOUBLE. */ | |
1895 | if (x != 0 && GET_CODE (x) == CONST_DOUBLE) | |
1896 | return x; | |
1897 | ||
2c88418c RS |
1898 | if (x == from) |
1899 | return to; | |
1900 | ||
1901 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
1902 | if (x == 0) | |
1903 | return 0; | |
1904 | ||
1905 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
1906 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
1907 | { | |
1908 | if (fmt[i] == 'e') | |
1909 | XEXP (x, i) = replace_rtx (XEXP (x, i), from, to); | |
1910 | else if (fmt[i] == 'E') | |
1911 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
1912 | XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to); | |
1913 | } | |
1914 | ||
1915 | return x; | |
1916 | } | |
1917 | \f | |
1918 | /* Throughout the rtx X, replace many registers according to REG_MAP. | |
1919 | Return the replacement for X (which may be X with altered contents). | |
1920 | REG_MAP[R] is the replacement for register R, or 0 for don't replace. | |
1921 | NREGS is the length of REG_MAP; regs >= NREGS are not mapped. | |
1922 | ||
1923 | We only support REG_MAP entries of REG or SUBREG. Also, hard registers | |
1924 | should not be mapped to pseudos or vice versa since validate_change | |
1925 | is not called. | |
1926 | ||
1927 | If REPLACE_DEST is 1, replacements are also done in destinations; | |
1928 | otherwise, only sources are replaced. */ | |
1929 | ||
1930 | rtx | |
1931 | replace_regs (x, reg_map, nregs, replace_dest) | |
1932 | rtx x; | |
1933 | rtx *reg_map; | |
1934 | int nregs; | |
1935 | int replace_dest; | |
1936 | { | |
1937 | register enum rtx_code code; | |
1938 | register int i; | |
1939 | register char *fmt; | |
1940 | ||
1941 | if (x == 0) | |
1942 | return x; | |
1943 | ||
1944 | code = GET_CODE (x); | |
1945 | switch (code) | |
1946 | { | |
1947 | case SCRATCH: | |
1948 | case PC: | |
1949 | case CC0: | |
1950 | case CONST_INT: | |
1951 | case CONST_DOUBLE: | |
1952 | case CONST: | |
1953 | case SYMBOL_REF: | |
1954 | case LABEL_REF: | |
1955 | return x; | |
1956 | ||
1957 | case REG: | |
1958 | /* Verify that the register has an entry before trying to access it. */ | |
1959 | if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0) | |
3eb8f14c JW |
1960 | { |
1961 | /* SUBREGs can't be shared. Always return a copy to ensure that if | |
1962 | this replacement occurs more than once then each instance will | |
1963 | get distinct rtx. */ | |
1964 | if (GET_CODE (reg_map[REGNO (x)]) == SUBREG) | |
1965 | return copy_rtx (reg_map[REGNO (x)]); | |
1966 | return reg_map[REGNO (x)]; | |
1967 | } | |
2c88418c RS |
1968 | return x; |
1969 | ||
1970 | case SUBREG: | |
1971 | /* Prevent making nested SUBREGs. */ | |
1972 | if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs | |
1973 | && reg_map[REGNO (SUBREG_REG (x))] != 0 | |
1974 | && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) | |
1975 | { | |
1976 | rtx map_val = reg_map[REGNO (SUBREG_REG (x))]; | |
1977 | rtx map_inner = SUBREG_REG (map_val); | |
1978 | ||
1979 | if (GET_MODE (x) == GET_MODE (map_inner)) | |
1980 | return map_inner; | |
1981 | else | |
1982 | { | |
1983 | /* We cannot call gen_rtx here since we may be linked with | |
1984 | genattrtab.c. */ | |
1985 | /* Let's try clobbering the incoming SUBREG and see | |
1986 | if this is really safe. */ | |
1987 | SUBREG_REG (x) = map_inner; | |
1988 | SUBREG_WORD (x) += SUBREG_WORD (map_val); | |
1989 | return x; | |
1990 | #if 0 | |
1991 | rtx new = rtx_alloc (SUBREG); | |
1992 | PUT_MODE (new, GET_MODE (x)); | |
1993 | SUBREG_REG (new) = map_inner; | |
1994 | SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val); | |
1995 | #endif | |
1996 | } | |
1997 | } | |
1998 | break; | |
1999 | ||
2000 | case SET: | |
2001 | if (replace_dest) | |
2002 | SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0); | |
2003 | ||
2004 | else if (GET_CODE (SET_DEST (x)) == MEM | |
2005 | || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART) | |
2006 | /* Even if we are not to replace destinations, replace register if it | |
2007 | is CONTAINED in destination (destination is memory or | |
2008 | STRICT_LOW_PART). */ | |
2009 | XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0), | |
2010 | reg_map, nregs, 0); | |
2011 | else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
2012 | /* Similarly, for ZERO_EXTRACT we replace all operands. */ | |
2013 | break; | |
2014 | ||
2015 | SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0); | |
2016 | return x; | |
e9a25f70 JL |
2017 | |
2018 | default: | |
2019 | break; | |
2c88418c RS |
2020 | } |
2021 | ||
2022 | fmt = GET_RTX_FORMAT (code); | |
2023 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2024 | { | |
2025 | if (fmt[i] == 'e') | |
2026 | XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest); | |
2027 | if (fmt[i] == 'E') | |
2028 | { | |
2029 | register int j; | |
2030 | for (j = 0; j < XVECLEN (x, i); j++) | |
2031 | XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map, | |
2032 | nregs, replace_dest); | |
2033 | } | |
2034 | } | |
2035 | return x; | |
2036 | } | |
2a1777af | 2037 | |
2a1777af JL |
2038 | /* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is |
2039 | not in the constant pool and not in the condition of an IF_THEN_ELSE. */ | |
2040 | ||
2041 | static int | |
2042 | jmp_uses_reg_or_mem (x) | |
2043 | rtx x; | |
2044 | { | |
2045 | enum rtx_code code = GET_CODE (x); | |
2046 | int i, j; | |
2047 | char *fmt; | |
2048 | ||
2049 | switch (code) | |
2050 | { | |
2051 | case CONST: | |
2052 | case LABEL_REF: | |
2053 | case PC: | |
2054 | return 0; | |
2055 | ||
2056 | case REG: | |
2057 | return 1; | |
2058 | ||
2059 | case MEM: | |
2060 | return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
2061 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); | |
2062 | ||
2063 | case IF_THEN_ELSE: | |
2064 | return (jmp_uses_reg_or_mem (XEXP (x, 1)) | |
2065 | || jmp_uses_reg_or_mem (XEXP (x, 2))); | |
2066 | ||
2067 | case PLUS: case MINUS: case MULT: | |
2068 | return (jmp_uses_reg_or_mem (XEXP (x, 0)) | |
2069 | || jmp_uses_reg_or_mem (XEXP (x, 1))); | |
1d300e19 KG |
2070 | |
2071 | default: | |
2072 | break; | |
2a1777af JL |
2073 | } |
2074 | ||
2075 | fmt = GET_RTX_FORMAT (code); | |
2076 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2077 | { | |
2078 | if (fmt[i] == 'e' | |
2079 | && jmp_uses_reg_or_mem (XEXP (x, i))) | |
2080 | return 1; | |
2081 | ||
2082 | if (fmt[i] == 'E') | |
2083 | for (j = 0; j < XVECLEN (x, i); j++) | |
2084 | if (jmp_uses_reg_or_mem (XVECEXP (x, i, j))) | |
2085 | return 1; | |
2086 | } | |
2087 | ||
2088 | return 0; | |
2089 | } | |
2090 | ||
2091 | /* Return nonzero if INSN is an indirect jump (aka computed jump). | |
2092 | ||
2093 | Tablejumps and casesi insns are not considered indirect jumps; | |
2094 | we can recognize them by a (use (lael_ref)). */ | |
2095 | ||
2096 | int | |
2097 | computed_jump_p (insn) | |
2098 | rtx insn; | |
2099 | { | |
2100 | int i; | |
2101 | if (GET_CODE (insn) == JUMP_INSN) | |
2102 | { | |
2103 | rtx pat = PATTERN (insn); | |
2a1777af JL |
2104 | |
2105 | if (GET_CODE (pat) == PARALLEL) | |
2106 | { | |
2107 | int len = XVECLEN (pat, 0); | |
2108 | int has_use_labelref = 0; | |
2109 | ||
2110 | for (i = len - 1; i >= 0; i--) | |
2111 | if (GET_CODE (XVECEXP (pat, 0, i)) == USE | |
2112 | && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) | |
2113 | == LABEL_REF)) | |
2114 | has_use_labelref = 1; | |
2115 | ||
2116 | if (! has_use_labelref) | |
2117 | for (i = len - 1; i >= 0; i--) | |
2118 | if (GET_CODE (XVECEXP (pat, 0, i)) == SET | |
2119 | && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx | |
8d7532d9 | 2120 | && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) |
2a1777af JL |
2121 | return 1; |
2122 | } | |
2123 | else if (GET_CODE (pat) == SET | |
2124 | && SET_DEST (pat) == pc_rtx | |
2125 | && jmp_uses_reg_or_mem (SET_SRC (pat))) | |
2126 | return 1; | |
2127 | } | |
2128 | return 0; | |
2129 | } | |
ccc2d6d0 MM |
2130 | |
2131 | /* Traverse X via depth-first search, calling F for each | |
2132 | sub-expression (including X itself). F is also passed the DATA. | |
2133 | If F returns -1, do not traverse sub-expressions, but continue | |
2134 | traversing the rest of the tree. If F ever returns any other | |
2135 | non-zero value, stop the traversal, and return the value returned | |
2136 | by F. Otherwise, return 0. This function does not traverse inside | |
2137 | tree structure that contains RTX_EXPRs, or into sub-expressions | |
2138 | whose format code is `0' since it is not known whether or not those | |
2139 | codes are actually RTL. | |
2140 | ||
2141 | This routine is very general, and could (should?) be used to | |
2142 | implement many of the other routines in this file. */ | |
2143 | ||
ae0b51ef JL |
2144 | int |
2145 | for_each_rtx (x, f, data) | |
ef30399b | 2146 | rtx *x; |
ccc2d6d0 | 2147 | rtx_function f; |
ef30399b | 2148 | void *data; |
ccc2d6d0 MM |
2149 | { |
2150 | int result; | |
2151 | int length; | |
2152 | char* format; | |
2153 | int i; | |
2154 | ||
2155 | /* Call F on X. */ | |
2156 | result = (*f)(x, data); | |
2157 | if (result == -1) | |
2158 | /* Do not traverse sub-expressions. */ | |
2159 | return 0; | |
2160 | else if (result != 0) | |
2161 | /* Stop the traversal. */ | |
2162 | return result; | |
2163 | ||
2164 | if (*x == NULL_RTX) | |
2165 | /* There are no sub-expressions. */ | |
2166 | return 0; | |
2167 | ||
2168 | length = GET_RTX_LENGTH (GET_CODE (*x)); | |
2169 | format = GET_RTX_FORMAT (GET_CODE (*x)); | |
2170 | ||
2171 | for (i = 0; i < length; ++i) | |
2172 | { | |
2173 | switch (format[i]) | |
2174 | { | |
2175 | case 'e': | |
2176 | result = for_each_rtx (&XEXP (*x, i), f, data); | |
2177 | if (result != 0) | |
2178 | return result; | |
2179 | break; | |
2180 | ||
2181 | case 'V': | |
2182 | case 'E': | |
2183 | if (XVEC (*x, i) != 0) | |
2184 | { | |
2185 | int j; | |
2186 | for (j = 0; j < XVECLEN (*x, i); ++j) | |
2187 | { | |
2188 | result = for_each_rtx (&XVECEXP (*x, i, j), f, data); | |
2189 | if (result != 0) | |
2190 | return result; | |
2191 | } | |
2192 | } | |
2193 | break; | |
2194 | ||
2195 | default: | |
2196 | /* Nothing to do. */ | |
2197 | break; | |
2198 | } | |
2199 | ||
2200 | } | |
2201 | ||
2202 | return 0; | |
2203 | } | |
3ec2b590 R |
2204 | |
2205 | /* INSN and REFERENCE are instructions in the same insn chain. | |
2206 | Return non-zero if INSN is first. */ | |
2207 | int | |
2208 | insn_first_p (insn, reference) | |
2209 | rtx insn, reference; | |
2210 | { | |
2211 | rtx p, q; | |
2212 | ||
2213 | for (p = insn, q = reference; ; p = NEXT_INSN (p), q = NEXT_INSN (q)) | |
2214 | { | |
1cb1fe66 R |
2215 | /* Start with test for not first so that INSN == REFERENCE yields not |
2216 | first. */ | |
3ec2b590 R |
2217 | if (q == insn || ! p) |
2218 | return 0; | |
1cb1fe66 R |
2219 | if (p == reference || ! q) |
2220 | return 1; | |
3ec2b590 R |
2221 | } |
2222 | } | |
777b1b71 RH |
2223 | |
2224 | ||
2225 | /* Searches X for any reference to REGNO, returning the rtx of the | |
2226 | reference found if any. Otherwise, returns NULL_RTX. */ | |
2227 | ||
2228 | rtx | |
2229 | regno_use_in (regno, x) | |
2230 | int regno; | |
2231 | rtx x; | |
2232 | { | |
2233 | register char *fmt; | |
2234 | int i, j; | |
2235 | rtx tem; | |
2236 | ||
2237 | if (GET_CODE (x) == REG && REGNO (x) == regno) | |
2238 | return x; | |
2239 | ||
2240 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2241 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2242 | { | |
2243 | if (fmt[i] == 'e') | |
2244 | { | |
2245 | if ((tem = regno_use_in (regno, XEXP (x, i)))) | |
2246 | return tem; | |
2247 | } | |
2248 | else if (fmt[i] == 'E') | |
2249 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2250 | if ((tem = regno_use_in (regno , XVECEXP (x, i, j)))) | |
2251 | return tem; | |
2252 | } | |
2253 | ||
2254 | return NULL_RTX; | |
2255 | } |