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2c88418c | 1 | /* Analyze RTL for C-Compiler |
af841dbd JL |
2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
3 | 1999, 2000 Free Software Foundation, Inc. | |
2c88418c RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
e99215a3 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
2c88418c RS |
21 | |
22 | ||
23 | #include "config.h" | |
670ee920 | 24 | #include "system.h" |
e35b9579 | 25 | #include "toplev.h" |
2c88418c RS |
26 | #include "rtl.h" |
27 | ||
cdadb1dd KG |
28 | static int rtx_addr_can_trap_p PARAMS ((rtx)); |
29 | static void reg_set_p_1 PARAMS ((rtx, rtx, void *)); | |
4eb00163 | 30 | static void insn_dependent_p_1 PARAMS ((rtx, rtx, void *)); |
cdadb1dd | 31 | static void reg_set_last_1 PARAMS ((rtx, rtx, void *)); |
2c88418c | 32 | |
2a1777af JL |
33 | |
34 | /* Forward declarations */ | |
cdadb1dd | 35 | static int jmp_uses_reg_or_mem PARAMS ((rtx)); |
2a1777af | 36 | |
2c88418c RS |
37 | /* Bit flags that specify the machine subtype we are compiling for. |
38 | Bits are tested using macros TARGET_... defined in the tm.h file | |
39 | and set by `-m...' switches. Must be defined in rtlanal.c. */ | |
40 | ||
41 | int target_flags; | |
42 | \f | |
43 | /* Return 1 if the value of X is unstable | |
44 | (would be different at a different point in the program). | |
45 | The frame pointer, arg pointer, etc. are considered stable | |
46 | (within one function) and so is anything marked `unchanging'. */ | |
47 | ||
48 | int | |
49 | rtx_unstable_p (x) | |
50 | rtx x; | |
51 | { | |
52 | register RTX_CODE code = GET_CODE (x); | |
53 | register int i; | |
6f7d635c | 54 | register const char *fmt; |
2c88418c | 55 | |
ae0fb1b9 JW |
56 | switch (code) |
57 | { | |
58 | case MEM: | |
59 | return ! RTX_UNCHANGING_P (x) || rtx_unstable_p (XEXP (x, 0)); | |
2c88418c | 60 | |
ae0fb1b9 JW |
61 | case QUEUED: |
62 | return 1; | |
2c88418c | 63 | |
ae0fb1b9 JW |
64 | case CONST: |
65 | case CONST_INT: | |
66 | case CONST_DOUBLE: | |
67 | case SYMBOL_REF: | |
68 | case LABEL_REF: | |
69 | return 0; | |
2c88418c | 70 | |
ae0fb1b9 JW |
71 | case REG: |
72 | /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ | |
c0fc376b RH |
73 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
74 | || x == arg_pointer_rtx || RTX_UNCHANGING_P (x)) | |
75 | return 0; | |
76 | #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED | |
77 | /* ??? When call-clobbered, the value is stable modulo the restore | |
78 | that must happen after a call. This currently screws up local-alloc | |
79 | into believing that the restore is not needed. */ | |
80 | if (x == pic_offset_table_rtx) | |
81 | return 0; | |
82 | #endif | |
83 | return 1; | |
ae0fb1b9 JW |
84 | |
85 | case ASM_OPERANDS: | |
86 | if (MEM_VOLATILE_P (x)) | |
87 | return 1; | |
88 | ||
89 | /* FALLTHROUGH */ | |
90 | ||
91 | default: | |
92 | break; | |
93 | } | |
2c88418c RS |
94 | |
95 | fmt = GET_RTX_FORMAT (code); | |
96 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
97 | if (fmt[i] == 'e') | |
9c82ac6b JW |
98 | { |
99 | if (rtx_unstable_p (XEXP (x, i))) | |
100 | return 1; | |
101 | } | |
102 | else if (fmt[i] == 'E') | |
103 | { | |
104 | int j; | |
105 | for (j = 0; j < XVECLEN (x, i); j++) | |
106 | if (rtx_unstable_p (XVECEXP (x, i, j))) | |
107 | return 1; | |
108 | } | |
109 | ||
2c88418c RS |
110 | return 0; |
111 | } | |
112 | ||
113 | /* Return 1 if X has a value that can vary even between two | |
114 | executions of the program. 0 means X can be compared reliably | |
115 | against certain constants or near-constants. | |
116 | The frame pointer and the arg pointer are considered constant. */ | |
117 | ||
118 | int | |
119 | rtx_varies_p (x) | |
120 | rtx x; | |
121 | { | |
122 | register RTX_CODE code = GET_CODE (x); | |
123 | register int i; | |
6f7d635c | 124 | register const char *fmt; |
2c88418c RS |
125 | |
126 | switch (code) | |
127 | { | |
128 | case MEM: | |
55efb413 JW |
129 | return ! RTX_UNCHANGING_P (x) || rtx_varies_p (XEXP (x, 0)); |
130 | ||
2c88418c RS |
131 | case QUEUED: |
132 | return 1; | |
133 | ||
134 | case CONST: | |
135 | case CONST_INT: | |
136 | case CONST_DOUBLE: | |
137 | case SYMBOL_REF: | |
138 | case LABEL_REF: | |
139 | return 0; | |
140 | ||
141 | case REG: | |
142 | /* Note that we have to test for the actual rtx used for the frame | |
143 | and arg pointers and not just the register number in case we have | |
144 | eliminated the frame and/or arg pointer and are using it | |
145 | for pseudos. */ | |
c0fc376b RH |
146 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
147 | || x == arg_pointer_rtx) | |
148 | return 0; | |
149 | #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED | |
150 | /* ??? When call-clobbered, the value is stable modulo the restore | |
151 | that must happen after a call. This currently screws up local-alloc | |
152 | into believing that the restore is not needed. */ | |
153 | if (x == pic_offset_table_rtx) | |
154 | return 0; | |
155 | #endif | |
156 | return 1; | |
2c88418c RS |
157 | |
158 | case LO_SUM: | |
159 | /* The operand 0 of a LO_SUM is considered constant | |
160 | (in fact is it related specifically to operand 1). */ | |
161 | return rtx_varies_p (XEXP (x, 1)); | |
e9a25f70 | 162 | |
ae0fb1b9 JW |
163 | case ASM_OPERANDS: |
164 | if (MEM_VOLATILE_P (x)) | |
165 | return 1; | |
166 | ||
167 | /* FALLTHROUGH */ | |
168 | ||
e9a25f70 JL |
169 | default: |
170 | break; | |
2c88418c RS |
171 | } |
172 | ||
173 | fmt = GET_RTX_FORMAT (code); | |
174 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
175 | if (fmt[i] == 'e') | |
9c82ac6b JW |
176 | { |
177 | if (rtx_varies_p (XEXP (x, i))) | |
178 | return 1; | |
179 | } | |
180 | else if (fmt[i] == 'E') | |
181 | { | |
182 | int j; | |
183 | for (j = 0; j < XVECLEN (x, i); j++) | |
184 | if (rtx_varies_p (XVECEXP (x, i, j))) | |
185 | return 1; | |
186 | } | |
187 | ||
2c88418c RS |
188 | return 0; |
189 | } | |
190 | ||
191 | /* Return 0 if the use of X as an address in a MEM can cause a trap. */ | |
192 | ||
e9a25f70 | 193 | static int |
2c88418c RS |
194 | rtx_addr_can_trap_p (x) |
195 | register rtx x; | |
196 | { | |
197 | register enum rtx_code code = GET_CODE (x); | |
198 | ||
199 | switch (code) | |
200 | { | |
201 | case SYMBOL_REF: | |
202 | case LABEL_REF: | |
203 | /* SYMBOL_REF is problematic due to the possible presence of | |
204 | a #pragma weak, but to say that loads from symbols can trap is | |
205 | *very* costly. It's not at all clear what's best here. For | |
206 | now, we ignore the impact of #pragma weak. */ | |
207 | return 0; | |
208 | ||
209 | case REG: | |
210 | /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ | |
b3b6c9b3 DE |
211 | return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
212 | || x == stack_pointer_rtx || x == arg_pointer_rtx); | |
2c88418c RS |
213 | |
214 | case CONST: | |
215 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
216 | ||
217 | case PLUS: | |
218 | /* An address is assumed not to trap if it is an address that can't | |
55efb413 JW |
219 | trap plus a constant integer or it is the pic register plus a |
220 | constant. */ | |
221 | return ! ((! rtx_addr_can_trap_p (XEXP (x, 0)) | |
222 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
223 | || (XEXP (x, 0) == pic_offset_table_rtx | |
224 | && CONSTANT_P (XEXP (x, 1)))); | |
2c88418c RS |
225 | |
226 | case LO_SUM: | |
227 | return rtx_addr_can_trap_p (XEXP (x, 1)); | |
e9a25f70 JL |
228 | |
229 | default: | |
230 | break; | |
2c88418c RS |
231 | } |
232 | ||
233 | /* If it isn't one of the case above, it can cause a trap. */ | |
234 | return 1; | |
235 | } | |
236 | ||
237 | /* Return 1 if X refers to a memory location whose address | |
238 | cannot be compared reliably with constant addresses, | |
239 | or if X refers to a BLKmode memory object. */ | |
240 | ||
241 | int | |
242 | rtx_addr_varies_p (x) | |
243 | rtx x; | |
244 | { | |
245 | register enum rtx_code code; | |
246 | register int i; | |
6f7d635c | 247 | register const char *fmt; |
2c88418c RS |
248 | |
249 | if (x == 0) | |
250 | return 0; | |
251 | ||
252 | code = GET_CODE (x); | |
253 | if (code == MEM) | |
254 | return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0)); | |
255 | ||
256 | fmt = GET_RTX_FORMAT (code); | |
257 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
258 | if (fmt[i] == 'e') | |
833c0b26 RK |
259 | { |
260 | if (rtx_addr_varies_p (XEXP (x, i))) | |
261 | return 1; | |
262 | } | |
263 | else if (fmt[i] == 'E') | |
264 | { | |
265 | int j; | |
266 | for (j = 0; j < XVECLEN (x, i); j++) | |
267 | if (rtx_addr_varies_p (XVECEXP (x, i, j))) | |
268 | return 1; | |
269 | } | |
2c88418c RS |
270 | return 0; |
271 | } | |
272 | \f | |
273 | /* Return the value of the integer term in X, if one is apparent; | |
274 | otherwise return 0. | |
275 | Only obvious integer terms are detected. | |
276 | This is used in cse.c with the `related_value' field.*/ | |
277 | ||
c166a311 | 278 | HOST_WIDE_INT |
2c88418c RS |
279 | get_integer_term (x) |
280 | rtx x; | |
281 | { | |
282 | if (GET_CODE (x) == CONST) | |
283 | x = XEXP (x, 0); | |
284 | ||
285 | if (GET_CODE (x) == MINUS | |
286 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
287 | return - INTVAL (XEXP (x, 1)); | |
288 | if (GET_CODE (x) == PLUS | |
289 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
290 | return INTVAL (XEXP (x, 1)); | |
291 | return 0; | |
292 | } | |
293 | ||
294 | /* If X is a constant, return the value sans apparent integer term; | |
295 | otherwise return 0. | |
296 | Only obvious integer terms are detected. */ | |
297 | ||
298 | rtx | |
299 | get_related_value (x) | |
300 | rtx x; | |
301 | { | |
302 | if (GET_CODE (x) != CONST) | |
303 | return 0; | |
304 | x = XEXP (x, 0); | |
305 | if (GET_CODE (x) == PLUS | |
306 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
307 | return XEXP (x, 0); | |
308 | else if (GET_CODE (x) == MINUS | |
309 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
310 | return XEXP (x, 0); | |
311 | return 0; | |
312 | } | |
313 | \f | |
4b983fdc RH |
314 | /* Return the number of places FIND appears within X. If COUNT_DEST is |
315 | zero, we do not count occurrences inside the destination of a SET. */ | |
316 | ||
317 | int | |
318 | count_occurrences (x, find, count_dest) | |
319 | rtx x, find; | |
320 | int count_dest; | |
321 | { | |
322 | int i, j; | |
323 | enum rtx_code code; | |
324 | const char *format_ptr; | |
325 | int count; | |
326 | ||
327 | if (x == find) | |
328 | return 1; | |
329 | ||
330 | code = GET_CODE (x); | |
331 | ||
332 | switch (code) | |
333 | { | |
334 | case REG: | |
335 | case CONST_INT: | |
336 | case CONST_DOUBLE: | |
337 | case SYMBOL_REF: | |
338 | case CODE_LABEL: | |
339 | case PC: | |
340 | case CC0: | |
341 | return 0; | |
342 | ||
343 | case MEM: | |
344 | if (GET_CODE (find) == MEM && rtx_equal_p (x, find)) | |
345 | return 1; | |
346 | break; | |
347 | ||
348 | case SET: | |
349 | if (SET_DEST (x) == find && ! count_dest) | |
350 | return count_occurrences (SET_SRC (x), find, count_dest); | |
351 | break; | |
352 | ||
353 | default: | |
354 | break; | |
355 | } | |
356 | ||
357 | format_ptr = GET_RTX_FORMAT (code); | |
358 | count = 0; | |
359 | ||
360 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
361 | { | |
362 | switch (*format_ptr++) | |
363 | { | |
364 | case 'e': | |
365 | count += count_occurrences (XEXP (x, i), find, count_dest); | |
366 | break; | |
367 | ||
368 | case 'E': | |
369 | for (j = 0; j < XVECLEN (x, i); j++) | |
370 | count += count_occurrences (XVECEXP (x, i, j), find, count_dest); | |
371 | break; | |
372 | } | |
373 | } | |
374 | return count; | |
375 | } | |
376 | \f | |
2c88418c RS |
377 | /* Nonzero if register REG appears somewhere within IN. |
378 | Also works if REG is not a register; in this case it checks | |
379 | for a subexpression of IN that is Lisp "equal" to REG. */ | |
380 | ||
381 | int | |
382 | reg_mentioned_p (reg, in) | |
383 | register rtx reg, in; | |
384 | { | |
6f7d635c | 385 | register const char *fmt; |
2c88418c RS |
386 | register int i; |
387 | register enum rtx_code code; | |
388 | ||
389 | if (in == 0) | |
390 | return 0; | |
391 | ||
392 | if (reg == in) | |
393 | return 1; | |
394 | ||
395 | if (GET_CODE (in) == LABEL_REF) | |
396 | return reg == XEXP (in, 0); | |
397 | ||
398 | code = GET_CODE (in); | |
399 | ||
400 | switch (code) | |
401 | { | |
402 | /* Compare registers by number. */ | |
403 | case REG: | |
404 | return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); | |
405 | ||
406 | /* These codes have no constituent expressions | |
407 | and are unique. */ | |
408 | case SCRATCH: | |
409 | case CC0: | |
410 | case PC: | |
411 | return 0; | |
412 | ||
413 | case CONST_INT: | |
414 | return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); | |
415 | ||
416 | case CONST_DOUBLE: | |
417 | /* These are kept unique for a given value. */ | |
418 | return 0; | |
e9a25f70 JL |
419 | |
420 | default: | |
421 | break; | |
2c88418c RS |
422 | } |
423 | ||
424 | if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) | |
425 | return 1; | |
426 | ||
427 | fmt = GET_RTX_FORMAT (code); | |
428 | ||
429 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
430 | { | |
431 | if (fmt[i] == 'E') | |
432 | { | |
433 | register int j; | |
434 | for (j = XVECLEN (in, i) - 1; j >= 0; j--) | |
435 | if (reg_mentioned_p (reg, XVECEXP (in, i, j))) | |
436 | return 1; | |
437 | } | |
438 | else if (fmt[i] == 'e' | |
439 | && reg_mentioned_p (reg, XEXP (in, i))) | |
440 | return 1; | |
441 | } | |
442 | return 0; | |
443 | } | |
444 | \f | |
445 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is | |
446 | no CODE_LABEL insn. */ | |
447 | ||
448 | int | |
449 | no_labels_between_p (beg, end) | |
450 | rtx beg, end; | |
451 | { | |
452 | register rtx p; | |
453 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
454 | if (GET_CODE (p) == CODE_LABEL) | |
455 | return 0; | |
456 | return 1; | |
457 | } | |
458 | ||
3ec2b590 R |
459 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is |
460 | no JUMP_INSN insn. */ | |
461 | ||
462 | int | |
463 | no_jumps_between_p (beg, end) | |
464 | rtx beg, end; | |
465 | { | |
466 | register rtx p; | |
467 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) | |
468 | if (GET_CODE (p) == JUMP_INSN) | |
469 | return 0; | |
470 | return 1; | |
471 | } | |
472 | ||
2c88418c RS |
473 | /* Nonzero if register REG is used in an insn between |
474 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
475 | ||
476 | int | |
477 | reg_used_between_p (reg, from_insn, to_insn) | |
478 | rtx reg, from_insn, to_insn; | |
479 | { | |
480 | register rtx insn; | |
481 | ||
482 | if (from_insn == to_insn) | |
483 | return 0; | |
484 | ||
485 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 486 | if (INSN_P (insn) |
8f3e7a26 RK |
487 | && (reg_overlap_mentioned_p (reg, PATTERN (insn)) |
488 | || (GET_CODE (insn) == CALL_INSN | |
489 | && (find_reg_fusage (insn, USE, reg) | |
490 | || find_reg_fusage (insn, CLOBBER, reg))))) | |
2c88418c RS |
491 | return 1; |
492 | return 0; | |
493 | } | |
494 | \f | |
495 | /* Nonzero if the old value of X, a register, is referenced in BODY. If X | |
496 | is entirely replaced by a new value and the only use is as a SET_DEST, | |
497 | we do not consider it a reference. */ | |
498 | ||
499 | int | |
500 | reg_referenced_p (x, body) | |
501 | rtx x; | |
502 | rtx body; | |
503 | { | |
504 | int i; | |
505 | ||
506 | switch (GET_CODE (body)) | |
507 | { | |
508 | case SET: | |
509 | if (reg_overlap_mentioned_p (x, SET_SRC (body))) | |
510 | return 1; | |
511 | ||
512 | /* If the destination is anything other than CC0, PC, a REG or a SUBREG | |
513 | of a REG that occupies all of the REG, the insn references X if | |
514 | it is mentioned in the destination. */ | |
515 | if (GET_CODE (SET_DEST (body)) != CC0 | |
516 | && GET_CODE (SET_DEST (body)) != PC | |
517 | && GET_CODE (SET_DEST (body)) != REG | |
518 | && ! (GET_CODE (SET_DEST (body)) == SUBREG | |
519 | && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG | |
520 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) | |
521 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
522 | == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) | |
523 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) | |
524 | && reg_overlap_mentioned_p (x, SET_DEST (body))) | |
525 | return 1; | |
e9a25f70 | 526 | return 0; |
2c88418c RS |
527 | |
528 | case ASM_OPERANDS: | |
529 | for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) | |
530 | if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) | |
531 | return 1; | |
e9a25f70 | 532 | return 0; |
2c88418c RS |
533 | |
534 | case CALL: | |
535 | case USE: | |
14a774a9 | 536 | case IF_THEN_ELSE: |
2c88418c RS |
537 | return reg_overlap_mentioned_p (x, body); |
538 | ||
539 | case TRAP_IF: | |
540 | return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); | |
541 | ||
2ac4fed0 RK |
542 | case UNSPEC: |
543 | case UNSPEC_VOLATILE: | |
2f9fb4c2 R |
544 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) |
545 | if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i))) | |
546 | return 1; | |
547 | return 0; | |
548 | ||
2c88418c RS |
549 | case PARALLEL: |
550 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) | |
551 | if (reg_referenced_p (x, XVECEXP (body, 0, i))) | |
552 | return 1; | |
e9a25f70 JL |
553 | return 0; |
554 | ||
0d3ffb5a GK |
555 | case CLOBBER: |
556 | if (GET_CODE (XEXP (body, 0)) == MEM) | |
557 | if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0))) | |
558 | return 1; | |
559 | return 0; | |
560 | ||
0c99ec5c RH |
561 | case COND_EXEC: |
562 | if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body))) | |
563 | return 1; | |
564 | return reg_referenced_p (x, COND_EXEC_CODE (body)); | |
565 | ||
e9a25f70 JL |
566 | default: |
567 | return 0; | |
2c88418c | 568 | } |
2c88418c RS |
569 | } |
570 | ||
571 | /* Nonzero if register REG is referenced in an insn between | |
572 | FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do | |
0f41302f | 573 | not count. */ |
2c88418c RS |
574 | |
575 | int | |
576 | reg_referenced_between_p (reg, from_insn, to_insn) | |
577 | rtx reg, from_insn, to_insn; | |
578 | { | |
579 | register rtx insn; | |
580 | ||
581 | if (from_insn == to_insn) | |
582 | return 0; | |
583 | ||
584 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 585 | if (INSN_P (insn) |
8f3e7a26 RK |
586 | && (reg_referenced_p (reg, PATTERN (insn)) |
587 | || (GET_CODE (insn) == CALL_INSN | |
588 | && find_reg_fusage (insn, USE, reg)))) | |
2c88418c RS |
589 | return 1; |
590 | return 0; | |
591 | } | |
592 | \f | |
593 | /* Nonzero if register REG is set or clobbered in an insn between | |
594 | FROM_INSN and TO_INSN (exclusive of those two). */ | |
595 | ||
596 | int | |
597 | reg_set_between_p (reg, from_insn, to_insn) | |
598 | rtx reg, from_insn, to_insn; | |
599 | { | |
600 | register rtx insn; | |
601 | ||
602 | if (from_insn == to_insn) | |
603 | return 0; | |
604 | ||
605 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 606 | if (INSN_P (insn) && reg_set_p (reg, insn)) |
2c88418c RS |
607 | return 1; |
608 | return 0; | |
609 | } | |
610 | ||
611 | /* Internals of reg_set_between_p. */ | |
612 | ||
613 | static rtx reg_set_reg; | |
614 | static int reg_set_flag; | |
615 | ||
5f91c709 | 616 | static void |
84832317 | 617 | reg_set_p_1 (x, pat, data) |
d6f4ec51 KG |
618 | rtx x; |
619 | rtx pat ATTRIBUTE_UNUSED; | |
84832317 | 620 | void *data ATTRIBUTE_UNUSED; |
2c88418c RS |
621 | { |
622 | /* We don't want to return 1 if X is a MEM that contains a register | |
623 | within REG_SET_REG. */ | |
624 | ||
625 | if ((GET_CODE (x) != MEM) | |
626 | && reg_overlap_mentioned_p (reg_set_reg, x)) | |
627 | reg_set_flag = 1; | |
628 | } | |
629 | ||
630 | int | |
631 | reg_set_p (reg, insn) | |
632 | rtx reg, insn; | |
633 | { | |
634 | rtx body = insn; | |
635 | ||
636 | /* We can be passed an insn or part of one. If we are passed an insn, | |
637 | check if a side-effect of the insn clobbers REG. */ | |
2c3c49de | 638 | if (INSN_P (insn)) |
2c88418c RS |
639 | { |
640 | if (FIND_REG_INC_NOTE (insn, reg) | |
641 | || (GET_CODE (insn) == CALL_INSN | |
642 | /* We'd like to test call_used_regs here, but rtlanal.c can't | |
643 | reference that variable due to its use in genattrtab. So | |
8f3e7a26 RK |
644 | we'll just be more conservative. |
645 | ||
646 | ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE | |
647 | information holds all clobbered registers. */ | |
2c88418c RS |
648 | && ((GET_CODE (reg) == REG |
649 | && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
8f3e7a26 RK |
650 | || GET_CODE (reg) == MEM |
651 | || find_reg_fusage (insn, CLOBBER, reg)))) | |
2c88418c RS |
652 | return 1; |
653 | ||
654 | body = PATTERN (insn); | |
655 | } | |
656 | ||
657 | reg_set_reg = reg; | |
658 | reg_set_flag = 0; | |
84832317 | 659 | note_stores (body, reg_set_p_1, NULL); |
2c88418c RS |
660 | return reg_set_flag; |
661 | } | |
662 | ||
a2e1a0bf RH |
663 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
664 | only if none of them are modified between START and END. Do not | |
665 | consider non-registers one way or the other. */ | |
666 | ||
667 | int | |
668 | regs_set_between_p (x, start, end) | |
669 | rtx x; | |
670 | rtx start, end; | |
671 | { | |
672 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 673 | const char *fmt; |
a2e1a0bf RH |
674 | int i, j; |
675 | ||
676 | switch (code) | |
677 | { | |
678 | case CONST_INT: | |
679 | case CONST_DOUBLE: | |
680 | case CONST: | |
681 | case SYMBOL_REF: | |
682 | case LABEL_REF: | |
683 | case PC: | |
684 | case CC0: | |
685 | return 0; | |
686 | ||
687 | case REG: | |
688 | return reg_set_between_p (x, start, end); | |
689 | ||
690 | default: | |
691 | break; | |
692 | } | |
693 | ||
694 | fmt = GET_RTX_FORMAT (code); | |
695 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
696 | { | |
697 | if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end)) | |
698 | return 1; | |
699 | ||
700 | else if (fmt[i] == 'E') | |
701 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
702 | if (regs_set_between_p (XVECEXP (x, i, j), start, end)) | |
703 | return 1; | |
704 | } | |
705 | ||
706 | return 0; | |
707 | } | |
708 | ||
2c88418c RS |
709 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
710 | only if none of them are modified between START and END. Return 1 if | |
711 | X contains a MEM; this routine does not perform any memory aliasing. */ | |
712 | ||
713 | int | |
714 | modified_between_p (x, start, end) | |
715 | rtx x; | |
716 | rtx start, end; | |
717 | { | |
718 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 719 | const char *fmt; |
f8163c92 | 720 | int i, j; |
2c88418c RS |
721 | |
722 | switch (code) | |
723 | { | |
724 | case CONST_INT: | |
725 | case CONST_DOUBLE: | |
726 | case CONST: | |
727 | case SYMBOL_REF: | |
728 | case LABEL_REF: | |
729 | return 0; | |
730 | ||
731 | case PC: | |
732 | case CC0: | |
733 | return 1; | |
734 | ||
735 | case MEM: | |
736 | /* If the memory is not constant, assume it is modified. If it is | |
737 | constant, we still have to check the address. */ | |
738 | if (! RTX_UNCHANGING_P (x)) | |
739 | return 1; | |
740 | break; | |
741 | ||
742 | case REG: | |
743 | return reg_set_between_p (x, start, end); | |
e9a25f70 JL |
744 | |
745 | default: | |
746 | break; | |
2c88418c RS |
747 | } |
748 | ||
749 | fmt = GET_RTX_FORMAT (code); | |
750 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
f8163c92 RK |
751 | { |
752 | if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) | |
753 | return 1; | |
754 | ||
d4757e6a | 755 | else if (fmt[i] == 'E') |
f8163c92 RK |
756 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
757 | if (modified_between_p (XVECEXP (x, i, j), start, end)) | |
758 | return 1; | |
759 | } | |
760 | ||
761 | return 0; | |
762 | } | |
763 | ||
764 | /* Similar to reg_set_p, but check all registers in X. Return 0 only if none | |
765 | of them are modified in INSN. Return 1 if X contains a MEM; this routine | |
766 | does not perform any memory aliasing. */ | |
767 | ||
768 | int | |
769 | modified_in_p (x, insn) | |
770 | rtx x; | |
771 | rtx insn; | |
772 | { | |
773 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 774 | const char *fmt; |
f8163c92 RK |
775 | int i, j; |
776 | ||
777 | switch (code) | |
778 | { | |
779 | case CONST_INT: | |
780 | case CONST_DOUBLE: | |
781 | case CONST: | |
782 | case SYMBOL_REF: | |
783 | case LABEL_REF: | |
784 | return 0; | |
785 | ||
786 | case PC: | |
787 | case CC0: | |
2c88418c RS |
788 | return 1; |
789 | ||
f8163c92 RK |
790 | case MEM: |
791 | /* If the memory is not constant, assume it is modified. If it is | |
792 | constant, we still have to check the address. */ | |
793 | if (! RTX_UNCHANGING_P (x)) | |
794 | return 1; | |
795 | break; | |
796 | ||
797 | case REG: | |
798 | return reg_set_p (x, insn); | |
e9a25f70 JL |
799 | |
800 | default: | |
801 | break; | |
f8163c92 RK |
802 | } |
803 | ||
804 | fmt = GET_RTX_FORMAT (code); | |
805 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
806 | { | |
807 | if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) | |
808 | return 1; | |
809 | ||
d4757e6a | 810 | else if (fmt[i] == 'E') |
f8163c92 RK |
811 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
812 | if (modified_in_p (XVECEXP (x, i, j), insn)) | |
813 | return 1; | |
814 | } | |
815 | ||
2c88418c RS |
816 | return 0; |
817 | } | |
a8393d5d | 818 | |
4eb00163 | 819 | /* Return true if anything in insn X is (anti,output,true) dependent on |
a8393d5d RH |
820 | anything in insn Y. */ |
821 | ||
822 | int | |
4eb00163 | 823 | insn_dependent_p (x, y) |
a8393d5d RH |
824 | rtx x, y; |
825 | { | |
826 | rtx tmp; | |
827 | ||
828 | if (! INSN_P (x) || ! INSN_P (y)) | |
829 | abort (); | |
830 | ||
831 | tmp = PATTERN (y); | |
4eb00163 | 832 | note_stores (PATTERN (x), insn_dependent_p_1, &tmp); |
a8393d5d RH |
833 | if (tmp == NULL_RTX) |
834 | return 1; | |
835 | ||
836 | tmp = PATTERN (x); | |
4eb00163 | 837 | note_stores (PATTERN (y), insn_dependent_p_1, &tmp); |
a8393d5d RH |
838 | if (tmp == NULL_RTX) |
839 | return 1; | |
840 | ||
841 | return 0; | |
842 | } | |
843 | ||
4eb00163 | 844 | /* A helper routine for insn_dependent_p called through note_stores. */ |
a8393d5d RH |
845 | |
846 | static void | |
4eb00163 | 847 | insn_dependent_p_1 (x, pat, data) |
a8393d5d RH |
848 | rtx x; |
849 | rtx pat ATTRIBUTE_UNUSED; | |
850 | void *data; | |
851 | { | |
852 | rtx * pinsn = (rtx *) data; | |
853 | ||
854 | if (*pinsn && reg_mentioned_p (x, *pinsn)) | |
855 | *pinsn = NULL_RTX; | |
856 | } | |
2c88418c RS |
857 | \f |
858 | /* Given an INSN, return a SET expression if this insn has only a single SET. | |
859 | It may also have CLOBBERs, USEs, or SET whose output | |
860 | will not be used, which we ignore. */ | |
861 | ||
862 | rtx | |
b1cdafbb | 863 | single_set_1 (insn) |
2c88418c RS |
864 | rtx insn; |
865 | { | |
c9b89a21 JH |
866 | rtx set = NULL; |
867 | int set_verified = 1; | |
b1cdafbb | 868 | rtx pat = PATTERN (insn); |
2c88418c | 869 | int i; |
c9b89a21 | 870 | |
b1cdafbb | 871 | if (GET_CODE (pat) == PARALLEL) |
2c88418c | 872 | { |
c9b89a21 | 873 | for (i = 0; i < XVECLEN (pat, 0); i++) |
b1cdafbb | 874 | { |
c9b89a21 JH |
875 | rtx sub = XVECEXP (pat, 0, i); |
876 | switch (GET_CODE (sub)) | |
877 | { | |
878 | case USE: | |
879 | case CLOBBER: | |
880 | break; | |
881 | ||
882 | case SET: | |
883 | /* We can consider insns having multiple sets, where all | |
884 | but one are dead as single set insns. In common case | |
885 | only single set is present in the pattern so we want | |
886 | to avoid checking for REG_UNUSED notes unless neccesary. | |
887 | ||
888 | When we reach set first time, we just expect this is | |
889 | the single set we are looking for and only when more | |
890 | sets are found in the insn, we check them. */ | |
891 | if (!set_verified) | |
892 | { | |
893 | if (find_reg_note (insn, REG_UNUSED, SET_DEST (set)) | |
894 | && !side_effects_p (set)) | |
895 | set = NULL; | |
896 | else | |
897 | set_verified = 1; | |
898 | } | |
899 | if (!set) | |
900 | set = sub, set_verified = 0; | |
901 | else if (!find_reg_note (insn, REG_UNUSED, SET_DEST (sub)) | |
902 | || side_effects_p (sub)) | |
903 | return NULL_RTX; | |
904 | break; | |
905 | ||
906 | default: | |
907 | return NULL_RTX; | |
908 | } | |
787ccee0 | 909 | } |
2c88418c | 910 | } |
c9b89a21 | 911 | return set; |
2c88418c | 912 | } |
941c63ac JL |
913 | |
914 | /* Given an INSN, return nonzero if it has more than one SET, else return | |
915 | zero. */ | |
916 | ||
5f7d3786 | 917 | int |
941c63ac JL |
918 | multiple_sets (insn) |
919 | rtx insn; | |
920 | { | |
cae8acdd | 921 | int found; |
941c63ac JL |
922 | int i; |
923 | ||
924 | /* INSN must be an insn. */ | |
2c3c49de | 925 | if (! INSN_P (insn)) |
941c63ac JL |
926 | return 0; |
927 | ||
928 | /* Only a PARALLEL can have multiple SETs. */ | |
929 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
930 | { | |
931 | for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
932 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) | |
933 | { | |
934 | /* If we have already found a SET, then return now. */ | |
935 | if (found) | |
936 | return 1; | |
937 | else | |
938 | found = 1; | |
939 | } | |
940 | } | |
941 | ||
942 | /* Either zero or one SET. */ | |
943 | return 0; | |
944 | } | |
2c88418c | 945 | \f |
63be01fb JW |
946 | /* Return the last thing that X was assigned from before *PINSN. If VALID_TO |
947 | is not NULL_RTX then verify that the object is not modified up to VALID_TO. | |
948 | If the object was modified, if we hit a partial assignment to X, or hit a | |
949 | CODE_LABEL first, return X. If we found an assignment, update *PINSN to | |
950 | point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to | |
951 | be the src. */ | |
2c88418c RS |
952 | |
953 | rtx | |
89d3d442 | 954 | find_last_value (x, pinsn, valid_to, allow_hwreg) |
2c88418c RS |
955 | rtx x; |
956 | rtx *pinsn; | |
957 | rtx valid_to; | |
89d3d442 | 958 | int allow_hwreg; |
2c88418c RS |
959 | { |
960 | rtx p; | |
961 | ||
962 | for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL; | |
963 | p = PREV_INSN (p)) | |
2c3c49de | 964 | if (INSN_P (p)) |
2c88418c RS |
965 | { |
966 | rtx set = single_set (p); | |
c166a311 | 967 | rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); |
2c88418c RS |
968 | |
969 | if (set && rtx_equal_p (x, SET_DEST (set))) | |
970 | { | |
971 | rtx src = SET_SRC (set); | |
972 | ||
973 | if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST) | |
974 | src = XEXP (note, 0); | |
975 | ||
63be01fb JW |
976 | if ((valid_to == NULL_RTX |
977 | || ! modified_between_p (src, PREV_INSN (p), valid_to)) | |
2c88418c RS |
978 | /* Reject hard registers because we don't usually want |
979 | to use them; we'd rather use a pseudo. */ | |
89d3d442 AM |
980 | && (! (GET_CODE (src) == REG |
981 | && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg)) | |
2c88418c RS |
982 | { |
983 | *pinsn = p; | |
984 | return src; | |
985 | } | |
986 | } | |
987 | ||
988 | /* If set in non-simple way, we don't have a value. */ | |
989 | if (reg_set_p (x, p)) | |
990 | break; | |
991 | } | |
992 | ||
993 | return x; | |
994 | } | |
995 | \f | |
996 | /* Return nonzero if register in range [REGNO, ENDREGNO) | |
997 | appears either explicitly or implicitly in X | |
998 | other than being stored into. | |
999 | ||
1000 | References contained within the substructure at LOC do not count. | |
1001 | LOC may be zero, meaning don't ignore anything. */ | |
1002 | ||
1003 | int | |
1004 | refers_to_regno_p (regno, endregno, x, loc) | |
770ae6cc | 1005 | unsigned int regno, endregno; |
2c88418c RS |
1006 | rtx x; |
1007 | rtx *loc; | |
1008 | { | |
770ae6cc RK |
1009 | int i; |
1010 | unsigned int x_regno; | |
1011 | RTX_CODE code; | |
1012 | const char *fmt; | |
2c88418c RS |
1013 | |
1014 | repeat: | |
1015 | /* The contents of a REG_NONNEG note is always zero, so we must come here | |
1016 | upon repeat in case the last REG_NOTE is a REG_NONNEG note. */ | |
1017 | if (x == 0) | |
1018 | return 0; | |
1019 | ||
1020 | code = GET_CODE (x); | |
1021 | ||
1022 | switch (code) | |
1023 | { | |
1024 | case REG: | |
770ae6cc | 1025 | x_regno = REGNO (x); |
f8163c92 RK |
1026 | |
1027 | /* If we modifying the stack, frame, or argument pointer, it will | |
1028 | clobber a virtual register. In fact, we could be more precise, | |
1029 | but it isn't worth it. */ | |
770ae6cc | 1030 | if ((x_regno == STACK_POINTER_REGNUM |
f8163c92 | 1031 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
770ae6cc | 1032 | || x_regno == ARG_POINTER_REGNUM |
f8163c92 | 1033 | #endif |
770ae6cc | 1034 | || x_regno == FRAME_POINTER_REGNUM) |
f8163c92 RK |
1035 | && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER) |
1036 | return 1; | |
1037 | ||
770ae6cc RK |
1038 | return (endregno > x_regno |
1039 | && regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER | |
1040 | ? HARD_REGNO_NREGS (x_regno, GET_MODE (x)) | |
2c88418c RS |
1041 | : 1)); |
1042 | ||
1043 | case SUBREG: | |
1044 | /* If this is a SUBREG of a hard reg, we can see exactly which | |
1045 | registers are being modified. Otherwise, handle normally. */ | |
1046 | if (GET_CODE (SUBREG_REG (x)) == REG | |
1047 | && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) | |
1048 | { | |
770ae6cc RK |
1049 | unsigned int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); |
1050 | unsigned int inner_endregno | |
2c88418c RS |
1051 | = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER |
1052 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
1053 | ||
1054 | return endregno > inner_regno && regno < inner_endregno; | |
1055 | } | |
1056 | break; | |
1057 | ||
1058 | case CLOBBER: | |
1059 | case SET: | |
1060 | if (&SET_DEST (x) != loc | |
1061 | /* Note setting a SUBREG counts as referring to the REG it is in for | |
1062 | a pseudo but not for hard registers since we can | |
1063 | treat each word individually. */ | |
1064 | && ((GET_CODE (SET_DEST (x)) == SUBREG | |
1065 | && loc != &SUBREG_REG (SET_DEST (x)) | |
1066 | && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG | |
1067 | && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER | |
1068 | && refers_to_regno_p (regno, endregno, | |
1069 | SUBREG_REG (SET_DEST (x)), loc)) | |
1070 | || (GET_CODE (SET_DEST (x)) != REG | |
1071 | && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) | |
1072 | return 1; | |
1073 | ||
1074 | if (code == CLOBBER || loc == &SET_SRC (x)) | |
1075 | return 0; | |
1076 | x = SET_SRC (x); | |
1077 | goto repeat; | |
e9a25f70 JL |
1078 | |
1079 | default: | |
1080 | break; | |
2c88418c RS |
1081 | } |
1082 | ||
1083 | /* X does not match, so try its subexpressions. */ | |
1084 | ||
1085 | fmt = GET_RTX_FORMAT (code); | |
1086 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1087 | { | |
1088 | if (fmt[i] == 'e' && loc != &XEXP (x, i)) | |
1089 | { | |
1090 | if (i == 0) | |
1091 | { | |
1092 | x = XEXP (x, 0); | |
1093 | goto repeat; | |
1094 | } | |
1095 | else | |
1096 | if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc)) | |
1097 | return 1; | |
1098 | } | |
1099 | else if (fmt[i] == 'E') | |
1100 | { | |
1101 | register int j; | |
1102 | for (j = XVECLEN (x, i) - 1; j >=0; j--) | |
1103 | if (loc != &XVECEXP (x, i, j) | |
1104 | && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc)) | |
1105 | return 1; | |
1106 | } | |
1107 | } | |
1108 | return 0; | |
1109 | } | |
1110 | ||
1111 | /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, | |
1112 | we check if any register number in X conflicts with the relevant register | |
1113 | numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN | |
1114 | contains a MEM (we don't bother checking for memory addresses that can't | |
1115 | conflict because we expect this to be a rare case. */ | |
1116 | ||
1117 | int | |
1118 | reg_overlap_mentioned_p (x, in) | |
1119 | rtx x, in; | |
1120 | { | |
770ae6cc | 1121 | unsigned int regno, endregno; |
2c88418c | 1122 | |
b98b49ac JL |
1123 | /* Overly conservative. */ |
1124 | if (GET_CODE (x) == STRICT_LOW_PART) | |
1125 | x = XEXP (x, 0); | |
1126 | ||
1127 | /* If either argument is a constant, then modifying X can not affect IN. */ | |
1128 | if (CONSTANT_P (x) || CONSTANT_P (in)) | |
1129 | return 0; | |
0c99ec5c RH |
1130 | |
1131 | switch (GET_CODE (x)) | |
2c88418c | 1132 | { |
0c99ec5c | 1133 | case SUBREG: |
2c88418c RS |
1134 | regno = REGNO (SUBREG_REG (x)); |
1135 | if (regno < FIRST_PSEUDO_REGISTER) | |
1136 | regno += SUBREG_WORD (x); | |
0c99ec5c | 1137 | goto do_reg; |
2c88418c | 1138 | |
0c99ec5c RH |
1139 | case REG: |
1140 | regno = REGNO (x); | |
1141 | do_reg: | |
1142 | endregno = regno + (regno < FIRST_PSEUDO_REGISTER | |
1143 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); | |
1144 | return refers_to_regno_p (regno, endregno, in, NULL_PTR); | |
2c88418c | 1145 | |
0c99ec5c RH |
1146 | case MEM: |
1147 | { | |
1148 | const char *fmt; | |
1149 | int i; | |
2c88418c | 1150 | |
0c99ec5c | 1151 | if (GET_CODE (in) == MEM) |
2c88418c RS |
1152 | return 1; |
1153 | ||
0c99ec5c RH |
1154 | fmt = GET_RTX_FORMAT (GET_CODE (in)); |
1155 | for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) | |
1156 | if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i))) | |
1157 | return 1; | |
c0222c21 | 1158 | |
0c99ec5c RH |
1159 | return 0; |
1160 | } | |
1161 | ||
1162 | case SCRATCH: | |
1163 | case PC: | |
1164 | case CC0: | |
1165 | return reg_mentioned_p (x, in); | |
1166 | ||
1167 | case PARALLEL: | |
37ceff9d RH |
1168 | { |
1169 | int i, n; | |
1170 | ||
1171 | /* Check for a NULL entry, used to indicate that the parameter goes | |
1172 | both on the stack and in registers. */ | |
1173 | if (XEXP (XVECEXP (x, 0, 0), 0)) | |
1174 | i = 0; | |
1175 | else | |
1176 | i = 1; | |
1177 | ||
1178 | /* If any register in here refers to it we return true. */ | |
1179 | for (n = XVECLEN (x, 0); i < n; ++i) | |
1180 | if (reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in)) | |
1181 | return 1; | |
1182 | return 0; | |
1183 | } | |
2c88418c | 1184 | |
0c99ec5c RH |
1185 | default: |
1186 | break; | |
1187 | } | |
2c88418c | 1188 | |
0c99ec5c | 1189 | abort (); |
2c88418c RS |
1190 | } |
1191 | \f | |
1192 | /* Used for communications between the next few functions. */ | |
1193 | ||
1194 | static int reg_set_last_unknown; | |
1195 | static rtx reg_set_last_value; | |
770ae6cc | 1196 | static unsigned int reg_set_last_first_regno, reg_set_last_last_regno; |
2c88418c RS |
1197 | |
1198 | /* Called via note_stores from reg_set_last. */ | |
1199 | ||
1200 | static void | |
84832317 | 1201 | reg_set_last_1 (x, pat, data) |
2c88418c RS |
1202 | rtx x; |
1203 | rtx pat; | |
84832317 | 1204 | void *data ATTRIBUTE_UNUSED; |
2c88418c | 1205 | { |
770ae6cc | 1206 | unsigned int first, last; |
2c88418c RS |
1207 | |
1208 | /* If X is not a register, or is not one in the range we care | |
1209 | about, ignore. */ | |
1210 | if (GET_CODE (x) != REG) | |
1211 | return; | |
1212 | ||
1213 | first = REGNO (x); | |
1214 | last = first + (first < FIRST_PSEUDO_REGISTER | |
1215 | ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1); | |
1216 | ||
1217 | if (first >= reg_set_last_last_regno | |
1218 | || last <= reg_set_last_first_regno) | |
1219 | return; | |
1220 | ||
1221 | /* If this is a CLOBBER or is some complex LHS, or doesn't modify | |
1222 | exactly the registers we care about, show we don't know the value. */ | |
1223 | if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x | |
1224 | || first != reg_set_last_first_regno | |
1225 | || last != reg_set_last_last_regno) | |
1226 | reg_set_last_unknown = 1; | |
1227 | else | |
1228 | reg_set_last_value = SET_SRC (pat); | |
1229 | } | |
1230 | ||
1231 | /* Return the last value to which REG was set prior to INSN. If we can't | |
1232 | find it easily, return 0. | |
1233 | ||
4d9d7d9d RK |
1234 | We only return a REG, SUBREG, or constant because it is too hard to |
1235 | check if a MEM remains unchanged. */ | |
2c88418c RS |
1236 | |
1237 | rtx | |
1238 | reg_set_last (x, insn) | |
1239 | rtx x; | |
1240 | rtx insn; | |
1241 | { | |
1242 | rtx orig_insn = insn; | |
1243 | ||
1244 | reg_set_last_first_regno = REGNO (x); | |
1245 | ||
1246 | reg_set_last_last_regno | |
1247 | = reg_set_last_first_regno | |
1248 | + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER | |
1249 | ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1); | |
1250 | ||
1251 | reg_set_last_unknown = 0; | |
1252 | reg_set_last_value = 0; | |
1253 | ||
1254 | /* Scan backwards until reg_set_last_1 changed one of the above flags. | |
1255 | Stop when we reach a label or X is a hard reg and we reach a | |
1256 | CALL_INSN (if reg_set_last_last_regno is a hard reg). | |
1257 | ||
1258 | If we find a set of X, ensure that its SET_SRC remains unchanged. */ | |
1259 | ||
6b02c316 RS |
1260 | /* We compare with <= here, because reg_set_last_last_regno |
1261 | is actually the number of the first reg *not* in X. */ | |
2c88418c RS |
1262 | for (; |
1263 | insn && GET_CODE (insn) != CODE_LABEL | |
1264 | && ! (GET_CODE (insn) == CALL_INSN | |
1265 | && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER); | |
1266 | insn = PREV_INSN (insn)) | |
2c3c49de | 1267 | if (INSN_P (insn)) |
2c88418c | 1268 | { |
84832317 | 1269 | note_stores (PATTERN (insn), reg_set_last_1, NULL); |
2c88418c RS |
1270 | if (reg_set_last_unknown) |
1271 | return 0; | |
1272 | else if (reg_set_last_value) | |
1273 | { | |
1274 | if (CONSTANT_P (reg_set_last_value) | |
4d9d7d9d RK |
1275 | || ((GET_CODE (reg_set_last_value) == REG |
1276 | || GET_CODE (reg_set_last_value) == SUBREG) | |
2c88418c | 1277 | && ! reg_set_between_p (reg_set_last_value, |
ce9c8df2 | 1278 | insn, orig_insn))) |
2c88418c RS |
1279 | return reg_set_last_value; |
1280 | else | |
1281 | return 0; | |
1282 | } | |
1283 | } | |
1284 | ||
1285 | return 0; | |
1286 | } | |
1287 | \f | |
2c88418c RS |
1288 | /* Call FUN on each register or MEM that is stored into or clobbered by X. |
1289 | (X would be the pattern of an insn). | |
1290 | FUN receives two arguments: | |
1291 | the REG, MEM, CC0 or PC being stored in or clobbered, | |
1292 | the SET or CLOBBER rtx that does the store. | |
1293 | ||
1294 | If the item being stored in or clobbered is a SUBREG of a hard register, | |
1295 | the SUBREG will be passed. */ | |
1296 | ||
1297 | void | |
84832317 | 1298 | note_stores (x, fun, data) |
2c88418c | 1299 | register rtx x; |
cdadb1dd | 1300 | void (*fun) PARAMS ((rtx, rtx, void *)); |
84832317 | 1301 | void *data; |
2c88418c | 1302 | { |
0c99ec5c RH |
1303 | if (GET_CODE (x) == COND_EXEC) |
1304 | x = COND_EXEC_CODE (x); | |
1305 | if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) | |
2c88418c RS |
1306 | { |
1307 | register rtx dest = SET_DEST (x); | |
1308 | while ((GET_CODE (dest) == SUBREG | |
1309 | && (GET_CODE (SUBREG_REG (dest)) != REG | |
1310 | || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) | |
1311 | || GET_CODE (dest) == ZERO_EXTRACT | |
1312 | || GET_CODE (dest) == SIGN_EXTRACT | |
1313 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1314 | dest = XEXP (dest, 0); | |
86465af7 DM |
1315 | |
1316 | if (GET_CODE (dest) == PARALLEL | |
1317 | && GET_MODE (dest) == BLKmode) | |
1318 | { | |
1319 | register int i; | |
1320 | for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) | |
84832317 | 1321 | (*fun) (SET_DEST (XVECEXP (dest, 0, i)), x, data); |
86465af7 DM |
1322 | } |
1323 | else | |
84832317 | 1324 | (*fun) (dest, x, data); |
2c88418c RS |
1325 | } |
1326 | else if (GET_CODE (x) == PARALLEL) | |
1327 | { | |
1328 | register int i; | |
1329 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
1330 | { | |
1331 | register rtx y = XVECEXP (x, 0, i); | |
0c99ec5c RH |
1332 | if (GET_CODE (y) == COND_EXEC) |
1333 | y = COND_EXEC_CODE (y); | |
2c88418c RS |
1334 | if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER) |
1335 | { | |
1336 | register rtx dest = SET_DEST (y); | |
1337 | while ((GET_CODE (dest) == SUBREG | |
1338 | && (GET_CODE (SUBREG_REG (dest)) != REG | |
1339 | || (REGNO (SUBREG_REG (dest)) | |
1340 | >= FIRST_PSEUDO_REGISTER))) | |
1341 | || GET_CODE (dest) == ZERO_EXTRACT | |
1342 | || GET_CODE (dest) == SIGN_EXTRACT | |
1343 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1344 | dest = XEXP (dest, 0); | |
86465af7 DM |
1345 | if (GET_CODE (dest) == PARALLEL |
1346 | && GET_MODE (dest) == BLKmode) | |
1347 | { | |
1348 | register int i; | |
770ae6cc | 1349 | |
86465af7 | 1350 | for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) |
84832317 | 1351 | (*fun) (SET_DEST (XVECEXP (dest, 0, i)), y, data); |
86465af7 DM |
1352 | } |
1353 | else | |
84832317 | 1354 | (*fun) (dest, y, data); |
2c88418c RS |
1355 | } |
1356 | } | |
1357 | } | |
1358 | } | |
1359 | \f | |
1360 | /* Return nonzero if X's old contents don't survive after INSN. | |
1361 | This will be true if X is (cc0) or if X is a register and | |
1362 | X dies in INSN or because INSN entirely sets X. | |
1363 | ||
1364 | "Entirely set" means set directly and not through a SUBREG, | |
1365 | ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. | |
1366 | Likewise, REG_INC does not count. | |
1367 | ||
1368 | REG may be a hard or pseudo reg. Renumbering is not taken into account, | |
1369 | but for this use that makes no difference, since regs don't overlap | |
1370 | during their lifetimes. Therefore, this function may be used | |
1371 | at any time after deaths have been computed (in flow.c). | |
1372 | ||
1373 | If REG is a hard reg that occupies multiple machine registers, this | |
1374 | function will only return 1 if each of those registers will be replaced | |
1375 | by INSN. */ | |
1376 | ||
1377 | int | |
1378 | dead_or_set_p (insn, x) | |
1379 | rtx insn; | |
1380 | rtx x; | |
1381 | { | |
770ae6cc RK |
1382 | unsigned int regno, last_regno; |
1383 | unsigned int i; | |
2c88418c RS |
1384 | |
1385 | /* Can't use cc0_rtx below since this file is used by genattrtab.c. */ | |
1386 | if (GET_CODE (x) == CC0) | |
1387 | return 1; | |
1388 | ||
1389 | if (GET_CODE (x) != REG) | |
1390 | abort (); | |
1391 | ||
1392 | regno = REGNO (x); | |
1393 | last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno | |
1394 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1); | |
1395 | ||
1396 | for (i = regno; i <= last_regno; i++) | |
1397 | if (! dead_or_set_regno_p (insn, i)) | |
1398 | return 0; | |
1399 | ||
1400 | return 1; | |
1401 | } | |
1402 | ||
1403 | /* Utility function for dead_or_set_p to check an individual register. Also | |
1404 | called from flow.c. */ | |
1405 | ||
1406 | int | |
1407 | dead_or_set_regno_p (insn, test_regno) | |
1408 | rtx insn; | |
770ae6cc | 1409 | unsigned int test_regno; |
2c88418c | 1410 | { |
770ae6cc | 1411 | unsigned int regno, endregno; |
8c8de5fc | 1412 | rtx pattern; |
2c88418c | 1413 | |
0a2287bf RH |
1414 | /* See if there is a death note for something that includes TEST_REGNO. */ |
1415 | if (find_regno_note (insn, REG_DEAD, test_regno)) | |
1416 | return 1; | |
2c88418c | 1417 | |
8f3e7a26 RK |
1418 | if (GET_CODE (insn) == CALL_INSN |
1419 | && find_regno_fusage (insn, CLOBBER, test_regno)) | |
1420 | return 1; | |
1421 | ||
0c99ec5c RH |
1422 | pattern = PATTERN (insn); |
1423 | ||
1424 | if (GET_CODE (pattern) == COND_EXEC) | |
1425 | pattern = COND_EXEC_CODE (pattern); | |
1426 | ||
1427 | if (GET_CODE (pattern) == SET) | |
2c88418c RS |
1428 | { |
1429 | rtx dest = SET_DEST (PATTERN (insn)); | |
1430 | ||
1431 | /* A value is totally replaced if it is the destination or the | |
1432 | destination is a SUBREG of REGNO that does not change the number of | |
1433 | words in it. */ | |
6764d250 | 1434 | if (GET_CODE (dest) == SUBREG |
2c88418c RS |
1435 | && (((GET_MODE_SIZE (GET_MODE (dest)) |
1436 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1437 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1438 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1439 | dest = SUBREG_REG (dest); | |
1440 | ||
1441 | if (GET_CODE (dest) != REG) | |
1442 | return 0; | |
1443 | ||
1444 | regno = REGNO (dest); | |
1445 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1446 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1447 | ||
1448 | return (test_regno >= regno && test_regno < endregno); | |
1449 | } | |
0c99ec5c | 1450 | else if (GET_CODE (pattern) == PARALLEL) |
2c88418c RS |
1451 | { |
1452 | register int i; | |
1453 | ||
0c99ec5c | 1454 | for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--) |
2c88418c | 1455 | { |
0c99ec5c RH |
1456 | rtx body = XVECEXP (pattern, 0, i); |
1457 | ||
1458 | if (GET_CODE (body) == COND_EXEC) | |
1459 | body = COND_EXEC_CODE (body); | |
2c88418c RS |
1460 | |
1461 | if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) | |
1462 | { | |
1463 | rtx dest = SET_DEST (body); | |
1464 | ||
1465 | if (GET_CODE (dest) == SUBREG | |
1466 | && (((GET_MODE_SIZE (GET_MODE (dest)) | |
1467 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
1468 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) | |
1469 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) | |
1470 | dest = SUBREG_REG (dest); | |
1471 | ||
1472 | if (GET_CODE (dest) != REG) | |
1473 | continue; | |
1474 | ||
1475 | regno = REGNO (dest); | |
1476 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 | |
1477 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); | |
1478 | ||
1479 | if (test_regno >= regno && test_regno < endregno) | |
1480 | return 1; | |
1481 | } | |
1482 | } | |
1483 | } | |
1484 | ||
1485 | return 0; | |
1486 | } | |
1487 | ||
1488 | /* Return the reg-note of kind KIND in insn INSN, if there is one. | |
1489 | If DATUM is nonzero, look for one whose datum is DATUM. */ | |
1490 | ||
1491 | rtx | |
1492 | find_reg_note (insn, kind, datum) | |
1493 | rtx insn; | |
1494 | enum reg_note kind; | |
1495 | rtx datum; | |
1496 | { | |
1497 | register rtx link; | |
1498 | ||
ae78d276 | 1499 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
2c3c49de | 1500 | if (! INSN_P (insn)) |
ae78d276 MM |
1501 | return 0; |
1502 | ||
2c88418c RS |
1503 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1504 | if (REG_NOTE_KIND (link) == kind | |
1505 | && (datum == 0 || datum == XEXP (link, 0))) | |
1506 | return link; | |
1507 | return 0; | |
1508 | } | |
1509 | ||
1510 | /* Return the reg-note of kind KIND in insn INSN which applies to register | |
99309f3b RK |
1511 | number REGNO, if any. Return 0 if there is no such reg-note. Note that |
1512 | the REGNO of this NOTE need not be REGNO if REGNO is a hard register; | |
1513 | it might be the case that the note overlaps REGNO. */ | |
2c88418c RS |
1514 | |
1515 | rtx | |
1516 | find_regno_note (insn, kind, regno) | |
1517 | rtx insn; | |
1518 | enum reg_note kind; | |
770ae6cc | 1519 | unsigned int regno; |
2c88418c RS |
1520 | { |
1521 | register rtx link; | |
1522 | ||
ae78d276 | 1523 | /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ |
2c3c49de | 1524 | if (! INSN_P (insn)) |
ae78d276 MM |
1525 | return 0; |
1526 | ||
2c88418c RS |
1527 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1528 | if (REG_NOTE_KIND (link) == kind | |
1529 | /* Verify that it is a register, so that scratch and MEM won't cause a | |
1530 | problem here. */ | |
1531 | && GET_CODE (XEXP (link, 0)) == REG | |
99309f3b RK |
1532 | && REGNO (XEXP (link, 0)) <= regno |
1533 | && ((REGNO (XEXP (link, 0)) | |
1534 | + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 | |
1535 | : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)), | |
1536 | GET_MODE (XEXP (link, 0))))) | |
1537 | > regno)) | |
2c88418c RS |
1538 | return link; |
1539 | return 0; | |
1540 | } | |
8f3e7a26 RK |
1541 | |
1542 | /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found | |
1543 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1544 | ||
1545 | int | |
1546 | find_reg_fusage (insn, code, datum) | |
1547 | rtx insn; | |
1548 | enum rtx_code code; | |
1549 | rtx datum; | |
1550 | { | |
1551 | /* If it's not a CALL_INSN, it can't possibly have a | |
1552 | CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ | |
1553 | if (GET_CODE (insn) != CALL_INSN) | |
1554 | return 0; | |
1555 | ||
1556 | if (! datum) | |
1557 | abort(); | |
1558 | ||
1559 | if (GET_CODE (datum) != REG) | |
1560 | { | |
1561 | register rtx link; | |
1562 | ||
1563 | for (link = CALL_INSN_FUNCTION_USAGE (insn); | |
1564 | link; | |
1565 | link = XEXP (link, 1)) | |
1566 | if (GET_CODE (XEXP (link, 0)) == code | |
1567 | && rtx_equal_p (datum, SET_DEST (XEXP (link, 0)))) | |
1568 | return 1; | |
1569 | } | |
1570 | else | |
1571 | { | |
770ae6cc | 1572 | unsigned int regno = REGNO (datum); |
8f3e7a26 RK |
1573 | |
1574 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1575 | to pseudo registers, so don't bother checking. */ | |
1576 | ||
1577 | if (regno < FIRST_PSEUDO_REGISTER) | |
1578 | { | |
770ae6cc RK |
1579 | unsigned int end_regno |
1580 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum)); | |
1581 | unsigned int i; | |
8f3e7a26 RK |
1582 | |
1583 | for (i = regno; i < end_regno; i++) | |
1584 | if (find_regno_fusage (insn, code, i)) | |
1585 | return 1; | |
1586 | } | |
1587 | } | |
1588 | ||
1589 | return 0; | |
1590 | } | |
1591 | ||
1592 | /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found | |
1593 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ | |
1594 | ||
1595 | int | |
1596 | find_regno_fusage (insn, code, regno) | |
1597 | rtx insn; | |
1598 | enum rtx_code code; | |
770ae6cc | 1599 | unsigned int regno; |
8f3e7a26 RK |
1600 | { |
1601 | register rtx link; | |
1602 | ||
1603 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references | |
1604 | to pseudo registers, so don't bother checking. */ | |
1605 | ||
1606 | if (regno >= FIRST_PSEUDO_REGISTER | |
1607 | || GET_CODE (insn) != CALL_INSN ) | |
1608 | return 0; | |
1609 | ||
1610 | for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) | |
83ab3839 | 1611 | { |
770ae6cc RK |
1612 | unsigned int regnote; |
1613 | rtx op, reg; | |
83ab3839 RH |
1614 | |
1615 | if (GET_CODE (op = XEXP (link, 0)) == code | |
1616 | && GET_CODE (reg = XEXP (op, 0)) == REG | |
1617 | && (regnote = REGNO (reg)) <= regno | |
1618 | && regnote + HARD_REGNO_NREGS (regnote, GET_MODE (reg)) > regno) | |
1619 | return 1; | |
1620 | } | |
8f3e7a26 RK |
1621 | |
1622 | return 0; | |
1623 | } | |
2c88418c RS |
1624 | \f |
1625 | /* Remove register note NOTE from the REG_NOTES of INSN. */ | |
1626 | ||
1627 | void | |
1628 | remove_note (insn, note) | |
2c88418c | 1629 | register rtx insn; |
49c3bb12 | 1630 | register rtx note; |
2c88418c RS |
1631 | { |
1632 | register rtx link; | |
1633 | ||
49c3bb12 RH |
1634 | if (note == NULL_RTX) |
1635 | return; | |
1636 | ||
2c88418c RS |
1637 | if (REG_NOTES (insn) == note) |
1638 | { | |
1639 | REG_NOTES (insn) = XEXP (note, 1); | |
1640 | return; | |
1641 | } | |
1642 | ||
1643 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
1644 | if (XEXP (link, 1) == note) | |
1645 | { | |
1646 | XEXP (link, 1) = XEXP (note, 1); | |
1647 | return; | |
1648 | } | |
1649 | ||
1650 | abort (); | |
1651 | } | |
55a98783 JL |
1652 | |
1653 | /* Search LISTP (an EXPR_LIST) for NODE and remove NODE from the list | |
1654 | if it is found. | |
1655 | ||
1656 | A simple equality test is used to determine if NODE is on the | |
1657 | EXPR_LIST. */ | |
1658 | ||
1659 | void | |
1660 | remove_node_from_expr_list (node, listp) | |
1661 | rtx node; | |
1662 | rtx *listp; | |
1663 | { | |
1664 | rtx temp = *listp; | |
1665 | rtx prev = NULL_RTX; | |
1666 | ||
1667 | while (temp) | |
1668 | { | |
1669 | if (node == XEXP (temp, 0)) | |
1670 | { | |
1671 | /* Splice the node out of the list. */ | |
1672 | if (prev) | |
1673 | XEXP (prev, 1) = XEXP (temp, 1); | |
1674 | else | |
1675 | *listp = XEXP (temp, 1); | |
1676 | ||
1677 | return; | |
1678 | } | |
1679 | temp = XEXP (temp, 1); | |
1680 | } | |
1681 | } | |
2c88418c | 1682 | \f |
2b067faf RS |
1683 | /* Nonzero if X contains any volatile instructions. These are instructions |
1684 | which may cause unpredictable machine state instructions, and thus no | |
1685 | instructions should be moved or combined across them. This includes | |
1686 | only volatile asms and UNSPEC_VOLATILE instructions. */ | |
1687 | ||
1688 | int | |
1689 | volatile_insn_p (x) | |
1690 | rtx x; | |
1691 | { | |
1692 | register RTX_CODE code; | |
1693 | ||
1694 | code = GET_CODE (x); | |
1695 | switch (code) | |
1696 | { | |
1697 | case LABEL_REF: | |
1698 | case SYMBOL_REF: | |
1699 | case CONST_INT: | |
1700 | case CONST: | |
1701 | case CONST_DOUBLE: | |
1702 | case CC0: | |
1703 | case PC: | |
1704 | case REG: | |
1705 | case SCRATCH: | |
1706 | case CLOBBER: | |
1707 | case ASM_INPUT: | |
1708 | case ADDR_VEC: | |
1709 | case ADDR_DIFF_VEC: | |
1710 | case CALL: | |
1711 | case MEM: | |
1712 | return 0; | |
1713 | ||
1714 | case UNSPEC_VOLATILE: | |
1715 | /* case TRAP_IF: This isn't clear yet. */ | |
1716 | return 1; | |
1717 | ||
1718 | case ASM_OPERANDS: | |
1719 | if (MEM_VOLATILE_P (x)) | |
1720 | return 1; | |
e9a25f70 JL |
1721 | |
1722 | default: | |
1723 | break; | |
2b067faf RS |
1724 | } |
1725 | ||
1726 | /* Recursively scan the operands of this expression. */ | |
1727 | ||
1728 | { | |
6f7d635c | 1729 | register const char *fmt = GET_RTX_FORMAT (code); |
2b067faf RS |
1730 | register int i; |
1731 | ||
1732 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1733 | { | |
1734 | if (fmt[i] == 'e') | |
1735 | { | |
31001f72 | 1736 | if (volatile_insn_p (XEXP (x, i))) |
2b067faf RS |
1737 | return 1; |
1738 | } | |
d4757e6a | 1739 | else if (fmt[i] == 'E') |
2b067faf RS |
1740 | { |
1741 | register int j; | |
1742 | for (j = 0; j < XVECLEN (x, i); j++) | |
31001f72 | 1743 | if (volatile_insn_p (XVECEXP (x, i, j))) |
2b067faf RS |
1744 | return 1; |
1745 | } | |
1746 | } | |
1747 | } | |
1748 | return 0; | |
1749 | } | |
1750 | ||
2c88418c | 1751 | /* Nonzero if X contains any volatile memory references |
2ac4fed0 | 1752 | UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ |
2c88418c RS |
1753 | |
1754 | int | |
1755 | volatile_refs_p (x) | |
1756 | rtx x; | |
1757 | { | |
1758 | register RTX_CODE code; | |
1759 | ||
1760 | code = GET_CODE (x); | |
1761 | switch (code) | |
1762 | { | |
1763 | case LABEL_REF: | |
1764 | case SYMBOL_REF: | |
1765 | case CONST_INT: | |
1766 | case CONST: | |
1767 | case CONST_DOUBLE: | |
1768 | case CC0: | |
1769 | case PC: | |
1770 | case REG: | |
1771 | case SCRATCH: | |
1772 | case CLOBBER: | |
1773 | case ASM_INPUT: | |
1774 | case ADDR_VEC: | |
1775 | case ADDR_DIFF_VEC: | |
1776 | return 0; | |
1777 | ||
1778 | case CALL: | |
2ac4fed0 | 1779 | case UNSPEC_VOLATILE: |
2c88418c RS |
1780 | /* case TRAP_IF: This isn't clear yet. */ |
1781 | return 1; | |
1782 | ||
1783 | case MEM: | |
1784 | case ASM_OPERANDS: | |
1785 | if (MEM_VOLATILE_P (x)) | |
1786 | return 1; | |
e9a25f70 JL |
1787 | |
1788 | default: | |
1789 | break; | |
2c88418c RS |
1790 | } |
1791 | ||
1792 | /* Recursively scan the operands of this expression. */ | |
1793 | ||
1794 | { | |
6f7d635c | 1795 | register const char *fmt = GET_RTX_FORMAT (code); |
2c88418c RS |
1796 | register int i; |
1797 | ||
1798 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1799 | { | |
1800 | if (fmt[i] == 'e') | |
1801 | { | |
1802 | if (volatile_refs_p (XEXP (x, i))) | |
1803 | return 1; | |
1804 | } | |
d4757e6a | 1805 | else if (fmt[i] == 'E') |
2c88418c RS |
1806 | { |
1807 | register int j; | |
1808 | for (j = 0; j < XVECLEN (x, i); j++) | |
1809 | if (volatile_refs_p (XVECEXP (x, i, j))) | |
1810 | return 1; | |
1811 | } | |
1812 | } | |
1813 | } | |
1814 | return 0; | |
1815 | } | |
1816 | ||
1817 | /* Similar to above, except that it also rejects register pre- and post- | |
1818 | incrementing. */ | |
1819 | ||
1820 | int | |
1821 | side_effects_p (x) | |
1822 | rtx x; | |
1823 | { | |
1824 | register RTX_CODE code; | |
1825 | ||
1826 | code = GET_CODE (x); | |
1827 | switch (code) | |
1828 | { | |
1829 | case LABEL_REF: | |
1830 | case SYMBOL_REF: | |
1831 | case CONST_INT: | |
1832 | case CONST: | |
1833 | case CONST_DOUBLE: | |
1834 | case CC0: | |
1835 | case PC: | |
1836 | case REG: | |
1837 | case SCRATCH: | |
1838 | case ASM_INPUT: | |
1839 | case ADDR_VEC: | |
1840 | case ADDR_DIFF_VEC: | |
1841 | return 0; | |
1842 | ||
1843 | case CLOBBER: | |
1844 | /* Reject CLOBBER with a non-VOID mode. These are made by combine.c | |
1845 | when some combination can't be done. If we see one, don't think | |
1846 | that we can simplify the expression. */ | |
1847 | return (GET_MODE (x) != VOIDmode); | |
1848 | ||
1849 | case PRE_INC: | |
1850 | case PRE_DEC: | |
1851 | case POST_INC: | |
1852 | case POST_DEC: | |
1853 | case CALL: | |
2ac4fed0 | 1854 | case UNSPEC_VOLATILE: |
2c88418c RS |
1855 | /* case TRAP_IF: This isn't clear yet. */ |
1856 | return 1; | |
1857 | ||
1858 | case MEM: | |
1859 | case ASM_OPERANDS: | |
1860 | if (MEM_VOLATILE_P (x)) | |
1861 | return 1; | |
e9a25f70 JL |
1862 | |
1863 | default: | |
1864 | break; | |
2c88418c RS |
1865 | } |
1866 | ||
1867 | /* Recursively scan the operands of this expression. */ | |
1868 | ||
1869 | { | |
6f7d635c | 1870 | register const char *fmt = GET_RTX_FORMAT (code); |
2c88418c RS |
1871 | register int i; |
1872 | ||
1873 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1874 | { | |
1875 | if (fmt[i] == 'e') | |
1876 | { | |
1877 | if (side_effects_p (XEXP (x, i))) | |
1878 | return 1; | |
1879 | } | |
d4757e6a | 1880 | else if (fmt[i] == 'E') |
2c88418c RS |
1881 | { |
1882 | register int j; | |
1883 | for (j = 0; j < XVECLEN (x, i); j++) | |
1884 | if (side_effects_p (XVECEXP (x, i, j))) | |
1885 | return 1; | |
1886 | } | |
1887 | } | |
1888 | } | |
1889 | return 0; | |
1890 | } | |
1891 | \f | |
1892 | /* Return nonzero if evaluating rtx X might cause a trap. */ | |
1893 | ||
1894 | int | |
1895 | may_trap_p (x) | |
1896 | rtx x; | |
1897 | { | |
1898 | int i; | |
1899 | enum rtx_code code; | |
6f7d635c | 1900 | const char *fmt; |
2c88418c RS |
1901 | |
1902 | if (x == 0) | |
1903 | return 0; | |
1904 | code = GET_CODE (x); | |
1905 | switch (code) | |
1906 | { | |
1907 | /* Handle these cases quickly. */ | |
1908 | case CONST_INT: | |
1909 | case CONST_DOUBLE: | |
1910 | case SYMBOL_REF: | |
1911 | case LABEL_REF: | |
1912 | case CONST: | |
1913 | case PC: | |
1914 | case CC0: | |
1915 | case REG: | |
1916 | case SCRATCH: | |
1917 | return 0; | |
1918 | ||
22aa60a1 | 1919 | case ASM_INPUT: |
2ac4fed0 | 1920 | case UNSPEC_VOLATILE: |
2c88418c RS |
1921 | case TRAP_IF: |
1922 | return 1; | |
1923 | ||
22aa60a1 RH |
1924 | case ASM_OPERANDS: |
1925 | return MEM_VOLATILE_P (x); | |
1926 | ||
2c88418c RS |
1927 | /* Memory ref can trap unless it's a static var or a stack slot. */ |
1928 | case MEM: | |
1929 | return rtx_addr_can_trap_p (XEXP (x, 0)); | |
1930 | ||
1931 | /* Division by a non-constant might trap. */ | |
1932 | case DIV: | |
1933 | case MOD: | |
1934 | case UDIV: | |
1935 | case UMOD: | |
e9a25f70 JL |
1936 | if (! CONSTANT_P (XEXP (x, 1)) |
1937 | || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
2c88418c RS |
1938 | return 1; |
1939 | /* This was const0_rtx, but by not using that, | |
1940 | we can link this file into other programs. */ | |
1941 | if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0) | |
1942 | return 1; | |
e9a25f70 JL |
1943 | break; |
1944 | ||
b278301b RK |
1945 | case EXPR_LIST: |
1946 | /* An EXPR_LIST is used to represent a function call. This | |
1947 | certainly may trap. */ | |
1948 | return 1; | |
e9a25f70 | 1949 | |
55143861 JJ |
1950 | case COMPARE: |
1951 | /* Any floating comparison may trap. */ | |
1952 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1953 | return 1; | |
1954 | /* But often the compare has some CC mode, so check operand | |
1955 | modes as well. */ | |
1956 | if (GET_MODE_CLASS (GET_MODE (XEXP (x, 0))) == MODE_FLOAT | |
1957 | || GET_MODE_CLASS (GET_MODE (XEXP (x, 1))) == MODE_FLOAT) | |
1958 | return 1; | |
1959 | break; | |
1960 | ||
2c88418c RS |
1961 | default: |
1962 | /* Any floating arithmetic may trap. */ | |
1963 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1964 | return 1; | |
1965 | } | |
1966 | ||
1967 | fmt = GET_RTX_FORMAT (code); | |
1968 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1969 | { | |
1970 | if (fmt[i] == 'e') | |
1971 | { | |
1972 | if (may_trap_p (XEXP (x, i))) | |
1973 | return 1; | |
1974 | } | |
1975 | else if (fmt[i] == 'E') | |
1976 | { | |
1977 | register int j; | |
1978 | for (j = 0; j < XVECLEN (x, i); j++) | |
1979 | if (may_trap_p (XVECEXP (x, i, j))) | |
1980 | return 1; | |
1981 | } | |
1982 | } | |
1983 | return 0; | |
1984 | } | |
1985 | \f | |
1986 | /* Return nonzero if X contains a comparison that is not either EQ or NE, | |
1987 | i.e., an inequality. */ | |
1988 | ||
1989 | int | |
1990 | inequality_comparisons_p (x) | |
1991 | rtx x; | |
1992 | { | |
6f7d635c | 1993 | register const char *fmt; |
2c88418c RS |
1994 | register int len, i; |
1995 | register enum rtx_code code = GET_CODE (x); | |
1996 | ||
1997 | switch (code) | |
1998 | { | |
1999 | case REG: | |
2000 | case SCRATCH: | |
2001 | case PC: | |
2002 | case CC0: | |
2003 | case CONST_INT: | |
2004 | case CONST_DOUBLE: | |
2005 | case CONST: | |
2006 | case LABEL_REF: | |
2007 | case SYMBOL_REF: | |
2008 | return 0; | |
2009 | ||
2010 | case LT: | |
2011 | case LTU: | |
2012 | case GT: | |
2013 | case GTU: | |
2014 | case LE: | |
2015 | case LEU: | |
2016 | case GE: | |
2017 | case GEU: | |
2018 | return 1; | |
e9a25f70 JL |
2019 | |
2020 | default: | |
2021 | break; | |
2c88418c RS |
2022 | } |
2023 | ||
2024 | len = GET_RTX_LENGTH (code); | |
2025 | fmt = GET_RTX_FORMAT (code); | |
2026 | ||
2027 | for (i = 0; i < len; i++) | |
2028 | { | |
2029 | if (fmt[i] == 'e') | |
2030 | { | |
2031 | if (inequality_comparisons_p (XEXP (x, i))) | |
2032 | return 1; | |
2033 | } | |
2034 | else if (fmt[i] == 'E') | |
2035 | { | |
2036 | register int j; | |
2037 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2038 | if (inequality_comparisons_p (XVECEXP (x, i, j))) | |
2039 | return 1; | |
2040 | } | |
2041 | } | |
2042 | ||
2043 | return 0; | |
2044 | } | |
2045 | \f | |
1ed0205e VM |
2046 | /* Replace any occurrence of FROM in X with TO. The function does |
2047 | not enter into CONST_DOUBLE for the replace. | |
2c88418c RS |
2048 | |
2049 | Note that copying is not done so X must not be shared unless all copies | |
2050 | are to be modified. */ | |
2051 | ||
2052 | rtx | |
2053 | replace_rtx (x, from, to) | |
2054 | rtx x, from, to; | |
2055 | { | |
2056 | register int i, j; | |
6f7d635c | 2057 | register const char *fmt; |
2c88418c | 2058 | |
1ed0205e VM |
2059 | /* The following prevents loops occurrence when we change MEM in |
2060 | CONST_DOUBLE onto the same CONST_DOUBLE. */ | |
2061 | if (x != 0 && GET_CODE (x) == CONST_DOUBLE) | |
2062 | return x; | |
2063 | ||
2c88418c RS |
2064 | if (x == from) |
2065 | return to; | |
2066 | ||
2067 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2068 | if (x == 0) | |
2069 | return 0; | |
2070 | ||
2071 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2072 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2073 | { | |
2074 | if (fmt[i] == 'e') | |
2075 | XEXP (x, i) = replace_rtx (XEXP (x, i), from, to); | |
2076 | else if (fmt[i] == 'E') | |
2077 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2078 | XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to); | |
2079 | } | |
2080 | ||
2081 | return x; | |
2082 | } | |
2083 | \f | |
2084 | /* Throughout the rtx X, replace many registers according to REG_MAP. | |
2085 | Return the replacement for X (which may be X with altered contents). | |
2086 | REG_MAP[R] is the replacement for register R, or 0 for don't replace. | |
2087 | NREGS is the length of REG_MAP; regs >= NREGS are not mapped. | |
2088 | ||
2089 | We only support REG_MAP entries of REG or SUBREG. Also, hard registers | |
2090 | should not be mapped to pseudos or vice versa since validate_change | |
2091 | is not called. | |
2092 | ||
2093 | If REPLACE_DEST is 1, replacements are also done in destinations; | |
2094 | otherwise, only sources are replaced. */ | |
2095 | ||
2096 | rtx | |
2097 | replace_regs (x, reg_map, nregs, replace_dest) | |
2098 | rtx x; | |
2099 | rtx *reg_map; | |
770ae6cc | 2100 | unsigned int nregs; |
2c88418c RS |
2101 | int replace_dest; |
2102 | { | |
2103 | register enum rtx_code code; | |
2104 | register int i; | |
6f7d635c | 2105 | register const char *fmt; |
2c88418c RS |
2106 | |
2107 | if (x == 0) | |
2108 | return x; | |
2109 | ||
2110 | code = GET_CODE (x); | |
2111 | switch (code) | |
2112 | { | |
2113 | case SCRATCH: | |
2114 | case PC: | |
2115 | case CC0: | |
2116 | case CONST_INT: | |
2117 | case CONST_DOUBLE: | |
2118 | case CONST: | |
2119 | case SYMBOL_REF: | |
2120 | case LABEL_REF: | |
2121 | return x; | |
2122 | ||
2123 | case REG: | |
2124 | /* Verify that the register has an entry before trying to access it. */ | |
2125 | if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0) | |
3eb8f14c JW |
2126 | { |
2127 | /* SUBREGs can't be shared. Always return a copy to ensure that if | |
2128 | this replacement occurs more than once then each instance will | |
2129 | get distinct rtx. */ | |
2130 | if (GET_CODE (reg_map[REGNO (x)]) == SUBREG) | |
2131 | return copy_rtx (reg_map[REGNO (x)]); | |
2132 | return reg_map[REGNO (x)]; | |
2133 | } | |
2c88418c RS |
2134 | return x; |
2135 | ||
2136 | case SUBREG: | |
2137 | /* Prevent making nested SUBREGs. */ | |
2138 | if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs | |
2139 | && reg_map[REGNO (SUBREG_REG (x))] != 0 | |
2140 | && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) | |
2141 | { | |
2142 | rtx map_val = reg_map[REGNO (SUBREG_REG (x))]; | |
2143 | rtx map_inner = SUBREG_REG (map_val); | |
2144 | ||
2145 | if (GET_MODE (x) == GET_MODE (map_inner)) | |
2146 | return map_inner; | |
2147 | else | |
2148 | { | |
2149 | /* We cannot call gen_rtx here since we may be linked with | |
2150 | genattrtab.c. */ | |
2151 | /* Let's try clobbering the incoming SUBREG and see | |
2152 | if this is really safe. */ | |
2153 | SUBREG_REG (x) = map_inner; | |
2154 | SUBREG_WORD (x) += SUBREG_WORD (map_val); | |
2155 | return x; | |
2156 | #if 0 | |
2157 | rtx new = rtx_alloc (SUBREG); | |
2158 | PUT_MODE (new, GET_MODE (x)); | |
2159 | SUBREG_REG (new) = map_inner; | |
2160 | SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val); | |
2161 | #endif | |
2162 | } | |
2163 | } | |
2164 | break; | |
2165 | ||
2166 | case SET: | |
2167 | if (replace_dest) | |
2168 | SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0); | |
2169 | ||
2170 | else if (GET_CODE (SET_DEST (x)) == MEM | |
2171 | || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART) | |
2172 | /* Even if we are not to replace destinations, replace register if it | |
2173 | is CONTAINED in destination (destination is memory or | |
2174 | STRICT_LOW_PART). */ | |
2175 | XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0), | |
2176 | reg_map, nregs, 0); | |
2177 | else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
2178 | /* Similarly, for ZERO_EXTRACT we replace all operands. */ | |
2179 | break; | |
2180 | ||
2181 | SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0); | |
2182 | return x; | |
e9a25f70 JL |
2183 | |
2184 | default: | |
2185 | break; | |
2c88418c RS |
2186 | } |
2187 | ||
2188 | fmt = GET_RTX_FORMAT (code); | |
2189 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2190 | { | |
2191 | if (fmt[i] == 'e') | |
2192 | XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest); | |
d4757e6a | 2193 | else if (fmt[i] == 'E') |
2c88418c RS |
2194 | { |
2195 | register int j; | |
2196 | for (j = 0; j < XVECLEN (x, i); j++) | |
2197 | XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map, | |
2198 | nregs, replace_dest); | |
2199 | } | |
2200 | } | |
2201 | return x; | |
2202 | } | |
2a1777af | 2203 | |
2a1777af JL |
2204 | /* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is |
2205 | not in the constant pool and not in the condition of an IF_THEN_ELSE. */ | |
2206 | ||
2207 | static int | |
2208 | jmp_uses_reg_or_mem (x) | |
2209 | rtx x; | |
2210 | { | |
2211 | enum rtx_code code = GET_CODE (x); | |
2212 | int i, j; | |
6f7d635c | 2213 | const char *fmt; |
2a1777af JL |
2214 | |
2215 | switch (code) | |
2216 | { | |
2217 | case CONST: | |
2218 | case LABEL_REF: | |
2219 | case PC: | |
2220 | return 0; | |
2221 | ||
2222 | case REG: | |
2223 | return 1; | |
2224 | ||
2225 | case MEM: | |
2226 | return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
2227 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); | |
2228 | ||
2229 | case IF_THEN_ELSE: | |
2230 | return (jmp_uses_reg_or_mem (XEXP (x, 1)) | |
2231 | || jmp_uses_reg_or_mem (XEXP (x, 2))); | |
2232 | ||
2233 | case PLUS: case MINUS: case MULT: | |
2234 | return (jmp_uses_reg_or_mem (XEXP (x, 0)) | |
2235 | || jmp_uses_reg_or_mem (XEXP (x, 1))); | |
1d300e19 KG |
2236 | |
2237 | default: | |
2238 | break; | |
2a1777af JL |
2239 | } |
2240 | ||
2241 | fmt = GET_RTX_FORMAT (code); | |
2242 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2243 | { | |
2244 | if (fmt[i] == 'e' | |
2245 | && jmp_uses_reg_or_mem (XEXP (x, i))) | |
2246 | return 1; | |
2247 | ||
d4757e6a | 2248 | else if (fmt[i] == 'E') |
2a1777af JL |
2249 | for (j = 0; j < XVECLEN (x, i); j++) |
2250 | if (jmp_uses_reg_or_mem (XVECEXP (x, i, j))) | |
2251 | return 1; | |
2252 | } | |
2253 | ||
2254 | return 0; | |
2255 | } | |
2256 | ||
2257 | /* Return nonzero if INSN is an indirect jump (aka computed jump). | |
2258 | ||
2259 | Tablejumps and casesi insns are not considered indirect jumps; | |
4eb00163 | 2260 | we can recognize them by a (use (label_ref)). */ |
2a1777af JL |
2261 | |
2262 | int | |
2263 | computed_jump_p (insn) | |
2264 | rtx insn; | |
2265 | { | |
2266 | int i; | |
2267 | if (GET_CODE (insn) == JUMP_INSN) | |
2268 | { | |
2269 | rtx pat = PATTERN (insn); | |
2a1777af JL |
2270 | |
2271 | if (GET_CODE (pat) == PARALLEL) | |
2272 | { | |
2273 | int len = XVECLEN (pat, 0); | |
2274 | int has_use_labelref = 0; | |
2275 | ||
2276 | for (i = len - 1; i >= 0; i--) | |
2277 | if (GET_CODE (XVECEXP (pat, 0, i)) == USE | |
2278 | && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) | |
2279 | == LABEL_REF)) | |
2280 | has_use_labelref = 1; | |
2281 | ||
2282 | if (! has_use_labelref) | |
2283 | for (i = len - 1; i >= 0; i--) | |
2284 | if (GET_CODE (XVECEXP (pat, 0, i)) == SET | |
2285 | && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx | |
8d7532d9 | 2286 | && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) |
2a1777af JL |
2287 | return 1; |
2288 | } | |
2289 | else if (GET_CODE (pat) == SET | |
2290 | && SET_DEST (pat) == pc_rtx | |
2291 | && jmp_uses_reg_or_mem (SET_SRC (pat))) | |
2292 | return 1; | |
2293 | } | |
2294 | return 0; | |
2295 | } | |
ccc2d6d0 MM |
2296 | |
2297 | /* Traverse X via depth-first search, calling F for each | |
2298 | sub-expression (including X itself). F is also passed the DATA. | |
2299 | If F returns -1, do not traverse sub-expressions, but continue | |
2300 | traversing the rest of the tree. If F ever returns any other | |
2301 | non-zero value, stop the traversal, and return the value returned | |
2302 | by F. Otherwise, return 0. This function does not traverse inside | |
2303 | tree structure that contains RTX_EXPRs, or into sub-expressions | |
2304 | whose format code is `0' since it is not known whether or not those | |
2305 | codes are actually RTL. | |
2306 | ||
2307 | This routine is very general, and could (should?) be used to | |
2308 | implement many of the other routines in this file. */ | |
2309 | ||
ae0b51ef JL |
2310 | int |
2311 | for_each_rtx (x, f, data) | |
ef30399b | 2312 | rtx *x; |
ccc2d6d0 | 2313 | rtx_function f; |
ef30399b | 2314 | void *data; |
ccc2d6d0 MM |
2315 | { |
2316 | int result; | |
2317 | int length; | |
6f7d635c | 2318 | const char* format; |
ccc2d6d0 MM |
2319 | int i; |
2320 | ||
2321 | /* Call F on X. */ | |
2322 | result = (*f)(x, data); | |
2323 | if (result == -1) | |
2324 | /* Do not traverse sub-expressions. */ | |
2325 | return 0; | |
2326 | else if (result != 0) | |
2327 | /* Stop the traversal. */ | |
2328 | return result; | |
2329 | ||
2330 | if (*x == NULL_RTX) | |
2331 | /* There are no sub-expressions. */ | |
2332 | return 0; | |
2333 | ||
2334 | length = GET_RTX_LENGTH (GET_CODE (*x)); | |
2335 | format = GET_RTX_FORMAT (GET_CODE (*x)); | |
2336 | ||
2337 | for (i = 0; i < length; ++i) | |
2338 | { | |
2339 | switch (format[i]) | |
2340 | { | |
2341 | case 'e': | |
2342 | result = for_each_rtx (&XEXP (*x, i), f, data); | |
2343 | if (result != 0) | |
2344 | return result; | |
2345 | break; | |
2346 | ||
2347 | case 'V': | |
2348 | case 'E': | |
2349 | if (XVEC (*x, i) != 0) | |
2350 | { | |
2351 | int j; | |
2352 | for (j = 0; j < XVECLEN (*x, i); ++j) | |
2353 | { | |
2354 | result = for_each_rtx (&XVECEXP (*x, i, j), f, data); | |
2355 | if (result != 0) | |
2356 | return result; | |
2357 | } | |
2358 | } | |
2359 | break; | |
2360 | ||
2361 | default: | |
2362 | /* Nothing to do. */ | |
2363 | break; | |
2364 | } | |
2365 | ||
2366 | } | |
2367 | ||
2368 | return 0; | |
2369 | } | |
3ec2b590 | 2370 | |
777b1b71 RH |
2371 | /* Searches X for any reference to REGNO, returning the rtx of the |
2372 | reference found if any. Otherwise, returns NULL_RTX. */ | |
2373 | ||
2374 | rtx | |
2375 | regno_use_in (regno, x) | |
770ae6cc | 2376 | unsigned int regno; |
777b1b71 RH |
2377 | rtx x; |
2378 | { | |
6f7d635c | 2379 | register const char *fmt; |
777b1b71 RH |
2380 | int i, j; |
2381 | rtx tem; | |
2382 | ||
2383 | if (GET_CODE (x) == REG && REGNO (x) == regno) | |
2384 | return x; | |
2385 | ||
2386 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2387 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2388 | { | |
2389 | if (fmt[i] == 'e') | |
2390 | { | |
2391 | if ((tem = regno_use_in (regno, XEXP (x, i)))) | |
2392 | return tem; | |
2393 | } | |
2394 | else if (fmt[i] == 'E') | |
2395 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2396 | if ((tem = regno_use_in (regno , XVECEXP (x, i, j)))) | |
2397 | return tem; | |
2398 | } | |
2399 | ||
2400 | return NULL_RTX; | |
2401 | } | |
2dfa9a87 MH |
2402 | |
2403 | ||
2404 | /* Return 1 if X is an autoincrement side effect and the register is | |
2405 | not the stack pointer. */ | |
2406 | int | |
2407 | auto_inc_p (x) | |
2408 | rtx x; | |
2409 | { | |
2410 | switch (GET_CODE (x)) | |
2411 | { | |
2412 | case PRE_INC: | |
2413 | case POST_INC: | |
2414 | case PRE_DEC: | |
2415 | case POST_DEC: | |
2416 | case PRE_MODIFY: | |
2417 | case POST_MODIFY: | |
2418 | /* There are no REG_INC notes for SP. */ | |
2419 | if (XEXP (x, 0) != stack_pointer_rtx) | |
2420 | return 1; | |
2421 | default: | |
2422 | break; | |
2423 | } | |
2424 | return 0; | |
2425 | } | |
3b10cf4b MM |
2426 | |
2427 | /* Return 1 if the sequence of instructions beginning with FROM and up | |
2428 | to and including TO is safe to move. If NEW_TO is non-NULL, and | |
2429 | the sequence is not already safe to move, but can be easily | |
2430 | extended to a sequence which is safe, then NEW_TO will point to the | |
7015a814 MM |
2431 | end of the extended sequence. |
2432 | ||
2433 | For now, this function only checks that the region contains whole | |
2434 | exception regiongs, but it could be extended to check additional | |
2435 | conditions as well. */ | |
3b10cf4b MM |
2436 | |
2437 | int | |
2438 | insns_safe_to_move_p (from, to, new_to) | |
2439 | rtx from; | |
2440 | rtx to; | |
2441 | rtx *new_to; | |
2442 | { | |
2443 | int eh_region_count = 0; | |
2444 | int past_to_p = 0; | |
2445 | rtx r = from; | |
2446 | ||
7015a814 MM |
2447 | /* By default, assume the end of the region will be what was |
2448 | suggested. */ | |
2449 | if (new_to) | |
2450 | *new_to = to; | |
2451 | ||
3b10cf4b MM |
2452 | while (r) |
2453 | { | |
2454 | if (GET_CODE (r) == NOTE) | |
2455 | { | |
2456 | switch (NOTE_LINE_NUMBER (r)) | |
2457 | { | |
2458 | case NOTE_INSN_EH_REGION_BEG: | |
2459 | ++eh_region_count; | |
2460 | break; | |
2461 | ||
2462 | case NOTE_INSN_EH_REGION_END: | |
2463 | if (eh_region_count == 0) | |
2464 | /* This sequence of instructions contains the end of | |
2465 | an exception region, but not he beginning. Moving | |
2466 | it will cause chaos. */ | |
2467 | return 0; | |
2468 | ||
2469 | --eh_region_count; | |
2470 | break; | |
2471 | ||
2472 | default: | |
2473 | break; | |
2474 | } | |
2475 | } | |
2476 | else if (past_to_p) | |
2477 | /* If we've passed TO, and we see a non-note instruction, we | |
2478 | can't extend the sequence to a movable sequence. */ | |
2479 | return 0; | |
2480 | ||
2481 | if (r == to) | |
2482 | { | |
2483 | if (!new_to) | |
2484 | /* It's OK to move the sequence if there were matched sets of | |
2485 | exception region notes. */ | |
2486 | return eh_region_count == 0; | |
2487 | ||
2488 | past_to_p = 1; | |
2489 | } | |
2490 | ||
2491 | /* It's OK to move the sequence if there were matched sets of | |
2492 | exception region notes. */ | |
2493 | if (past_to_p && eh_region_count == 0) | |
2494 | { | |
2495 | *new_to = r; | |
2496 | return 1; | |
2497 | } | |
2498 | ||
2499 | /* Go to the next instruction. */ | |
2500 | r = NEXT_INSN (r); | |
2501 | } | |
2502 | ||
2503 | return 0; | |
2504 | } | |
db7ba742 R |
2505 | |
2506 | /* Return non-zero if IN contains a piece of rtl that has the address LOC */ | |
2507 | int | |
2508 | loc_mentioned_in_p (loc, in) | |
2509 | rtx *loc, in; | |
2510 | { | |
2511 | enum rtx_code code = GET_CODE (in); | |
2512 | const char *fmt = GET_RTX_FORMAT (code); | |
2513 | int i, j; | |
2514 | ||
2515 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2516 | { | |
2517 | if (loc == &in->fld[i].rtx) | |
2518 | return 1; | |
2519 | if (fmt[i] == 'e') | |
2520 | { | |
2521 | if (loc_mentioned_in_p (loc, XEXP (in, i))) | |
2522 | return 1; | |
2523 | } | |
2524 | else if (fmt[i] == 'E') | |
2525 | for (j = XVECLEN (in, i) - 1; j >= 0; j--) | |
2526 | if (loc_mentioned_in_p (loc, XVECEXP (in, i, j))) | |
2527 | return 1; | |
2528 | } | |
2529 | return 0; | |
2530 | } |