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d6141c0c 1/* Instruction scheduling pass.
fbd26352 2 Copyright (C) 1992-2019 Free Software Foundation, Inc.
d6141c0c 3 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
4 and currently maintained by, Jim Wilson (wilson@cygnus.com)
5
f12b58b3 6This file is part of GCC.
d6141c0c 7
f12b58b3 8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
8c4c00c1 10Software Foundation; either version 3, or (at your option) any later
f12b58b3 11version.
d6141c0c 12
f12b58b3 13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
d6141c0c 15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
8c4c00c1 19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
d6141c0c 21\f
22#include "config.h"
23#include "system.h"
805e22b2 24#include "coretypes.h"
9ef16211 25#include "backend.h"
7c29e30e 26#include "target.h"
d6141c0c 27#include "rtl.h"
7c29e30e 28#include "cfghooks.h"
9ef16211 29#include "df.h"
886c1262 30#include "profile.h"
d6141c0c 31#include "insn-attr.h"
eeb4a70e 32#include "params.h"
94ea8568 33#include "cfgrtl.h"
34#include "cfgbuild.h"
d6141c0c 35#include "sched-int.h"
3072d30e 36
d6141c0c 37\f
db982eeb 38#ifdef INSN_SCHEDULING
39
6a1cdb4d 40/* The number of insns to be scheduled in total. */
e1ab7874 41static int rgn_n_insns;
42
43/* The number of insns scheduled so far. */
44static int sched_rgn_n_insns;
6a1cdb4d 45
46/* Set of blocks, that already have their dependencies calculated. */
47static bitmap_head dont_calc_deps;
6a1cdb4d 48
49/* Last basic block in current ebb. */
50static basic_block last_bb;
51
d6141c0c 52/* Implementations of the sched_info functions for region scheduling. */
e4897000 53static void init_ready_list (void);
b24ef467 54static void begin_schedule_ready (rtx_insn *);
60b8c5b3 55static int schedule_more_p (void);
b24ef467 56static const char *ebb_print_insn (const rtx_insn *, int);
57static int rank (rtx_insn *, rtx_insn *);
58static int ebb_contributes_to_priority (rtx_insn *, rtx_insn *);
60b8c5b3 59static basic_block earliest_block_with_similiar_load (basic_block, rtx);
43ecfeb5 60static void add_deps_for_risky_insns (rtx_insn *, rtx_insn *);
73e15687 61static void debug_ebb_dependencies (rtx_insn *, rtx_insn *);
6a1cdb4d 62
b24ef467 63static void ebb_add_remove_insn (rtx_insn *, int);
e1ab7874 64static void ebb_add_block (basic_block, basic_block);
b24ef467 65static basic_block advance_target_bb (basic_block, rtx_insn *);
e1ab7874 66static void ebb_fix_recovery_cfg (int, int, int);
6a1cdb4d 67
e2f4a6ff 68/* Allocate memory and store the state of the frontend. Return the allocated
69 memory. */
70static void *
71save_ebb_state (void)
72{
73 int *p = XNEW (int);
74 *p = sched_rgn_n_insns;
75 return p;
76}
77
78/* Restore the state of the frontend from P_, then free it. */
79static void
80restore_ebb_state (void *p_)
81{
82 int *p = (int *)p_;
83 sched_rgn_n_insns = *p;
84 free (p_);
85}
86
d6141c0c 87/* Return nonzero if there are more insns that should be scheduled. */
88
89static int
60b8c5b3 90schedule_more_p (void)
d6141c0c 91{
e1ab7874 92 return sched_rgn_n_insns < rgn_n_insns;
d6141c0c 93}
94
a2819fc2 95/* Print dependency information about ebb between HEAD and TAIL. */
96static void
73e15687 97debug_ebb_dependencies (rtx_insn *head, rtx_insn *tail)
a2819fc2 98{
99 fprintf (sched_dump,
100 ";; --------------- forward dependences: ------------ \n");
101
102 fprintf (sched_dump, "\n;; --- EBB Dependences --- from bb%d to bb%d \n",
103 BLOCK_NUM (head), BLOCK_NUM (tail));
104
105 debug_dependencies (head, tail);
106}
107
d6141c0c 108/* Add all insns that are initially ready to the ready list READY. Called
109 once before scheduling a set of insns. */
110
111static void
e4897000 112init_ready_list (void)
d6141c0c 113{
6a1cdb4d 114 int n = 0;
4cd001d5 115 rtx_insn *prev_head = current_sched_info->prev_head;
116 rtx_insn *next_tail = current_sched_info->next_tail;
b24ef467 117 rtx_insn *insn;
d6141c0c 118
e1ab7874 119 sched_rgn_n_insns = 0;
d6141c0c 120
d6141c0c 121 /* Print debugging information. */
122 if (sched_verbose >= 5)
a2819fc2 123 debug_ebb_dependencies (NEXT_INSN (prev_head), PREV_INSN (next_tail));
d6141c0c 124
125 /* Initialize ready list with all 'ready' insns in target block.
126 Count number of insns in the target block being scheduled. */
127 for (insn = NEXT_INSN (prev_head); insn != next_tail; insn = NEXT_INSN (insn))
128 {
e4897000 129 try_ready (insn);
6a1cdb4d 130 n++;
d6141c0c 131 }
d6141c0c 132
e1ab7874 133 gcc_assert (n == rgn_n_insns);
6a1cdb4d 134}
d6141c0c 135
6a1cdb4d 136/* INSN is being scheduled after LAST. Update counters. */
137static void
b24ef467 138begin_schedule_ready (rtx_insn *insn ATTRIBUTE_UNUSED)
d6141c0c 139{
e1ab7874 140 sched_rgn_n_insns++;
d2412f57 141}
6a1cdb4d 142
d2412f57 143/* INSN is being moved to its place in the schedule, after LAST. */
144static void
b24ef467 145begin_move_insn (rtx_insn *insn, rtx_insn *last)
d2412f57 146{
6a1cdb4d 147 if (BLOCK_FOR_INSN (insn) == last_bb
148 /* INSN is a jump in the last block, ... */
149 && control_flow_insn_p (insn)
150 /* that is going to be moved over some instructions. */
151 && last != PREV_INSN (insn))
152 {
153 edge e;
6a1cdb4d 154 basic_block bb;
155
156 /* An obscure special case, where we do have partially dead
157 instruction scheduled after last control flow instruction.
158 In this case we can create new basic block. It is
159 always exactly one basic block last in the sequence. */
48e1416a 160
7f58c05e 161 e = find_fallthru_edge (last_bb->succs);
6a1cdb4d 162
1b4345f7 163 gcc_checking_assert (!e || !(e->flags & EDGE_COMPLEX));
6a1cdb4d 164
1b4345f7 165 gcc_checking_assert (BLOCK_FOR_INSN (insn) == last_bb
166 && !IS_SPECULATION_CHECK_P (insn)
167 && BB_HEAD (last_bb) != insn
168 && BB_END (last_bb) == insn);
6a1cdb4d 169
170 {
9ed997be 171 rtx_insn *x = NEXT_INSN (insn);
6a1cdb4d 172 if (e)
1b4345f7 173 gcc_checking_assert (NOTE_P (x) || LABEL_P (x));
6a1cdb4d 174 else
1b4345f7 175 gcc_checking_assert (BARRIER_P (x));
6a1cdb4d 176 }
6a1cdb4d 177
178 if (e)
179 {
180 bb = split_edge (e);
181 gcc_assert (NOTE_INSN_BASIC_BLOCK_P (BB_END (bb)));
182 }
183 else
e6428cd5 184 {
185 /* Create an empty unreachable block after the INSN. */
4cd001d5 186 rtx_insn *next = NEXT_INSN (insn);
e6428cd5 187 if (next && BARRIER_P (next))
188 next = NEXT_INSN (next);
189 bb = create_basic_block (next, NULL_RTX, last_bb);
190 }
48e1416a 191
6a1cdb4d 192 /* split_edge () creates BB before E->DEST. Keep in mind, that
193 this operation extends scheduling region till the end of BB.
194 Hence, we need to shift NEXT_TAIL, so haifa-sched.c won't go out
195 of the scheduling region. */
196 current_sched_info->next_tail = NEXT_INSN (BB_END (bb));
197 gcc_assert (current_sched_info->next_tail);
198
e1ab7874 199 /* Append new basic block to the end of the ebb. */
200 sched_init_only_bb (bb, last_bb);
6a1cdb4d 201 gcc_assert (last_bb == bb);
202 }
d6141c0c 203}
204
d6141c0c 205/* Return a string that contains the insn uid and optionally anything else
206 necessary to identify this insn in an output. It's valid to use a
207 static buffer for this. The ALIGNED parameter should cause the string
208 to be formatted so that multiple output lines will line up nicely. */
209
210static const char *
b24ef467 211ebb_print_insn (const rtx_insn *insn, int aligned ATTRIBUTE_UNUSED)
d6141c0c 212{
213 static char tmp[80];
214
e1ab7874 215 /* '+' before insn means it is a new cycle start. */
216 if (GET_MODE (insn) == TImode)
217 sprintf (tmp, "+ %4d", INSN_UID (insn));
218 else
219 sprintf (tmp, " %4d", INSN_UID (insn));
220
d6141c0c 221 return tmp;
222}
223
224/* Compare priority of two insns. Return a positive number if the second
225 insn is to be preferred for scheduling, and a negative one if the first
226 is to be preferred. Zero if they are equally good. */
227
228static int
b24ef467 229rank (rtx_insn *insn1, rtx_insn *insn2)
d6141c0c 230{
505f406c 231 basic_block bb1 = BLOCK_FOR_INSN (insn1);
232 basic_block bb2 = BLOCK_FOR_INSN (insn2);
233
205ce1aa 234 if (bb1->count > bb2->count)
505f406c 235 return -1;
205ce1aa 236 if (bb1->count < bb2->count)
505f406c 237 return 1;
d6141c0c 238 return 0;
239}
240
241/* NEXT is an instruction that depends on INSN (a backward dependence);
242 return nonzero if we should include this dependence in priority
243 calculations. */
244
245static int
b24ef467 246ebb_contributes_to_priority (rtx_insn *next ATTRIBUTE_UNUSED,
247 rtx_insn *insn ATTRIBUTE_UNUSED)
d6141c0c 248{
249 return 1;
250}
251
6aed13f1 252 /* INSN is a JUMP_INSN. Store the set of registers that
253 must be considered as used by this jump in USED. */
d6141c0c 254
e1ab7874 255void
6aed13f1 256ebb_compute_jump_reg_dependencies (rtx insn, regset used)
d6141c0c 257{
258 basic_block b = BLOCK_FOR_INSN (insn);
259 edge e;
cd665a06 260 edge_iterator ei;
261
262 FOR_EACH_EDGE (e, ei, b->succs)
6aed13f1 263 if ((e->flags & EDGE_FALLTHRU) == 0)
deb2741b 264 bitmap_ior_into (used, df_get_live_in (e->dest));
d6141c0c 265}
266
267/* Used in schedule_insns to initialize current_sched_info for scheduling
268 regions (or single basic blocks). */
269
e1ab7874 270static struct common_sched_info_def ebb_common_sched_info;
271
272static struct sched_deps_info_def ebb_sched_deps_info =
273 {
274 ebb_compute_jump_reg_dependencies,
275 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
276 NULL,
277 1, 0, 0
278 };
279
280static struct haifa_sched_info ebb_sched_info =
d6141c0c 281{
282 init_ready_list,
6a1cdb4d 283 NULL,
d6141c0c 284 schedule_more_p,
e4897000 285 NULL,
d6141c0c 286 rank,
0bc18d66 287 ebb_print_insn,
e1ab7874 288 ebb_contributes_to_priority,
4db82bc9 289 NULL, /* insn_finishes_block_p */
d6141c0c 290
291 NULL, NULL,
292 NULL, NULL,
e1ab7874 293 1, 0,
4d64d9a4 294
e1ab7874 295 ebb_add_remove_insn,
6a1cdb4d 296 begin_schedule_ready,
d2412f57 297 begin_move_insn,
6a1cdb4d 298 advance_target_bb,
e2f4a6ff 299
300 save_ebb_state,
301 restore_ebb_state,
302
3072d30e 303 SCHED_EBB
304 /* We can create new blocks in begin_schedule_ready (). */
305 | NEW_BBS
d6141c0c 306};
307\f
9b7c6f02 308/* Returns the earliest block in EBB currently being processed where a
309 "similar load" 'insn2' is found, and hence LOAD_INSN can move
310 speculatively into the found block. All the following must hold:
311
312 (1) both loads have 1 base register (PFREE_CANDIDATEs).
313 (2) load_insn and load2 have a def-use dependence upon
314 the same insn 'insn1'.
315
316 From all these we can conclude that the two loads access memory
317 addresses that differ at most by a constant, and hence if moving
318 load_insn would cause an exception, it would have been caused by
319 load2 anyhow.
320
321 The function uses list (given by LAST_BLOCK) of already processed
322 blocks in EBB. The list is formed in `add_deps_for_risky_insns'. */
323
324static basic_block
60b8c5b3 325earliest_block_with_similiar_load (basic_block last_block, rtx load_insn)
9b7c6f02 326{
93f6b030 327 sd_iterator_def back_sd_it;
328 dep_t back_dep;
9b7c6f02 329 basic_block bb, earliest_block = NULL;
330
93f6b030 331 FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
9b7c6f02 332 {
43ecfeb5 333 rtx_insn *insn1 = DEP_PRO (back_dep);
9b7c6f02 334
48e1416a 335 if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
93f6b030 336 /* Found a DEF-USE dependence (insn1, load_insn). */
9b7c6f02 337 {
93f6b030 338 sd_iterator_def fore_sd_it;
339 dep_t fore_dep;
9b7c6f02 340
93f6b030 341 FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
9b7c6f02 342 {
43ecfeb5 343 rtx_insn *insn2 = DEP_CON (fore_dep);
9b7c6f02 344 basic_block insn2_block = BLOCK_FOR_INSN (insn2);
345
93f6b030 346 if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
9b7c6f02 347 {
348 if (earliest_block != NULL
349 && earliest_block->index < insn2_block->index)
350 continue;
351
352 /* Found a DEF-USE dependence (insn1, insn2). */
353 if (haifa_classify_insn (insn2) != PFREE_CANDIDATE)
354 /* insn2 not guaranteed to be a 1 base reg load. */
355 continue;
60b8c5b3 356
f7f3687c 357 for (bb = last_block; bb; bb = (basic_block) bb->aux)
9b7c6f02 358 if (insn2_block == bb)
359 break;
360
361 if (!bb)
362 /* insn2 is the similar load. */
363 earliest_block = insn2_block;
364 }
365 }
366 }
367 }
368
369 return earliest_block;
370}
371
917bbcab 372/* The following function adds dependencies between jumps and risky
9b7c6f02 373 insns in given ebb. */
374
375static void
43ecfeb5 376add_deps_for_risky_insns (rtx_insn *head, rtx_insn *tail)
9b7c6f02 377{
43ecfeb5 378 rtx_insn *insn, *prev;
47cfb7f4 379 int classification;
43ecfeb5 380 rtx_insn *last_jump = NULL;
381 rtx_insn *next_tail = NEXT_INSN (tail);
9b7c6f02 382 basic_block last_block = NULL, bb;
60b8c5b3 383
9b7c6f02 384 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
e2f4a6ff 385 {
386 add_delay_dependencies (insn);
387 if (control_flow_insn_p (insn))
388 {
389 bb = BLOCK_FOR_INSN (insn);
390 bb->aux = last_block;
391 last_block = bb;
902ef38a 392 /* Ensure blocks stay in the same order. */
393 if (last_jump)
394 add_dependence (insn, last_jump, REG_DEP_ANTI);
e2f4a6ff 395 last_jump = insn;
396 }
397 else if (INSN_P (insn) && last_jump != NULL_RTX)
398 {
399 classification = haifa_classify_insn (insn);
400 prev = last_jump;
401
402 switch (classification)
403 {
404 case PFREE_CANDIDATE:
405 if (flag_schedule_speculative_load)
406 {
407 bb = earliest_block_with_similiar_load (last_block, insn);
408 if (bb)
409 {
410 bb = (basic_block) bb->aux;
411 if (!bb)
412 break;
413 prev = BB_END (bb);
414 }
415 }
416 /* Fall through. */
417 case TRAP_RISKY:
418 case IRISKY:
419 case PRISKY_CANDIDATE:
420 /* ??? We could implement better checking PRISKY_CANDIDATEs
421 analogous to sched-rgn.c. */
f4d3c071 422 /* We cannot change the mode of the backward
e2f4a6ff 423 dependency because REG_DEP_ANTI has the lowest
424 rank. */
425 if (! sched_insns_conditions_mutex_p (insn, prev))
426 {
effd1640 427 if ((current_sched_info->flags & DO_SPECULATION)
428 && (spec_info->mask & BEGIN_CONTROL))
e2f4a6ff 429 {
effd1640 430 dep_def _dep, *dep = &_dep;
e2f4a6ff 431
effd1640 432 init_dep (dep, prev, insn, REG_DEP_ANTI);
e2f4a6ff 433
effd1640 434 if (current_sched_info->flags & USE_DEPS_LIST)
435 {
436 DEP_STATUS (dep) = set_dep_weak (DEP_ANTI, BEGIN_CONTROL,
437 MAX_DEP_WEAK);
e2f4a6ff 438
effd1640 439 }
e2f4a6ff 440 sd_add_or_update_dep (dep, false);
e2f4a6ff 441 }
effd1640 442 else
443 add_dependence (insn, prev, REG_DEP_CONTROL);
e2f4a6ff 444 }
445
446 break;
447
448 default:
449 break;
450 }
451 }
452 }
9b7c6f02 453 /* Maintain the invariant that bb->aux is clear after use. */
454 while (last_block)
455 {
f7f3687c 456 bb = (basic_block) last_block->aux;
9b7c6f02 457 last_block->aux = NULL;
458 last_block = bb;
459 }
460}
461
b0f8644a 462/* Schedule a single extended basic block, defined by the boundaries
463 HEAD and TAIL.
d6141c0c 464
67cf9b55 465 We change our expectations about scheduler behavior depending on
b0f8644a 466 whether MODULO_SCHEDULING is true. If it is, we expect that the
467 caller has already called set_modulo_params and created delay pairs
468 as appropriate. If the modulo schedule failed, we return
469 NULL_RTX. */
470
471basic_block
43ecfeb5 472schedule_ebb (rtx_insn *head, rtx_insn *tail, bool modulo_scheduling)
d6141c0c 473{
6a1cdb4d 474 basic_block first_bb, target_bb;
2e966e2a 475 class deps_desc tmp_deps;
b0f8644a 476 bool success;
477
478 /* Blah. We should fix the rest of the code not to get confused by
479 a note or two. */
480 while (head != tail)
481 {
482 if (NOTE_P (head) || DEBUG_INSN_P (head))
483 head = NEXT_INSN (head);
484 else if (NOTE_P (tail) || DEBUG_INSN_P (tail))
485 tail = PREV_INSN (tail);
486 else if (LABEL_P (head))
487 head = NEXT_INSN (head);
488 else
489 break;
490 }
48e1416a 491
6a1cdb4d 492 first_bb = BLOCK_FOR_INSN (head);
493 last_bb = BLOCK_FOR_INSN (tail);
d6141c0c 494
495 if (no_real_insns_p (head, tail))
505f406c 496 return BLOCK_FOR_INSN (tail);
d6141c0c 497
6a1cdb4d 498 gcc_assert (INSN_P (head) && INSN_P (tail));
499
500 if (!bitmap_bit_p (&dont_calc_deps, first_bb->index))
501 {
502 init_deps_global ();
d6141c0c 503
93f6b030 504 /* Compute dependencies. */
d9ab2038 505 init_deps (&tmp_deps, false);
6a1cdb4d 506 sched_analyze (&tmp_deps, head, tail);
507 free_deps (&tmp_deps);
d6141c0c 508
6a1cdb4d 509 add_deps_for_risky_insns (head, tail);
9b7c6f02 510
6a1cdb4d 511 if (targetm.sched.dependencies_evaluation_hook)
512 targetm.sched.dependencies_evaluation_hook (head, tail);
513
514 finish_deps_global ();
515 }
516 else
517 /* Only recovery blocks can have their dependencies already calculated,
48e1416a 518 and they always are single block ebbs. */
6a1cdb4d 519 gcc_assert (first_bb == last_bb);
58ada791 520
d6141c0c 521 /* Set priorities. */
e4897000 522 current_sched_info->sched_max_insns_priority = 0;
e1ab7874 523 rgn_n_insns = set_priorities (head, tail);
e4897000 524 current_sched_info->sched_max_insns_priority++;
d6141c0c 525
526 current_sched_info->prev_head = PREV_INSN (head);
527 current_sched_info->next_tail = NEXT_INSN (tail);
528
e1ab7874 529 remove_notes (head, tail);
d6141c0c 530
6a1cdb4d 531 unlink_bb_notes (first_bb, last_bb);
532
6a1cdb4d 533 target_bb = first_bb;
e1ab7874 534
535 /* Make ready list big enough to hold all the instructions from the ebb. */
536 sched_extend_ready_list (rgn_n_insns);
0a15667c 537 success = schedule_block (&target_bb, NULL);
b0f8644a 538 gcc_assert (success || modulo_scheduling);
539
e1ab7874 540 /* Free ready list. */
541 sched_finish_ready_list ();
d6141c0c 542
6a1cdb4d 543 /* We might pack all instructions into fewer blocks,
544 so we may made some of them empty. Can't assert (b == last_bb). */
48e1416a 545
d6141c0c 546 /* Sanity check: verify that all region insns were scheduled. */
b0f8644a 547 gcc_assert (modulo_scheduling || sched_rgn_n_insns == rgn_n_insns);
93f6b030 548
549 /* Free dependencies. */
550 sched_free_deps (current_sched_info->head, current_sched_info->tail, true);
551
552 gcc_assert (haifa_recovery_bb_ever_added_p
553 || deps_pools_are_empty_p ());
d6141c0c 554
6a1cdb4d 555 if (EDGE_COUNT (last_bb->preds) == 0)
556 /* LAST_BB is unreachable. */
557 {
558 gcc_assert (first_bb != last_bb
559 && EDGE_COUNT (last_bb->succs) == 0);
560 last_bb = last_bb->prev_bb;
561 delete_basic_block (last_bb->next_bb);
562 }
563
b0f8644a 564 return success ? last_bb : NULL;
d6141c0c 565}
566
b0f8644a 567/* Perform initializations before running schedule_ebbs or a single
568 schedule_ebb. */
d6141c0c 569void
b0f8644a 570schedule_ebbs_init (void)
d6141c0c 571{
e1ab7874 572 /* Setup infos. */
573 {
574 memcpy (&ebb_common_sched_info, &haifa_common_sched_info,
575 sizeof (ebb_common_sched_info));
576
577 ebb_common_sched_info.fix_recovery_cfg = ebb_fix_recovery_cfg;
578 ebb_common_sched_info.add_block = ebb_add_block;
579 ebb_common_sched_info.sched_pass_id = SCHED_EBB_PASS;
580
581 common_sched_info = &ebb_common_sched_info;
582 sched_deps_info = &ebb_sched_deps_info;
583 current_sched_info = &ebb_sched_info;
584 }
d6141c0c 585
e1ab7874 586 haifa_sched_init ();
4d64d9a4 587
f23d9a22 588 compute_bb_for_insn ();
d6141c0c 589
6a1cdb4d 590 /* Initialize DONT_CALC_DEPS and ebb-{start, end} markers. */
6e6e5c14 591 bitmap_initialize (&dont_calc_deps, &bitmap_default_obstack);
b0f8644a 592}
593
594/* Perform cleanups after scheduling using schedules_ebbs or schedule_ebb. */
595void
596schedule_ebbs_finish (void)
597{
6e6e5c14 598 bitmap_release (&dont_calc_deps);
b0f8644a 599
600 /* Reposition the prologue and epilogue notes in case we moved the
601 prologue/epilogue insns. */
602 if (reload_completed)
603 reposition_prologue_and_epilogue_notes ();
604
605 haifa_sched_finish ();
606}
607
608/* The main entry point in this file. */
609
610void
611schedule_ebbs (void)
612{
613 basic_block bb;
614 int probability_cutoff;
43ecfeb5 615 rtx_insn *tail;
b0f8644a 616
617 /* Taking care of this degenerate case makes the rest of
618 this code simpler. */
a28770e1 619 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
b0f8644a 620 return;
621
a74a34e6 622 if (profile_info && profile_status_for_fn (cfun) == PROFILE_READ)
b0f8644a 623 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY_FEEDBACK);
624 else
625 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY);
626 probability_cutoff = REG_BR_PROB_BASE / 100 * probability_cutoff;
627
628 schedule_ebbs_init ();
6a1cdb4d 629
d6141c0c 630 /* Schedule every region in the subroutine. */
fc00614f 631 FOR_EACH_BB_FN (bb, cfun)
b3d6de89 632 {
43ecfeb5 633 rtx_insn *head = BB_HEAD (bb);
d6141c0c 634
f193badd 635 if (bb->flags & BB_DISABLE_SCHEDULE)
636 continue;
637
d6141c0c 638 for (;;)
639 {
d6141c0c 640 edge e;
5496dbfc 641 tail = BB_END (bb);
34154e27 642 if (bb->next_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
6d7dc5b9 643 || LABEL_P (BB_HEAD (bb->next_bb)))
d6141c0c 644 break;
7f58c05e 645 e = find_fallthru_edge (bb->succs);
d6141c0c 646 if (! e)
647 break;
720cfc43 648 if (e->probability.initialized_p ()
649 && e->probability.to_reg_br_prob_base () <= probability_cutoff)
505f406c 650 break;
f193badd 651 if (e->dest->flags & BB_DISABLE_SCHEDULE)
652 break;
4c26117a 653 bb = bb->next_bb;
d6141c0c 654 }
655
b0f8644a 656 bb = schedule_ebb (head, tail, false);
d6141c0c 657 }
b0f8644a 658 schedule_ebbs_finish ();
d6141c0c 659}
6a1cdb4d 660
661/* INSN has been added to/removed from current ebb. */
662static void
b24ef467 663ebb_add_remove_insn (rtx_insn *insn ATTRIBUTE_UNUSED, int remove_p)
6a1cdb4d 664{
665 if (!remove_p)
e1ab7874 666 rgn_n_insns++;
6a1cdb4d 667 else
e1ab7874 668 rgn_n_insns--;
6a1cdb4d 669}
670
671/* BB was added to ebb after AFTER. */
672static void
e1ab7874 673ebb_add_block (basic_block bb, basic_block after)
6a1cdb4d 674{
48e1416a 675 /* Recovery blocks are always bounded by BARRIERS,
6a1cdb4d 676 therefore, they always form single block EBB,
677 therefore, we can use rec->index to identify such EBBs. */
34154e27 678 if (after == EXIT_BLOCK_PTR_FOR_FN (cfun))
6a1cdb4d 679 bitmap_set_bit (&dont_calc_deps, bb->index);
680 else if (after == last_bb)
681 last_bb = bb;
682}
683
684/* Return next block in ebb chain. For parameter meaning please refer to
685 sched-int.h: struct sched_info: advance_target_bb. */
686static basic_block
b24ef467 687advance_target_bb (basic_block bb, rtx_insn *insn)
6a1cdb4d 688{
689 if (insn)
690 {
691 if (BLOCK_FOR_INSN (insn) != bb
692 && control_flow_insn_p (insn)
2521f35f 693 /* We handle interblock movement of the speculation check
694 or over a speculation check in
695 haifa-sched.c: move_block_after_check (). */
696 && !IS_SPECULATION_BRANCHY_CHECK_P (insn)
697 && !IS_SPECULATION_BRANCHY_CHECK_P (BB_END (bb)))
6a1cdb4d 698 {
2521f35f 699 /* Assert that we don't move jumps across blocks. */
6a1cdb4d 700 gcc_assert (!control_flow_insn_p (BB_END (bb))
701 && NOTE_INSN_BASIC_BLOCK_P (BB_HEAD (bb->next_bb)));
702 return bb;
703 }
704 else
705 return 0;
706 }
6a1cdb4d 707 else
6fcfdb19 708 /* Return next non empty block. */
709 {
710 do
711 {
712 gcc_assert (bb != last_bb);
713
714 bb = bb->next_bb;
715 }
716 while (bb_note (bb) == BB_END (bb));
717
718 return bb;
719 }
6a1cdb4d 720}
721
722/* Fix internal data after interblock movement of jump instruction.
723 For parameter meaning please refer to
724 sched-int.h: struct sched_info: fix_recovery_cfg. */
725static void
e1ab7874 726ebb_fix_recovery_cfg (int bbi ATTRIBUTE_UNUSED, int jump_bbi,
727 int jump_bb_nexti)
6a1cdb4d 728{
729 gcc_assert (last_bb->index != bbi);
730
731 if (jump_bb_nexti == last_bb->index)
f5a6b05f 732 last_bb = BASIC_BLOCK_FOR_FN (cfun, jump_bbi);
6a1cdb4d 733}
db982eeb 734
735#endif /* INSN_SCHEDULING */