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This patch rewrites the old VEC macro-based interface into a new one
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c2069298 1/* Instruction scheduling pass. This file contains definitions used
2 internally in the scheduler.
3072d30e 3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
7cf0dbf3 4 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
0b09525f 5 Free Software Foundation, Inc.
c2069298 6
f12b58b3 7This file is part of GCC.
c2069298 8
f12b58b3 9GCC is free software; you can redistribute it and/or modify it under
10the terms of the GNU General Public License as published by the Free
8c4c00c1 11Software Foundation; either version 3, or (at your option) any later
f12b58b3 12version.
c2069298 13
f12b58b3 14GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15WARRANTY; without even the implied warranty of MERCHANTABILITY or
c2069298 16FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17for more details.
18
19You should have received a copy of the GNU General Public License
8c4c00c1 20along with GCC; see the file COPYING3. If not see
21<http://www.gnu.org/licenses/>. */
c2069298 22
bcf3c70d 23#ifndef GCC_SCHED_INT_H
24#define GCC_SCHED_INT_H
25
db982eeb 26#ifdef INSN_SCHEDULING
27
bcf3c70d 28/* For state_t. */
29#include "insn-attr.h"
3072d30e 30#include "df.h"
e1ab7874 31#include "basic-block.h"
32
e1ab7874 33/* Identificator of a scheduler pass. */
34enum sched_pass_id_t { SCHED_PASS_UNKNOWN, SCHED_RGN_PASS, SCHED_EBB_PASS,
35 SCHED_SMS_PASS, SCHED_SEL_PASS };
36
d86dbf92 37/* The algorithm used to implement -fsched-pressure. */
38enum sched_pressure_algorithm
39{
40 SCHED_PRESSURE_NONE,
41 SCHED_PRESSURE_WEIGHTED,
42 SCHED_PRESSURE_MODEL
43};
44
f1f41a6c 45typedef vec<basic_block> bb_vec_t;
46typedef vec<rtx> insn_vec_t;
47typedef vec<rtx> rtx_vec_t;
e1ab7874 48
49extern void sched_init_bbs (void);
50
52d7e28c 51extern void sched_extend_luids (void);
52extern void sched_init_insn_luid (rtx);
53extern void sched_init_luids (bb_vec_t);
e1ab7874 54extern void sched_finish_luids (void);
55
56extern void sched_extend_target (void);
57
52d7e28c 58extern void haifa_init_h_i_d (bb_vec_t);
e1ab7874 59extern void haifa_finish_h_i_d (void);
60
61/* Hooks that are common to all the schedulers. */
62struct common_sched_info_def
63{
64 /* Called after blocks were rearranged due to movement of jump instruction.
65 The first parameter - index of basic block, in which jump currently is.
66 The second parameter - index of basic block, in which jump used
67 to be.
68 The third parameter - index of basic block, that follows the second
69 parameter. */
70 void (*fix_recovery_cfg) (int, int, int);
71
72 /* Called to notify frontend, that new basic block is being added.
73 The first parameter - new basic block.
74 The second parameter - block, after which new basic block is being added,
75 or EXIT_BLOCK_PTR, if recovery block is being added,
76 or NULL, if standalone block is being added. */
77 void (*add_block) (basic_block, basic_block);
78
79 /* Estimate number of insns in the basic block. */
80 int (*estimate_number_of_insns) (basic_block);
81
82 /* Given a non-insn (!INSN_P (x)) return
83 -1 - if this rtx don't need a luid.
84 0 - if it should have the same luid as the previous insn.
85 1 - if it needs a separate luid. */
86 int (*luid_for_non_insn) (rtx);
87
88 /* Scheduler pass identifier. It is preferably used in assertions. */
89 enum sched_pass_id_t sched_pass_id;
90};
91
92extern struct common_sched_info_def *common_sched_info;
93
94extern const struct common_sched_info_def haifa_common_sched_info;
95
96/* Return true if selective scheduling pass is working. */
97static inline bool
98sel_sched_p (void)
99{
100 return common_sched_info->sched_pass_id == SCHED_SEL_PASS;
101}
102
103/* Returns maximum priority that an insn was assigned to. */
104extern int get_rgn_sched_max_insns_priority (void);
105
106/* Increases effective priority for INSN by AMOUNT. */
107extern void sel_add_to_insn_priority (rtx, int);
108
109/* True if during selective scheduling we need to emulate some of haifa
110 scheduler behaviour. */
111extern int sched_emulate_haifa_p;
112
113/* Mapping from INSN_UID to INSN_LUID. In the end all other per insn data
114 structures should be indexed by luid. */
f1f41a6c 115extern vec<int> sched_luids;
116#define INSN_LUID(INSN) (sched_luids[INSN_UID (INSN)])
117#define LUID_BY_UID(UID) (sched_luids[UID])
e1ab7874 118
119#define SET_INSN_LUID(INSN, LUID) \
f1f41a6c 120(sched_luids[INSN_UID (INSN)] = (LUID))
e1ab7874 121
122/* The highest INSN_LUID. */
123extern int sched_max_luid;
124
125extern int insn_luid (rtx);
126
127/* This list holds ripped off notes from the current block. These notes will
128 be attached to the beginning of the block when its scheduling is
129 finished. */
130extern rtx note_list;
131
132extern void remove_notes (rtx, rtx);
133extern rtx restore_other_notes (rtx, basic_block);
134extern void sched_insns_init (rtx);
135extern void sched_insns_finish (void);
136
137extern void *xrecalloc (void *, size_t, size_t, size_t);
e1ab7874 138
139extern void reemit_notes (rtx);
140
e1ab7874 141/* Functions in haifa-sched.c. */
142extern int haifa_classify_insn (const_rtx);
143
144/* Functions in sel-sched-ir.c. */
145extern void sel_find_rgns (void);
146extern void sel_mark_hard_insn (rtx);
147
148extern size_t dfa_state_size;
149
150extern void advance_state (state_t);
151
152extern void setup_sched_dump (void);
153extern void sched_init (void);
154extern void sched_finish (void);
155
156extern bool sel_insn_is_speculation_check (rtx);
157
158/* Describe the ready list of the scheduler.
159 VEC holds space enough for all insns in the current region. VECLEN
160 says how many exactly.
161 FIRST is the index of the element with the highest priority; i.e. the
162 last one in the ready list, since elements are ordered by ascending
163 priority.
9845d120 164 N_READY determines how many insns are on the ready list.
165 N_DEBUG determines how many debug insns are on the ready list. */
e1ab7874 166struct ready_list
167{
168 rtx *vec;
169 int veclen;
170 int first;
171 int n_ready;
9845d120 172 int n_debug;
e1ab7874 173};
174
175extern char *ready_try;
176extern struct ready_list ready;
177
44ad1e56 178extern int max_issue (struct ready_list *, int, state_t, bool, int *);
e1ab7874 179
6aed13f1 180extern void ebb_compute_jump_reg_dependencies (rtx, regset);
e1ab7874 181
7f58c05e 182extern edge find_fallthru_edge_from (basic_block);
e1ab7874 183
184extern void (* sched_init_only_bb) (basic_block, basic_block);
185extern basic_block (* sched_split_block) (basic_block, rtx);
186extern basic_block sched_split_block_1 (basic_block, rtx);
187extern basic_block (* sched_create_empty_bb) (basic_block);
188extern basic_block sched_create_empty_bb_1 (basic_block);
189
190extern basic_block sched_create_recovery_block (basic_block *);
191extern void sched_create_recovery_edges (basic_block, basic_block,
192 basic_block);
bcf3c70d 193
bea4bad2 194/* Pointer to data describing the current DFA state. */
195extern state_t curr_state;
196
4dc5882f 197/* Type to represent status of a dependence. */
198typedef int ds_t;
4d64d9a4 199
200/* Type to represent weakness of speculative dependence. */
201typedef int dw_t;
202
9997bd27 203extern enum reg_note ds_to_dk (ds_t);
204extern ds_t dk_to_ds (enum reg_note);
205
d452a169 206/* Describe a dependency that can be broken by making a replacement
207 in one of the patterns. LOC is the location, ORIG and NEWVAL the
208 two alternative contents, and INSN the instruction that must be
209 changed. */
210struct dep_replacement
211{
212 rtx *loc;
213 rtx orig;
214 rtx newval;
215 rtx insn;
216};
217
9997bd27 218/* Information about the dependency. */
219struct _dep
220{
221 /* Producer. */
222 rtx pro;
223
224 /* Consumer. */
225 rtx con;
226
d452a169 227 /* If nonnull, holds a pointer to information about how to break the
228 dependency by making a replacement in one of the insns. There is
229 only one such dependency for each insn that must be modified in
230 order to break such a dependency. */
231 struct dep_replacement *replace;
9997bd27 232
233 /* Dependency status. This field holds all dependency types and additional
234 information for speculative dependencies. */
235 ds_t status;
38354bb6 236
d452a169 237 /* Dependency major type. This field is superseded by STATUS above.
238 Though, it is still in place because some targets use it. */
239 ENUM_BITFIELD(reg_note) type:6;
240
241 unsigned nonreg:1;
242 unsigned multiple:1;
243
244 /* Cached cost of the dependency. Make sure to update UNKNOWN_DEP_COST
245 when changing the size of this field. */
246 int cost:20;
9997bd27 247};
93f6b030 248
d452a169 249#define UNKNOWN_DEP_COST (-1<<19)
250
93f6b030 251typedef struct _dep dep_def;
252typedef dep_def *dep_t;
9997bd27 253
254#define DEP_PRO(D) ((D)->pro)
255#define DEP_CON(D) ((D)->con)
93f6b030 256#define DEP_TYPE(D) ((D)->type)
9997bd27 257#define DEP_STATUS(D) ((D)->status)
38354bb6 258#define DEP_COST(D) ((D)->cost)
d452a169 259#define DEP_NONREG(D) ((D)->nonreg)
260#define DEP_MULTIPLE(D) ((D)->multiple)
261#define DEP_REPLACE(D) ((D)->replace)
9997bd27 262
263/* Functions to work with dep. */
264
93f6b030 265extern void init_dep_1 (dep_t, rtx, rtx, enum reg_note, ds_t);
9997bd27 266extern void init_dep (dep_t, rtx, rtx, enum reg_note);
267
93f6b030 268extern void sd_debug_dep (dep_t);
269
9997bd27 270/* Definition of this struct resides below. */
271struct _dep_node;
93f6b030 272typedef struct _dep_node *dep_node_t;
9997bd27 273
274/* A link in the dependency list. This is essentially an equivalent of a
275 single {INSN, DEPS}_LIST rtx. */
276struct _dep_link
277{
278 /* Dep node with all the data. */
93f6b030 279 dep_node_t node;
9997bd27 280
281 /* Next link in the list. For the last one it is NULL. */
282 struct _dep_link *next;
283
284 /* Pointer to the next field of the previous link in the list.
285 For the first link this points to the deps_list->first.
286
287 With help of this field it is easy to remove and insert links to the
288 list. */
289 struct _dep_link **prev_nextp;
290};
291typedef struct _dep_link *dep_link_t;
292
293#define DEP_LINK_NODE(N) ((N)->node)
294#define DEP_LINK_NEXT(N) ((N)->next)
295#define DEP_LINK_PREV_NEXTP(N) ((N)->prev_nextp)
296
297/* Macros to work dep_link. For most usecases only part of the dependency
298 information is need. These macros conveniently provide that piece of
299 information. */
300
301#define DEP_LINK_DEP(N) (DEP_NODE_DEP (DEP_LINK_NODE (N)))
302#define DEP_LINK_PRO(N) (DEP_PRO (DEP_LINK_DEP (N)))
303#define DEP_LINK_CON(N) (DEP_CON (DEP_LINK_DEP (N)))
93f6b030 304#define DEP_LINK_TYPE(N) (DEP_TYPE (DEP_LINK_DEP (N)))
9997bd27 305#define DEP_LINK_STATUS(N) (DEP_STATUS (DEP_LINK_DEP (N)))
306
3072d30e 307/* A list of dep_links. */
9997bd27 308struct _deps_list
309{
93f6b030 310 /* First element. */
9997bd27 311 dep_link_t first;
93f6b030 312
313 /* Total number of elements in the list. */
314 int n_links;
9997bd27 315};
316typedef struct _deps_list *deps_list_t;
317
318#define DEPS_LIST_FIRST(L) ((L)->first)
93f6b030 319#define DEPS_LIST_N_LINKS(L) ((L)->n_links)
9997bd27 320
f2b32076 321/* Suppose we have a dependence Y between insn pro1 and con1, where pro1 has
322 additional dependents con0 and con2, and con1 is dependent on additional
9997bd27 323 insns pro0 and pro1:
324
325 .con0 pro0
326 . ^ |
327 . | |
328 . | |
329 . X A
330 . | |
331 . | |
332 . | V
333 .pro1--Y-->con1
334 . | ^
335 . | |
336 . | |
337 . Z B
338 . | |
339 . | |
340 . V |
341 .con2 pro2
342
343 This is represented using a "dep_node" for each dependence arc, which are
344 connected as follows (diagram is centered around Y which is fully shown;
345 other dep_nodes shown partially):
346
347 . +------------+ +--------------+ +------------+
348 . : dep_node X : | dep_node Y | : dep_node Z :
349 . : : | | : :
350 . : : | | : :
351 . : forw : | forw | : forw :
352 . : +--------+ : | +--------+ | : +--------+ :
353 forw_deps : |dep_link| : | |dep_link| | : |dep_link| :
354 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
355 |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
356 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
357 . ^ ^ : | ^ | : | | ^ | | : | | :
358 . | | : | | | : | | | | | : | | :
359 . | +--<----+--+ +--+---<--+--+--+ +--+--+--<---+--+ | :
360 . | : | | | : | | | | | : | | | :
361 . | : | +----+ | : | | +----+ | | : | +----+ | :
362 . | : | |prev| | : | | |prev| | | : | |prev| | :
363 . | : | |next| | : | | |next| | | : | |next| | :
364 . | : | +----+ | : | | +----+ | | : | +----+ | :
365 . | : | | :<-+ | | | |<-+ : | | :<-+
366 . | : | +----+ | : | | | +----+ | | | : | +----+ | : |
367 . | : | |node|-+----+ | | |node|-+--+--+ : | |node|-+----+
368 . | : | +----+ | : | | +----+ | | : | +----+ | :
369 . | : | | : | | | | : | | :
370 . | : +--------+ : | +--------+ | : +--------+ :
371 . | : : | | : :
372 . | : SAME pro1 : | +--------+ | : SAME pro1 :
373 . | : DIFF con0 : | |dep | | : DIFF con2 :
374 . | : : | | | | : :
375 . | | | +----+ | |
376 .RTX<------------------------+--+-|pro1| | |
377 .pro1 | | +----+ | |
378 . | | | |
379 . | | +----+ | |
380 .RTX<------------------------+--+-|con1| | |
381 .con1 | | +----+ | |
382 . | | | | |
383 . | | | +----+ | |
384 . | | | |kind| | |
385 . | | | +----+ | |
386 . | : : | | |stat| | | : :
387 . | : DIFF pro0 : | | +----+ | | : DIFF pro2 :
388 . | : SAME con1 : | | | | : SAME con1 :
389 . | : : | +--------+ | : :
390 . | : : | | : :
391 . | : back : | back | : back :
392 . v : +--------+ : | +--------+ | : +--------+ :
393 back_deps : |dep_link| : | |dep_link| | : |dep_link| :
394 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
395 |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
396 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
397 . ^ : | ^ | : | | ^ | | : | | :
398 . | : | | | : | | | | | : | | :
399 . +--<----+--+ +--+---<--+--+--+ +--+--+--<---+--+ | :
400 . : | | | : | | | | | : | | | :
401 . : | +----+ | : | | +----+ | | : | +----+ | :
402 . : | |prev| | : | | |prev| | | : | |prev| | :
403 . : | |next| | : | | |next| | | : | |next| | :
404 . : | +----+ | : | | +----+ | | : | +----+ | :
405 . : | | :<-+ | | | |<-+ : | | :<-+
406 . : | +----+ | : | | | +----+ | | | : | +----+ | : |
407 . : | |node|-+----+ | | |node|-+--+--+ : | |node|-+----+
408 . : | +----+ | : | | +----+ | | : | +----+ | :
409 . : | | : | | | | : | | :
410 . : +--------+ : | +--------+ | : +--------+ :
411 . : : | | : :
412 . : dep_node A : | dep_node Y | : dep_node B :
413 . +------------+ +--------------+ +------------+
414*/
415
416struct _dep_node
417{
418 /* Backward link. */
419 struct _dep_link back;
420
421 /* The dep. */
422 struct _dep dep;
423
424 /* Forward link. */
425 struct _dep_link forw;
426};
9997bd27 427
428#define DEP_NODE_BACK(N) (&(N)->back)
429#define DEP_NODE_DEP(N) (&(N)->dep)
430#define DEP_NODE_FORW(N) (&(N)->forw)
431
e1ab7874 432/* The following enumeration values tell us what dependencies we
433 should use to implement the barrier. We use true-dependencies for
434 TRUE_BARRIER and anti-dependencies for MOVE_BARRIER. */
435enum reg_pending_barrier_mode
436{
437 NOT_A_BARRIER = 0,
438 MOVE_BARRIER,
439 TRUE_BARRIER
440};
441
0b09525f 442/* Whether a register movement is associated with a call. */
443enum post_call_group
444{
445 not_post_call,
446 post_call,
447 post_call_initial
448};
449
450/* Insns which affect pseudo-registers. */
451struct deps_reg
452{
453 rtx uses;
454 rtx sets;
a7dcf969 455 rtx implicit_sets;
effd1640 456 rtx control_uses;
0b09525f 457 rtx clobbers;
458 int uses_length;
459 int clobbers_length;
460};
461
6adce0fb 462/* Describe state of dependencies used during sched_analyze phase. */
68e419a1 463struct deps_desc
6adce0fb 464{
465 /* The *_insns and *_mems are paired lists. Each pending memory operation
466 will have a pointer to the MEM rtx on one list and a pointer to the
467 containing insn on the other list in the same place in the list. */
468
469 /* We can't use add_dependence like the old code did, because a single insn
470 may have multiple memory accesses, and hence needs to be on the list
471 once for each memory access. Add_dependence won't let you add an insn
472 to a list more than once. */
473
474 /* An INSN_LIST containing all insns with pending read operations. */
475 rtx pending_read_insns;
476
477 /* An EXPR_LIST containing all MEM rtx's which are pending reads. */
478 rtx pending_read_mems;
479
480 /* An INSN_LIST containing all insns with pending write operations. */
481 rtx pending_write_insns;
482
483 /* An EXPR_LIST containing all MEM rtx's which are pending writes. */
484 rtx pending_write_mems;
485
effd1640 486 /* An INSN_LIST containing all jump insns. */
487 rtx pending_jump_insns;
488
c5947ab7 489 /* We must prevent the above lists from ever growing too large since
490 the number of dependencies produced is at least O(N*N),
491 and execution time is at least O(4*N*N), as a function of the
492 length of these pending lists. */
493
494 /* Indicates the length of the pending_read list. */
495 int pending_read_list_length;
496
497 /* Indicates the length of the pending_write list. */
498 int pending_write_list_length;
6adce0fb 499
effd1640 500 /* Length of the pending memory flush list plus the length of the pending
501 jump insn list. Large functions with no calls may build up extremely
502 large lists. */
85de291e 503 int pending_flush_length;
504
6adce0fb 505 /* The last insn upon which all memory references must depend.
506 This is an insn which flushed the pending lists, creating a dependency
507 between it and all previously pending memory references. This creates
508 a barrier (or a checkpoint) which no memory reference is allowed to cross.
509
510 This includes all non constant CALL_INSNs. When we do interprocedural
511 alias analysis, this restriction can be relaxed.
512 This may also be an INSN that writes memory if the pending lists grow
513 too large. */
514 rtx last_pending_memory_flush;
515
5deaeb50 516 /* A list of the last function calls we have seen. We use a list to
517 represent last function calls from multiple predecessor blocks.
518 Used to prevent register lifetimes from expanding unnecessarily. */
6adce0fb 519 rtx last_function_call;
520
326d0c19 521 /* A list of the last function calls that may not return normally
522 we have seen. We use a list to represent last function calls from
523 multiple predecessor blocks. Used to prevent moving trapping insns
524 across such calls. */
525 rtx last_function_call_may_noreturn;
526
5deaeb50 527 /* A list of insns which use a pseudo register that does not already
528 cross a call. We create dependencies between each of those insn
529 and the next call insn, to ensure that they won't cross a call after
530 scheduling is done. */
531 rtx sched_before_next_call;
532
0741df1e 533 /* Similarly, a list of insns which should not cross a branch. */
534 rtx sched_before_next_jump;
535
f024691d 536 /* Used to keep post-call pseudo/hard reg movements together with
6adce0fb 537 the call. */
0b09525f 538 enum post_call_group in_post_call_group_p;
6adce0fb 539
9845d120 540 /* The last debug insn we've seen. */
541 rtx last_debug_insn;
542
749c6f58 543 /* The maximum register number for the following arrays. Before reload
544 this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER. */
545 int max_reg;
546
6adce0fb 547 /* Element N is the next insn that sets (hard or pseudo) register
548 N within the current basic block; or zero, if there is no
549 such insn. Needed for new registers which may be introduced
550 by splitting insns. */
0b09525f 551 struct deps_reg *reg_last;
749c6f58 552
f712a0dc 553 /* Element N is set for each register that has any nonzero element
749c6f58 554 in reg_last[N].{uses,sets,clobbers}. */
555 regset_head reg_last_in_use;
31c5c470 556
e1ab7874 557 /* Shows the last value of reg_pending_barrier associated with the insn. */
558 enum reg_pending_barrier_mode last_reg_pending_barrier;
559
48e1416a 560 /* True when this context should be treated as a readonly by
e1ab7874 561 the analysis. */
562 BOOL_BITFIELD readonly : 1;
6adce0fb 563};
564
68e419a1 565typedef struct deps_desc *deps_t;
e1ab7874 566
c2069298 567/* This structure holds some state of the current scheduling pass, and
568 contains some function pointers that abstract out some of the non-generic
569 functionality from functions such as schedule_block or schedule_insn.
570 There is one global variable, current_sched_info, which points to the
571 sched_info structure currently in use. */
e1ab7874 572struct haifa_sched_info
c2069298 573{
574 /* Add all insns that are initially ready to the ready list. Called once
575 before scheduling a set of insns. */
e4897000 576 void (*init_ready_list) (void);
c2069298 577 /* Called after taking an insn from the ready list. Returns nonzero if
578 this insn can be scheduled, nonzero if we should silently discard it. */
5a2784f8 579 int (*can_schedule_ready_p) (rtx);
c2069298 580 /* Return nonzero if there are more insns that should be scheduled. */
5a2784f8 581 int (*schedule_more_p) (void);
48e1416a 582 /* Called after an insn has all its hard dependencies resolved.
6a1cdb4d 583 Adjusts status of instruction (which is passed through second parameter)
584 to indicate if instruction should be moved to the ready list or the
585 queue, or if it should silently discard it (until next resolved
586 dependence). */
587 ds_t (*new_ready) (rtx, ds_t);
c2069298 588 /* Compare priority of two insns. Return a positive number if the second
589 insn is to be preferred for scheduling, and a negative one if the first
590 is to be preferred. Zero if they are equally good. */
5a2784f8 591 int (*rank) (rtx, rtx);
c2069298 592 /* Return a string that contains the insn uid and optionally anything else
593 necessary to identify this insn in an output. It's valid to use a
594 static buffer for this. The ALIGNED parameter should cause the string
595 to be formatted so that multiple output lines will line up nicely. */
e1ab7874 596 const char *(*print_insn) (const_rtx, int);
d6141c0c 597 /* Return nonzero if an insn should be included in priority
598 calculations. */
5a2784f8 599 int (*contributes_to_priority) (rtx, rtx);
c2069298 600
4db82bc9 601 /* Return true if scheduling insn (passed as the parameter) will trigger
602 finish of scheduling current block. */
603 bool (*insn_finishes_block_p) (rtx);
604
c2069298 605 /* The boundaries of the set of insns to be scheduled. */
606 rtx prev_head, next_tail;
607
608 /* Filled in after the schedule is finished; the first and last scheduled
609 insns. */
610 rtx head, tail;
611
612 /* If nonzero, enables an additional sanity check in schedule_block. */
503f2817 613 unsigned int queue_must_finish_empty:1;
09542196 614
615 /* Maximum priority that has been assigned to an insn. */
616 int sched_max_insns_priority;
4d64d9a4 617
6a1cdb4d 618 /* Hooks to support speculative scheduling. */
619
620 /* Called to notify frontend that instruction is being added (second
48e1416a 621 parameter == 0) or removed (second parameter == 1). */
6a1cdb4d 622 void (*add_remove_insn) (rtx, int);
623
d2412f57 624 /* Called to notify the frontend that instruction INSN is being
625 scheduled. */
626 void (*begin_schedule_ready) (rtx insn);
627
628 /* Called to notify the frontend that an instruction INSN is about to be
629 moved to its correct place in the final schedule. This is done for all
630 insns in order of the schedule. LAST indicates the last scheduled
631 instruction. */
632 void (*begin_move_insn) (rtx insn, rtx last);
6a1cdb4d 633
6a1cdb4d 634 /* If the second parameter is not NULL, return nonnull value, if the
635 basic block should be advanced.
636 If the second parameter is NULL, return the next basic block in EBB.
637 The first parameter is the current basic block in EBB. */
638 basic_block (*advance_target_bb) (basic_block, rtx);
639
e2f4a6ff 640 /* Allocate memory, store the frontend scheduler state in it, and
641 return it. */
642 void *(*save_state) (void);
643 /* Restore frontend scheduler state from the argument, and free the
644 memory. */
645 void (*restore_state) (void *);
646
4d64d9a4 647 /* ??? FIXME: should use straight bitfields inside sched_info instead of
648 this flag field. */
649 unsigned int flags;
c2069298 650};
651
6a1cdb4d 652/* This structure holds description of the properties for speculative
653 scheduling. */
654struct spec_info_def
655{
656 /* Holds types of allowed speculations: BEGIN_{DATA|CONTROL},
657 BE_IN_{DATA_CONTROL}. */
658 int mask;
659
660 /* A dump file for additional information on speculative scheduling. */
661 FILE *dump;
662
663 /* Minimal cumulative weakness of speculative instruction's
664 dependencies, so that insn will be scheduled. */
e1ab7874 665 dw_t data_weakness_cutoff;
666
667 /* Minimal usefulness of speculative instruction to be considered for
668 scheduling. */
669 int control_weakness_cutoff;
6a1cdb4d 670
671 /* Flags from the enum SPEC_SCHED_FLAGS. */
672 int flags;
673};
674typedef struct spec_info_def *spec_info_t;
675
e1ab7874 676extern spec_info_t spec_info;
677
678extern struct haifa_sched_info *current_sched_info;
6adce0fb 679
a7dcf969 680/* Do register pressure sensitive insn scheduling if the flag is set
681 up. */
11189c7a 682extern enum sched_pressure_algorithm sched_pressure;
a7dcf969 683
66d9a7b9 684/* Map regno -> its pressure class. The map defined only when
a7dcf969 685 SCHED_PRESSURE_P is true. */
66d9a7b9 686extern enum reg_class *sched_regno_pressure_class;
a7dcf969 687
6adce0fb 688/* Indexed by INSN_UID, the collection of all data associated with
689 a single instruction. */
690
e1ab7874 691struct _haifa_deps_insn_data
6adce0fb 692{
e1ab7874 693 /* The number of incoming edges in the forward dependency graph.
694 As scheduling proceeds, counts are decreased. An insn moves to
695 the ready queue when its counter reaches zero. */
696 int dep_count;
697
698 /* Nonzero if instruction has internal dependence
699 (e.g. add_dependence was invoked with (insn == elem)). */
700 unsigned int has_internal_dep;
701
702 /* NB: We can't place 'struct _deps_list' here instead of deps_list_t into
703 h_i_d because when h_i_d extends, addresses of the deps_list->first
704 change without updating deps_list->first->next->prev_nextp. Thus
705 BACK_DEPS and RESOLVED_BACK_DEPS are allocated on the heap and FORW_DEPS
706 list is allocated on the obstack. */
9997bd27 707
93f6b030 708 /* A list of hard backward dependencies. The insn is a consumer of all the
9997bd27 709 deps mentioned here. */
93f6b030 710 deps_list_t hard_back_deps;
711
712 /* A list of speculative (weak) dependencies. The insn is a consumer of all
713 the deps mentioned here. */
714 deps_list_t spec_back_deps;
9997bd27 715
716 /* A list of insns which depend on the instruction. Unlike 'back_deps',
424da949 717 it represents forward dependencies. */
9997bd27 718 deps_list_t forw_deps;
6adce0fb 719
e4897000 720 /* A list of scheduled producers of the instruction. Links are being moved
9997bd27 721 from 'back_deps' to 'resolved_back_deps' while scheduling. */
722 deps_list_t resolved_back_deps;
93f6b030 723
724 /* A list of scheduled consumers of the instruction. Links are being moved
725 from 'forw_deps' to 'resolved_forw_deps' while scheduling to fasten the
726 search in 'forw_deps'. */
727 deps_list_t resolved_forw_deps;
e1ab7874 728
6c2d9e41 729 /* If the insn is conditional (either through COND_EXEC, or because
730 it is a conditional branch), this records the condition. NULL
731 for insns that haven't been seen yet or don't have a condition;
732 const_true_rtx to mark an insn without a condition, or with a
733 condition that has been clobbered by a subsequent insn. */
734 rtx cond;
735
effd1640 736 /* For a conditional insn, a list of insns that could set the condition
737 register. Used when generating control dependencies. */
738 rtx cond_deps;
739
6c2d9e41 740 /* True if the condition in 'cond' should be reversed to get the actual
741 condition. */
742 unsigned int reverse_cond : 1;
743
e1ab7874 744 /* Some insns (e.g. call) are not allowed to move across blocks. */
745 unsigned int cant_move : 1;
746};
747
a7dcf969 748/* Bits used for storing values of the fields in the following
749 structure. */
750#define INCREASE_BITS 8
751
752/* The structure describes how the corresponding insn increases the
66d9a7b9 753 register pressure for each pressure class. */
a7dcf969 754struct reg_pressure_data
755{
756 /* Pressure increase for given class because of clobber. */
757 unsigned int clobber_increase : INCREASE_BITS;
758 /* Increase in register pressure for given class because of register
759 sets. */
760 unsigned int set_increase : INCREASE_BITS;
761 /* Pressure increase for given class because of unused register
762 set. */
763 unsigned int unused_set_increase : INCREASE_BITS;
764 /* Pressure change: #sets - #deaths. */
765 int change : INCREASE_BITS;
766};
767
768/* The following structure describes usage of registers by insns. */
769struct reg_use_data
770{
771 /* Regno used in the insn. */
772 int regno;
773 /* Insn using the regno. */
774 rtx insn;
775 /* Cyclic list of elements with the same regno. */
776 struct reg_use_data *next_regno_use;
777 /* List of elements with the same insn. */
778 struct reg_use_data *next_insn_use;
779};
780
781/* The following structure describes used sets of registers by insns.
66d9a7b9 782 Registers are pseudos whose pressure class is not NO_REGS or hard
a7dcf969 783 registers available for allocations. */
784struct reg_set_data
785{
786 /* Regno used in the insn. */
787 int regno;
788 /* Insn setting the regno. */
789 rtx insn;
790 /* List of elements with the same insn. */
791 struct reg_set_data *next_insn_set;
792};
793
e1ab7874 794struct _haifa_insn_data
795{
796 /* We can't place 'struct _deps_list' into h_i_d instead of deps_list_t
797 because when h_i_d extends, addresses of the deps_list->first
798 change without updating deps_list->first->next->prev_nextp. */
799
6adce0fb 800 /* Logical uid gives the original ordering of the insns. */
801 int luid;
802
803 /* A priority for each insn. */
804 int priority;
805
6adce0fb 806 /* The minimum clock tick at which the insn becomes ready. This is
807 used to note timing constraints for the insns in the pending list. */
808 int tick;
809
e2f4a6ff 810 /* For insns that are scheduled at a fixed difference from another,
811 this records the tick in which they must be ready. */
812 int exact_tick;
813
e4897000 814 /* INTER_TICK is used to adjust INSN_TICKs of instructions from the
815 subsequent blocks in a region. */
816 int inter_tick;
48e1416a 817
e2f4a6ff 818 /* Used temporarily to estimate an INSN_TICK value for an insn given
819 current knowledge. */
820 int tick_estimate;
821
e4897000 822 /* See comment on QUEUE_INDEX macro in haifa-sched.c. */
823 int queue_index;
824
6adce0fb 825 short cost;
826
b30b031c 827 /* '> 0' if priority is valid,
828 '== 0' if priority was not yet computed,
829 '< 0' if priority in invalid and should be recomputed. */
830 signed char priority_status;
831
35a3065a 832 /* Set if there's DEF-USE dependence between some speculatively
6adce0fb 833 moved load insn and this one. */
834 unsigned int fed_by_spec_load : 1;
835 unsigned int is_load_insn : 1;
e2f4a6ff 836 /* Nonzero if this insn has negative-cost forward dependencies against
837 an already scheduled insn. */
838 unsigned int feeds_backtrack_insn : 1;
839
840 /* Nonzero if this insn is a shadow of another, scheduled after a fixed
841 delay. We only emit shadows at the end of a cycle, with no other
842 real insns following them. */
843 unsigned int shadow_p : 1;
89beeed3 844
effd1640 845 /* Used internally in unschedule_insns_until to mark insns that must have
846 their TODO_SPEC recomputed. */
847 unsigned int must_recompute_spec : 1;
848
9ca2c29a 849 /* What speculations are necessary to apply to schedule the instruction. */
6a1cdb4d 850 ds_t todo_spec;
e1ab7874 851
6a1cdb4d 852 /* What speculations were already applied. */
48e1416a 853 ds_t done_spec;
e1ab7874 854
6a1cdb4d 855 /* What speculations are checked by this instruction. */
856 ds_t check_spec;
857
858 /* Recovery block for speculation checks. */
859 basic_block recovery_block;
860
861 /* Original pattern of the instruction. */
862 rtx orig_pat;
a7dcf969 863
effd1640 864 /* For insns with DEP_CONTROL dependencies, the predicated pattern if it
865 was ever successfully constructed. */
866 rtx predicated_pat;
867
a7dcf969 868 /* The following array contains info how the insn increases register
869 pressure. There is an element for each cover class of pseudos
870 referenced in insns. */
871 struct reg_pressure_data *reg_pressure;
872 /* The following array contains maximal reg pressure between last
873 scheduled insn and given insn. There is an element for each
66d9a7b9 874 pressure class of pseudos referenced in insns. This info updated
a7dcf969 875 after scheduling each insn for each insn between the two
876 mentioned insns. */
877 int *max_reg_pressure;
878 /* The following list contains info about used pseudos and hard
879 registers available for allocation. */
880 struct reg_use_data *reg_use_list;
881 /* The following list contains info about set pseudos and hard
882 registers available for allocation. */
883 struct reg_set_data *reg_set_list;
884 /* Info about how scheduling the insn changes cost of register
885 pressure excess (between source and target). */
886 int reg_pressure_excess_cost_change;
b30b031c 887 int model_index;
6adce0fb 888};
889
e1ab7874 890typedef struct _haifa_insn_data haifa_insn_data_def;
891typedef haifa_insn_data_def *haifa_insn_data_t;
892
e1ab7874 893
f1f41a6c 894extern vec<haifa_insn_data_def> h_i_d;
e1ab7874 895
f1f41a6c 896#define HID(INSN) (&h_i_d[INSN_UID (INSN)])
6adce0fb 897
7a31a7bd 898/* Accessor macros for h_i_d. There are more in haifa-sched.c and
899 sched-rgn.c. */
e1ab7874 900#define INSN_PRIORITY(INSN) (HID (INSN)->priority)
a7dcf969 901#define INSN_REG_PRESSURE(INSN) (HID (INSN)->reg_pressure)
902#define INSN_MAX_REG_PRESSURE(INSN) (HID (INSN)->max_reg_pressure)
903#define INSN_REG_USE_LIST(INSN) (HID (INSN)->reg_use_list)
904#define INSN_REG_SET_LIST(INSN) (HID (INSN)->reg_set_list)
905#define INSN_REG_PRESSURE_EXCESS_COST_CHANGE(INSN) \
906 (HID (INSN)->reg_pressure_excess_cost_change)
e1ab7874 907#define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
b30b031c 908#define INSN_MODEL_INDEX(INSN) (HID (INSN)->model_index)
e1ab7874 909
910typedef struct _haifa_deps_insn_data haifa_deps_insn_data_def;
911typedef haifa_deps_insn_data_def *haifa_deps_insn_data_t;
912
e1ab7874 913
f1f41a6c 914extern vec<haifa_deps_insn_data_def> h_d_i_d;
e1ab7874 915
f1f41a6c 916#define HDID(INSN) (&h_d_i_d[INSN_LUID (INSN)])
e1ab7874 917#define INSN_DEP_COUNT(INSN) (HDID (INSN)->dep_count)
918#define HAS_INTERNAL_DEP(INSN) (HDID (INSN)->has_internal_dep)
919#define INSN_FORW_DEPS(INSN) (HDID (INSN)->forw_deps)
920#define INSN_RESOLVED_BACK_DEPS(INSN) (HDID (INSN)->resolved_back_deps)
921#define INSN_RESOLVED_FORW_DEPS(INSN) (HDID (INSN)->resolved_forw_deps)
922#define INSN_HARD_BACK_DEPS(INSN) (HDID (INSN)->hard_back_deps)
923#define INSN_SPEC_BACK_DEPS(INSN) (HDID (INSN)->spec_back_deps)
60ba0654 924#define INSN_CACHED_COND(INSN) (HDID (INSN)->cond)
6c2d9e41 925#define INSN_REVERSE_COND(INSN) (HDID (INSN)->reverse_cond)
effd1640 926#define INSN_COND_DEPS(INSN) (HDID (INSN)->cond_deps)
e1ab7874 927#define CANT_MOVE(INSN) (HDID (INSN)->cant_move)
f1f41a6c 928#define CANT_MOVE_BY_LUID(LUID) (h_d_i_d[LUID].cant_move)
e1ab7874 929
930
931#define INSN_PRIORITY(INSN) (HID (INSN)->priority)
932#define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
3588ab9c 933#define INSN_PRIORITY_KNOWN(INSN) (INSN_PRIORITY_STATUS (INSN) > 0)
e1ab7874 934#define TODO_SPEC(INSN) (HID (INSN)->todo_spec)
935#define DONE_SPEC(INSN) (HID (INSN)->done_spec)
936#define CHECK_SPEC(INSN) (HID (INSN)->check_spec)
937#define RECOVERY_BLOCK(INSN) (HID (INSN)->recovery_block)
938#define ORIG_PAT(INSN) (HID (INSN)->orig_pat)
effd1640 939#define PREDICATED_PAT(INSN) (HID (INSN)->predicated_pat)
4d64d9a4 940
fd27912f 941/* INSN is either a simple or a branchy speculation check. */
e1ab7874 942#define IS_SPECULATION_CHECK_P(INSN) \
943 (sel_sched_p () ? sel_insn_is_speculation_check (INSN) : RECOVERY_BLOCK (INSN) != NULL)
fd27912f 944
945/* INSN is a speculation check that will simply reexecute the speculatively
8e3eaeaf 946 scheduled instruction if the speculation fails. */
fd27912f 947#define IS_SPECULATION_SIMPLE_CHECK_P(INSN) \
948 (RECOVERY_BLOCK (INSN) == EXIT_BLOCK_PTR)
949
2521f35f 950/* INSN is a speculation check that will branch to RECOVERY_BLOCK if the
8e3eaeaf 951 speculation fails. Insns in that block will reexecute the speculatively
eed50407 952 scheduled code and then will return immediately after INSN thus preserving
2521f35f 953 semantics of the program. */
954#define IS_SPECULATION_BRANCHY_CHECK_P(INSN) \
955 (RECOVERY_BLOCK (INSN) != NULL && RECOVERY_BLOCK (INSN) != EXIT_BLOCK_PTR)
956
9997bd27 957/* Dep status (aka ds_t) of the link encapsulates information, that is needed
958 for speculative scheduling. Namely, it is 4 integers in the range
4d64d9a4 959 [0, MAX_DEP_WEAK] and 3 bits.
960 The integers correspond to the probability of the dependence to *not*
961 exist, it is the probability, that overcoming of this dependence will
962 not be followed by execution of the recovery code. Nevertheless,
963 whatever high the probability of success is, recovery code should still
964 be generated to preserve semantics of the program. To find a way to
965 get/set these integers, please refer to the {get, set}_dep_weak ()
966 functions in sched-deps.c .
967 The 3 bits in the DEP_STATUS correspond to 3 dependence types: true-,
968 output- and anti- dependence. It is not enough for speculative scheduling
969 to know just the major type of all the dependence between two instructions,
970 as only true dependence can be overcome.
971 There also is the 4-th bit in the DEP_STATUS (HARD_DEP), that is reserved
9ca2c29a 972 for using to describe instruction's status. It is set whenever instruction
9997bd27 973 has at least one dependence, that cannot be overcame.
4d64d9a4 974 See also: check_dep_status () in sched-deps.c . */
4d64d9a4 975
976/* We exclude sign bit. */
4dc5882f 977#define BITS_PER_DEP_STATUS (HOST_BITS_PER_INT - 1)
4d64d9a4 978
effd1640 979/* First '6' stands for 4 dep type bits and the HARD_DEP and DEP_CANCELLED
980 bits.
4d64d9a4 981 Second '4' stands for BEGIN_{DATA, CONTROL}, BE_IN_{DATA, CONTROL}
982 dep weakness. */
effd1640 983#define BITS_PER_DEP_WEAK ((BITS_PER_DEP_STATUS - 6) / 4)
4d64d9a4 984
985/* Mask of speculative weakness in dep_status. */
986#define DEP_WEAK_MASK ((1 << BITS_PER_DEP_WEAK) - 1)
987
988/* This constant means that dependence is fake with 99.999...% probability.
989 This is the maximum value, that can appear in dep_status.
990 Note, that we don't want MAX_DEP_WEAK to be the same as DEP_WEAK_MASK for
991 debugging reasons. Though, it can be set to DEP_WEAK_MASK, and, when
992 done so, we'll get fast (mul for)/(div by) NO_DEP_WEAK. */
993#define MAX_DEP_WEAK (DEP_WEAK_MASK - 1)
994
995/* This constant means that dependence is 99.999...% real and it is a really
996 bad idea to overcome it (though this can be done, preserving program
997 semantics). */
998#define MIN_DEP_WEAK 1
999
1000/* This constant represents 100% probability.
1001 E.g. it is used to represent weakness of dependence, that doesn't exist. */
1002#define NO_DEP_WEAK (MAX_DEP_WEAK + MIN_DEP_WEAK)
1003
1004/* Default weakness of speculative dependence. Used when we can't say
1005 neither bad nor good about the dependence. */
1006#define UNCERTAIN_DEP_WEAK (MAX_DEP_WEAK - MAX_DEP_WEAK / 4)
1007
1008/* Offset for speculative weaknesses in dep_status. */
1009enum SPEC_TYPES_OFFSETS {
1010 BEGIN_DATA_BITS_OFFSET = 0,
1011 BE_IN_DATA_BITS_OFFSET = BEGIN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
1012 BEGIN_CONTROL_BITS_OFFSET = BE_IN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
1013 BE_IN_CONTROL_BITS_OFFSET = BEGIN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK
1014};
1015
1016/* The following defines provide numerous constants used to distinguish between
1017 different types of speculative dependencies. */
1018
9ca2c29a 1019/* Dependence can be overcome with generation of new data speculative
4d64d9a4 1020 instruction. */
1021#define BEGIN_DATA (((ds_t) DEP_WEAK_MASK) << BEGIN_DATA_BITS_OFFSET)
1022
1023/* This dependence is to the instruction in the recovery block, that was
1024 formed to recover after data-speculation failure.
9ca2c29a 1025 Thus, this dependence can overcome with generating of the copy of
4d64d9a4 1026 this instruction in the recovery block. */
1027#define BE_IN_DATA (((ds_t) DEP_WEAK_MASK) << BE_IN_DATA_BITS_OFFSET)
1028
9ca2c29a 1029/* Dependence can be overcome with generation of new control speculative
4d64d9a4 1030 instruction. */
1031#define BEGIN_CONTROL (((ds_t) DEP_WEAK_MASK) << BEGIN_CONTROL_BITS_OFFSET)
1032
1033/* This dependence is to the instruction in the recovery block, that was
1034 formed to recover after control-speculation failure.
d961ae3a 1035 Thus, this dependence can be overcome with generating of the copy of
4d64d9a4 1036 this instruction in the recovery block. */
1037#define BE_IN_CONTROL (((ds_t) DEP_WEAK_MASK) << BE_IN_CONTROL_BITS_OFFSET)
1038
9ca2c29a 1039/* A few convenient combinations. */
4d64d9a4 1040#define BEGIN_SPEC (BEGIN_DATA | BEGIN_CONTROL)
1041#define DATA_SPEC (BEGIN_DATA | BE_IN_DATA)
1042#define CONTROL_SPEC (BEGIN_CONTROL | BE_IN_CONTROL)
1043#define SPECULATIVE (DATA_SPEC | CONTROL_SPEC)
1044#define BE_IN_SPEC (BE_IN_DATA | BE_IN_CONTROL)
1045
1046/* Constants, that are helpful in iterating through dep_status. */
1047#define FIRST_SPEC_TYPE BEGIN_DATA
1048#define LAST_SPEC_TYPE BE_IN_CONTROL
1049#define SPEC_TYPE_SHIFT BITS_PER_DEP_WEAK
1050
1051/* Dependence on instruction can be of multiple types
1052 (e.g. true and output). This fields enhance REG_NOTE_KIND information
1053 of the dependence. */
1054#define DEP_TRUE (((ds_t) 1) << (BE_IN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK))
1055#define DEP_OUTPUT (DEP_TRUE << 1)
1056#define DEP_ANTI (DEP_OUTPUT << 1)
effd1640 1057#define DEP_CONTROL (DEP_ANTI << 1)
4d64d9a4 1058
effd1640 1059#define DEP_TYPES (DEP_TRUE | DEP_OUTPUT | DEP_ANTI | DEP_CONTROL)
4d64d9a4 1060
1061/* Instruction has non-speculative dependence. This bit represents the
1062 property of an instruction - not the one of a dependence.
1063 Therefore, it can appear only in TODO_SPEC field of an instruction. */
effd1640 1064#define HARD_DEP (DEP_CONTROL << 1)
1065
d452a169 1066/* Set in the TODO_SPEC field of an instruction for which new_ready
1067 has decided not to schedule it speculatively. */
1068#define DEP_POSTPONED (HARD_DEP << 1)
1069
1070#define DEP_CANCELLED (DEP_POSTPONED << 1)
4d64d9a4 1071
48e1416a 1072/* This represents the results of calling sched-deps.c functions,
93f6b030 1073 which modify dependencies. */
4d64d9a4 1074enum DEPS_ADJUST_RESULT {
93f6b030 1075 /* No dependence needed (e.g. producer == consumer). */
1076 DEP_NODEP,
1077 /* Dependence is already present and wasn't modified. */
1078 DEP_PRESENT,
1079 /* Existing dependence was modified to include additional information. */
1080 DEP_CHANGED,
1081 /* New dependence has been created. */
1082 DEP_CREATED
4d64d9a4 1083};
1084
48e1416a 1085/* Represents the bits that can be set in the flags field of the
4d64d9a4 1086 sched_info structure. */
1087enum SCHED_FLAGS {
1088 /* If set, generate links between instruction as DEPS_LIST.
1089 Otherwise, generate usual INSN_LIST links. */
1090 USE_DEPS_LIST = 1,
1091 /* Perform data or control (or both) speculation.
1092 Results in generation of data and control speculative dependencies.
1093 Requires USE_DEPS_LIST set. */
6a1cdb4d 1094 DO_SPECULATION = USE_DEPS_LIST << 1,
e2f4a6ff 1095 DO_BACKTRACKING = DO_SPECULATION << 1,
effd1640 1096 DO_PREDICATION = DO_BACKTRACKING << 1,
d452a169 1097 DONT_BREAK_DEPENDENCIES = DO_PREDICATION << 1,
1098 SCHED_RGN = DONT_BREAK_DEPENDENCIES << 1,
6a1cdb4d 1099 SCHED_EBB = SCHED_RGN << 1,
e1ab7874 1100 /* Scheduler can possibly create new basic blocks. Used for assertions. */
1101 NEW_BBS = SCHED_EBB << 1,
1102 SEL_SCHED = NEW_BBS << 1
6a1cdb4d 1103};
1104
1105enum SPEC_SCHED_FLAGS {
1106 COUNT_SPEC_IN_CRITICAL_PATH = 1,
1107 PREFER_NON_DATA_SPEC = COUNT_SPEC_IN_CRITICAL_PATH << 1,
e1ab7874 1108 PREFER_NON_CONTROL_SPEC = PREFER_NON_DATA_SPEC << 1,
1109 SEL_SCHED_SPEC_DONT_CHECK_CONTROL = PREFER_NON_CONTROL_SPEC << 1
4d64d9a4 1110};
7a31a7bd 1111
ad4583d9 1112#define NOTE_NOT_BB_P(NOTE) (NOTE_P (NOTE) && (NOTE_KIND (NOTE) \
6a1cdb4d 1113 != NOTE_INSN_BASIC_BLOCK))
1114
6adce0fb 1115extern FILE *sched_dump;
7a31a7bd 1116extern int sched_verbose;
6adce0fb 1117
93f6b030 1118extern spec_info_t spec_info;
1119extern bool haifa_recovery_bb_ever_added_p;
1120
9b7c6f02 1121/* Exception Free Loads:
1122
1123 We define five classes of speculative loads: IFREE, IRISKY,
1124 PFREE, PRISKY, and MFREE.
1125
1126 IFREE loads are loads that are proved to be exception-free, just
1127 by examining the load insn. Examples for such loads are loads
1128 from TOC and loads of global data.
1129
1130 IRISKY loads are loads that are proved to be exception-risky,
1131 just by examining the load insn. Examples for such loads are
1132 volatile loads and loads from shared memory.
1133
1134 PFREE loads are loads for which we can prove, by examining other
1135 insns, that they are exception-free. Currently, this class consists
1136 of loads for which we are able to find a "similar load", either in
1137 the target block, or, if only one split-block exists, in that split
1138 block. Load2 is similar to load1 if both have same single base
1139 register. We identify only part of the similar loads, by finding
1140 an insn upon which both load1 and load2 have a DEF-USE dependence.
1141
1142 PRISKY loads are loads for which we can prove, by examining other
1143 insns, that they are exception-risky. Currently we have two proofs for
1144 such loads. The first proof detects loads that are probably guarded by a
1145 test on the memory address. This proof is based on the
1146 backward and forward data dependence information for the region.
1147 Let load-insn be the examined load.
1148 Load-insn is PRISKY iff ALL the following hold:
1149
1150 - insn1 is not in the same block as load-insn
1151 - there is a DEF-USE dependence chain (insn1, ..., load-insn)
1152 - test-insn is either a compare or a branch, not in the same block
1153 as load-insn
1154 - load-insn is reachable from test-insn
1155 - there is a DEF-USE dependence chain (insn1, ..., test-insn)
1156
1157 This proof might fail when the compare and the load are fed
1158 by an insn not in the region. To solve this, we will add to this
1159 group all loads that have no input DEF-USE dependence.
1160
1161 The second proof detects loads that are directly or indirectly
1162 fed by a speculative load. This proof is affected by the
1163 scheduling process. We will use the flag fed_by_spec_load.
1164 Initially, all insns have this flag reset. After a speculative
1165 motion of an insn, if insn is either a load, or marked as
1166 fed_by_spec_load, we will also mark as fed_by_spec_load every
1167 insn1 for which a DEF-USE dependence (insn, insn1) exists. A
1168 load which is fed_by_spec_load is also PRISKY.
1169
1170 MFREE (maybe-free) loads are all the remaining loads. They may be
1171 exception-free, but we cannot prove it.
1172
1173 Now, all loads in IFREE and PFREE classes are considered
1174 exception-free, while all loads in IRISKY and PRISKY classes are
1175 considered exception-risky. As for loads in the MFREE class,
1176 these are considered either exception-free or exception-risky,
1177 depending on whether we are pessimistic or optimistic. We have
1178 to take the pessimistic approach to assure the safety of
1179 speculative scheduling, but we can take the optimistic approach
1180 by invoking the -fsched_spec_load_dangerous option. */
1181
1182enum INSN_TRAP_CLASS
1183{
1184 TRAP_FREE = 0, IFREE = 1, PFREE_CANDIDATE = 2,
1185 PRISKY_CANDIDATE = 3, IRISKY = 4, TRAP_RISKY = 5
1186};
1187
1188#define WORST_CLASS(class1, class2) \
1189((class1 > class2) ? class1 : class2)
1190
c2069298 1191#ifndef __GNUC__
1192#define __inline
1193#endif
1194
1195#ifndef HAIFA_INLINE
1196#define HAIFA_INLINE __inline
1197#endif
6adce0fb 1198
e1ab7874 1199struct sched_deps_info_def
1200{
1201 /* Called when computing dependencies for a JUMP_INSN. This function
1202 should store the set of registers that must be considered as set by
1203 the jump in the regset. */
6aed13f1 1204 void (*compute_jump_reg_dependencies) (rtx, regset);
e1ab7874 1205
1206 /* Start analyzing insn. */
1207 void (*start_insn) (rtx);
1208
1209 /* Finish analyzing insn. */
1210 void (*finish_insn) (void);
1211
1212 /* Start analyzing insn LHS (Left Hand Side). */
1213 void (*start_lhs) (rtx);
1214
1215 /* Finish analyzing insn LHS. */
1216 void (*finish_lhs) (void);
1217
1218 /* Start analyzing insn RHS (Right Hand Side). */
1219 void (*start_rhs) (rtx);
1220
1221 /* Finish analyzing insn RHS. */
1222 void (*finish_rhs) (void);
1223
1224 /* Note set of the register. */
1225 void (*note_reg_set) (int);
1226
1227 /* Note clobber of the register. */
1228 void (*note_reg_clobber) (int);
1229
1230 /* Note use of the register. */
1231 void (*note_reg_use) (int);
1232
1233 /* Note memory dependence of type DS between MEM1 and MEM2 (which is
1234 in the INSN2). */
1235 void (*note_mem_dep) (rtx mem1, rtx mem2, rtx insn2, ds_t ds);
1236
1237 /* Note a dependence of type DS from the INSN. */
1238 void (*note_dep) (rtx insn, ds_t ds);
1239
1240 /* Nonzero if we should use cselib for better alias analysis. This
1241 must be 0 if the dependency information is used after sched_analyze
1242 has completed, e.g. if we're using it to initialize state for successor
1243 blocks in region scheduling. */
1244 unsigned int use_cselib : 1;
1245
1246 /* If set, generate links between instruction as DEPS_LIST.
1247 Otherwise, generate usual INSN_LIST links. */
1248 unsigned int use_deps_list : 1;
1249
1250 /* Generate data and control speculative dependencies.
1251 Requires USE_DEPS_LIST set. */
1252 unsigned int generate_spec_deps : 1;
1253};
1254
1255extern struct sched_deps_info_def *sched_deps_info;
1256
1257
6adce0fb 1258/* Functions in sched-deps.c. */
effd1640 1259extern rtx sched_get_reverse_condition_uncached (const_rtx);
5493cb9a 1260extern bool sched_insns_conditions_mutex_p (const_rtx, const_rtx);
86265ed0 1261extern bool sched_insn_is_legitimate_for_speculation_p (const_rtx, ds_t);
4d64d9a4 1262extern void add_dependence (rtx, rtx, enum reg_note);
68e419a1 1263extern void sched_analyze (struct deps_desc *, rtx, rtx);
1264extern void init_deps (struct deps_desc *, bool);
1265extern void init_deps_reg_last (struct deps_desc *);
1266extern void free_deps (struct deps_desc *);
60b8c5b3 1267extern void init_deps_global (void);
1268extern void finish_deps_global (void);
68e419a1 1269extern void deps_analyze_insn (struct deps_desc *, rtx);
1270extern void remove_from_deps (struct deps_desc *, rtx);
c15d7785 1271extern void init_insn_reg_pressure_info (rtx);
e1ab7874 1272
1273extern dw_t get_dep_weak_1 (ds_t, ds_t);
6a1cdb4d 1274extern dw_t get_dep_weak (ds_t, ds_t);
4d64d9a4 1275extern ds_t set_dep_weak (ds_t, ds_t, dw_t);
e1ab7874 1276extern dw_t estimate_dep_weak (rtx, rtx);
6a1cdb4d 1277extern ds_t ds_merge (ds_t, ds_t);
e1ab7874 1278extern ds_t ds_full_merge (ds_t, ds_t, rtx, rtx);
1279extern ds_t ds_max_merge (ds_t, ds_t);
1280extern dw_t ds_weak (ds_t);
1281extern ds_t ds_get_speculation_types (ds_t);
1282extern ds_t ds_get_max_dep_weak (ds_t);
1283
1284extern void sched_deps_init (bool);
1285extern void sched_deps_finish (void);
1286
1287extern void haifa_note_reg_set (int);
1288extern void haifa_note_reg_clobber (int);
1289extern void haifa_note_reg_use (int);
1290
1291extern void maybe_extend_reg_info_p (void);
1292
68e419a1 1293extern void deps_start_bb (struct deps_desc *, rtx);
e1ab7874 1294extern enum reg_note ds_to_dt (ds_t);
1295
1296extern bool deps_pools_are_empty_p (void);
1297extern void sched_free_deps (rtx, rtx, bool);
1298extern void extend_dependency_caches (int, bool);
1299
93f6b030 1300extern void debug_ds (ds_t);
6adce0fb 1301
a7dcf969 1302
6adce0fb 1303/* Functions in haifa-sched.c. */
a7dcf969 1304extern void sched_init_region_reg_pressure_info (void);
5493cb9a 1305extern int haifa_classify_insn (const_rtx);
6a1cdb4d 1306extern void get_ebb_head_tail (basic_block, basic_block, rtx *, rtx *);
5493cb9a 1307extern int no_real_insns_p (const_rtx, const_rtx);
7a31a7bd 1308
9997bd27 1309extern int insn_cost (rtx);
e1ab7874 1310extern int dep_cost_1 (dep_t, dw_t);
9997bd27 1311extern int dep_cost (dep_t);
60b8c5b3 1312extern int set_priorities (rtx, rtx);
7a31a7bd 1313
a7dcf969 1314extern void sched_setup_bb_reg_pressure_info (basic_block, rtx);
0a15667c 1315extern bool schedule_block (basic_block *, state_t);
e1ab7874 1316
1317extern int cycle_issued_insns;
1318extern int issue_rate;
1319extern int dfa_lookahead;
1320
1321extern void ready_sort (struct ready_list *);
1322extern rtx ready_element (struct ready_list *, int);
1323extern rtx *ready_lastpos (struct ready_list *);
7a31a7bd 1324
e4897000 1325extern int try_ready (rtx);
e1ab7874 1326extern void sched_extend_ready_list (int);
1327extern void sched_finish_ready_list (void);
1328extern void sched_change_pattern (rtx, rtx);
1329extern int sched_speculate_insn (rtx, ds_t, rtx *);
6a1cdb4d 1330extern void unlink_bb_notes (basic_block, basic_block);
1331extern void add_block (basic_block, basic_block);
6fcfdb19 1332extern rtx bb_note (basic_block);
e1ab7874 1333extern void concat_note_lists (rtx, rtx *);
5a976006 1334extern rtx sched_emit_insn (rtx);
0ac9454e 1335extern rtx get_ready_element (int);
1336extern int number_in_ready (void);
e1ab7874 1337\f
b0f8644a 1338/* Types and functions in sched-ebb.c. */
6a1cdb4d 1339
b0f8644a 1340extern basic_block schedule_ebb (rtx, rtx, bool);
1341extern void schedule_ebbs_init (void);
1342extern void schedule_ebbs_finish (void);
1343\f
e1ab7874 1344/* Types and functions in sched-rgn.c. */
93f6b030 1345
e1ab7874 1346/* A region is the main entity for interblock scheduling: insns
1347 are allowed to move between blocks in the same region, along
1348 control flow graph edges, in the 'up' direction. */
1349typedef struct
1350{
1351 /* Number of extended basic blocks in region. */
1352 int rgn_nr_blocks;
1353 /* cblocks in the region (actually index in rgn_bb_table). */
1354 int rgn_blocks;
1355 /* Dependencies for this region are already computed. Basically, indicates,
1356 that this is a recovery block. */
1357 unsigned int dont_calc_deps : 1;
1358 /* This region has at least one non-trivial ebb. */
1359 unsigned int has_real_ebb : 1;
1360}
1361region;
1362
1363extern int nr_regions;
1364extern region *rgn_table;
1365extern int *rgn_bb_table;
1366extern int *block_to_bb;
1367extern int *containing_rgn;
1368
90bd219d 1369/* Often used short-hand in the scheduler. The rest of the compiler uses
1370 BLOCK_FOR_INSN(INSN) and an indirect reference to get the basic block
1371 number ("index"). For historical reasons, the scheduler does not. */
1372#define BLOCK_NUM(INSN) (BLOCK_FOR_INSN (INSN)->index + 0)
1373
e1ab7874 1374#define RGN_NR_BLOCKS(rgn) (rgn_table[rgn].rgn_nr_blocks)
1375#define RGN_BLOCKS(rgn) (rgn_table[rgn].rgn_blocks)
1376#define RGN_DONT_CALC_DEPS(rgn) (rgn_table[rgn].dont_calc_deps)
1377#define RGN_HAS_REAL_EBB(rgn) (rgn_table[rgn].has_real_ebb)
1378#define BLOCK_TO_BB(block) (block_to_bb[block])
1379#define CONTAINING_RGN(block) (containing_rgn[block])
1380
1381/* The mapping from ebb to block. */
1382extern int *ebb_head;
1383#define BB_TO_BLOCK(ebb) (rgn_bb_table[ebb_head[ebb]])
1384#define EBB_FIRST_BB(ebb) BASIC_BLOCK (BB_TO_BLOCK (ebb))
1385#define EBB_LAST_BB(ebb) BASIC_BLOCK (rgn_bb_table[ebb_head[ebb + 1] - 1])
1386#define INSN_BB(INSN) (BLOCK_TO_BB (BLOCK_NUM (INSN)))
1387
1388extern int current_nr_blocks;
1389extern int current_blocks;
1390extern int target_bb;
e2f4a6ff 1391extern bool sched_no_dce;
e1ab7874 1392
c0457559 1393extern void set_modulo_params (int, int, int, int);
1394extern void record_delay_slot_pair (rtx, rtx, int, int);
effd1640 1395extern rtx real_insn_for_shadow (rtx);
c0457559 1396extern void discard_delay_pairs_above (int);
e2f4a6ff 1397extern void free_delay_pairs (void);
1398extern void add_delay_dependencies (rtx);
e1ab7874 1399extern bool sched_is_disabled_for_current_region_p (void);
1400extern void sched_rgn_init (bool);
1401extern void sched_rgn_finish (void);
1402extern void rgn_setup_region (int);
1403extern void sched_rgn_compute_dependencies (int);
1404extern void sched_rgn_local_init (int);
1405extern void sched_rgn_local_finish (void);
1406extern void sched_rgn_local_free (void);
1407extern void extend_regions (void);
1408extern void rgn_make_new_region_out_of_new_block (basic_block);
1409
1410extern void compute_priorities (void);
1411extern void increase_insn_priority (rtx, int);
1412extern void debug_rgn_dependencies (int);
a2819fc2 1413extern void debug_dependencies (rtx, rtx);
48e1416a 1414extern void free_rgn_deps (void);
e1ab7874 1415extern int contributes_to_priority (rtx, rtx);
1416extern void extend_rgns (int *, int *, sbitmap, int *);
68e419a1 1417extern void deps_join (struct deps_desc *, struct deps_desc *);
e1ab7874 1418
1419extern void rgn_setup_common_sched_info (void);
1420extern void rgn_setup_sched_infos (void);
1421
1422extern void debug_regions (void);
1423extern void debug_region (int);
1424extern void dump_region_dot (FILE *, int);
1425extern void dump_region_dot_file (const char *, int);
1426
1427extern void haifa_sched_init (void);
1428extern void haifa_sched_finish (void);
a2819fc2 1429
d452a169 1430extern void find_modifiable_mems (rtx, rtx);
1431
93f6b030 1432/* sched-deps.c interface to walk, add, search, update, resolve, delete
1433 and debug instruction dependencies. */
1434
1435/* Constants defining dependences lists. */
1436
1437/* No list. */
1438#define SD_LIST_NONE (0)
1439
1440/* hard_back_deps. */
1441#define SD_LIST_HARD_BACK (1)
1442
1443/* spec_back_deps. */
1444#define SD_LIST_SPEC_BACK (2)
1445
1446/* forw_deps. */
1447#define SD_LIST_FORW (4)
1448
1449/* resolved_back_deps. */
1450#define SD_LIST_RES_BACK (8)
1451
1452/* resolved_forw_deps. */
1453#define SD_LIST_RES_FORW (16)
1454
1455#define SD_LIST_BACK (SD_LIST_HARD_BACK | SD_LIST_SPEC_BACK)
1456
1457/* A type to hold above flags. */
1458typedef int sd_list_types_def;
1459
5493cb9a 1460extern void sd_next_list (const_rtx, sd_list_types_def *, deps_list_t *, bool *);
93f6b030 1461
1462/* Iterator to walk through, resolve and delete dependencies. */
1463struct _sd_iterator
1464{
1465 /* What lists to walk. Can be any combination of SD_LIST_* flags. */
1466 sd_list_types_def types;
1467
1468 /* Instruction dependencies lists of which will be walked. */
1469 rtx insn;
1470
1471 /* Pointer to the next field of the previous element. This is not
1472 simply a pointer to the next element to allow easy deletion from the
1473 list. When a dep is being removed from the list the iterator
1474 will automatically advance because the value in *linkp will start
becfaa62 1475 referring to the next element. */
93f6b030 1476 dep_link_t *linkp;
1477
1478 /* True if the current list is a resolved one. */
1479 bool resolved_p;
1480};
1481
1482typedef struct _sd_iterator sd_iterator_def;
1483
1484/* ??? We can move some definitions that are used in below inline functions
1485 out of sched-int.h to sched-deps.c provided that the below functions will
1486 become global externals.
1487 These definitions include:
1488 * struct _deps_list: opaque pointer is needed at global scope.
1489 * struct _dep_link: opaque pointer is needed at scope of sd_iterator_def.
1490 * struct _dep_node: opaque pointer is needed at scope of
1491 struct _deps_link. */
1492
1493/* Return initialized iterator. */
1494static inline sd_iterator_def
1495sd_iterator_start (rtx insn, sd_list_types_def types)
1496{
1497 /* Some dep_link a pointer to which will return NULL. */
1498 static dep_link_t null_link = NULL;
1499
1500 sd_iterator_def i;
1501
1502 i.types = types;
1503 i.insn = insn;
1504 i.linkp = &null_link;
1505
1506 /* Avoid 'uninitialized warning'. */
1507 i.resolved_p = false;
1508
1509 return i;
1510}
1511
1512/* Return the current element. */
1513static inline bool
1514sd_iterator_cond (sd_iterator_def *it_ptr, dep_t *dep_ptr)
1515{
1516 dep_link_t link = *it_ptr->linkp;
1517
1518 if (link != NULL)
1519 {
1520 *dep_ptr = DEP_LINK_DEP (link);
1521 return true;
1522 }
1523 else
1524 {
1525 sd_list_types_def types = it_ptr->types;
1526
1527 if (types != SD_LIST_NONE)
1528 /* Switch to next list. */
1529 {
1530 deps_list_t list;
1531
1532 sd_next_list (it_ptr->insn,
1533 &it_ptr->types, &list, &it_ptr->resolved_p);
1534
1535 it_ptr->linkp = &DEPS_LIST_FIRST (list);
1536
9845d120 1537 if (list)
1538 return sd_iterator_cond (it_ptr, dep_ptr);
93f6b030 1539 }
1540
1541 *dep_ptr = NULL;
1542 return false;
1543 }
1544}
1545
1546/* Advance iterator. */
1547static inline void
1548sd_iterator_next (sd_iterator_def *it_ptr)
1549{
1550 it_ptr->linkp = &DEP_LINK_NEXT (*it_ptr->linkp);
1551}
1552
1553/* A cycle wrapper. */
1554#define FOR_EACH_DEP(INSN, LIST_TYPES, ITER, DEP) \
1555 for ((ITER) = sd_iterator_start ((INSN), (LIST_TYPES)); \
1556 sd_iterator_cond (&(ITER), &(DEP)); \
1557 sd_iterator_next (&(ITER)))
1558
0ac9454e 1559#define IS_DISPATCH_ON 1
1560#define IS_CMP 2
1561#define DISPATCH_VIOLATION 3
1562#define FITS_DISPATCH_WINDOW 4
1563#define DISPATCH_INIT 5
1564#define ADD_TO_DISPATCH_WINDOW 6
1565
5493cb9a 1566extern int sd_lists_size (const_rtx, sd_list_types_def);
1567extern bool sd_lists_empty_p (const_rtx, sd_list_types_def);
93f6b030 1568extern void sd_init_insn (rtx);
1569extern void sd_finish_insn (rtx);
1570extern dep_t sd_find_dep_between (rtx, rtx, bool);
1571extern void sd_add_dep (dep_t, bool);
1572extern enum DEPS_ADJUST_RESULT sd_add_or_update_dep (dep_t, bool);
1573extern void sd_resolve_dep (sd_iterator_def);
e2f4a6ff 1574extern void sd_unresolve_dep (sd_iterator_def);
93f6b030 1575extern void sd_copy_back_deps (rtx, rtx, bool);
1576extern void sd_delete_dep (sd_iterator_def);
1577extern void sd_debug_lists (rtx, sd_list_types_def);
1578
db982eeb 1579#endif /* INSN_SCHEDULING */
1580
48e1416a 1581/* Functions in sched-vis.c. These must be outside INSN_SCHEDULING as
da61904d 1582 sched-vis.c is compiled always. */
1583extern void print_insn (char *, const_rtx, int);
1584extern void print_pattern (char *, const_rtx, int);
1585extern void print_value (char *, const_rtx, int);
1586
bcf3c70d 1587#endif /* GCC_SCHED_INT_H */
effd1640 1588