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d9d4fb43 | 1 | /* Static Single Assignment conversion routines for the GNU compiler. |
cf403648 | 2 | Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc. |
d9d4fb43 | 3 | |
1322177d | 4 | This file is part of GCC. |
d9d4fb43 | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2, or (at your option) any later | |
9 | version. | |
d9d4fb43 | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
770ae6cc RK |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
14 | for more details. | |
d9d4fb43 | 15 | |
770ae6cc | 16 | You should have received a copy of the GNU General Public License |
1322177d | 17 | along with GCC; see the file COPYING. If not, write to the Free |
770ae6cc RK |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA |
19 | 02111-1307, USA. */ | |
d9d4fb43 AS |
20 | |
21 | /* References: | |
22 | ||
23 | Building an Optimizing Compiler | |
24 | Robert Morgan | |
25 | Butterworth-Heinemann, 1998 | |
26 | ||
27 | Static Single Assignment Construction | |
28 | Preston Briggs, Tim Harvey, Taylor Simpson | |
29 | Technical Report, Rice University, 1995 | |
cdbca172 | 30 | ftp://ftp.cs.rice.edu/public/preston/optimizer/SSA.ps.gz. */ |
d9d4fb43 AS |
31 | |
32 | #include "config.h" | |
33 | #include "system.h" | |
34 | ||
35 | #include "rtl.h" | |
0829d244 | 36 | #include "expr.h" |
cdbca172 JO |
37 | #include "varray.h" |
38 | #include "partition.h" | |
39 | #include "sbitmap.h" | |
40 | #include "hashtab.h" | |
d9d4fb43 AS |
41 | #include "regs.h" |
42 | #include "hard-reg-set.h" | |
43 | #include "flags.h" | |
44 | #include "function.h" | |
45 | #include "real.h" | |
46 | #include "insn-config.h" | |
47 | #include "recog.h" | |
48 | #include "basic-block.h" | |
49 | #include "output.h" | |
b53978a3 | 50 | #include "ssa.h" |
d9d4fb43 | 51 | |
786de7eb | 52 | /* TODO: |
d9d4fb43 | 53 | |
4e872036 AS |
54 | Handle subregs better, maybe. For now, if a reg that's set in a |
55 | subreg expression is duplicated going into SSA form, an extra copy | |
56 | is inserted first that copies the entire reg into the duplicate, so | |
57 | that the other bits are preserved. This isn't strictly SSA, since | |
58 | at least part of the reg is assigned in more than one place (though | |
59 | they are adjacent). | |
60 | ||
d9d4fb43 AS |
61 | ??? What to do about strict_low_part. Probably I'll have to split |
62 | them out of their current instructions first thing. | |
63 | ||
64 | Actually the best solution may be to have a kind of "mid-level rtl" | |
65 | in which the RTL encodes exactly what we want, without exposing a | |
66 | lot of niggling processor details. At some later point we lower | |
67 | the representation, calling back into optabs to finish any necessary | |
4e872036 AS |
68 | expansion. */ |
69 | ||
cdbca172 JO |
70 | /* All pseudo-registers and select hard registers are converted to SSA |
71 | form. When converting out of SSA, these select hard registers are | |
72 | guaranteed to be mapped to their original register number. Each | |
73 | machine's .h file should define CONVERT_HARD_REGISTER_TO_SSA_P | |
74 | indicating which hard registers should be converted. | |
75 | ||
76 | When converting out of SSA, temporaries for all registers are | |
77 | partitioned. The partition is checked to ensure that all uses of | |
78 | the same hard register in the same machine mode are in the same | |
79 | class. */ | |
4e872036 | 80 | |
0e9e1e0a | 81 | /* If conservative_reg_partition is nonzero, use a conservative |
4e872036 AS |
82 | register partitioning algorithm (which leaves more regs after |
83 | emerging from SSA) instead of the coalescing one. This is being | |
84 | left in for a limited time only, as a debugging tool until the | |
85 | coalescing algorithm is validated. */ | |
cdbca172 | 86 | |
4e872036 | 87 | static int conservative_reg_partition; |
d9d4fb43 | 88 | |
4e872036 AS |
89 | /* This flag is set when the CFG is in SSA form. */ |
90 | int in_ssa_form = 0; | |
d9d4fb43 | 91 | |
cdbca172 | 92 | /* Element I is the single instruction that sets register I. */ |
d9d4fb43 AS |
93 | varray_type ssa_definition; |
94 | ||
d9d4fb43 AS |
95 | /* Element I-PSEUDO is the normal register that originated the ssa |
96 | register in question. */ | |
97 | varray_type ssa_rename_from; | |
98 | ||
cdbca172 JO |
99 | /* Element I is the normal register that originated the ssa |
100 | register in question. | |
101 | ||
102 | A hash table stores the (register, rtl) pairs. These are each | |
103 | xmalloc'ed and deleted when the hash table is destroyed. */ | |
104 | htab_t ssa_rename_from_ht; | |
105 | ||
106 | /* The running target ssa register for a given pseudo register. | |
107 | (Pseudo registers appear in only one mode.) */ | |
108 | static rtx *ssa_rename_to_pseudo; | |
109 | /* Similar, but for hard registers. A hard register can appear in | |
110 | many modes, so we store an equivalent pseudo for each of the | |
111 | modes. */ | |
112 | static rtx ssa_rename_to_hard[FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]; | |
113 | ||
114 | /* ssa_rename_from maps pseudo registers to the original corresponding | |
115 | RTL. It is implemented as using a hash table. */ | |
116 | ||
117 | typedef struct { | |
118 | unsigned int reg; | |
119 | rtx original; | |
120 | } ssa_rename_from_pair; | |
121 | ||
122 | struct ssa_rename_from_hash_table_data { | |
123 | sbitmap canonical_elements; | |
124 | partition reg_partition; | |
125 | }; | |
126 | ||
2f937369 DM |
127 | static rtx gen_sequence |
128 | PARAMS ((void)); | |
b53978a3 | 129 | static void ssa_rename_from_initialize |
cdbca172 | 130 | PARAMS ((void)); |
b53978a3 | 131 | static rtx ssa_rename_from_lookup |
cdbca172 | 132 | PARAMS ((int reg)); |
b53978a3 | 133 | static unsigned int original_register |
cdbca172 | 134 | PARAMS ((unsigned int regno)); |
b53978a3 | 135 | static void ssa_rename_from_insert |
cdbca172 | 136 | PARAMS ((unsigned int reg, rtx r)); |
b53978a3 | 137 | static void ssa_rename_from_free |
cdbca172 JO |
138 | PARAMS ((void)); |
139 | typedef int (*srf_trav) PARAMS ((int regno, rtx r, sbitmap canonical_elements, partition reg_partition)); | |
140 | static void ssa_rename_from_traverse | |
141 | PARAMS ((htab_trav callback_function, sbitmap canonical_elements, partition reg_partition)); | |
b53978a3 | 142 | /*static Avoid warnign message. */ void ssa_rename_from_print |
cdbca172 JO |
143 | PARAMS ((void)); |
144 | static int ssa_rename_from_print_1 | |
145 | PARAMS ((void **slot, void *data)); | |
146 | static hashval_t ssa_rename_from_hash_function | |
147 | PARAMS ((const void * srfp)); | |
148 | static int ssa_rename_from_equal | |
149 | PARAMS ((const void *srfp1, const void *srfp2)); | |
150 | static void ssa_rename_from_delete | |
151 | PARAMS ((void *srfp)); | |
152 | ||
153 | static rtx ssa_rename_to_lookup | |
154 | PARAMS ((rtx reg)); | |
155 | static void ssa_rename_to_insert | |
156 | PARAMS ((rtx reg, rtx r)); | |
d9d4fb43 AS |
157 | |
158 | /* The number of registers that were live on entry to the SSA routines. */ | |
770ae6cc | 159 | static unsigned int ssa_max_reg_num; |
d9d4fb43 AS |
160 | |
161 | /* Local function prototypes. */ | |
162 | ||
5397b155 GK |
163 | struct rename_context; |
164 | ||
d9d4fb43 AS |
165 | static inline rtx * phi_alternative |
166 | PARAMS ((rtx, int)); | |
d9d4fb43 | 167 | static void compute_dominance_frontiers_1 |
355be0dc | 168 | PARAMS ((sbitmap *frontiers, dominance_info idom, int bb, sbitmap done)); |
d9d4fb43 AS |
169 | static void find_evaluations_1 |
170 | PARAMS ((rtx dest, rtx set, void *data)); | |
171 | static void find_evaluations | |
172 | PARAMS ((sbitmap *evals, int nregs)); | |
173 | static void compute_iterated_dominance_frontiers | |
174 | PARAMS ((sbitmap *idfs, sbitmap *frontiers, sbitmap *evals, int nregs)); | |
175 | static void insert_phi_node | |
176 | PARAMS ((int regno, int b)); | |
177 | static void insert_phi_nodes | |
178 | PARAMS ((sbitmap *idfs, sbitmap *evals, int nregs)); | |
786de7eb | 179 | static void create_delayed_rename |
5397b155 | 180 | PARAMS ((struct rename_context *, rtx *)); |
786de7eb | 181 | static void apply_delayed_renames |
5397b155 | 182 | PARAMS ((struct rename_context *)); |
786de7eb | 183 | static int rename_insn_1 |
d9d4fb43 | 184 | PARAMS ((rtx *ptr, void *data)); |
786de7eb | 185 | static void rename_block |
355be0dc | 186 | PARAMS ((int b, dominance_info dom)); |
786de7eb | 187 | static void rename_registers |
355be0dc | 188 | PARAMS ((int nregs, dominance_info idom)); |
d9d4fb43 AS |
189 | |
190 | static inline int ephi_add_node | |
191 | PARAMS ((rtx reg, rtx *nodes, int *n_nodes)); | |
192 | static int * ephi_forward | |
193 | PARAMS ((int t, sbitmap visited, sbitmap *succ, int *tstack)); | |
194 | static void ephi_backward | |
195 | PARAMS ((int t, sbitmap visited, sbitmap *pred, rtx *nodes)); | |
196 | static void ephi_create | |
197 | PARAMS ((int t, sbitmap visited, sbitmap *pred, sbitmap *succ, rtx *nodes)); | |
198 | static void eliminate_phi | |
199 | PARAMS ((edge e, partition reg_partition)); | |
786de7eb | 200 | static int make_regs_equivalent_over_bad_edges |
d9d4fb43 | 201 | PARAMS ((int bb, partition reg_partition)); |
4e872036 AS |
202 | |
203 | /* These are used only in the conservative register partitioning | |
204 | algorithms. */ | |
786de7eb | 205 | static int make_equivalent_phi_alternatives_equivalent |
d9d4fb43 | 206 | PARAMS ((int bb, partition reg_partition)); |
786de7eb | 207 | static partition compute_conservative_reg_partition |
62771d51 | 208 | PARAMS ((void)); |
cdbca172 JO |
209 | static int record_canonical_element_1 |
210 | PARAMS ((void **srfp, void *data)); | |
211 | static int check_hard_regs_in_partition | |
212 | PARAMS ((partition reg_partition)); | |
786de7eb | 213 | static int rename_equivalent_regs_in_insn |
4e872036 AS |
214 | PARAMS ((rtx *ptr, void *data)); |
215 | ||
216 | /* These are used in the register coalescing algorithm. */ | |
217 | static int coalesce_if_unconflicting | |
218 | PARAMS ((partition p, conflict_graph conflicts, int reg1, int reg2)); | |
219 | static int coalesce_regs_in_copies | |
6308dae9 | 220 | PARAMS ((basic_block bb, partition p, conflict_graph conflicts)); |
4e872036 AS |
221 | static int coalesce_reg_in_phi |
222 | PARAMS ((rtx, int dest_regno, int src_regno, void *data)); | |
223 | static int coalesce_regs_in_successor_phi_nodes | |
6308dae9 | 224 | PARAMS ((basic_block bb, partition p, conflict_graph conflicts)); |
4e872036 | 225 | static partition compute_coalesced_reg_partition |
36244024 | 226 | PARAMS ((void)); |
786de7eb | 227 | static int mark_reg_in_phi |
4e872036 AS |
228 | PARAMS ((rtx *ptr, void *data)); |
229 | static void mark_phi_and_copy_regs | |
230 | PARAMS ((regset phi_set)); | |
231 | ||
786de7eb | 232 | static int rename_equivalent_regs_in_insn |
d9d4fb43 | 233 | PARAMS ((rtx *ptr, void *data)); |
786de7eb | 234 | static void rename_equivalent_regs |
d9d4fb43 AS |
235 | PARAMS ((partition reg_partition)); |
236 | ||
cdbca172 JO |
237 | /* Deal with hard registers. */ |
238 | static int conflicting_hard_regs_p | |
239 | PARAMS ((int reg1, int reg2)); | |
240 | ||
241 | /* ssa_rename_to maps registers and machine modes to SSA pseudo registers. */ | |
242 | ||
243 | /* Find the register associated with REG in the indicated mode. */ | |
244 | ||
245 | static rtx | |
246 | ssa_rename_to_lookup (reg) | |
247 | rtx reg; | |
248 | { | |
249 | if (!HARD_REGISTER_P (reg)) | |
250 | return ssa_rename_to_pseudo[REGNO (reg) - FIRST_PSEUDO_REGISTER]; | |
251 | else | |
252 | return ssa_rename_to_hard[REGNO (reg)][GET_MODE (reg)]; | |
253 | } | |
254 | ||
255 | /* Store a new value mapping REG to R in ssa_rename_to. */ | |
256 | ||
257 | static void | |
258 | ssa_rename_to_insert(reg, r) | |
259 | rtx reg; | |
260 | rtx r; | |
261 | { | |
262 | if (!HARD_REGISTER_P (reg)) | |
263 | ssa_rename_to_pseudo[REGNO (reg) - FIRST_PSEUDO_REGISTER] = r; | |
264 | else | |
265 | ssa_rename_to_hard[REGNO (reg)][GET_MODE (reg)] = r; | |
266 | } | |
267 | ||
268 | /* Prepare ssa_rename_from for use. */ | |
269 | ||
b53978a3 | 270 | static void |
cdbca172 JO |
271 | ssa_rename_from_initialize () |
272 | { | |
273 | /* We use an arbitrary initial hash table size of 64. */ | |
274 | ssa_rename_from_ht = htab_create (64, | |
275 | &ssa_rename_from_hash_function, | |
276 | &ssa_rename_from_equal, | |
277 | &ssa_rename_from_delete); | |
278 | } | |
279 | ||
280 | /* Find the REG entry in ssa_rename_from. Return NULL_RTX if no entry is | |
281 | found. */ | |
282 | ||
b53978a3 | 283 | static rtx |
cdbca172 JO |
284 | ssa_rename_from_lookup (reg) |
285 | int reg; | |
286 | { | |
287 | ssa_rename_from_pair srfp; | |
288 | ssa_rename_from_pair *answer; | |
289 | srfp.reg = reg; | |
290 | srfp.original = NULL_RTX; | |
291 | answer = (ssa_rename_from_pair *) | |
292 | htab_find_with_hash (ssa_rename_from_ht, (void *) &srfp, reg); | |
293 | return (answer == 0 ? NULL_RTX : answer->original); | |
294 | } | |
295 | ||
296 | /* Find the number of the original register specified by REGNO. If | |
297 | the register is a pseudo, return the original register's number. | |
298 | Otherwise, return this register number REGNO. */ | |
299 | ||
b53978a3 | 300 | static unsigned int |
cdbca172 JO |
301 | original_register (regno) |
302 | unsigned int regno; | |
303 | { | |
304 | rtx original_rtx = ssa_rename_from_lookup (regno); | |
305 | return original_rtx != NULL_RTX ? REGNO (original_rtx) : regno; | |
306 | } | |
307 | ||
308 | /* Add mapping from R to REG to ssa_rename_from even if already present. */ | |
309 | ||
b53978a3 | 310 | static void |
cdbca172 JO |
311 | ssa_rename_from_insert (reg, r) |
312 | unsigned int reg; | |
313 | rtx r; | |
314 | { | |
315 | void **slot; | |
316 | ssa_rename_from_pair *srfp = xmalloc (sizeof (ssa_rename_from_pair)); | |
317 | srfp->reg = reg; | |
318 | srfp->original = r; | |
319 | slot = htab_find_slot_with_hash (ssa_rename_from_ht, (const void *) srfp, | |
320 | reg, INSERT); | |
321 | if (*slot != 0) | |
322 | free ((void *) *slot); | |
323 | *slot = srfp; | |
324 | } | |
325 | ||
326 | /* Apply the CALLBACK_FUNCTION to each element in ssa_rename_from. | |
327 | CANONICAL_ELEMENTS and REG_PARTITION pass data needed by the only | |
328 | current use of this function. */ | |
329 | ||
b53978a3 | 330 | static void |
cdbca172 JO |
331 | ssa_rename_from_traverse (callback_function, |
332 | canonical_elements, reg_partition) | |
333 | htab_trav callback_function; | |
334 | sbitmap canonical_elements; | |
335 | partition reg_partition; | |
336 | { | |
337 | struct ssa_rename_from_hash_table_data srfhd; | |
338 | srfhd.canonical_elements = canonical_elements; | |
339 | srfhd.reg_partition = reg_partition; | |
340 | htab_traverse (ssa_rename_from_ht, callback_function, (void *) &srfhd); | |
341 | } | |
342 | ||
343 | /* Destroy ssa_rename_from. */ | |
344 | ||
b53978a3 | 345 | static void |
cdbca172 JO |
346 | ssa_rename_from_free () |
347 | { | |
348 | htab_delete (ssa_rename_from_ht); | |
349 | } | |
350 | ||
351 | /* Print the contents of ssa_rename_from. */ | |
352 | ||
b53978a3 JO |
353 | /* static Avoid erroneous error message. */ |
354 | void | |
cdbca172 JO |
355 | ssa_rename_from_print () |
356 | { | |
357 | printf ("ssa_rename_from's hash table contents:\n"); | |
358 | htab_traverse (ssa_rename_from_ht, &ssa_rename_from_print_1, NULL); | |
359 | } | |
360 | ||
361 | /* Print the contents of the hash table entry SLOT, passing the unused | |
362 | sttribute DATA. Used as a callback function with htab_traverse (). */ | |
363 | ||
364 | static int | |
365 | ssa_rename_from_print_1 (slot, data) | |
366 | void **slot; | |
367 | void *data ATTRIBUTE_UNUSED; | |
368 | { | |
369 | ssa_rename_from_pair * p = *slot; | |
370 | printf ("ssa_rename_from maps pseudo %i to original %i.\n", | |
371 | p->reg, REGNO (p->original)); | |
372 | return 1; | |
373 | } | |
374 | ||
375 | /* Given a hash entry SRFP, yield a hash value. */ | |
376 | ||
377 | static hashval_t | |
378 | ssa_rename_from_hash_function (srfp) | |
379 | const void *srfp; | |
380 | { | |
ce1cc601 | 381 | return ((const ssa_rename_from_pair *) srfp)->reg; |
cdbca172 JO |
382 | } |
383 | ||
384 | /* Test whether two hash table entries SRFP1 and SRFP2 are equal. */ | |
385 | ||
386 | static int | |
387 | ssa_rename_from_equal (srfp1, srfp2) | |
388 | const void *srfp1; | |
389 | const void *srfp2; | |
390 | { | |
391 | return ssa_rename_from_hash_function (srfp1) == | |
392 | ssa_rename_from_hash_function (srfp2); | |
393 | } | |
394 | ||
395 | /* Delete the hash table entry SRFP. */ | |
396 | ||
397 | static void | |
398 | ssa_rename_from_delete (srfp) | |
399 | void *srfp; | |
400 | { | |
401 | free (srfp); | |
402 | } | |
d9d4fb43 | 403 | |
d9d4fb43 AS |
404 | /* Given the SET of a PHI node, return the address of the alternative |
405 | for predecessor block C. */ | |
406 | ||
407 | static inline rtx * | |
408 | phi_alternative (set, c) | |
409 | rtx set; | |
410 | int c; | |
411 | { | |
412 | rtvec phi_vec = XVEC (SET_SRC (set), 0); | |
413 | int v; | |
414 | ||
415 | for (v = GET_NUM_ELEM (phi_vec) - 2; v >= 0; v -= 2) | |
416 | if (INTVAL (RTVEC_ELT (phi_vec, v + 1)) == c) | |
417 | return &RTVEC_ELT (phi_vec, v); | |
418 | ||
419 | return NULL; | |
420 | } | |
421 | ||
422 | /* Given the SET of a phi node, remove the alternative for predecessor | |
0e9e1e0a | 423 | block C. Return nonzero on success, or zero if no alternative is |
d9d4fb43 AS |
424 | found for C. */ |
425 | ||
fd9305ef JL |
426 | int |
427 | remove_phi_alternative (set, block) | |
d9d4fb43 | 428 | rtx set; |
fd9305ef | 429 | basic_block block; |
d9d4fb43 AS |
430 | { |
431 | rtvec phi_vec = XVEC (SET_SRC (set), 0); | |
432 | int num_elem = GET_NUM_ELEM (phi_vec); | |
fd9305ef | 433 | int v, c; |
d9d4fb43 | 434 | |
0b17ab2f | 435 | c = block->index; |
d9d4fb43 AS |
436 | for (v = num_elem - 2; v >= 0; v -= 2) |
437 | if (INTVAL (RTVEC_ELT (phi_vec, v + 1)) == c) | |
438 | { | |
439 | if (v < num_elem - 2) | |
440 | { | |
441 | RTVEC_ELT (phi_vec, v) = RTVEC_ELT (phi_vec, num_elem - 2); | |
442 | RTVEC_ELT (phi_vec, v + 1) = RTVEC_ELT (phi_vec, num_elem - 1); | |
443 | } | |
444 | PUT_NUM_ELEM (phi_vec, num_elem - 2); | |
445 | return 1; | |
446 | } | |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
d9d4fb43 AS |
451 | /* For all registers, find all blocks in which they are set. |
452 | ||
453 | This is the transform of what would be local kill information that | |
454 | we ought to be getting from flow. */ | |
455 | ||
456 | static sbitmap *fe_evals; | |
457 | static int fe_current_bb; | |
458 | ||
459 | static void | |
460 | find_evaluations_1 (dest, set, data) | |
461 | rtx dest; | |
462 | rtx set ATTRIBUTE_UNUSED; | |
463 | void *data ATTRIBUTE_UNUSED; | |
464 | { | |
465 | if (GET_CODE (dest) == REG | |
cdbca172 JO |
466 | && CONVERT_REGISTER_TO_SSA_P (REGNO (dest))) |
467 | SET_BIT (fe_evals[REGNO (dest)], fe_current_bb); | |
d9d4fb43 AS |
468 | } |
469 | ||
470 | static void | |
471 | find_evaluations (evals, nregs) | |
472 | sbitmap *evals; | |
473 | int nregs; | |
474 | { | |
e0082a72 | 475 | basic_block bb; |
d9d4fb43 AS |
476 | |
477 | sbitmap_vector_zero (evals, nregs); | |
478 | fe_evals = evals; | |
479 | ||
e0082a72 | 480 | FOR_EACH_BB_REVERSE (bb) |
d9d4fb43 AS |
481 | { |
482 | rtx p, last; | |
483 | ||
e0082a72 ZD |
484 | fe_current_bb = bb->index; |
485 | p = bb->head; | |
486 | last = bb->end; | |
d9d4fb43 AS |
487 | while (1) |
488 | { | |
2c3c49de | 489 | if (INSN_P (p)) |
d9d4fb43 AS |
490 | note_stores (PATTERN (p), find_evaluations_1, NULL); |
491 | ||
492 | if (p == last) | |
493 | break; | |
494 | p = NEXT_INSN (p); | |
495 | } | |
496 | } | |
497 | } | |
498 | ||
d9d4fb43 | 499 | /* Computing the Dominance Frontier: |
786de7eb KH |
500 | |
501 | As decribed in Morgan, section 3.5, this may be done simply by | |
d9d4fb43 AS |
502 | walking the dominator tree bottom-up, computing the frontier for |
503 | the children before the parent. When considering a block B, | |
504 | there are two cases: | |
505 | ||
506 | (1) A flow graph edge leaving B that does not lead to a child | |
507 | of B in the dominator tree must be a block that is either equal | |
508 | to B or not dominated by B. Such blocks belong in the frontier | |
509 | of B. | |
510 | ||
511 | (2) Consider a block X in the frontier of one of the children C | |
512 | of B. If X is not equal to B and is not dominated by B, it | |
513 | is in the frontier of B. | |
514 | */ | |
515 | ||
516 | static void | |
517 | compute_dominance_frontiers_1 (frontiers, idom, bb, done) | |
518 | sbitmap *frontiers; | |
355be0dc | 519 | dominance_info idom; |
d9d4fb43 AS |
520 | int bb; |
521 | sbitmap done; | |
522 | { | |
523 | basic_block b = BASIC_BLOCK (bb); | |
524 | edge e; | |
e0082a72 | 525 | basic_block c; |
d9d4fb43 AS |
526 | |
527 | SET_BIT (done, bb); | |
528 | sbitmap_zero (frontiers[bb]); | |
529 | ||
530 | /* Do the frontier of the children first. Not all children in the | |
531 | dominator tree (blocks dominated by this one) are children in the | |
532 | CFG, so check all blocks. */ | |
e0082a72 | 533 | FOR_EACH_BB (c) |
355be0dc JH |
534 | if (get_immediate_dominator (idom, c)->index == bb |
535 | && ! TEST_BIT (done, c->index)) | |
e0082a72 | 536 | compute_dominance_frontiers_1 (frontiers, idom, c->index, done); |
d9d4fb43 AS |
537 | |
538 | /* Find blocks conforming to rule (1) above. */ | |
539 | for (e = b->succ; e; e = e->succ_next) | |
540 | { | |
541 | if (e->dest == EXIT_BLOCK_PTR) | |
542 | continue; | |
355be0dc | 543 | if (get_immediate_dominator (idom, e->dest)->index != bb) |
0b17ab2f | 544 | SET_BIT (frontiers[bb], e->dest->index); |
d9d4fb43 AS |
545 | } |
546 | ||
547 | /* Find blocks conforming to rule (2). */ | |
e0082a72 | 548 | FOR_EACH_BB (c) |
355be0dc | 549 | if (get_immediate_dominator (idom, c)->index == bb) |
d9d4fb43 AS |
550 | { |
551 | int x; | |
e0082a72 | 552 | EXECUTE_IF_SET_IN_SBITMAP (frontiers[c->index], 0, x, |
d9d4fb43 | 553 | { |
355be0dc | 554 | if (get_immediate_dominator (idom, BASIC_BLOCK (x))->index != bb) |
d9d4fb43 AS |
555 | SET_BIT (frontiers[bb], x); |
556 | }); | |
557 | } | |
558 | } | |
559 | ||
316dcdf6 | 560 | void |
d9d4fb43 AS |
561 | compute_dominance_frontiers (frontiers, idom) |
562 | sbitmap *frontiers; | |
355be0dc | 563 | dominance_info idom; |
d9d4fb43 | 564 | { |
d55bc081 | 565 | sbitmap done = sbitmap_alloc (last_basic_block); |
d9d4fb43 AS |
566 | sbitmap_zero (done); |
567 | ||
568 | compute_dominance_frontiers_1 (frontiers, idom, 0, done); | |
569 | ||
570 | sbitmap_free (done); | |
571 | } | |
572 | ||
d9d4fb43 AS |
573 | /* Computing the Iterated Dominance Frontier: |
574 | ||
575 | This is the set of merge points for a given register. | |
576 | ||
577 | This is not particularly intuitive. See section 7.1 of Morgan, in | |
578 | particular figures 7.3 and 7.4 and the immediately surrounding text. | |
579 | */ | |
580 | ||
581 | static void | |
582 | compute_iterated_dominance_frontiers (idfs, frontiers, evals, nregs) | |
583 | sbitmap *idfs; | |
584 | sbitmap *frontiers; | |
585 | sbitmap *evals; | |
586 | int nregs; | |
587 | { | |
588 | sbitmap worklist; | |
589 | int reg, passes = 0; | |
590 | ||
d55bc081 | 591 | worklist = sbitmap_alloc (last_basic_block); |
d9d4fb43 AS |
592 | |
593 | for (reg = 0; reg < nregs; ++reg) | |
594 | { | |
595 | sbitmap idf = idfs[reg]; | |
596 | int b, changed; | |
597 | ||
598 | /* Start the iterative process by considering those blocks that | |
599 | evaluate REG. We'll add their dominance frontiers to the | |
600 | IDF, and then consider the blocks we just added. */ | |
601 | sbitmap_copy (worklist, evals[reg]); | |
602 | ||
603 | /* Morgan's algorithm is incorrect here. Blocks that evaluate | |
604 | REG aren't necessarily in REG's IDF. Start with an empty IDF. */ | |
605 | sbitmap_zero (idf); | |
606 | ||
607 | /* Iterate until the worklist is empty. */ | |
608 | do | |
609 | { | |
610 | changed = 0; | |
611 | passes++; | |
612 | EXECUTE_IF_SET_IN_SBITMAP (worklist, 0, b, | |
613 | { | |
614 | RESET_BIT (worklist, b); | |
615 | /* For each block on the worklist, add to the IDF all | |
616 | blocks on its dominance frontier that aren't already | |
617 | on the IDF. Every block that's added is also added | |
618 | to the worklist. */ | |
619 | sbitmap_union_of_diff (worklist, worklist, frontiers[b], idf); | |
620 | sbitmap_a_or_b (idf, idf, frontiers[b]); | |
621 | changed = 1; | |
622 | }); | |
623 | } | |
624 | while (changed); | |
625 | } | |
626 | ||
627 | sbitmap_free (worklist); | |
628 | ||
629 | if (rtl_dump_file) | |
630 | { | |
cf403648 KH |
631 | fprintf (rtl_dump_file, |
632 | "Iterated dominance frontier: %d passes on %d regs.\n", | |
633 | passes, nregs); | |
d9d4fb43 AS |
634 | } |
635 | } | |
636 | ||
d9d4fb43 AS |
637 | /* Insert the phi nodes. */ |
638 | ||
639 | static void | |
640 | insert_phi_node (regno, bb) | |
641 | int regno, bb; | |
642 | { | |
643 | basic_block b = BASIC_BLOCK (bb); | |
644 | edge e; | |
645 | int npred, i; | |
646 | rtvec vec; | |
647 | rtx phi, reg; | |
589ca5cb MM |
648 | rtx insn; |
649 | int end_p; | |
d9d4fb43 AS |
650 | |
651 | /* Find out how many predecessors there are. */ | |
652 | for (e = b->pred, npred = 0; e; e = e->pred_next) | |
653 | if (e->src != ENTRY_BLOCK_PTR) | |
654 | npred++; | |
655 | ||
656 | /* If this block has no "interesting" preds, then there is nothing to | |
657 | do. Consider a block that only has the entry block as a pred. */ | |
658 | if (npred == 0) | |
659 | return; | |
660 | ||
cdbca172 JO |
661 | /* This is the register to which the phi function will be assigned. */ |
662 | reg = regno_reg_rtx[regno]; | |
d9d4fb43 AS |
663 | |
664 | /* Construct the arguments to the PHI node. The use of pc_rtx is just | |
665 | a placeholder; we'll insert the proper value in rename_registers. */ | |
666 | vec = rtvec_alloc (npred * 2); | |
667 | for (e = b->pred, i = 0; e ; e = e->pred_next, i += 2) | |
668 | if (e->src != ENTRY_BLOCK_PTR) | |
669 | { | |
670 | RTVEC_ELT (vec, i + 0) = pc_rtx; | |
0b17ab2f | 671 | RTVEC_ELT (vec, i + 1) = GEN_INT (e->src->index); |
d9d4fb43 AS |
672 | } |
673 | ||
674 | phi = gen_rtx_PHI (VOIDmode, vec); | |
675 | phi = gen_rtx_SET (VOIDmode, reg, phi); | |
676 | ||
589ca5cb MM |
677 | insn = first_insn_after_basic_block_note (b); |
678 | end_p = PREV_INSN (insn) == b->end; | |
679 | emit_insn_before (phi, insn); | |
680 | if (end_p) | |
681 | b->end = PREV_INSN (insn); | |
d9d4fb43 AS |
682 | } |
683 | ||
d9d4fb43 AS |
684 | static void |
685 | insert_phi_nodes (idfs, evals, nregs) | |
686 | sbitmap *idfs; | |
687 | sbitmap *evals ATTRIBUTE_UNUSED; | |
688 | int nregs; | |
689 | { | |
690 | int reg; | |
691 | ||
692 | for (reg = 0; reg < nregs; ++reg) | |
cdbca172 | 693 | if (CONVERT_REGISTER_TO_SSA_P (reg)) |
d9d4fb43 AS |
694 | { |
695 | int b; | |
696 | EXECUTE_IF_SET_IN_SBITMAP (idfs[reg], 0, b, | |
697 | { | |
cdbca172 | 698 | if (REGNO_REG_SET_P (BASIC_BLOCK (b)->global_live_at_start, reg)) |
d9d4fb43 AS |
699 | insert_phi_node (reg, b); |
700 | }); | |
701 | } | |
702 | } | |
703 | ||
786de7eb | 704 | /* Rename the registers to conform to SSA. |
d9d4fb43 AS |
705 | |
706 | This is essentially the algorithm presented in Figure 7.8 of Morgan, | |
8d9afc4e | 707 | with a few changes to reduce pattern search time in favor of a bit |
d9d4fb43 AS |
708 | more memory usage. */ |
709 | ||
d9d4fb43 AS |
710 | /* One of these is created for each set. It will live in a list local |
711 | to its basic block for the duration of that block's processing. */ | |
712 | struct rename_set_data | |
713 | { | |
714 | struct rename_set_data *next; | |
5397b155 | 715 | /* This is the SET_DEST of the (first) SET that sets the REG. */ |
d9d4fb43 | 716 | rtx *reg_loc; |
5397b155 GK |
717 | /* This is what used to be at *REG_LOC. */ |
718 | rtx old_reg; | |
719 | /* This is the REG that will replace OLD_REG. It's set only | |
720 | when the rename data is moved onto the DONE_RENAMES queue. */ | |
d9d4fb43 | 721 | rtx new_reg; |
cdbca172 JO |
722 | /* This is what to restore ssa_rename_to_lookup (old_reg) to. It is |
723 | usually the previous contents of ssa_rename_to_lookup (old_reg). */ | |
d9d4fb43 | 724 | rtx prev_reg; |
5397b155 | 725 | /* This is the insn that contains all the SETs of the REG. */ |
4e872036 AS |
726 | rtx set_insn; |
727 | }; | |
728 | ||
729 | /* This struct is used to pass information to callback functions while | |
730 | renaming registers. */ | |
731 | struct rename_context | |
732 | { | |
5397b155 GK |
733 | struct rename_set_data *new_renames; |
734 | struct rename_set_data *done_renames; | |
4e872036 | 735 | rtx current_insn; |
d9d4fb43 AS |
736 | }; |
737 | ||
5397b155 GK |
738 | /* Queue the rename of *REG_LOC. */ |
739 | static void | |
740 | create_delayed_rename (c, reg_loc) | |
741 | struct rename_context *c; | |
742 | rtx *reg_loc; | |
743 | { | |
744 | struct rename_set_data *r; | |
745 | r = (struct rename_set_data *) xmalloc (sizeof(*r)); | |
786de7eb | 746 | |
5397b155 | 747 | if (GET_CODE (*reg_loc) != REG |
cdbca172 | 748 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*reg_loc))) |
cf403648 | 749 | abort (); |
5397b155 GK |
750 | |
751 | r->reg_loc = reg_loc; | |
752 | r->old_reg = *reg_loc; | |
cdbca172 | 753 | r->prev_reg = ssa_rename_to_lookup(r->old_reg); |
5397b155 GK |
754 | r->set_insn = c->current_insn; |
755 | r->next = c->new_renames; | |
756 | c->new_renames = r; | |
757 | } | |
d9d4fb43 AS |
758 | |
759 | /* This is part of a rather ugly hack to allow the pre-ssa regno to be | |
760 | reused. If, during processing, a register has not yet been touched, | |
cdbca172 | 761 | ssa_rename_to[regno][machno] will be NULL. Now, in the course of pushing |
786de7eb | 762 | and popping values from ssa_rename_to, when we would ordinarily |
d9d4fb43 AS |
763 | pop NULL back in, we pop RENAME_NO_RTX. We treat this exactly the |
764 | same as NULL, except that it signals that the original regno has | |
765 | already been reused. */ | |
766 | #define RENAME_NO_RTX pc_rtx | |
767 | ||
5397b155 GK |
768 | /* Move all the entries from NEW_RENAMES onto DONE_RENAMES by |
769 | applying all the renames on NEW_RENAMES. */ | |
770 | ||
771 | static void | |
772 | apply_delayed_renames (c) | |
773 | struct rename_context *c; | |
774 | { | |
775 | struct rename_set_data *r; | |
776 | struct rename_set_data *last_r = NULL; | |
cdbca172 | 777 | |
5397b155 GK |
778 | for (r = c->new_renames; r != NULL; r = r->next) |
779 | { | |
5397b155 | 780 | int new_regno; |
786de7eb | 781 | |
5397b155 GK |
782 | /* Failure here means that someone has a PARALLEL that sets |
783 | a register twice (bad!). */ | |
cdbca172 | 784 | if (ssa_rename_to_lookup (r->old_reg) != r->prev_reg) |
cf403648 | 785 | abort (); |
5397b155 GK |
786 | /* Failure here means we have changed REG_LOC before applying |
787 | the rename. */ | |
788 | /* For the first set we come across, reuse the original regno. */ | |
cdbca172 | 789 | if (r->prev_reg == NULL_RTX && !HARD_REGISTER_P (r->old_reg)) |
5397b155 GK |
790 | { |
791 | r->new_reg = r->old_reg; | |
2d76cb1a | 792 | /* We want to restore RENAME_NO_RTX rather than NULL_RTX. */ |
5397b155 GK |
793 | r->prev_reg = RENAME_NO_RTX; |
794 | } | |
795 | else | |
796 | r->new_reg = gen_reg_rtx (GET_MODE (r->old_reg)); | |
797 | new_regno = REGNO (r->new_reg); | |
cdbca172 | 798 | ssa_rename_to_insert (r->old_reg, r->new_reg); |
5397b155 GK |
799 | |
800 | if (new_regno >= (int) ssa_definition->num_elements) | |
801 | { | |
802 | int new_limit = new_regno * 5 / 4; | |
8f54374e | 803 | VARRAY_GROW (ssa_definition, new_limit); |
5397b155 GK |
804 | } |
805 | ||
806 | VARRAY_RTX (ssa_definition, new_regno) = r->set_insn; | |
cdbca172 | 807 | ssa_rename_from_insert (new_regno, r->old_reg); |
5397b155 GK |
808 | last_r = r; |
809 | } | |
810 | if (last_r != NULL) | |
811 | { | |
812 | last_r->next = c->done_renames; | |
813 | c->done_renames = c->new_renames; | |
814 | c->new_renames = NULL; | |
815 | } | |
816 | } | |
817 | ||
786de7eb | 818 | /* Part one of the first step of rename_block, called through for_each_rtx. |
d9d4fb43 AS |
819 | Mark pseudos that are set for later update. Transform uses of pseudos. */ |
820 | ||
821 | static int | |
822 | rename_insn_1 (ptr, data) | |
823 | rtx *ptr; | |
824 | void *data; | |
825 | { | |
826 | rtx x = *ptr; | |
4e872036 | 827 | struct rename_context *context = data; |
d9d4fb43 AS |
828 | |
829 | if (x == NULL_RTX) | |
830 | return 0; | |
831 | ||
832 | switch (GET_CODE (x)) | |
833 | { | |
834 | case SET: | |
835 | { | |
836 | rtx *destp = &SET_DEST (x); | |
837 | rtx dest = SET_DEST (x); | |
838 | ||
ea0eceb1 JL |
839 | /* An assignment to a paradoxical SUBREG does not read from |
840 | the destination operand, and thus does not need to be | |
841 | wrapped into a SEQUENCE when translating into SSA form. | |
842 | We merely strip off the SUBREG and proceed normally for | |
843 | this case. */ | |
844 | if (GET_CODE (dest) == SUBREG | |
845 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
846 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
847 | && GET_CODE (SUBREG_REG (dest)) == REG | |
848 | && CONVERT_REGISTER_TO_SSA_P (REGNO (SUBREG_REG (dest)))) | |
849 | { | |
850 | destp = &XEXP (dest, 0); | |
851 | dest = XEXP (dest, 0); | |
852 | } | |
853 | ||
5397b155 GK |
854 | /* Some SETs also use the REG specified in their LHS. |
855 | These can be detected by the presence of | |
856 | STRICT_LOW_PART, SUBREG, SIGN_EXTRACT, and ZERO_EXTRACT | |
857 | in the LHS. Handle these by changing | |
858 | (set (subreg (reg foo)) ...) | |
859 | into | |
860 | (sequence [(set (reg foo_1) (reg foo)) | |
786de7eb | 861 | (set (subreg (reg foo_1)) ...)]) |
5397b155 | 862 | |
ea0eceb1 JL |
863 | FIXME: Much of the time this is too much. For some constructs |
864 | we know that the output register is strictly an output | |
865 | (paradoxical SUBREGs and some libcalls for example). | |
866 | ||
867 | For those cases we are better off not making the false | |
5397b155 | 868 | dependency. */ |
5397b155 GK |
869 | if (GET_CODE (dest) == STRICT_LOW_PART |
870 | || GET_CODE (dest) == SUBREG | |
871 | || GET_CODE (dest) == SIGN_EXTRACT | |
872 | || GET_CODE (dest) == ZERO_EXTRACT) | |
d9d4fb43 | 873 | { |
5397b155 GK |
874 | rtx i, reg; |
875 | reg = dest; | |
786de7eb | 876 | |
5397b155 GK |
877 | while (GET_CODE (reg) == STRICT_LOW_PART |
878 | || GET_CODE (reg) == SUBREG | |
879 | || GET_CODE (reg) == SIGN_EXTRACT | |
880 | || GET_CODE (reg) == ZERO_EXTRACT) | |
881 | reg = XEXP (reg, 0); | |
786de7eb | 882 | |
5397b155 | 883 | if (GET_CODE (reg) == REG |
cdbca172 | 884 | && CONVERT_REGISTER_TO_SSA_P (REGNO (reg))) |
5397b155 GK |
885 | { |
886 | /* Generate (set reg reg), and do renaming on it so | |
887 | that it becomes (set reg_1 reg_0), and we will | |
888 | replace reg with reg_1 in the SUBREG. */ | |
889 | ||
890 | struct rename_set_data *saved_new_renames; | |
891 | saved_new_renames = context->new_renames; | |
892 | context->new_renames = NULL; | |
893 | i = emit_insn (gen_rtx_SET (VOIDmode, reg, reg)); | |
894 | for_each_rtx (&i, rename_insn_1, data); | |
895 | apply_delayed_renames (context); | |
896 | context->new_renames = saved_new_renames; | |
897 | } | |
d9d4fb43 | 898 | } |
ea0eceb1 JL |
899 | else if (GET_CODE (dest) == REG |
900 | && CONVERT_REGISTER_TO_SSA_P (REGNO (dest))) | |
d9d4fb43 AS |
901 | { |
902 | /* We found a genuine set of an interesting register. Tag | |
903 | it so that we can create a new name for it after we finish | |
904 | processing this insn. */ | |
905 | ||
5397b155 | 906 | create_delayed_rename (context, destp); |
d9d4fb43 AS |
907 | |
908 | /* Since we do not wish to (directly) traverse the | |
909 | SET_DEST, recurse through for_each_rtx for the SET_SRC | |
910 | and return. */ | |
5397b155 GK |
911 | if (GET_CODE (x) == SET) |
912 | for_each_rtx (&SET_SRC (x), rename_insn_1, data); | |
d9d4fb43 AS |
913 | return -1; |
914 | } | |
915 | ||
916 | /* Otherwise, this was not an interesting destination. Continue | |
917 | on, marking uses as normal. */ | |
918 | return 0; | |
919 | } | |
920 | ||
921 | case REG: | |
45b1f7c7 CL |
922 | if (CONVERT_REGISTER_TO_SSA_P (REGNO (x)) |
923 | && REGNO (x) < ssa_max_reg_num) | |
d9d4fb43 | 924 | { |
cdbca172 | 925 | rtx new_reg = ssa_rename_to_lookup (x); |
d9d4fb43 | 926 | |
cde0ce6e | 927 | if (new_reg != RENAME_NO_RTX && new_reg != NULL_RTX) |
d9d4fb43 | 928 | { |
cde0ce6e CL |
929 | if (GET_MODE (x) != GET_MODE (new_reg)) |
930 | abort (); | |
931 | *ptr = new_reg; | |
932 | } | |
933 | else | |
934 | { | |
935 | /* Undefined value used, rename it to a new pseudo register so | |
936 | that it cannot conflict with an existing register. */ | |
937 | *ptr = gen_reg_rtx (GET_MODE (x)); | |
d9d4fb43 | 938 | } |
d9d4fb43 AS |
939 | } |
940 | return -1; | |
941 | ||
cdbca172 JO |
942 | case CLOBBER: |
943 | /* There is considerable debate on how CLOBBERs ought to be | |
944 | handled in SSA. For now, we're keeping the CLOBBERs, which | |
945 | means that we don't really have SSA form. There are a couple | |
946 | of proposals for how to fix this problem, but neither is | |
947 | implemented yet. */ | |
948 | { | |
949 | rtx dest = XCEXP (x, 0, CLOBBER); | |
950 | if (REG_P (dest)) | |
951 | { | |
952 | if (CONVERT_REGISTER_TO_SSA_P (REGNO (dest)) | |
953 | && REGNO (dest) < ssa_max_reg_num) | |
954 | { | |
955 | rtx new_reg = ssa_rename_to_lookup (dest); | |
956 | if (new_reg != NULL_RTX && new_reg != RENAME_NO_RTX) | |
957 | XCEXP (x, 0, CLOBBER) = new_reg; | |
958 | } | |
959 | /* Stop traversing. */ | |
960 | return -1; | |
786de7eb | 961 | } |
cdbca172 JO |
962 | else |
963 | /* Continue traversing. */ | |
964 | return 0; | |
965 | } | |
966 | ||
d9d4fb43 AS |
967 | case PHI: |
968 | /* Never muck with the phi. We do that elsewhere, special-like. */ | |
969 | return -1; | |
970 | ||
971 | default: | |
972 | /* Anything else, continue traversing. */ | |
973 | return 0; | |
974 | } | |
975 | } | |
976 | ||
2f937369 DM |
977 | static rtx |
978 | gen_sequence () | |
979 | { | |
980 | rtx first_insn = get_insns (); | |
981 | rtx result; | |
982 | rtx tem; | |
983 | int i; | |
984 | int len; | |
985 | ||
986 | /* Count the insns in the chain. */ | |
987 | len = 0; | |
988 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
989 | len++; | |
990 | ||
991 | result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len)); | |
992 | ||
993 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
994 | XVECEXP (result, 0, i) = tem; | |
995 | ||
996 | return result; | |
997 | } | |
998 | ||
d9d4fb43 AS |
999 | static void |
1000 | rename_block (bb, idom) | |
1001 | int bb; | |
355be0dc | 1002 | dominance_info idom; |
d9d4fb43 AS |
1003 | { |
1004 | basic_block b = BASIC_BLOCK (bb); | |
1005 | edge e; | |
1006 | rtx insn, next, last; | |
1007 | struct rename_set_data *set_data = NULL; | |
e0082a72 | 1008 | basic_block c; |
d9d4fb43 AS |
1009 | |
1010 | /* Step One: Walk the basic block, adding new names for sets and | |
1011 | replacing uses. */ | |
786de7eb | 1012 | |
d9d4fb43 AS |
1013 | next = b->head; |
1014 | last = b->end; | |
1015 | do | |
1016 | { | |
1017 | insn = next; | |
2c3c49de | 1018 | if (INSN_P (insn)) |
d9d4fb43 | 1019 | { |
4e872036 | 1020 | struct rename_context context; |
5397b155 GK |
1021 | context.done_renames = set_data; |
1022 | context.new_renames = NULL; | |
4e872036 | 1023 | context.current_insn = insn; |
d9d4fb43 | 1024 | |
5397b155 | 1025 | start_sequence (); |
4e872036 AS |
1026 | for_each_rtx (&PATTERN (insn), rename_insn_1, &context); |
1027 | for_each_rtx (®_NOTES (insn), rename_insn_1, &context); | |
5397b155 GK |
1028 | |
1029 | /* Sometimes, we end up with a sequence of insns that | |
1030 | SSA needs to treat as a single insn. Wrap these in a | |
1031 | SEQUENCE. (Any notes now get attached to the SEQUENCE, | |
1032 | not to the old version inner insn.) */ | |
1033 | if (get_insns () != NULL_RTX) | |
1034 | { | |
7e1b6513 | 1035 | rtx seq; |
5397b155 | 1036 | int i; |
786de7eb | 1037 | |
5397b155 | 1038 | emit (PATTERN (insn)); |
7e1b6513 GK |
1039 | seq = gen_sequence (); |
1040 | /* We really want a SEQUENCE of SETs, not a SEQUENCE | |
1041 | of INSNs. */ | |
1042 | for (i = 0; i < XVECLEN (seq, 0); i++) | |
1043 | XVECEXP (seq, 0, i) = PATTERN (XVECEXP (seq, 0, i)); | |
1044 | PATTERN (insn) = seq; | |
5397b155 GK |
1045 | } |
1046 | end_sequence (); | |
786de7eb | 1047 | |
5397b155 GK |
1048 | apply_delayed_renames (&context); |
1049 | set_data = context.done_renames; | |
d9d4fb43 AS |
1050 | } |
1051 | ||
1052 | next = NEXT_INSN (insn); | |
1053 | } | |
1054 | while (insn != last); | |
1055 | ||
1056 | /* Step Two: Update the phi nodes of this block's successors. */ | |
1057 | ||
1058 | for (e = b->succ; e; e = e->succ_next) | |
1059 | { | |
1060 | if (e->dest == EXIT_BLOCK_PTR) | |
1061 | continue; | |
1062 | ||
589ca5cb | 1063 | insn = first_insn_after_basic_block_note (e->dest); |
d9d4fb43 AS |
1064 | |
1065 | while (PHI_NODE_P (insn)) | |
1066 | { | |
1067 | rtx phi = PATTERN (insn); | |
d9d4fb43 AS |
1068 | rtx reg; |
1069 | ||
1070 | /* Find out which of our outgoing registers this node is | |
cdbca172 | 1071 | intended to replace. Note that if this is not the first PHI |
d9d4fb43 AS |
1072 | node to have been created for this register, we have to |
1073 | jump through rename links to figure out which register | |
1074 | we're talking about. This can easily be recognized by | |
1075 | noting that the regno is new to this pass. */ | |
cdbca172 JO |
1076 | reg = SET_DEST (phi); |
1077 | if (REGNO (reg) >= ssa_max_reg_num) | |
1078 | reg = ssa_rename_from_lookup (REGNO (reg)); | |
3db35af4 MM |
1079 | if (reg == NULL_RTX) |
1080 | abort (); | |
cdbca172 | 1081 | reg = ssa_rename_to_lookup (reg); |
d9d4fb43 AS |
1082 | |
1083 | /* It is possible for the variable to be uninitialized on | |
1084 | edges in. Reduce the arity of the PHI so that we don't | |
1085 | consider those edges. */ | |
1086 | if (reg == NULL || reg == RENAME_NO_RTX) | |
1087 | { | |
5e93ca86 | 1088 | if (! remove_phi_alternative (phi, b)) |
d9d4fb43 AS |
1089 | abort (); |
1090 | } | |
1091 | else | |
1092 | { | |
1093 | /* When we created the PHI nodes, we did not know what mode | |
0132823e RK |
1094 | the register should be. Now that we've found an original, |
1095 | we can fill that in. */ | |
d9d4fb43 AS |
1096 | if (GET_MODE (SET_DEST (phi)) == VOIDmode) |
1097 | PUT_MODE (SET_DEST (phi), GET_MODE (reg)); | |
1098 | else if (GET_MODE (SET_DEST (phi)) != GET_MODE (reg)) | |
0132823e | 1099 | abort (); |
d9d4fb43 AS |
1100 | |
1101 | *phi_alternative (phi, bb) = reg; | |
d9d4fb43 AS |
1102 | } |
1103 | ||
1104 | insn = NEXT_INSN (insn); | |
1105 | } | |
1106 | } | |
1107 | ||
1108 | /* Step Three: Do the same to the children of this block in | |
1109 | dominator order. */ | |
1110 | ||
e0082a72 | 1111 | FOR_EACH_BB (c) |
355be0dc | 1112 | if (get_immediate_dominator (idom, c)->index == bb) |
e0082a72 | 1113 | rename_block (c->index, idom); |
d9d4fb43 | 1114 | |
5397b155 GK |
1115 | /* Step Four: Update the sets to refer to their new register, |
1116 | and restore ssa_rename_to to its previous state. */ | |
d9d4fb43 AS |
1117 | |
1118 | while (set_data) | |
1119 | { | |
1120 | struct rename_set_data *next; | |
4e872036 AS |
1121 | rtx old_reg = *set_data->reg_loc; |
1122 | ||
5397b155 | 1123 | if (*set_data->reg_loc != set_data->old_reg) |
cf403648 | 1124 | abort (); |
d9d4fb43 | 1125 | *set_data->reg_loc = set_data->new_reg; |
5397b155 | 1126 | |
cdbca172 | 1127 | ssa_rename_to_insert (old_reg, set_data->prev_reg); |
d9d4fb43 AS |
1128 | |
1129 | next = set_data->next; | |
1130 | free (set_data); | |
1131 | set_data = next; | |
786de7eb | 1132 | } |
d9d4fb43 AS |
1133 | } |
1134 | ||
1135 | static void | |
1136 | rename_registers (nregs, idom) | |
1137 | int nregs; | |
355be0dc | 1138 | dominance_info idom; |
d9d4fb43 AS |
1139 | { |
1140 | VARRAY_RTX_INIT (ssa_definition, nregs * 3, "ssa_definition"); | |
cdbca172 | 1141 | ssa_rename_from_initialize (); |
d9d4fb43 | 1142 | |
cdbca172 | 1143 | ssa_rename_to_pseudo = (rtx *) alloca (nregs * sizeof(rtx)); |
961192e1 | 1144 | memset ((char *) ssa_rename_to_pseudo, 0, nregs * sizeof(rtx)); |
786de7eb | 1145 | memset ((char *) ssa_rename_to_hard, 0, |
cdbca172 | 1146 | FIRST_PSEUDO_REGISTER * NUM_MACHINE_MODES * sizeof (rtx)); |
d9d4fb43 AS |
1147 | |
1148 | rename_block (0, idom); | |
1149 | ||
786de7eb | 1150 | /* ??? Update basic_block_live_at_start, and other flow info |
d9d4fb43 AS |
1151 | as needed. */ |
1152 | ||
cdbca172 | 1153 | ssa_rename_to_pseudo = NULL; |
d9d4fb43 AS |
1154 | } |
1155 | ||
d9d4fb43 AS |
1156 | /* The main entry point for moving to SSA. */ |
1157 | ||
1158 | void | |
cdbca172 | 1159 | convert_to_ssa () |
d9d4fb43 AS |
1160 | { |
1161 | /* Element I is the set of blocks that set register I. */ | |
1162 | sbitmap *evals; | |
1163 | ||
1164 | /* Dominator bitmaps. */ | |
d9d4fb43 AS |
1165 | sbitmap *dfs; |
1166 | sbitmap *idfs; | |
1167 | ||
1168 | /* Element I is the immediate dominator of block I. */ | |
355be0dc | 1169 | dominance_info idom; |
d9d4fb43 AS |
1170 | |
1171 | int nregs; | |
1172 | ||
e0082a72 ZD |
1173 | basic_block bb; |
1174 | ||
4e872036 AS |
1175 | /* Don't do it twice. */ |
1176 | if (in_ssa_form) | |
1177 | abort (); | |
1178 | ||
fd9305ef JL |
1179 | /* Need global_live_at_{start,end} up to date. Do not remove any |
1180 | dead code. We'll let the SSA optimizers do that. */ | |
1181 | life_analysis (get_insns (), NULL, 0); | |
d9d4fb43 | 1182 | |
355be0dc | 1183 | idom = calculate_dominance_info (CDI_DOMINATORS); |
d9d4fb43 AS |
1184 | |
1185 | if (rtl_dump_file) | |
1186 | { | |
d9d4fb43 | 1187 | fputs (";; Immediate Dominators:\n", rtl_dump_file); |
e0082a72 | 1188 | FOR_EACH_BB (bb) |
355be0dc JH |
1189 | fprintf (rtl_dump_file, ";\t%3d = %3d\n", bb->index, |
1190 | get_immediate_dominator (idom, bb)->index); | |
d9d4fb43 AS |
1191 | fflush (rtl_dump_file); |
1192 | } | |
1193 | ||
1194 | /* Compute dominance frontiers. */ | |
1195 | ||
d55bc081 | 1196 | dfs = sbitmap_vector_alloc (last_basic_block, last_basic_block); |
d9d4fb43 AS |
1197 | compute_dominance_frontiers (dfs, idom); |
1198 | ||
1199 | if (rtl_dump_file) | |
1200 | { | |
1201 | dump_sbitmap_vector (rtl_dump_file, ";; Dominance Frontiers:", | |
d55bc081 | 1202 | "; Basic Block", dfs, last_basic_block); |
d9d4fb43 AS |
1203 | fflush (rtl_dump_file); |
1204 | } | |
1205 | ||
1206 | /* Compute register evaluations. */ | |
1207 | ||
cf403648 | 1208 | ssa_max_reg_num = max_reg_num (); |
cdbca172 | 1209 | nregs = ssa_max_reg_num; |
d55bc081 | 1210 | evals = sbitmap_vector_alloc (nregs, last_basic_block); |
d9d4fb43 AS |
1211 | find_evaluations (evals, nregs); |
1212 | ||
1213 | /* Compute the iterated dominance frontier for each register. */ | |
1214 | ||
d55bc081 | 1215 | idfs = sbitmap_vector_alloc (nregs, last_basic_block); |
d9d4fb43 AS |
1216 | compute_iterated_dominance_frontiers (idfs, dfs, evals, nregs); |
1217 | ||
1218 | if (rtl_dump_file) | |
1219 | { | |
1220 | dump_sbitmap_vector (rtl_dump_file, ";; Iterated Dominance Frontiers:", | |
cdbca172 | 1221 | "; Register", idfs, nregs); |
d9d4fb43 AS |
1222 | fflush (rtl_dump_file); |
1223 | } | |
1224 | ||
1225 | /* Insert the phi nodes. */ | |
1226 | ||
1227 | insert_phi_nodes (idfs, evals, nregs); | |
1228 | ||
1229 | /* Rename the registers to satisfy SSA. */ | |
1230 | ||
1231 | rename_registers (nregs, idom); | |
1232 | ||
1233 | /* All done! Clean up and go home. */ | |
1234 | ||
1235 | sbitmap_vector_free (dfs); | |
1236 | sbitmap_vector_free (evals); | |
1237 | sbitmap_vector_free (idfs); | |
4e872036 | 1238 | in_ssa_form = 1; |
d9d4fb43 | 1239 | |
4e872036 | 1240 | reg_scan (get_insns (), max_reg_num (), 1); |
355be0dc | 1241 | free_dominance_info (idom); |
4e872036 | 1242 | } |
d9d4fb43 | 1243 | |
d9d4fb43 AS |
1244 | /* REG is the representative temporary of its partition. Add it to the |
1245 | set of nodes to be processed, if it hasn't been already. Return the | |
1246 | index of this register in the node set. */ | |
1247 | ||
1248 | static inline int | |
1249 | ephi_add_node (reg, nodes, n_nodes) | |
1250 | rtx reg, *nodes; | |
1251 | int *n_nodes; | |
1252 | { | |
1253 | int i; | |
1254 | for (i = *n_nodes - 1; i >= 0; --i) | |
1255 | if (REGNO (reg) == REGNO (nodes[i])) | |
1256 | return i; | |
1257 | ||
1258 | nodes[i = (*n_nodes)++] = reg; | |
1259 | return i; | |
1260 | } | |
1261 | ||
1262 | /* Part one of the topological sort. This is a forward (downward) search | |
1263 | through the graph collecting a stack of nodes to process. Assuming no | |
1264 | cycles, the nodes at top of the stack when we are finished will have | |
ff7cc307 | 1265 | no other dependencies. */ |
d9d4fb43 AS |
1266 | |
1267 | static int * | |
1268 | ephi_forward (t, visited, succ, tstack) | |
1269 | int t; | |
1270 | sbitmap visited; | |
1271 | sbitmap *succ; | |
1272 | int *tstack; | |
1273 | { | |
1274 | int s; | |
1275 | ||
1276 | SET_BIT (visited, t); | |
1277 | ||
1278 | EXECUTE_IF_SET_IN_SBITMAP (succ[t], 0, s, | |
1279 | { | |
1280 | if (! TEST_BIT (visited, s)) | |
786de7eb | 1281 | tstack = ephi_forward (s, visited, succ, tstack); |
d9d4fb43 AS |
1282 | }); |
1283 | ||
1284 | *tstack++ = t; | |
1285 | return tstack; | |
1286 | } | |
1287 | ||
1288 | /* Part two of the topological sort. The is a backward search through | |
1289 | a cycle in the graph, copying the data forward as we go. */ | |
1290 | ||
1291 | static void | |
1292 | ephi_backward (t, visited, pred, nodes) | |
1293 | int t; | |
1294 | sbitmap visited, *pred; | |
1295 | rtx *nodes; | |
1296 | { | |
1297 | int p; | |
1298 | ||
1299 | SET_BIT (visited, t); | |
1300 | ||
1301 | EXECUTE_IF_SET_IN_SBITMAP (pred[t], 0, p, | |
1302 | { | |
1303 | if (! TEST_BIT (visited, p)) | |
1304 | { | |
1305 | ephi_backward (p, visited, pred, nodes); | |
1306 | emit_move_insn (nodes[p], nodes[t]); | |
1307 | } | |
1308 | }); | |
1309 | } | |
1310 | ||
1311 | /* Part two of the topological sort. Create the copy for a register | |
1312 | and any cycle of which it is a member. */ | |
1313 | ||
1314 | static void | |
1315 | ephi_create (t, visited, pred, succ, nodes) | |
1316 | int t; | |
1317 | sbitmap visited, *pred, *succ; | |
1318 | rtx *nodes; | |
1319 | { | |
1320 | rtx reg_u = NULL_RTX; | |
1321 | int unvisited_predecessors = 0; | |
1322 | int p; | |
1323 | ||
1324 | /* Iterate through the predecessor list looking for unvisited nodes. | |
786de7eb | 1325 | If there are any, we have a cycle, and must deal with that. At |
d9d4fb43 AS |
1326 | the same time, look for a visited predecessor. If there is one, |
1327 | we won't need to create a temporary. */ | |
1328 | ||
1329 | EXECUTE_IF_SET_IN_SBITMAP (pred[t], 0, p, | |
1330 | { | |
1331 | if (! TEST_BIT (visited, p)) | |
1332 | unvisited_predecessors = 1; | |
1333 | else if (!reg_u) | |
1334 | reg_u = nodes[p]; | |
1335 | }); | |
1336 | ||
1337 | if (unvisited_predecessors) | |
1338 | { | |
1339 | /* We found a cycle. Copy out one element of the ring (if necessary), | |
1340 | then traverse the ring copying as we go. */ | |
1341 | ||
1342 | if (!reg_u) | |
1343 | { | |
1344 | reg_u = gen_reg_rtx (GET_MODE (nodes[t])); | |
1345 | emit_move_insn (reg_u, nodes[t]); | |
1346 | } | |
1347 | ||
1348 | EXECUTE_IF_SET_IN_SBITMAP (pred[t], 0, p, | |
1349 | { | |
1350 | if (! TEST_BIT (visited, p)) | |
1351 | { | |
1352 | ephi_backward (p, visited, pred, nodes); | |
1353 | emit_move_insn (nodes[p], reg_u); | |
1354 | } | |
1355 | }); | |
786de7eb KH |
1356 | } |
1357 | else | |
d9d4fb43 AS |
1358 | { |
1359 | /* No cycle. Just copy the value from a successor. */ | |
1360 | ||
1361 | int s; | |
1362 | EXECUTE_IF_SET_IN_SBITMAP (succ[t], 0, s, | |
1363 | { | |
1364 | SET_BIT (visited, t); | |
1365 | emit_move_insn (nodes[t], nodes[s]); | |
1366 | return; | |
1367 | }); | |
1368 | } | |
1369 | } | |
1370 | ||
1371 | /* Convert the edge to normal form. */ | |
1372 | ||
1373 | static void | |
1374 | eliminate_phi (e, reg_partition) | |
1375 | edge e; | |
1376 | partition reg_partition; | |
1377 | { | |
1378 | int n_nodes; | |
1379 | sbitmap *pred, *succ; | |
1380 | sbitmap visited; | |
1381 | rtx *nodes; | |
1382 | int *stack, *tstack; | |
1383 | rtx insn; | |
1384 | int i; | |
1385 | ||
1386 | /* Collect an upper bound on the number of registers needing processing. */ | |
1387 | ||
589ca5cb | 1388 | insn = first_insn_after_basic_block_note (e->dest); |
d9d4fb43 AS |
1389 | |
1390 | n_nodes = 0; | |
1391 | while (PHI_NODE_P (insn)) | |
1392 | { | |
1393 | insn = next_nonnote_insn (insn); | |
1394 | n_nodes += 2; | |
1395 | } | |
1396 | ||
1397 | if (n_nodes == 0) | |
1398 | return; | |
1399 | ||
786de7eb | 1400 | /* Build the auxiliary graph R(B). |
d9d4fb43 AS |
1401 | |
1402 | The nodes of the graph are the members of the register partition | |
1403 | present in Phi(B). There is an edge from FIND(T0)->FIND(T1) for | |
1404 | each T0 = PHI(...,T1,...), where T1 is for the edge from block C. */ | |
1405 | ||
1406 | nodes = (rtx *) alloca (n_nodes * sizeof(rtx)); | |
1407 | pred = sbitmap_vector_alloc (n_nodes, n_nodes); | |
1408 | succ = sbitmap_vector_alloc (n_nodes, n_nodes); | |
1409 | sbitmap_vector_zero (pred, n_nodes); | |
1410 | sbitmap_vector_zero (succ, n_nodes); | |
1411 | ||
589ca5cb | 1412 | insn = first_insn_after_basic_block_note (e->dest); |
d9d4fb43 AS |
1413 | |
1414 | n_nodes = 0; | |
1415 | for (; PHI_NODE_P (insn); insn = next_nonnote_insn (insn)) | |
1416 | { | |
0b17ab2f | 1417 | rtx* preg = phi_alternative (PATTERN (insn), e->src->index); |
d9d4fb43 AS |
1418 | rtx tgt = SET_DEST (PATTERN (insn)); |
1419 | rtx reg; | |
1420 | ||
1421 | /* There may be no phi alternative corresponding to this edge. | |
1422 | This indicates that the phi variable is undefined along this | |
1423 | edge. */ | |
1424 | if (preg == NULL) | |
1425 | continue; | |
1426 | reg = *preg; | |
1427 | ||
1428 | if (GET_CODE (reg) != REG || GET_CODE (tgt) != REG) | |
cf403648 | 1429 | abort (); |
d9d4fb43 | 1430 | |
4e872036 AS |
1431 | reg = regno_reg_rtx[partition_find (reg_partition, REGNO (reg))]; |
1432 | tgt = regno_reg_rtx[partition_find (reg_partition, REGNO (tgt))]; | |
786de7eb | 1433 | /* If the two registers are already in the same partition, |
d9d4fb43 | 1434 | nothing will need to be done. */ |
4e872036 | 1435 | if (reg != tgt) |
d9d4fb43 AS |
1436 | { |
1437 | int ireg, itgt; | |
1438 | ||
1439 | ireg = ephi_add_node (reg, nodes, &n_nodes); | |
1440 | itgt = ephi_add_node (tgt, nodes, &n_nodes); | |
1441 | ||
1442 | SET_BIT (pred[ireg], itgt); | |
1443 | SET_BIT (succ[itgt], ireg); | |
1444 | } | |
1445 | } | |
1446 | ||
1447 | if (n_nodes == 0) | |
1448 | goto out; | |
1449 | ||
1450 | /* Begin a topological sort of the graph. */ | |
1451 | ||
1452 | visited = sbitmap_alloc (n_nodes); | |
1453 | sbitmap_zero (visited); | |
1454 | ||
1455 | tstack = stack = (int *) alloca (n_nodes * sizeof (int)); | |
1456 | ||
1457 | for (i = 0; i < n_nodes; ++i) | |
1458 | if (! TEST_BIT (visited, i)) | |
1459 | tstack = ephi_forward (i, visited, succ, tstack); | |
1460 | ||
1461 | sbitmap_zero (visited); | |
1462 | ||
786de7eb | 1463 | /* As we find a solution to the tsort, collect the implementation |
d9d4fb43 AS |
1464 | insns in a sequence. */ |
1465 | start_sequence (); | |
786de7eb | 1466 | |
d9d4fb43 AS |
1467 | while (tstack != stack) |
1468 | { | |
1469 | i = *--tstack; | |
1470 | if (! TEST_BIT (visited, i)) | |
1471 | ephi_create (i, visited, pred, succ, nodes); | |
1472 | } | |
1473 | ||
2f937369 | 1474 | insn = get_insns (); |
d9d4fb43 AS |
1475 | end_sequence (); |
1476 | insert_insn_on_edge (insn, e); | |
1477 | if (rtl_dump_file) | |
1478 | fprintf (rtl_dump_file, "Emitting copy on edge (%d,%d)\n", | |
0b17ab2f | 1479 | e->src->index, e->dest->index); |
d9d4fb43 AS |
1480 | |
1481 | sbitmap_free (visited); | |
1482 | out: | |
1483 | sbitmap_vector_free (pred); | |
1484 | sbitmap_vector_free (succ); | |
1485 | } | |
1486 | ||
d9d4fb43 AS |
1487 | /* For basic block B, consider all phi insns which provide an |
1488 | alternative corresponding to an incoming abnormal critical edge. | |
1489 | Place the phi alternative corresponding to that abnormal critical | |
786de7eb | 1490 | edge in the same register class as the destination of the set. |
d9d4fb43 AS |
1491 | |
1492 | From Morgan, p. 178: | |
1493 | ||
786de7eb KH |
1494 | For each abnormal critical edge (C, B), |
1495 | if T0 = phi (T1, ..., Ti, ..., Tm) is a phi node in B, | |
1496 | and C is the ith predecessor of B, | |
1497 | then T0 and Ti must be equivalent. | |
d9d4fb43 | 1498 | |
0e9e1e0a | 1499 | Return nonzero iff any such cases were found for which the two |
d9d4fb43 AS |
1500 | regs were not already in the same class. */ |
1501 | ||
1502 | static int | |
1503 | make_regs_equivalent_over_bad_edges (bb, reg_partition) | |
1504 | int bb; | |
1505 | partition reg_partition; | |
1506 | { | |
1507 | int changed = 0; | |
1508 | basic_block b = BASIC_BLOCK (bb); | |
589ca5cb | 1509 | rtx phi; |
d9d4fb43 AS |
1510 | |
1511 | /* Advance to the first phi node. */ | |
589ca5cb | 1512 | phi = first_insn_after_basic_block_note (b); |
d9d4fb43 AS |
1513 | |
1514 | /* Scan all the phi nodes. */ | |
786de7eb | 1515 | for (; |
d9d4fb43 AS |
1516 | PHI_NODE_P (phi); |
1517 | phi = next_nonnote_insn (phi)) | |
1518 | { | |
1519 | edge e; | |
1520 | int tgt_regno; | |
1521 | rtx set = PATTERN (phi); | |
1522 | rtx tgt = SET_DEST (set); | |
1523 | ||
cdbca172 | 1524 | /* The set target is expected to be an SSA register. */ |
786de7eb | 1525 | if (GET_CODE (tgt) != REG |
cdbca172 | 1526 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (tgt))) |
d9d4fb43 AS |
1527 | abort (); |
1528 | tgt_regno = REGNO (tgt); | |
1529 | ||
1530 | /* Scan incoming abnormal critical edges. */ | |
1531 | for (e = b->pred; e; e = e->pred_next) | |
4262e623 | 1532 | if ((e->flags & EDGE_ABNORMAL) && EDGE_CRITICAL_P (e)) |
d9d4fb43 | 1533 | { |
0b17ab2f | 1534 | rtx *alt = phi_alternative (set, e->src->index); |
d9d4fb43 AS |
1535 | int alt_regno; |
1536 | ||
1537 | /* If there is no alternative corresponding to this edge, | |
1538 | the value is undefined along the edge, so just go on. */ | |
1539 | if (alt == 0) | |
1540 | continue; | |
1541 | ||
cdbca172 | 1542 | /* The phi alternative is expected to be an SSA register. */ |
786de7eb | 1543 | if (GET_CODE (*alt) != REG |
cdbca172 | 1544 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*alt))) |
d9d4fb43 AS |
1545 | abort (); |
1546 | alt_regno = REGNO (*alt); | |
1547 | ||
1548 | /* If the set destination and the phi alternative aren't | |
1549 | already in the same class... */ | |
786de7eb | 1550 | if (partition_find (reg_partition, tgt_regno) |
d9d4fb43 AS |
1551 | != partition_find (reg_partition, alt_regno)) |
1552 | { | |
1553 | /* ... make them such. */ | |
cdbca172 JO |
1554 | if (conflicting_hard_regs_p (tgt_regno, alt_regno)) |
1555 | /* It is illegal to unify a hard register with a | |
1556 | different register. */ | |
1557 | abort (); | |
786de7eb KH |
1558 | |
1559 | partition_union (reg_partition, | |
d9d4fb43 AS |
1560 | tgt_regno, alt_regno); |
1561 | ++changed; | |
1562 | } | |
1563 | } | |
1564 | } | |
1565 | ||
1566 | return changed; | |
1567 | } | |
1568 | ||
d9d4fb43 AS |
1569 | /* Consider phi insns in basic block BB pairwise. If the set target |
1570 | of both isns are equivalent pseudos, make the corresponding phi | |
1571 | alternatives in each phi corresponding equivalent. | |
1572 | ||
1573 | Return nonzero if any new register classes were unioned. */ | |
1574 | ||
1575 | static int | |
1576 | make_equivalent_phi_alternatives_equivalent (bb, reg_partition) | |
1577 | int bb; | |
1578 | partition reg_partition; | |
1579 | { | |
1580 | int changed = 0; | |
d9d4fb43 | 1581 | basic_block b = BASIC_BLOCK (bb); |
589ca5cb | 1582 | rtx phi; |
d9d4fb43 AS |
1583 | |
1584 | /* Advance to the first phi node. */ | |
589ca5cb | 1585 | phi = first_insn_after_basic_block_note (b); |
d9d4fb43 AS |
1586 | |
1587 | /* Scan all the phi nodes. */ | |
786de7eb | 1588 | for (; |
d9d4fb43 AS |
1589 | PHI_NODE_P (phi); |
1590 | phi = next_nonnote_insn (phi)) | |
1591 | { | |
1592 | rtx set = PATTERN (phi); | |
1593 | /* The regno of the destination of the set. */ | |
1594 | int tgt_regno = REGNO (SET_DEST (PATTERN (phi))); | |
1595 | ||
1596 | rtx phi2 = next_nonnote_insn (phi); | |
1597 | ||
1598 | /* Scan all phi nodes following this one. */ | |
1599 | for (; | |
1600 | PHI_NODE_P (phi2); | |
1601 | phi2 = next_nonnote_insn (phi2)) | |
1602 | { | |
1603 | rtx set2 = PATTERN (phi2); | |
1604 | /* The regno of the destination of the set. */ | |
1605 | int tgt2_regno = REGNO (SET_DEST (set2)); | |
786de7eb | 1606 | |
d9d4fb43 AS |
1607 | /* Are the set destinations equivalent regs? */ |
1608 | if (partition_find (reg_partition, tgt_regno) == | |
1609 | partition_find (reg_partition, tgt2_regno)) | |
1610 | { | |
1611 | edge e; | |
1612 | /* Scan over edges. */ | |
1613 | for (e = b->pred; e; e = e->pred_next) | |
1614 | { | |
0b17ab2f | 1615 | int pred_block = e->src->index; |
cdbca172 | 1616 | /* Identify the phi alternatives from both phi |
d9d4fb43 AS |
1617 | nodes corresponding to this edge. */ |
1618 | rtx *alt = phi_alternative (set, pred_block); | |
1619 | rtx *alt2 = phi_alternative (set2, pred_block); | |
1620 | ||
1621 | /* If one of the phi nodes doesn't have a | |
1622 | corresponding alternative, just skip it. */ | |
1623 | if (alt == 0 || alt2 == 0) | |
1624 | continue; | |
1625 | ||
cdbca172 | 1626 | /* Both alternatives should be SSA registers. */ |
d9d4fb43 | 1627 | if (GET_CODE (*alt) != REG |
cdbca172 | 1628 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*alt))) |
d9d4fb43 AS |
1629 | abort (); |
1630 | if (GET_CODE (*alt2) != REG | |
cdbca172 | 1631 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*alt2))) |
d9d4fb43 AS |
1632 | abort (); |
1633 | ||
cdbca172 | 1634 | /* If the alternatives aren't already in the same |
2d76cb1a | 1635 | class ... */ |
786de7eb | 1636 | if (partition_find (reg_partition, REGNO (*alt)) |
d9d4fb43 AS |
1637 | != partition_find (reg_partition, REGNO (*alt2))) |
1638 | { | |
1639 | /* ... make them so. */ | |
cdbca172 JO |
1640 | if (conflicting_hard_regs_p (REGNO (*alt), REGNO (*alt2))) |
1641 | /* It is illegal to unify a hard register with | |
2d76cb1a | 1642 | a different register. */ |
cdbca172 JO |
1643 | abort (); |
1644 | ||
786de7eb | 1645 | partition_union (reg_partition, |
d9d4fb43 AS |
1646 | REGNO (*alt), REGNO (*alt2)); |
1647 | ++changed; | |
1648 | } | |
1649 | } | |
1650 | } | |
1651 | } | |
1652 | } | |
1653 | ||
1654 | return changed; | |
1655 | } | |
1656 | ||
d9d4fb43 AS |
1657 | /* Compute a conservative partition of outstanding pseudo registers. |
1658 | See Morgan 7.3.1. */ | |
1659 | ||
1660 | static partition | |
1661 | compute_conservative_reg_partition () | |
1662 | { | |
e0082a72 | 1663 | basic_block bb; |
d9d4fb43 AS |
1664 | int changed = 0; |
1665 | ||
1666 | /* We don't actually work with hard registers, but it's easier to | |
1667 | carry them around anyway rather than constantly doing register | |
1668 | number arithmetic. */ | |
786de7eb | 1669 | partition p = |
cdbca172 | 1670 | partition_new (ssa_definition->num_elements); |
d9d4fb43 AS |
1671 | |
1672 | /* The first priority is to make sure registers that might have to | |
1673 | be copied on abnormal critical edges are placed in the same | |
1674 | partition. This saves us from having to split abnormal critical | |
1675 | edges. */ | |
e0082a72 ZD |
1676 | FOR_EACH_BB_REVERSE (bb) |
1677 | changed += make_regs_equivalent_over_bad_edges (bb->index, p); | |
0b17ab2f | 1678 | |
d9d4fb43 AS |
1679 | /* Now we have to insure that corresponding arguments of phi nodes |
1680 | assigning to corresponding regs are equivalent. Iterate until | |
1681 | nothing changes. */ | |
1682 | while (changed > 0) | |
1683 | { | |
1684 | changed = 0; | |
e0082a72 ZD |
1685 | FOR_EACH_BB_REVERSE (bb) |
1686 | changed += make_equivalent_phi_alternatives_equivalent (bb->index, p); | |
d9d4fb43 AS |
1687 | } |
1688 | ||
1689 | return p; | |
1690 | } | |
1691 | ||
4e872036 AS |
1692 | /* The following functions compute a register partition that attempts |
1693 | to eliminate as many reg copies and phi node copies as possible by | |
1694 | coalescing registers. This is the strategy: | |
1695 | ||
1696 | 1. As in the conservative case, the top priority is to coalesce | |
1697 | registers that otherwise would cause copies to be placed on | |
1698 | abnormal critical edges (which isn't possible). | |
1699 | ||
1700 | 2. Figure out which regs are involved (in the LHS or RHS) of | |
786de7eb | 1701 | copies and phi nodes. Compute conflicts among these regs. |
4e872036 AS |
1702 | |
1703 | 3. Walk around the instruction stream, placing two regs in the | |
1704 | same class of the partition if one appears on the LHS and the | |
1705 | other on the RHS of a copy or phi node and the two regs don't | |
1706 | conflict. The conflict information of course needs to be | |
786de7eb | 1707 | updated. |
4e872036 AS |
1708 | |
1709 | 4. If anything has changed, there may be new opportunities to | |
1710 | coalesce regs, so go back to 2. | |
1711 | */ | |
1712 | ||
1713 | /* If REG1 and REG2 don't conflict in CONFLICTS, place them in the | |
1714 | same class of partition P, if they aren't already. Update | |
786de7eb | 1715 | CONFLICTS appropriately. |
4e872036 AS |
1716 | |
1717 | Returns one if REG1 and REG2 were placed in the same class but were | |
786de7eb | 1718 | not previously; zero otherwise. |
4e872036 AS |
1719 | |
1720 | See Morgan figure 11.15. */ | |
1721 | ||
786de7eb | 1722 | static int |
4e872036 AS |
1723 | coalesce_if_unconflicting (p, conflicts, reg1, reg2) |
1724 | partition p; | |
1725 | conflict_graph conflicts; | |
1726 | int reg1; | |
1727 | int reg2; | |
1728 | { | |
1729 | int reg; | |
1730 | ||
2d76cb1a | 1731 | /* Work only on SSA registers. */ |
cdbca172 | 1732 | if (!CONVERT_REGISTER_TO_SSA_P (reg1) || !CONVERT_REGISTER_TO_SSA_P (reg2)) |
4e872036 AS |
1733 | return 0; |
1734 | ||
1735 | /* Find the canonical regs for the classes containing REG1 and | |
1736 | REG2. */ | |
1737 | reg1 = partition_find (p, reg1); | |
1738 | reg2 = partition_find (p, reg2); | |
786de7eb | 1739 | |
4e872036 AS |
1740 | /* If they're already in the same class, there's nothing to do. */ |
1741 | if (reg1 == reg2) | |
1742 | return 0; | |
1743 | ||
1744 | /* If the regs conflict, our hands are tied. */ | |
cdbca172 JO |
1745 | if (conflicting_hard_regs_p (reg1, reg2) || |
1746 | conflict_graph_conflict_p (conflicts, reg1, reg2)) | |
4e872036 AS |
1747 | return 0; |
1748 | ||
1749 | /* We're good to go. Put the regs in the same partition. */ | |
1750 | partition_union (p, reg1, reg2); | |
1751 | ||
1752 | /* Find the new canonical reg for the merged class. */ | |
1753 | reg = partition_find (p, reg1); | |
786de7eb | 1754 | |
4e872036 AS |
1755 | /* Merge conflicts from the two previous classes. */ |
1756 | conflict_graph_merge_regs (conflicts, reg, reg1); | |
1757 | conflict_graph_merge_regs (conflicts, reg, reg2); | |
1758 | ||
1759 | return 1; | |
1760 | } | |
1761 | ||
1762 | /* For each register copy insn in basic block BB, place the LHS and | |
1763 | RHS regs in the same class in partition P if they do not conflict | |
1764 | according to CONFLICTS. | |
1765 | ||
1766 | Returns the number of changes that were made to P. | |
1767 | ||
1768 | See Morgan figure 11.14. */ | |
1769 | ||
1770 | static int | |
1771 | coalesce_regs_in_copies (bb, p, conflicts) | |
6308dae9 | 1772 | basic_block bb; |
4e872036 AS |
1773 | partition p; |
1774 | conflict_graph conflicts; | |
1775 | { | |
1776 | int changed = 0; | |
1777 | rtx insn; | |
6308dae9 | 1778 | rtx end = bb->end; |
4e872036 AS |
1779 | |
1780 | /* Scan the instruction stream of the block. */ | |
6308dae9 | 1781 | for (insn = bb->head; insn != end; insn = NEXT_INSN (insn)) |
4e872036 AS |
1782 | { |
1783 | rtx pattern; | |
1784 | rtx src; | |
1785 | rtx dest; | |
1786 | ||
1787 | /* If this isn't a set insn, go to the next insn. */ | |
1788 | if (GET_CODE (insn) != INSN) | |
1789 | continue; | |
1790 | pattern = PATTERN (insn); | |
1791 | if (GET_CODE (pattern) != SET) | |
1792 | continue; | |
1793 | ||
1794 | src = SET_SRC (pattern); | |
1795 | dest = SET_DEST (pattern); | |
1796 | ||
4e872036 AS |
1797 | /* We're only looking for copies. */ |
1798 | if (GET_CODE (src) != REG || GET_CODE (dest) != REG) | |
1799 | continue; | |
1800 | ||
1801 | /* Coalesce only if the reg modes are the same. As long as | |
1802 | each reg's rtx is unique, it can have only one mode, so two | |
786de7eb | 1803 | pseudos of different modes can't be coalesced into one. |
4e872036 AS |
1804 | |
1805 | FIXME: We can probably get around this by inserting SUBREGs | |
1806 | where appropriate, but for now we don't bother. */ | |
1807 | if (GET_MODE (src) != GET_MODE (dest)) | |
1808 | continue; | |
1809 | ||
1810 | /* Found a copy; see if we can use the same reg for both the | |
1811 | source and destination (and thus eliminate the copy, | |
1812 | ultimately). */ | |
786de7eb | 1813 | changed += coalesce_if_unconflicting (p, conflicts, |
4e872036 AS |
1814 | REGNO (src), REGNO (dest)); |
1815 | } | |
1816 | ||
1817 | return changed; | |
1818 | } | |
1819 | ||
4e872036 AS |
1820 | struct phi_coalesce_context |
1821 | { | |
1822 | partition p; | |
1823 | conflict_graph conflicts; | |
1824 | int changed; | |
1825 | }; | |
1826 | ||
1827 | /* Callback function for for_each_successor_phi. If the set | |
1828 | destination and the phi alternative regs do not conflict, place | |
1829 | them in the same paritition class. DATA is a pointer to a | |
1830 | phi_coalesce_context struct. */ | |
1831 | ||
1832 | static int | |
1833 | coalesce_reg_in_phi (insn, dest_regno, src_regno, data) | |
1834 | rtx insn ATTRIBUTE_UNUSED; | |
1835 | int dest_regno; | |
1836 | int src_regno; | |
1837 | void *data; | |
1838 | { | |
786de7eb | 1839 | struct phi_coalesce_context *context = |
4e872036 | 1840 | (struct phi_coalesce_context *) data; |
786de7eb | 1841 | |
4e872036 | 1842 | /* Attempt to use the same reg, if they don't conflict. */ |
786de7eb KH |
1843 | context->changed |
1844 | += coalesce_if_unconflicting (context->p, context->conflicts, | |
4e872036 AS |
1845 | dest_regno, src_regno); |
1846 | return 0; | |
1847 | } | |
1848 | ||
1849 | /* For each alternative in a phi function corresponding to basic block | |
1850 | BB (in phi nodes in successor block to BB), place the reg in the | |
1851 | phi alternative and the reg to which the phi value is set into the | |
786de7eb | 1852 | same class in partition P, if allowed by CONFLICTS. |
4e872036 AS |
1853 | |
1854 | Return the number of changes that were made to P. | |
786de7eb | 1855 | |
4e872036 AS |
1856 | See Morgan figure 11.14. */ |
1857 | ||
1858 | static int | |
1859 | coalesce_regs_in_successor_phi_nodes (bb, p, conflicts) | |
6308dae9 | 1860 | basic_block bb; |
4e872036 AS |
1861 | partition p; |
1862 | conflict_graph conflicts; | |
1863 | { | |
1864 | struct phi_coalesce_context context; | |
1865 | context.p = p; | |
1866 | context.conflicts = conflicts; | |
1867 | context.changed = 0; | |
1868 | ||
1869 | for_each_successor_phi (bb, &coalesce_reg_in_phi, &context); | |
1870 | ||
1871 | return context.changed; | |
1872 | } | |
1873 | ||
1874 | /* Compute and return a partition of pseudos. Where possible, | |
786de7eb | 1875 | non-conflicting pseudos are placed in the same class. |
4e872036 AS |
1876 | |
1877 | The caller is responsible for deallocating the returned partition. */ | |
1878 | ||
1879 | static partition | |
1880 | compute_coalesced_reg_partition () | |
1881 | { | |
e0082a72 | 1882 | basic_block bb; |
4e872036 | 1883 | int changed = 0; |
cdb574d3 MH |
1884 | regset_head phi_set_head; |
1885 | regset phi_set = &phi_set_head; | |
4e872036 | 1886 | |
786de7eb | 1887 | partition p = |
cdbca172 | 1888 | partition_new (ssa_definition->num_elements); |
4e872036 AS |
1889 | |
1890 | /* The first priority is to make sure registers that might have to | |
1891 | be copied on abnormal critical edges are placed in the same | |
1892 | partition. This saves us from having to split abnormal critical | |
1893 | edges (which can't be done). */ | |
e0082a72 ZD |
1894 | FOR_EACH_BB_REVERSE (bb) |
1895 | make_regs_equivalent_over_bad_edges (bb->index, p); | |
4e872036 | 1896 | |
cdb574d3 MH |
1897 | INIT_REG_SET (phi_set); |
1898 | ||
4e872036 AS |
1899 | do |
1900 | { | |
4e872036 AS |
1901 | conflict_graph conflicts; |
1902 | ||
1903 | changed = 0; | |
1904 | ||
1905 | /* Build the set of registers involved in phi nodes, either as | |
1906 | arguments to the phi function or as the target of a set. */ | |
cdb574d3 MH |
1907 | CLEAR_REG_SET (phi_set); |
1908 | mark_phi_and_copy_regs (phi_set); | |
4e872036 AS |
1909 | |
1910 | /* Compute conflicts. */ | |
cdb574d3 | 1911 | conflicts = conflict_graph_compute (phi_set, p); |
4e872036 AS |
1912 | |
1913 | /* FIXME: Better would be to process most frequently executed | |
1914 | blocks first, so that most frequently executed copies would | |
1915 | be more likely to be removed by register coalescing. But any | |
1916 | order will generate correct, if non-optimal, results. */ | |
e0082a72 | 1917 | FOR_EACH_BB_REVERSE (bb) |
4e872036 | 1918 | { |
e0082a72 | 1919 | changed += coalesce_regs_in_copies (bb, p, conflicts); |
0b17ab2f | 1920 | changed += |
e0082a72 | 1921 | coalesce_regs_in_successor_phi_nodes (bb, p, conflicts); |
4e872036 AS |
1922 | } |
1923 | ||
1924 | conflict_graph_delete (conflicts); | |
1925 | } | |
1926 | while (changed > 0); | |
1927 | ||
cdb574d3 MH |
1928 | FREE_REG_SET (phi_set); |
1929 | ||
4e872036 AS |
1930 | return p; |
1931 | } | |
1932 | ||
1933 | /* Mark the regs in a phi node. PTR is a phi expression or one of its | |
1934 | components (a REG or a CONST_INT). DATA is a reg set in which to | |
1935 | set all regs. Called from for_each_rtx. */ | |
1936 | ||
1937 | static int | |
1938 | mark_reg_in_phi (ptr, data) | |
1939 | rtx *ptr; | |
1940 | void *data; | |
1941 | { | |
1942 | rtx expr = *ptr; | |
1943 | regset set = (regset) data; | |
1944 | ||
1945 | switch (GET_CODE (expr)) | |
1946 | { | |
1947 | case REG: | |
1948 | SET_REGNO_REG_SET (set, REGNO (expr)); | |
1949 | /* Fall through. */ | |
1950 | case CONST_INT: | |
1951 | case PHI: | |
1952 | return 0; | |
1953 | default: | |
1954 | abort (); | |
1955 | } | |
1956 | } | |
1957 | ||
1958 | /* Mark in PHI_SET all pseudos that are used in a phi node -- either | |
1959 | set from a phi expression, or used as an argument in one. Also | |
1960 | mark regs that are the source or target of a reg copy. Uses | |
1961 | ssa_definition. */ | |
1962 | ||
1963 | static void | |
1964 | mark_phi_and_copy_regs (phi_set) | |
1965 | regset phi_set; | |
1966 | { | |
cdbca172 | 1967 | unsigned int reg; |
4e872036 AS |
1968 | |
1969 | /* Scan the definitions of all regs. */ | |
cdbca172 JO |
1970 | for (reg = 0; reg < VARRAY_SIZE (ssa_definition); ++reg) |
1971 | if (CONVERT_REGISTER_TO_SSA_P (reg)) | |
1972 | { | |
1973 | rtx insn = VARRAY_RTX (ssa_definition, reg); | |
1974 | rtx pattern; | |
1975 | rtx src; | |
1976 | ||
0b47e4c1 JL |
1977 | if (insn == NULL |
1978 | || (GET_CODE (insn) == NOTE | |
1979 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)) | |
cdbca172 JO |
1980 | continue; |
1981 | pattern = PATTERN (insn); | |
1982 | /* Sometimes we get PARALLEL insns. These aren't phi nodes or | |
1983 | copies. */ | |
1984 | if (GET_CODE (pattern) != SET) | |
1985 | continue; | |
1986 | src = SET_SRC (pattern); | |
1987 | ||
1988 | if (GET_CODE (src) == REG) | |
1989 | { | |
1990 | /* It's a reg copy. */ | |
1991 | SET_REGNO_REG_SET (phi_set, reg); | |
1992 | SET_REGNO_REG_SET (phi_set, REGNO (src)); | |
1993 | } | |
1994 | else if (GET_CODE (src) == PHI) | |
1995 | { | |
1996 | /* It's a phi node. Mark the reg being set. */ | |
1997 | SET_REGNO_REG_SET (phi_set, reg); | |
1998 | /* Mark the regs used in the phi function. */ | |
1999 | for_each_rtx (&src, mark_reg_in_phi, phi_set); | |
2000 | } | |
2001 | /* ... else nothing to do. */ | |
2002 | } | |
4e872036 | 2003 | } |
d9d4fb43 AS |
2004 | |
2005 | /* Rename regs in insn PTR that are equivalent. DATA is the register | |
2006 | partition which specifies equivalences. */ | |
2007 | ||
2008 | static int | |
2009 | rename_equivalent_regs_in_insn (ptr, data) | |
2010 | rtx *ptr; | |
2011 | void* data; | |
2012 | { | |
2013 | rtx x = *ptr; | |
2014 | partition reg_partition = (partition) data; | |
2015 | ||
2016 | if (x == NULL_RTX) | |
2017 | return 0; | |
2018 | ||
2019 | switch (GET_CODE (x)) | |
2020 | { | |
d9d4fb43 | 2021 | case REG: |
cdbca172 | 2022 | if (CONVERT_REGISTER_TO_SSA_P (REGNO (x))) |
d9d4fb43 | 2023 | { |
cdbca172 JO |
2024 | unsigned int regno = REGNO (x); |
2025 | unsigned int new_regno = partition_find (reg_partition, regno); | |
2026 | rtx canonical_element_rtx = ssa_rename_from_lookup (new_regno); | |
2027 | ||
786de7eb | 2028 | if (canonical_element_rtx != NULL_RTX && |
cdbca172 JO |
2029 | HARD_REGISTER_P (canonical_element_rtx)) |
2030 | { | |
2031 | if (REGNO (canonical_element_rtx) != regno) | |
2032 | *ptr = canonical_element_rtx; | |
2033 | } | |
2034 | else if (regno != new_regno) | |
d9d4fb43 AS |
2035 | { |
2036 | rtx new_reg = regno_reg_rtx[new_regno]; | |
2037 | if (GET_MODE (x) != GET_MODE (new_reg)) | |
2038 | abort (); | |
2039 | *ptr = new_reg; | |
2040 | } | |
2041 | } | |
2042 | return -1; | |
2043 | ||
2044 | case PHI: | |
2045 | /* No need to rename the phi nodes. We'll check equivalence | |
2046 | when inserting copies. */ | |
2047 | return -1; | |
2048 | ||
2049 | default: | |
2050 | /* Anything else, continue traversing. */ | |
2051 | return 0; | |
2052 | } | |
2053 | } | |
2054 | ||
cdbca172 JO |
2055 | /* Record the register's canonical element stored in SRFP in the |
2056 | canonical_elements sbitmap packaged in DATA. This function is used | |
2057 | as a callback function for traversing ssa_rename_from. */ | |
2058 | ||
2059 | static int | |
2060 | record_canonical_element_1 (srfp, data) | |
2061 | void **srfp; | |
2062 | void *data; | |
2063 | { | |
2064 | unsigned int reg = ((ssa_rename_from_pair *) *srfp)->reg; | |
2065 | sbitmap canonical_elements = | |
2066 | ((struct ssa_rename_from_hash_table_data *) data)->canonical_elements; | |
2067 | partition reg_partition = | |
2068 | ((struct ssa_rename_from_hash_table_data *) data)->reg_partition; | |
786de7eb | 2069 | |
cdbca172 JO |
2070 | SET_BIT (canonical_elements, partition_find (reg_partition, reg)); |
2071 | return 1; | |
2072 | } | |
2073 | ||
2074 | /* For each class in the REG_PARTITION corresponding to a particular | |
2075 | hard register and machine mode, check that there are no other | |
2076 | classes with the same hard register and machine mode. Returns | |
2077 | nonzero if this is the case, i.e., the partition is acceptable. */ | |
2078 | ||
2079 | static int | |
2080 | check_hard_regs_in_partition (reg_partition) | |
2081 | partition reg_partition; | |
2082 | { | |
2083 | /* CANONICAL_ELEMENTS has a nonzero bit if a class with the given register | |
2084 | number and machine mode has already been seen. This is a | |
2085 | problem with the partition. */ | |
2086 | sbitmap canonical_elements; | |
2087 | int element_index; | |
2088 | int already_seen[FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]; | |
2089 | int reg; | |
2090 | int mach_mode; | |
2091 | ||
2092 | /* Collect a list of canonical elements. */ | |
2093 | canonical_elements = sbitmap_alloc (max_reg_num ()); | |
2094 | sbitmap_zero (canonical_elements); | |
2095 | ssa_rename_from_traverse (&record_canonical_element_1, | |
2096 | canonical_elements, reg_partition); | |
2097 | ||
2098 | /* We have not seen any hard register uses. */ | |
2099 | for (reg = 0; reg < FIRST_PSEUDO_REGISTER; ++reg) | |
2100 | for (mach_mode = 0; mach_mode < NUM_MACHINE_MODES; ++mach_mode) | |
2101 | already_seen[reg][mach_mode] = 0; | |
2102 | ||
2103 | /* Check for classes with the same hard register and machine mode. */ | |
2104 | EXECUTE_IF_SET_IN_SBITMAP (canonical_elements, 0, element_index, | |
2105 | { | |
2106 | rtx hard_reg_rtx = ssa_rename_from_lookup (element_index); | |
2107 | if (hard_reg_rtx != NULL_RTX && | |
2108 | HARD_REGISTER_P (hard_reg_rtx) && | |
2109 | already_seen[REGNO (hard_reg_rtx)][GET_MODE (hard_reg_rtx)] != 0) | |
2110 | /* Two distinct partition classes should be mapped to the same | |
2111 | hard register. */ | |
2112 | return 0; | |
2113 | }); | |
2114 | ||
2115 | sbitmap_free (canonical_elements); | |
2116 | ||
2117 | return 1; | |
2118 | } | |
2119 | ||
2120 | /* Rename regs that are equivalent in REG_PARTITION. Also collapse | |
2121 | any SEQUENCE insns. */ | |
d9d4fb43 AS |
2122 | |
2123 | static void | |
2124 | rename_equivalent_regs (reg_partition) | |
2125 | partition reg_partition; | |
2126 | { | |
e0082a72 | 2127 | basic_block b; |
d9d4fb43 | 2128 | |
e0082a72 | 2129 | FOR_EACH_BB_REVERSE (b) |
d9d4fb43 | 2130 | { |
d9d4fb43 AS |
2131 | rtx next = b->head; |
2132 | rtx last = b->end; | |
2133 | rtx insn; | |
2134 | ||
2135 | do | |
2136 | { | |
2137 | insn = next; | |
2c3c49de | 2138 | if (INSN_P (insn)) |
d9d4fb43 | 2139 | { |
786de7eb KH |
2140 | for_each_rtx (&PATTERN (insn), |
2141 | rename_equivalent_regs_in_insn, | |
d9d4fb43 | 2142 | reg_partition); |
786de7eb KH |
2143 | for_each_rtx (®_NOTES (insn), |
2144 | rename_equivalent_regs_in_insn, | |
d9d4fb43 | 2145 | reg_partition); |
5397b155 GK |
2146 | |
2147 | if (GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2148 | { | |
2149 | rtx s = PATTERN (insn); | |
2150 | int slen = XVECLEN (s, 0); | |
2151 | int i; | |
2152 | ||
2153 | if (slen <= 1) | |
cf403648 | 2154 | abort (); |
5397b155 | 2155 | |
7e1b6513 | 2156 | PATTERN (insn) = XVECEXP (s, 0, slen-1); |
5397b155 | 2157 | for (i = 0; i < slen - 1; i++) |
3c030e88 | 2158 | emit_insn_before (XVECEXP (s, 0, i), insn); |
5397b155 | 2159 | } |
d9d4fb43 AS |
2160 | } |
2161 | ||
2162 | next = NEXT_INSN (insn); | |
2163 | } | |
2164 | while (insn != last); | |
2165 | } | |
2166 | } | |
2167 | ||
d9d4fb43 AS |
2168 | /* The main entry point for moving from SSA. */ |
2169 | ||
2170 | void | |
cf403648 | 2171 | convert_from_ssa () |
d9d4fb43 | 2172 | { |
e0082a72 | 2173 | basic_block b, bb; |
d9d4fb43 | 2174 | partition reg_partition; |
4e872036 | 2175 | rtx insns = get_insns (); |
cdbca172 | 2176 | |
fd9305ef JL |
2177 | /* Need global_live_at_{start,end} up to date. There should not be |
2178 | any significant dead code at this point, except perhaps dead | |
786de7eb | 2179 | stores. So do not take the time to perform dead code elimination. |
fd9305ef | 2180 | |
5e93ca86 JL |
2181 | Register coalescing needs death notes, so generate them. */ |
2182 | life_analysis (insns, NULL, PROP_DEATH_NOTES); | |
4e872036 AS |
2183 | |
2184 | /* Figure out which regs in copies and phi nodes don't conflict and | |
2185 | therefore can be coalesced. */ | |
2186 | if (conservative_reg_partition) | |
2187 | reg_partition = compute_conservative_reg_partition (); | |
2188 | else | |
2189 | reg_partition = compute_coalesced_reg_partition (); | |
2190 | ||
cdbca172 JO |
2191 | if (!check_hard_regs_in_partition (reg_partition)) |
2192 | /* Two separate partitions should correspond to the same hard | |
2193 | register but do not. */ | |
2194 | abort (); | |
2195 | ||
d9d4fb43 AS |
2196 | rename_equivalent_regs (reg_partition); |
2197 | ||
2198 | /* Eliminate the PHI nodes. */ | |
e0082a72 | 2199 | FOR_EACH_BB_REVERSE (b) |
d9d4fb43 | 2200 | { |
d9d4fb43 AS |
2201 | edge e; |
2202 | ||
2203 | for (e = b->pred; e; e = e->pred_next) | |
2204 | if (e->src != ENTRY_BLOCK_PTR) | |
2205 | eliminate_phi (e, reg_partition); | |
2206 | } | |
2207 | ||
2208 | partition_delete (reg_partition); | |
2209 | ||
2210 | /* Actually delete the PHI nodes. */ | |
e0082a72 | 2211 | FOR_EACH_BB_REVERSE (bb) |
d9d4fb43 | 2212 | { |
e0082a72 | 2213 | rtx insn = bb->head; |
d9d4fb43 | 2214 | |
589ca5cb | 2215 | while (1) |
d9d4fb43 | 2216 | { |
589ca5cb MM |
2217 | /* If this is a PHI node delete it. */ |
2218 | if (PHI_NODE_P (insn)) | |
2219 | { | |
e0082a72 ZD |
2220 | if (insn == bb->end) |
2221 | bb->end = PREV_INSN (insn); | |
49ce134f | 2222 | insn = delete_insn (insn); |
589ca5cb MM |
2223 | } |
2224 | /* Since all the phi nodes come at the beginning of the | |
2225 | block, if we find an ordinary insn, we can stop looking | |
2226 | for more phi nodes. */ | |
2227 | else if (INSN_P (insn)) | |
2228 | break; | |
2229 | /* If we've reached the end of the block, stop. */ | |
e0082a72 | 2230 | else if (insn == bb->end) |
589ca5cb | 2231 | break; |
786de7eb | 2232 | else |
589ca5cb | 2233 | insn = NEXT_INSN (insn); |
d9d4fb43 | 2234 | } |
d9d4fb43 AS |
2235 | } |
2236 | ||
2237 | /* Commit all the copy nodes needed to convert out of SSA form. */ | |
2238 | commit_edge_insertions (); | |
2239 | ||
4e872036 AS |
2240 | in_ssa_form = 0; |
2241 | ||
d9d4fb43 | 2242 | count_or_remove_death_notes (NULL, 1); |
cdbca172 JO |
2243 | |
2244 | /* Deallocate the data structures. */ | |
e2500fed | 2245 | ssa_definition = 0; |
cdbca172 | 2246 | ssa_rename_from_free (); |
d9d4fb43 | 2247 | } |
4e872036 AS |
2248 | |
2249 | /* Scan phi nodes in successors to BB. For each such phi node that | |
2250 | has a phi alternative value corresponding to BB, invoke FN. FN | |
2251 | is passed the entire phi node insn, the regno of the set | |
2252 | destination, the regno of the phi argument corresponding to BB, | |
2253 | and DATA. | |
2254 | ||
0e9e1e0a | 2255 | If FN ever returns nonzero, stops immediately and returns this |
4e872036 AS |
2256 | value. Otherwise, returns zero. */ |
2257 | ||
2258 | int | |
2259 | for_each_successor_phi (bb, fn, data) | |
6308dae9 | 2260 | basic_block bb; |
4e872036 AS |
2261 | successor_phi_fn fn; |
2262 | void *data; | |
2263 | { | |
4e872036 | 2264 | edge e; |
786de7eb | 2265 | |
6308dae9 | 2266 | if (bb == EXIT_BLOCK_PTR) |
4e872036 | 2267 | return 0; |
4e872036 AS |
2268 | |
2269 | /* Scan outgoing edges. */ | |
6308dae9 | 2270 | for (e = bb->succ; e != NULL; e = e->succ_next) |
4e872036 AS |
2271 | { |
2272 | rtx insn; | |
2273 | ||
2274 | basic_block successor = e->dest; | |
786de7eb | 2275 | if (successor == ENTRY_BLOCK_PTR |
6308dae9 | 2276 | || successor == EXIT_BLOCK_PTR) |
4e872036 AS |
2277 | continue; |
2278 | ||
2279 | /* Advance to the first non-label insn of the successor block. */ | |
589ca5cb | 2280 | insn = first_insn_after_basic_block_note (successor); |
4e872036 AS |
2281 | |
2282 | if (insn == NULL) | |
2283 | continue; | |
2284 | ||
2285 | /* Scan phi nodes in the successor. */ | |
2286 | for ( ; PHI_NODE_P (insn); insn = NEXT_INSN (insn)) | |
2287 | { | |
2288 | int result; | |
2289 | rtx phi_set = PATTERN (insn); | |
0b17ab2f | 2290 | rtx *alternative = phi_alternative (phi_set, bb->index); |
4e872036 | 2291 | rtx phi_src; |
786de7eb | 2292 | |
4e872036 AS |
2293 | /* This phi function may not have an alternative |
2294 | corresponding to the incoming edge, indicating the | |
2295 | assigned variable is not defined along the edge. */ | |
2296 | if (alternative == NULL) | |
2297 | continue; | |
2298 | phi_src = *alternative; | |
2299 | ||
2300 | /* Invoke the callback. */ | |
786de7eb | 2301 | result = (*fn) (insn, REGNO (SET_DEST (phi_set)), |
4e872036 AS |
2302 | REGNO (phi_src), data); |
2303 | ||
2304 | /* Terminate if requested. */ | |
2305 | if (result != 0) | |
2306 | return result; | |
2307 | } | |
2308 | } | |
2309 | ||
2310 | return 0; | |
2311 | } | |
cdbca172 JO |
2312 | |
2313 | /* Assuming the ssa_rename_from mapping has been established, yields | |
2314 | nonzero if 1) only one SSA register of REG1 and REG2 comes from a | |
2315 | hard register or 2) both SSA registers REG1 and REG2 come from | |
2316 | different hard registers. */ | |
2317 | ||
2318 | static int | |
2319 | conflicting_hard_regs_p (reg1, reg2) | |
2320 | int reg1; | |
2321 | int reg2; | |
2322 | { | |
2323 | int orig_reg1 = original_register (reg1); | |
2324 | int orig_reg2 = original_register (reg2); | |
2325 | if (HARD_REGISTER_NUM_P (orig_reg1) && HARD_REGISTER_NUM_P (orig_reg2) | |
2326 | && orig_reg1 != orig_reg2) | |
2327 | return 1; | |
2328 | if (HARD_REGISTER_NUM_P (orig_reg1) && !HARD_REGISTER_NUM_P (orig_reg2)) | |
2329 | return 1; | |
2330 | if (!HARD_REGISTER_NUM_P (orig_reg1) && HARD_REGISTER_NUM_P (orig_reg2)) | |
2331 | return 1; | |
786de7eb | 2332 | |
cdbca172 JO |
2333 | return 0; |
2334 | } |