[thirdparty/gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / pcs / saves_1_le_nowrap.c

/* { dg-do compile } */
/* { dg-options "-O -mlittle-endian -fno-shrink-wrap -fno-stack-clash-protection -g" } */
/* { dg-final { check-function-bodies "**" "" } } */

#pragma GCC aarch64 "arm_sve.h"

/*
** test_1:
**	addvl	sp, sp, #-18
**	str	p4, \[sp\]
**	str	p5, \[sp, #1, mul vl\]
**	str	p6, \[sp, #2, mul vl\]
**	str	p7, \[sp, #3, mul vl\]
**	str	p8, \[sp, #4, mul vl\]
**	str	p9, \[sp, #5, mul vl\]
**	str	p10, \[sp, #6, mul vl\]
**	str	p11, \[sp, #7, mul vl\]
**	str	p12, \[sp, #8, mul vl\]
**	str	p13, \[sp, #9, mul vl\]
**	str	p14, \[sp, #10, mul vl\]
**	str	p15, \[sp, #11, mul vl\]
**	str	z8, \[sp, #2, mul vl\]
**	str	z9, \[sp, #3, mul vl\]
**	str	z10, \[sp, #4, mul vl\]
**	str	z11, \[sp, #5, mul vl\]
**	str	z12, \[sp, #6, mul vl\]
**	str	z13, \[sp, #7, mul vl\]
**	str	z14, \[sp, #8, mul vl\]
**	str	z15, \[sp, #9, mul vl\]
**	str	z16, \[sp, #10, mul vl\]
**	str	z17, \[sp, #11, mul vl\]
**	str	z18, \[sp, #12, mul vl\]
**	str	z19, \[sp, #13, mul vl\]
**	str	z20, \[sp, #14, mul vl\]
**	str	z21, \[sp, #15, mul vl\]
**	str	z22, \[sp, #16, mul vl\]
**	str	z23, \[sp, #17, mul vl\]
**	ptrue	p0\.b, all
**	ldr	z8, \[sp, #2, mul vl\]
**	ldr	z9, \[sp, #3, mul vl\]
**	ldr	z10, \[sp, #4, mul vl\]
**	ldr	z11, \[sp, #5, mul vl\]
**	ldr	z12, \[sp, #6, mul vl\]
**	ldr	z13, \[sp, #7, mul vl\]
**	ldr	z14, \[sp, #8, mul vl\]
**	ldr	z15, \[sp, #9, mul vl\]
**	ldr	z16, \[sp, #10, mul vl\]
**	ldr	z17, \[sp, #11, mul vl\]
**	ldr	z18, \[sp, #12, mul vl\]
**	ldr	z19, \[sp, #13, mul vl\]
**	ldr	z20, \[sp, #14, mul vl\]
**	ldr	z21, \[sp, #15, mul vl\]
**	ldr	z22, \[sp, #16, mul vl\]
**	ldr	z23, \[sp, #17, mul vl\]
**	ldr	p4, \[sp\]
**	ldr	p5, \[sp, #1, mul vl\]
**	ldr	p6, \[sp, #2, mul vl\]
**	ldr	p7, \[sp, #3, mul vl\]
**	ldr	p8, \[sp, #4, mul vl\]
**	ldr	p9, \[sp, #5, mul vl\]
**	ldr	p10, \[sp, #6, mul vl\]
**	ldr	p11, \[sp, #7, mul vl\]
**	ldr	p12, \[sp, #8, mul vl\]
**	ldr	p13, \[sp, #9, mul vl\]
**	ldr	p14, \[sp, #10, mul vl\]
**	ldr	p15, \[sp, #11, mul vl\]
**	addvl	sp, sp, #18
**	ret
*/
svbool_t
test_1 (void)
{
  asm volatile ("" :::
		"z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
		"z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15",
		"z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23",
		"z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
		"p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
		"p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15");
  return svptrue_b8 ();
}

/*
** test_2:
**	ptrue	p0\.b, all
**	ret
*/
svbool_t
test_2 (void)
{
  asm volatile ("" :::
		"z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
		"z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
		"p0", "p1", "p2", "p3");
  return svptrue_b8 ();
}

/*
** test_3:
**	addvl	sp, sp, #-6
**	str	p5, \[sp\]
**	str	p6, \[sp, #1, mul vl\]
**	str	p11, \[sp, #2, mul vl\]
**	str	z8, \[sp, #1, mul vl\]
**	str	z13, \[sp, #2, mul vl\]
**	str	z19, \[sp, #3, mul vl\]
**	str	z20, \[sp, #4, mul vl\]
**	str	z22, \[sp, #5, mul vl\]
**	ptrue	p0\.b, all
**	ldr	z8, \[sp, #1, mul vl\]
**	ldr	z13, \[sp, #2, mul vl\]
**	ldr	z19, \[sp, #3, mul vl\]
**	ldr	z20, \[sp, #4, mul vl\]
**	ldr	z22, \[sp, #5, mul vl\]
**	ldr	p5, \[sp\]
**	ldr	p6, \[sp, #1, mul vl\]
**	ldr	p11, \[sp, #2, mul vl\]
**	addvl	sp, sp, #6
**	ret
*/
svbool_t
test_3 (void)
{
  asm volatile ("" :::
		"z8", "z13", "z19", "z20", "z22",
		"p5", "p6", "p11");
  return svptrue_b8 ();
}

/*
** test_4:
**	addvl	sp, sp, #-1
**	str	p4, \[sp\]
**	ptrue	p0\.b, all
**	ldr	p4, \[sp\]
**	addvl	sp, sp, #1
**	ret
*/
svbool_t
test_4 (void)
{
  asm volatile ("" ::: "p4");
  return svptrue_b8 ();
}

/*
** test_5:
**	addvl	sp, sp, #-1
**	str	z15, \[sp\]
**	ptrue	p0\.b, all
**	ldr	z15, \[sp\]
**	addvl	sp, sp, #1
**	ret
*/
svbool_t
test_5 (void)
{
  asm volatile ("" ::: "z15");
  return svptrue_b8 ();
}

/*
** test_6:
**	addvl	sp, sp, #-1
**	str	z15, \[sp\]
**	mov	z0\.b, #1
**	ldr	z15, \[sp\]
**	addvl	sp, sp, #1
**	ret
*/
svint8_t
test_6 (svbool_t p0, svbool_t p1, svbool_t p2, svbool_t p3)
{
  asm volatile ("" :: "Upa" (p0), "Upa" (p1), "Upa" (p2), "Upa" (p3) : "z15");
  return svdup_s8 (1);
}

/*
** test_7:
**	addvl	sp, sp, #-1
**	str	z16, \[sp\]
**	ptrue	p0\.b, all
**	ldr	z16, \[sp\]
**	addvl	sp, sp, #1
**	ret
*/
svbool_t
test_7 (void)
{
  asm volatile ("" ::: "z16");
  return svptrue_b8 ();
}
Commit	Line	Data
c600df9a RS	1	/* { dg-do compile } */
	2	/* { dg-options "-O -mlittle-endian -fno-shrink-wrap -fno-stack-clash-protection -g" } */
	3	/* { dg-final { check-function-bodies "*" "" } } /
	4
	5	#pragma GCC aarch64 "arm_sve.h"
	6
	7	/*
	8	** test_1:
cb26919c	9	** addvl sp, sp, #-18
c600df9a RS	10	** str p4, \[sp\]
	11	** str p5, \[sp, #1, mul vl\]
	12	** str p6, \[sp, #2, mul vl\]
	13	** str p7, \[sp, #3, mul vl\]
	14	** str p8, \[sp, #4, mul vl\]
	15	** str p9, \[sp, #5, mul vl\]
	16	** str p10, \[sp, #6, mul vl\]
	17	** str p11, \[sp, #7, mul vl\]
cb26919c RS	18	** str p12, \[sp, #8, mul vl\]
	19	** str p13, \[sp, #9, mul vl\]
	20	** str p14, \[sp, #10, mul vl\]
	21	** str p15, \[sp, #11, mul vl\]
	22	** str z8, \[sp, #2, mul vl\]
	23	** str z9, \[sp, #3, mul vl\]
	24	** str z10, \[sp, #4, mul vl\]
	25	** str z11, \[sp, #5, mul vl\]
	26	** str z12, \[sp, #6, mul vl\]
	27	** str z13, \[sp, #7, mul vl\]
	28	** str z14, \[sp, #8, mul vl\]
	29	** str z15, \[sp, #9, mul vl\]
	30	** str z16, \[sp, #10, mul vl\]
	31	** str z17, \[sp, #11, mul vl\]
	32	** str z18, \[sp, #12, mul vl\]
	33	** str z19, \[sp, #13, mul vl\]
	34	** str z20, \[sp, #14, mul vl\]
	35	** str z21, \[sp, #15, mul vl\]
	36	** str z22, \[sp, #16, mul vl\]
	37	** str z23, \[sp, #17, mul vl\]
c600df9a	38	** ptrue p0\.b, all
cb26919c RS	39	** ldr z8, \[sp, #2, mul vl\]
	40	** ldr z9, \[sp, #3, mul vl\]
	41	** ldr z10, \[sp, #4, mul vl\]
	42	** ldr z11, \[sp, #5, mul vl\]
	43	** ldr z12, \[sp, #6, mul vl\]
	44	** ldr z13, \[sp, #7, mul vl\]
	45	** ldr z14, \[sp, #8, mul vl\]
	46	** ldr z15, \[sp, #9, mul vl\]
	47	** ldr z16, \[sp, #10, mul vl\]
	48	** ldr z17, \[sp, #11, mul vl\]
	49	** ldr z18, \[sp, #12, mul vl\]
	50	** ldr z19, \[sp, #13, mul vl\]
	51	** ldr z20, \[sp, #14, mul vl\]
	52	** ldr z21, \[sp, #15, mul vl\]
	53	** ldr z22, \[sp, #16, mul vl\]
	54	** ldr z23, \[sp, #17, mul vl\]
c600df9a RS	55	** ldr p4, \[sp\]
	56	** ldr p5, \[sp, #1, mul vl\]
	57	** ldr p6, \[sp, #2, mul vl\]
	58	** ldr p7, \[sp, #3, mul vl\]
	59	** ldr p8, \[sp, #4, mul vl\]
	60	** ldr p9, \[sp, #5, mul vl\]
	61	** ldr p10, \[sp, #6, mul vl\]
	62	** ldr p11, \[sp, #7, mul vl\]
cb26919c RS	63	** ldr p12, \[sp, #8, mul vl\]
	64	** ldr p13, \[sp, #9, mul vl\]
	65	** ldr p14, \[sp, #10, mul vl\]
	66	** ldr p15, \[sp, #11, mul vl\]
	67	** addvl sp, sp, #18
c600df9a RS	68	** ret
	69	*/
	70	svbool_t
	71	test_1 (void)
	72	{
	73	asm volatile ("" :::
	74	"z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
	75	"z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15",
	76	"z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23",
	77	"z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
	78	"p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
	79	"p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15");
	80	return svptrue_b8 ();
	81	}
	82
	83	/*
	84	** test_2:
	85	** ptrue p0\.b, all
	86	** ret
	87	*/
	88	svbool_t
	89	test_2 (void)
	90	{
	91	asm volatile ("" :::
	92	"z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
	93	"z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
cb26919c	94	"p0", "p1", "p2", "p3");
c600df9a RS	95	return svptrue_b8 ();
	96	}
	97
	98	/*
	99	** test_3:
	100	** addvl sp, sp, #-6
	101	** str p5, \[sp\]
	102	** str p6, \[sp, #1, mul vl\]
	103	** str p11, \[sp, #2, mul vl\]
	104	** str z8, \[sp, #1, mul vl\]
	105	** str z13, \[sp, #2, mul vl\]
	106	** str z19, \[sp, #3, mul vl\]
	107	** str z20, \[sp, #4, mul vl\]
	108	** str z22, \[sp, #5, mul vl\]
	109	** ptrue p0\.b, all
	110	** ldr z8, \[sp, #1, mul vl\]
	111	** ldr z13, \[sp, #2, mul vl\]
	112	** ldr z19, \[sp, #3, mul vl\]
	113	** ldr z20, \[sp, #4, mul vl\]
	114	** ldr z22, \[sp, #5, mul vl\]
	115	** ldr p5, \[sp\]
	116	** ldr p6, \[sp, #1, mul vl\]
	117	** ldr p11, \[sp, #2, mul vl\]
	118	** addvl sp, sp, #6
	119	** ret
	120	*/
	121	svbool_t
	122	test_3 (void)
	123	{
	124	asm volatile ("" :::
	125	"z8", "z13", "z19", "z20", "z22",
	126	"p5", "p6", "p11");
	127	return svptrue_b8 ();
	128	}
	129
	130	/*
	131	** test_4:
	132	** addvl sp, sp, #-1
	133	** str p4, \[sp\]
	134	** ptrue p0\.b, all
	135	** ldr p4, \[sp\]
	136	** addvl sp, sp, #1
	137	** ret
	138	*/
	139	svbool_t
	140	test_4 (void)
	141	{
	142	asm volatile ("" ::: "p4");
	143	return svptrue_b8 ();
	144	}
	145
	146	/*
	147	** test_5:
	148	** addvl sp, sp, #-1
	149	** str z15, \[sp\]
	150	** ptrue p0\.b, all
	151	** ldr z15, \[sp\]
	152	** addvl sp, sp, #1
	153	** ret
	154	*/
	155	svbool_t
	156	test_5 (void)
	157	{
	158	asm volatile ("" ::: "z15");
159	return svptrue_b8 ();
160	}
161
162	/*
163	** test_6:
164	** addvl sp, sp, #-1
165	** str z15, \[sp\]
166	** mov z0\.b, #1
167	** ldr z15, \[sp\]
168	** addvl sp, sp, #1
169	** ret
170	*/
171	svint8_t
172	test_6 (svbool_t p0, svbool_t p1, svbool_t p2, svbool_t p3)
173	{
174	asm volatile ("" :: "Upa" (p0), "Upa" (p1), "Upa" (p2), "Upa" (p3) : "z15");
175	return svdup_s8 (1);
176	}
177
178	/*
179	** test_7:
180	** addvl sp, sp, #-1
181	** str z16, \[sp\]
182	** ptrue p0\.b, all
183	** ldr z16, \[sp\]
184	** addvl sp, sp, #1
185	** ret
186	*/
187	svbool_t
188	test_7 (void)
189	{
190	asm volatile ("" ::: "z16");
191	return svptrue_b8 ();
192	}