[thirdparty/gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve2 / acle / asm / cvtx_f32.c

/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */

#include "test_sve_acle.h"

/*
** cvtx_f32_f64_m_tied1:
**	fcvtx	z0\.s, p0/m, z4\.d
**	ret
*/
TEST_DUAL_Z (cvtx_f32_f64_m_tied1, svfloat32_t, svfloat64_t,
	     z0 = svcvtx_f32_f64_m (z0, p0, z4),
	     z0 = svcvtx_f32_m (z0, p0, z4))

/*
** cvtx_f32_f64_m_tied2:
**	mov	(z[0-9]+\.d), z0\.d
**	movprfx	z0, z4
**	fcvtx	z0\.s, p0/m, \1
**	ret
*/
TEST_DUAL_Z_REV (cvtx_f32_f64_m_tied2, svfloat32_t, svfloat64_t,
		 z0_res = svcvtx_f32_f64_m (z4, p0, z0),
		 z0_res = svcvtx_f32_m (z4, p0, z0))

/*
** cvtx_f32_f64_m_untied:
**	movprfx	z0, z1
**	fcvtx	z0\.s, p0/m, z4\.d
**	ret
*/
TEST_DUAL_Z (cvtx_f32_f64_m_untied, svfloat32_t, svfloat64_t,
	     z0 = svcvtx_f32_f64_m (z1, p0, z4),
	     z0 = svcvtx_f32_m (z1, p0, z4))

/*
** cvtx_f32_f64_z_tied1:
**	mov	(z[0-9]+\.d), z0\.d
**	movprfx	z0\.d, p0/z, \1
**	fcvtx	z0\.s, p0/m, \1
**	ret
*/
TEST_DUAL_Z_REV (cvtx_f32_f64_z_tied1, svfloat32_t, svfloat64_t,
		 z0_res = svcvtx_f32_f64_z (p0, z0),
		 z0_res = svcvtx_f32_z (p0, z0))

/*
** cvtx_f32_f64_z_untied:
**	movprfx	z0\.d, p0/z, z4\.d
**	fcvtx	z0\.s, p0/m, z4\.d
**	ret
*/
TEST_DUAL_Z (cvtx_f32_f64_z_untied, svfloat32_t, svfloat64_t,
	     z0 = svcvtx_f32_f64_z (p0, z4),
	     z0 = svcvtx_f32_z (p0, z4))

/*
** cvtx_f32_f64_x_tied1:
**	fcvtx	z0\.s, p0/m, z0\.d
**	ret
*/
TEST_DUAL_Z_REV (cvtx_f32_f64_x_tied1, svfloat32_t, svfloat64_t,
		 z0_res = svcvtx_f32_f64_x (p0, z0),
		 z0_res = svcvtx_f32_x (p0, z0))

/*
** cvtx_f32_f64_x_untied:
**	fcvtx	z0\.s, p0/m, z4\.d
**	ret
*/
TEST_DUAL_Z (cvtx_f32_f64_x_untied, svfloat32_t, svfloat64_t,
	     z0 = svcvtx_f32_f64_x (p0, z4),
	     z0 = svcvtx_f32_x (p0, z4))

/*
** ptrue_cvtx_f32_f64_x_tied1:
**	...
**	ptrue	p[0-9]+\.b[^\n]*
**	...
**	ret
*/
TEST_DUAL_Z_REV (ptrue_cvtx_f32_f64_x_tied1, svfloat32_t, svfloat64_t,
		 z0_res = svcvtx_f32_f64_x (svptrue_b64 (), z0),
		 z0_res = svcvtx_f32_x (svptrue_b64 (), z0))

/*
** ptrue_cvtx_f32_f64_x_untied:
**	...
**	ptrue	p[0-9]+\.b[^\n]*
**	...
**	ret
*/
TEST_DUAL_Z (ptrue_cvtx_f32_f64_x_untied, svfloat32_t, svfloat64_t,
	     z0 = svcvtx_f32_f64_x (svptrue_b64 (), z4),
	     z0 = svcvtx_f32_x (svptrue_b64 (), z4))
Commit	Line	Data
0a09a948 RS	1	/* { dg-final { check-function-bodies "*" "" "-DCHECK_ASM" } } /
	2
	3	#include "test_sve_acle.h"
	4
	5	/*
	6	** cvtx_f32_f64_m_tied1:
	7	** fcvtx z0\.s, p0/m, z4\.d
	8	** ret
	9	*/
	10	TEST_DUAL_Z (cvtx_f32_f64_m_tied1, svfloat32_t, svfloat64_t,
	11	z0 = svcvtx_f32_f64_m (z0, p0, z4),
	12	z0 = svcvtx_f32_m (z0, p0, z4))
	13
	14	/*
	15	** cvtx_f32_f64_m_tied2:
	16	** mov (z[0-9]+\.d), z0\.d
	17	** movprfx z0, z4
	18	** fcvtx z0\.s, p0/m, \1
	19	** ret
	20	*/
	21	TEST_DUAL_Z_REV (cvtx_f32_f64_m_tied2, svfloat32_t, svfloat64_t,
	22	z0_res = svcvtx_f32_f64_m (z4, p0, z0),
	23	z0_res = svcvtx_f32_m (z4, p0, z0))
	24
	25	/*
	26	** cvtx_f32_f64_m_untied:
	27	** movprfx z0, z1
	28	** fcvtx z0\.s, p0/m, z4\.d
	29	** ret
	30	*/
	31	TEST_DUAL_Z (cvtx_f32_f64_m_untied, svfloat32_t, svfloat64_t,
	32	z0 = svcvtx_f32_f64_m (z1, p0, z4),
	33	z0 = svcvtx_f32_m (z1, p0, z4))
	34
	35	/*
	36	** cvtx_f32_f64_z_tied1:
	37	** mov (z[0-9]+\.d), z0\.d
	38	** movprfx z0\.d, p0/z, \1
	39	** fcvtx z0\.s, p0/m, \1
	40	** ret
	41	*/
	42	TEST_DUAL_Z_REV (cvtx_f32_f64_z_tied1, svfloat32_t, svfloat64_t,
	43	z0_res = svcvtx_f32_f64_z (p0, z0),
	44	z0_res = svcvtx_f32_z (p0, z0))
	45
	46	/*
	47	** cvtx_f32_f64_z_untied:
	48	** movprfx z0\.d, p0/z, z4\.d
	49	** fcvtx z0\.s, p0/m, z4\.d
	50	** ret
	51	*/
	52	TEST_DUAL_Z (cvtx_f32_f64_z_untied, svfloat32_t, svfloat64_t,
	53	z0 = svcvtx_f32_f64_z (p0, z4),
	54	z0 = svcvtx_f32_z (p0, z4))
	55
	56	/*
	57	** cvtx_f32_f64_x_tied1:
	58	** fcvtx z0\.s, p0/m, z0\.d
	59	** ret
	60	*/
	61	TEST_DUAL_Z_REV (cvtx_f32_f64_x_tied1, svfloat32_t, svfloat64_t,
	62	z0_res = svcvtx_f32_f64_x (p0, z0),
	63	z0_res = svcvtx_f32_x (p0, z0))
	64
65	/*
66	** cvtx_f32_f64_x_untied:
67	** fcvtx z0\.s, p0/m, z4\.d
68	** ret
69	*/
70	TEST_DUAL_Z (cvtx_f32_f64_x_untied, svfloat32_t, svfloat64_t,
71	z0 = svcvtx_f32_f64_x (p0, z4),
72	z0 = svcvtx_f32_x (p0, z4))
73
74	/*
75	** ptrue_cvtx_f32_f64_x_tied1:
76	** ...
77	** ptrue p[0-9]+\.b[^\n]*
78	** ...
79	** ret
80	*/
81	TEST_DUAL_Z_REV (ptrue_cvtx_f32_f64_x_tied1, svfloat32_t, svfloat64_t,
82	z0_res = svcvtx_f32_f64_x (svptrue_b64 (), z0),
83	z0_res = svcvtx_f32_x (svptrue_b64 (), z0))
84
85	/*
86	** ptrue_cvtx_f32_f64_x_untied:
87	** ...
88	** ptrue p[0-9]+\.b[^\n]*
89	** ...
90	** ret
91	*/
92	TEST_DUAL_Z (ptrue_cvtx_f32_f64_x_untied, svfloat32_t, svfloat64_t,
93	z0 = svcvtx_f32_f64_x (svptrue_b64 (), z4),
94	z0 = svcvtx_f32_x (svptrue_b64 (), z4))