[thirdparty/gcc.git] / gcc / testsuite / gcc.target / i386 / builtin_target.c

/* This test checks if the __builtin_cpu_is and __builtin_cpu_supports calls
   are recognized.  It also independently uses CPUID to get cpu type and
   features supported and checks if the builtins correctly identify the
   platform.  The code to do the identification is adapted from
   libgcc/config/i386/cpuinfo.c.  */

/* { dg-do run } */

#include <assert.h>
#include "cpuid.h"

/* Check if the Intel CPU model and sub-model are identified.  */
static void
check_intel_cpu_model (unsigned int family, unsigned int model,
		       unsigned int brand_id)
{
  /* Parse family and model only if brand ID is 0. */
  if (brand_id == 0)
    {
      switch (family)
	{
	case 0x5:
	  /* Pentium.  */
	  break;
	case 0x6:
	  switch (model)
	    {
	    case 0x1c:
	    case 0x26:
	      /* Atom.  */
	      assert (__builtin_cpu_is ("atom"));
	      break;
	    case 0x37:
	    case 0x4a:
	    case 0x4d:
	    case 0x5a:
	    case 0x5d:
	      /* Silvermont.  */
	      assert (__builtin_cpu_is ("silvermont"));
	      break;
	    case 0x5c:
	    case 0x5f:
	      /* Goldmont.  */
	      assert (__builtin_cpu_is ("goldmont"));
	      break;
	    case 0x7a:
	      /* Goldmont Plus.  */
	      assert (__builtin_cpu_is ("goldmont-plus"));
	      break;
	    case 0x57:
	      /* Knights Landing.  */
	      assert (__builtin_cpu_is ("knl"));
	      break;
	    case 0x85:
	      /* Knights Mill */
	      assert (__builtin_cpu_is ("knm"));
	      break;
	    case 0x1a:
	    case 0x1e:
	    case 0x1f:
	    case 0x2e:
	      /* Nehalem.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("nehalem"));
	      break;
	    case 0x25:
	    case 0x2c:
	    case 0x2f:
	      /* Westmere.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("westmere"));
	      break;
	    case 0x2a:
	    case 0x2d:
	      /* Sandy Bridge.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("sandybridge"));
	      break;
	    case 0x3a:
	    case 0x3e:
	      /* Ivy Bridge.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("ivybridge"));
	      break;
	    case 0x3c:
	    case 0x3f:
	    case 0x45:
	    case 0x46:
	      /* Haswell.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("haswell"));
	      break;
	    case 0x3d:
	    case 0x47:
	    case 0x4f:
	    case 0x56:
	      /* Broadwell.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("broadwell"));
	      break;
	    case 0x4e:
	    case 0x5e:
	      /* Skylake.  */
	    case 0x8e:
	    case 0x9e:
	      /* Kaby Lake.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("skylake"));
	      break;
	    case 0x55:
	      /* Skylake with AVX-512 support.  */
	      assert (__builtin_cpu_is ("corei7"));
	      assert (__builtin_cpu_is ("skylake-avx512"));
	      break;
	    case 0x66:
	      /* Cannon Lake.  */
	      assert (__builtin_cpu_is ("cannonlake"));
	      break;
	    case 0x17:
	    case 0x1d:
	      /* Penryn.  */
	    case 0x0f:
	      /* Merom.  */
	      assert (__builtin_cpu_is ("core2"));
	      break;
	    default:
	      break;
	    }
	  break;
	default:
	  /* We have no idea.  */
	  break;
	}
    }
}

/* Check if the AMD CPU model and sub-model are identified.  */
static void
check_amd_cpu_model (unsigned int family, unsigned int model)
{
  switch (family)
    {
    /* AMD Family 10h.  */
    case 0x10:
      switch (model)
	{
	case 0x2:
	  /* Barcelona.  */
	  assert (__builtin_cpu_is ("amdfam10h"));
	  assert (__builtin_cpu_is ("barcelona"));
	  break;
	case 0x4:
	  /* Shanghai.  */
	  assert (__builtin_cpu_is ("amdfam10h"));
	  assert (__builtin_cpu_is ("shanghai"));
	  break;
	case 0x8:
	  /* Istanbul.  */
	  assert (__builtin_cpu_is ("amdfam10h"));
	  assert (__builtin_cpu_is ("istanbul"));
	  break;
	default:
	  break;
	}
      break;
    /* AMD Family 15h.  */
    case 0x15:
      assert (__builtin_cpu_is ("amdfam15h"));
      /* Bulldozer version 1.  */
      if ( model <= 0xf)
	assert (__builtin_cpu_is ("bdver1"));
      /* Bulldozer version 2.  */
      if (model >= 0x10 && model <= 0x1f)
	assert (__builtin_cpu_is ("bdver2"));
      break;
    default:
      break;
    }
}

/* Check if the ISA features are identified.  */
static void
check_features (unsigned int ecx, unsigned int edx,
		int max_cpuid_level)
{
  unsigned int eax, ebx;
  unsigned int ext_level;

  if (edx & bit_CMOV)
    assert (__builtin_cpu_supports ("cmov"));
  if (edx & bit_MMX)
    assert (__builtin_cpu_supports ("mmx"));
  if (edx & bit_SSE)
    assert (__builtin_cpu_supports ("sse"));
  if (edx & bit_SSE2)
    assert (__builtin_cpu_supports ("sse2"));
  if (ecx & bit_POPCNT)
    assert (__builtin_cpu_supports ("popcnt"));
  if (ecx & bit_AES)
    assert (__builtin_cpu_supports ("aes"));
  if (ecx & bit_PCLMUL)
    assert (__builtin_cpu_supports ("pclmul"));
  if (ecx & bit_SSE3)
    assert (__builtin_cpu_supports ("sse3"));
  if (ecx & bit_SSSE3)
    assert (__builtin_cpu_supports ("ssse3"));
  if (ecx & bit_SSE4_1)
    assert (__builtin_cpu_supports ("sse4.1"));
  if (ecx & bit_SSE4_2)
    assert (__builtin_cpu_supports ("sse4.2"));
  if (ecx & bit_AVX)
    assert (__builtin_cpu_supports ("avx"));
  if (ecx & bit_FMA)
    assert (__builtin_cpu_supports ("fma"));

  /* Get advanced features at level 7 (eax = 7, ecx = 0).  */
  if (max_cpuid_level >= 7)
    {
      __cpuid_count (7, 0, eax, ebx, ecx, edx);
      if (ebx & bit_BMI)
	assert (__builtin_cpu_supports ("bmi"));
      if (ebx & bit_AVX2)
	assert (__builtin_cpu_supports ("avx2"));
      if (ebx & bit_BMI2)
	assert (__builtin_cpu_supports ("bmi2"));
      if (ebx & bit_AVX512F)
	assert (__builtin_cpu_supports ("avx512f"));
      if (ebx & bit_AVX512VL)
	assert (__builtin_cpu_supports ("avx512vl"));
      if (ebx & bit_AVX512BW)
	assert (__builtin_cpu_supports ("avx512bw"));
      if (ebx & bit_AVX512DQ)
	assert (__builtin_cpu_supports ("avx512dq"));
      if (ebx & bit_AVX512CD)
	assert (__builtin_cpu_supports ("avx512cd"));
      if (ebx & bit_AVX512PF)
	assert (__builtin_cpu_supports ("avx512pf"));
      if (ebx & bit_AVX512ER)
	assert (__builtin_cpu_supports ("avx512er"));
      if (ebx & bit_AVX512IFMA)
	assert (__builtin_cpu_supports ("avx512ifma"));
      if (ecx & bit_AVX512VBMI)
	assert (__builtin_cpu_supports ("avx512vbmi"));
      if (ecx & bit_AVX512VBMI2)
	assert (__builtin_cpu_supports ("avx512vbmi2"));
      if (ecx & bit_GFNI)
	assert (__builtin_cpu_supports ("gfni"));
      if (ecx & bit_VPCLMULQDQ)
	assert (__builtin_cpu_supports ("vpclmulqdq"));
      if (ecx & bit_AVX512VNNI)
	assert (__builtin_cpu_supports ("avx512vnni"));
      if (ecx & bit_AVX512BITALG)
	assert (__builtin_cpu_supports ("avx512bitalg"));
      if (ecx & bit_AVX512VPOPCNTDQ)
	assert (__builtin_cpu_supports ("avx512vpopcntdq"));
      if (edx & bit_AVX5124VNNIW)
	assert (__builtin_cpu_supports ("avx5124vnniw"));
      if (edx & bit_AVX5124FMAPS)
	assert (__builtin_cpu_supports ("avx5124fmaps"));
    }

  /* Check cpuid level of extended features.  */
  __cpuid (0x80000000, ext_level, ebx, ecx, edx);

  if (ext_level >= 0x80000001)
    {
      __cpuid (0x80000001, eax, ebx, ecx, edx);

      if (ecx & bit_SSE4a)
	assert (__builtin_cpu_supports ("sse4a"));
      if (ecx & bit_FMA4)
	assert (__builtin_cpu_supports ("fma4"));
      if (ecx & bit_XOP)
	assert (__builtin_cpu_supports ("xop"));
    }
}

static int __attribute__ ((noinline))
__get_cpuid_output (unsigned int __level,
		    unsigned int *__eax, unsigned int *__ebx,
		    unsigned int *__ecx, unsigned int *__edx)
{
  return __get_cpuid (__level, __eax, __ebx, __ecx, __edx);
}

static int
check_detailed ()
{
  unsigned int eax, ebx, ecx, edx;

  int max_level; 
  unsigned int vendor;
  unsigned int model, family, brand_id;
  unsigned int extended_model, extended_family;

  /* Assume cpuid insn present. Run in level 0 to get vendor id. */
  if (!__get_cpuid_output (0, &eax, &ebx, &ecx, &edx))
    return 0;

  vendor = ebx;
  max_level = eax;

  if (max_level < 1)
    return 0;

  if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
    return 0;

  model = (eax >> 4) & 0x0f;
  family = (eax >> 8) & 0x0f;
  brand_id = ebx & 0xff;
  extended_model = (eax >> 12) & 0xf0;
  extended_family = (eax >> 20) & 0xff;

  if (vendor == signature_INTEL_ebx)
    {
      assert (__builtin_cpu_is ("intel"));
      /* Adjust family and model for Intel CPUs.  */
      if (family == 0x0f)
	{
	  family += extended_family;
	  model += extended_model;
	}
      else if (family == 0x06)
	model += extended_model;
      check_intel_cpu_model (family, model, brand_id);
      check_features (ecx, edx, max_level);
    }
  else if (vendor == signature_AMD_ebx)
    {
      assert (__builtin_cpu_is ("amd"));
      /* Adjust model and family for AMD CPUS. */
      if (family == 0x0f)
	{
	  family += extended_family;
	  model += (extended_model << 4);
	}
      check_amd_cpu_model (family, model);
      check_features (ecx, edx, max_level);
    }

  return 0;
}

static int
quick_check ()
{
  /* Check CPU Features.  */
  assert (__builtin_cpu_supports ("cmov") >= 0);

  assert (__builtin_cpu_supports ("mmx") >= 0);

  assert (__builtin_cpu_supports ("popcnt") >= 0);

  assert (__builtin_cpu_supports ("sse") >= 0);

  assert (__builtin_cpu_supports ("sse2") >= 0);

  assert (__builtin_cpu_supports ("sse3") >= 0);

  assert (__builtin_cpu_supports ("ssse3") >= 0);

  assert (__builtin_cpu_supports ("sse4.1") >= 0);

  assert (__builtin_cpu_supports ("sse4.2") >= 0);

  assert (__builtin_cpu_supports ("avx") >= 0);

  assert (__builtin_cpu_supports ("avx2") >= 0);

  assert (__builtin_cpu_supports ("avx512f") >= 0);

  assert (__builtin_cpu_supports ("avx5124vnniw") >= 0);

  assert (__builtin_cpu_supports ("avx5124fmaps") >= 0);

  assert (__builtin_cpu_supports ("avx512vpopcntdq") >= 0);

  /* Check CPU type.  */
  assert (__builtin_cpu_is ("amd") >= 0);

  assert (__builtin_cpu_is ("intel") >= 0);

  assert (__builtin_cpu_is ("atom") >= 0);

  assert (__builtin_cpu_is ("core2") >= 0);

  assert (__builtin_cpu_is ("corei7") >= 0);

  assert (__builtin_cpu_is ("nehalem") >= 0);

  assert (__builtin_cpu_is ("westmere") >= 0);

  assert (__builtin_cpu_is ("sandybridge") >= 0);

  assert (__builtin_cpu_is ("amdfam10h") >= 0);

  assert (__builtin_cpu_is ("barcelona") >= 0);

  assert (__builtin_cpu_is ("shanghai") >= 0);

  assert (__builtin_cpu_is ("istanbul") >= 0);

  assert (__builtin_cpu_is ("amdfam15h") >= 0);

  assert (__builtin_cpu_is ("bdver1") >= 0);

  assert (__builtin_cpu_is ("bdver2") >= 0);

  return 0;
}

int main ()
{
  __builtin_cpu_init ();
  quick_check ();
  check_detailed ();
  return 0;
}
Commit	Line	Data
792317cc	1	/* This test checks if the __builtin_cpu_is and __builtin_cpu_supports calls
91fe5efb ST	2	are recognized. It also independently uses CPUID to get cpu type and
	3	features supported and checks if the builtins correctly identify the
	4	platform. The code to do the identification is adapted from
	5	libgcc/config/i386/cpuinfo.c. */
792317cc ST	6
	7	/* { dg-do run } */
	8
	9	#include <assert.h>
91fe5efb	10	#include "cpuid.h"
792317cc	11
91fe5efb ST	12	/* Check if the Intel CPU model and sub-model are identified. */
	13	static void
	14	check_intel_cpu_model (unsigned int family, unsigned int model,
	15	unsigned int brand_id)
	16	{
	17	/* Parse family and model only if brand ID is 0. */
	18	if (brand_id == 0)
	19	{
	20	switch (family)
	21	{
	22	case 0x5:
	23	/* Pentium. */
	24	break;
	25	case 0x6:
	26	switch (model)
	27	{
	28	case 0x1c:
	29	case 0x26:
	30	/* Atom. */
	31	assert (__builtin_cpu_is ("atom"));
	32	break;
c8f2dff2 L	33	case 0x37:
	34	case 0x4a:
	35	case 0x4d:
	36	case 0x5a:
	37	case 0x5d:
	38	/* Silvermont. */
	39	assert (__builtin_cpu_is ("silvermont"));
	40	break;
50e461df OM	41	case 0x5c:
	42	case 0x5f:
	43	/* Goldmont. */
	44	assert (__builtin_cpu_is ("goldmont"));
	45	break;
74b2bb19 OM	46	case 0x7a:
	47	/* Goldmont Plus. */
	48	assert (__builtin_cpu_is ("goldmont-plus"));
	49	break;
51c728b1 L	50	case 0x57:
	51	/* Knights Landing. */
	52	assert (__builtin_cpu_is ("knl"));
	53	break;
cace2309 SP	54	case 0x85:
	55	/* Knights Mill */
	56	assert (__builtin_cpu_is ("knm"));
	57	break;
91fe5efb ST	58	case 0x1a:
	59	case 0x1e:
	60	case 0x1f:
	61	case 0x2e:
	62	/* Nehalem. */
	63	assert (__builtin_cpu_is ("corei7"));
	64	assert (__builtin_cpu_is ("nehalem"));
	65	break;
	66	case 0x25:
	67	case 0x2c:
	68	case 0x2f:
	69	/* Westmere. */
	70	assert (__builtin_cpu_is ("corei7"));
	71	assert (__builtin_cpu_is ("westmere"));
	72	break;
	73	case 0x2a:
c8f2dff2	74	case 0x2d:
91fe5efb ST	75	/* Sandy Bridge. */
	76	assert (__builtin_cpu_is ("corei7"));
	77	assert (__builtin_cpu_is ("sandybridge"));
	78	break;
c8f2dff2 L	79	case 0x3a:
	80	case 0x3e:
	81	/* Ivy Bridge. */
	82	assert (__builtin_cpu_is ("corei7"));
	83	assert (__builtin_cpu_is ("ivybridge"));
	84	break;
	85	case 0x3c:
	86	case 0x3f:
	87	case 0x45:
	88	case 0x46:
	89	/* Haswell. */
	90	assert (__builtin_cpu_is ("corei7"));
	91	assert (__builtin_cpu_is ("haswell"));
	92	break;
	93	case 0x3d:
736e56da	94	case 0x47:
c8f2dff2 L	95	case 0x4f:
	96	case 0x56:
	97	/* Broadwell. */
	98	assert (__builtin_cpu_is ("corei7"));
	99	assert (__builtin_cpu_is ("broadwell"));
	100	break;
3e0f3349 YR	101	case 0x4e:
	102	case 0x5e:
	103	/* Skylake. */
60edf8bb MT	104	case 0x8e:
	105	case 0x9e:
	106	/* Kaby Lake. */
3e0f3349 YR	107	assert (__builtin_cpu_is ("corei7"));
	108	assert (__builtin_cpu_is ("skylake"));
	109	break;
6a192b5a KY	110	case 0x55:
	111	/* Skylake with AVX-512 support. */
	112	assert (__builtin_cpu_is ("corei7"));
	113	assert (__builtin_cpu_is ("skylake-avx512"));
	114	break;
c36b04c1 JK	115	case 0x66:
	116	/* Cannon Lake. */
	117	assert (__builtin_cpu_is ("cannonlake"));
	118	break;
91fe5efb ST	119	case 0x17:
	120	case 0x1d:
	121	/* Penryn. */
	122	case 0x0f:
	123	/* Merom. */
	124	assert (__builtin_cpu_is ("core2"));
	125	break;
	126	default:
	127	break;
	128	}
	129	break;
	130	default:
	131	/* We have no idea. */
	132	break;
	133	}
	134	}
	135	}
	136
	137	/* Check if the AMD CPU model and sub-model are identified. */
	138	static void
	139	check_amd_cpu_model (unsigned int family, unsigned int model)
	140	{
	141	switch (family)
	142	{
	143	/* AMD Family 10h. */
	144	case 0x10:
	145	switch (model)
	146	{
	147	case 0x2:
	148	/* Barcelona. */
	149	assert (__builtin_cpu_is ("amdfam10h"));
	150	assert (__builtin_cpu_is ("barcelona"));
	151	break;
	152	case 0x4:
	153	/* Shanghai. */
	154	assert (__builtin_cpu_is ("amdfam10h"));
	155	assert (__builtin_cpu_is ("shanghai"));
	156	break;
	157	case 0x8:
	158	/* Istanbul. */
	159	assert (__builtin_cpu_is ("amdfam10h"));
	160	assert (__builtin_cpu_is ("istanbul"));
	161	break;
	162	default:
	163	break;
	164	}
	165	break;
	166	/* AMD Family 15h. */
	167	case 0x15:
	168	assert (__builtin_cpu_is ("amdfam15h"));
	169	/* Bulldozer version 1. */
	170	if ( model <= 0xf)
	171	assert (__builtin_cpu_is ("bdver1"));
	172	/* Bulldozer version 2. */
	173	if (model >= 0x10 && model <= 0x1f)
	174	assert (__builtin_cpu_is ("bdver2"));
	175	break;
	176	default:
	177	break;
	178	}
	179	}
	180
	181	/* Check if the ISA features are identified. */
	182	static void
183	check_features (unsigned int ecx, unsigned int edx,
184	int max_cpuid_level)
185	{
fbed6f36 UB	186	unsigned int eax, ebx;
	187	unsigned int ext_level;
	188
91fe5efb ST	189	if (edx & bit_CMOV)
	190	assert (__builtin_cpu_supports ("cmov"));
	191	if (edx & bit_MMX)
	192	assert (__builtin_cpu_supports ("mmx"));
	193	if (edx & bit_SSE)
	194	assert (__builtin_cpu_supports ("sse"));
	195	if (edx & bit_SSE2)
	196	assert (__builtin_cpu_supports ("sse2"));
	197	if (ecx & bit_POPCNT)
	198	assert (__builtin_cpu_supports ("popcnt"));
5097195f KY	199	if (ecx & bit_AES)
	200	assert (__builtin_cpu_supports ("aes"));
	201	if (ecx & bit_PCLMUL)
	202	assert (__builtin_cpu_supports ("pclmul"));
91fe5efb ST	203	if (ecx & bit_SSE3)
	204	assert (__builtin_cpu_supports ("sse3"));
	205	if (ecx & bit_SSSE3)
	206	assert (__builtin_cpu_supports ("ssse3"));
	207	if (ecx & bit_SSE4_1)
	208	assert (__builtin_cpu_supports ("sse4.1"));
	209	if (ecx & bit_SSE4_2)
	210	assert (__builtin_cpu_supports ("sse4.2"));
	211	if (ecx & bit_AVX)
	212	assert (__builtin_cpu_supports ("avx"));
fbed6f36 UB	213	if (ecx & bit_FMA)
fbed6f36 UB	214	assert (__builtin_cpu_supports ("fma"));
91fe5efb ST	215
	216	/* Get advanced features at level 7 (eax = 7, ecx = 0). */
	217	if (max_cpuid_level >= 7)
	218	{
91fe5efb	219	__cpuid_count (7, 0, eax, ebx, ecx, edx);
fbed6f36 UB	220	if (ebx & bit_BMI)
fbed6f36 UB	221	assert (__builtin_cpu_supports ("bmi"));
91fe5efb ST	222	if (ebx & bit_AVX2)
91fe5efb ST	223	assert (__builtin_cpu_supports ("avx2"));
fbed6f36 UB	224	if (ebx & bit_BMI2)
fbed6f36 UB	225	assert (__builtin_cpu_supports ("bmi2"));
c17eac85 IT	226	if (ebx & bit_AVX512F)
c17eac85 IT	227	assert (__builtin_cpu_supports ("avx512f"));
06caf59d KY	228	if (ebx & bit_AVX512VL)
06caf59d KY	229	assert (__builtin_cpu_supports ("avx512vl"));
fbed6f36 UB	230	if (ebx & bit_AVX512BW)
	231	assert (__builtin_cpu_supports ("avx512bw"));
	232	if (ebx & bit_AVX512DQ)
	233	assert (__builtin_cpu_supports ("avx512dq"));
06caf59d KY	234	if (ebx & bit_AVX512CD)
	235	assert (__builtin_cpu_supports ("avx512cd"));
	236	if (ebx & bit_AVX512PF)
	237	assert (__builtin_cpu_supports ("avx512pf"));
	238	if (ebx & bit_AVX512ER)
	239	assert (__builtin_cpu_supports ("avx512er"));
fbed6f36	240	if (ebx & bit_AVX512IFMA)
ab91c076	241	assert (__builtin_cpu_supports ("avx512ifma"));
4a2fc4d4	242	if (ecx & bit_AVX512VBMI)
ab91c076	243	assert (__builtin_cpu_supports ("avx512vbmi"));
c36b04c1 JK	244	if (ecx & bit_AVX512VBMI2)
	245	assert (__builtin_cpu_supports ("avx512vbmi2"));
	246	if (ecx & bit_GFNI)
	247	assert (__builtin_cpu_supports ("gfni"));
	248	if (ecx & bit_VPCLMULQDQ)
	249	assert (__builtin_cpu_supports ("vpclmulqdq"));
	250	if (ecx & bit_AVX512VNNI)
	251	assert (__builtin_cpu_supports ("avx512vnni"));
	252	if (ecx & bit_AVX512BITALG)
	253	assert (__builtin_cpu_supports ("avx512bitalg"));
fbed6f36 UB	254	if (ecx & bit_AVX512VPOPCNTDQ)
fbed6f36 UB	255	assert (__builtin_cpu_supports ("avx512vpopcntdq"));
9775c1a5 L	256	if (edx & bit_AVX5124VNNIW)
	257	assert (__builtin_cpu_supports ("avx5124vnniw"));
	258	if (edx & bit_AVX5124FMAPS)
	259	assert (__builtin_cpu_supports ("avx5124fmaps"));
fbed6f36 UB	260	}
	261
	262	/* Check cpuid level of extended features. */
	263	__cpuid (0x80000000, ext_level, ebx, ecx, edx);
	264
	265	if (ext_level >= 0x80000001)
	266	{
	267	__cpuid (0x80000001, eax, ebx, ecx, edx);
	268
	269	if (ecx & bit_SSE4a)
	270	assert (__builtin_cpu_supports ("sse4a"));
	271	if (ecx & bit_FMA4)
	272	assert (__builtin_cpu_supports ("fma4"));
	273	if (ecx & bit_XOP)
	274	assert (__builtin_cpu_supports ("xop"));
91fe5efb ST	275	}
	276	}
	277
	278	static int __attribute__ ((noinline))
	279	__get_cpuid_output (unsigned int __level,
	280	unsigned int __eax, unsigned int __ebx,
	281	unsigned int __ecx, unsigned int __edx)
	282	{
	283	return __get_cpuid (__level, __eax, __ebx, __ecx, __edx);
	284	}
	285
	286	static int
	287	check_detailed ()
	288	{
	289	unsigned int eax, ebx, ecx, edx;
	290
	291	int max_level;
	292	unsigned int vendor;
	293	unsigned int model, family, brand_id;
	294	unsigned int extended_model, extended_family;
	295
	296	/* Assume cpuid insn present. Run in level 0 to get vendor id. */
	297	if (!__get_cpuid_output (0, &eax, &ebx, &ecx, &edx))
	298	return 0;
	299
	300	vendor = ebx;
	301	max_level = eax;
	302
	303	if (max_level < 1)
	304	return 0;
	305
	306	if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
	307	return 0;
	308
	309	model = (eax >> 4) & 0x0f;
	310	family = (eax >> 8) & 0x0f;
	311	brand_id = ebx & 0xff;
	312	extended_model = (eax >> 12) & 0xf0;
	313	extended_family = (eax >> 20) & 0xff;
	314
892c7a07	315	if (vendor == signature_INTEL_ebx)
91fe5efb ST	316	{
	317	assert (__builtin_cpu_is ("intel"));
	318	/* Adjust family and model for Intel CPUs. */
	319	if (family == 0x0f)
	320	{
	321	family += extended_family;
	322	model += extended_model;
	323	}
	324	else if (family == 0x06)
	325	model += extended_model;
	326	check_intel_cpu_model (family, model, brand_id);
	327	check_features (ecx, edx, max_level);
	328	}
892c7a07	329	else if (vendor == signature_AMD_ebx)
91fe5efb ST	330	{
	331	assert (__builtin_cpu_is ("amd"));
	332	/* Adjust model and family for AMD CPUS. */
	333	if (family == 0x0f)
	334	{
	335	family += extended_family;
	336	model += (extended_model << 4);
	337	}
	338	check_amd_cpu_model (family, model);
	339	check_features (ecx, edx, max_level);
	340	}
	341
	342	return 0;
	343	}
	344
	345	static int
	346	quick_check ()
792317cc ST	347	{
	348	/* Check CPU Features. */
	349	assert (__builtin_cpu_supports ("cmov") >= 0);
	350
	351	assert (__builtin_cpu_supports ("mmx") >= 0);
	352
	353	assert (__builtin_cpu_supports ("popcnt") >= 0);
	354
	355	assert (__builtin_cpu_supports ("sse") >= 0);
	356
	357	assert (__builtin_cpu_supports ("sse2") >= 0);
	358
	359	assert (__builtin_cpu_supports ("sse3") >= 0);
	360
	361	assert (__builtin_cpu_supports ("ssse3") >= 0);
	362
	363	assert (__builtin_cpu_supports ("sse4.1") >= 0);
	364
	365	assert (__builtin_cpu_supports ("sse4.2") >= 0);
	366
	367	assert (__builtin_cpu_supports ("avx") >= 0);
	368
5ddecff9 ST	369	assert (__builtin_cpu_supports ("avx2") >= 0);
5ddecff9 ST	370
c17eac85 IT	371	assert (__builtin_cpu_supports ("avx512f") >= 0);
c17eac85 IT	372
9775c1a5 L	373	assert (__builtin_cpu_supports ("avx5124vnniw") >= 0);
	374
	375	assert (__builtin_cpu_supports ("avx5124fmaps") >= 0);
	376
79fc8ffe AS	377	assert (__builtin_cpu_supports ("avx512vpopcntdq") >= 0);
79fc8ffe AS	378
792317cc ST	379	/* Check CPU type. */
	380	assert (__builtin_cpu_is ("amd") >= 0);
	381
	382	assert (__builtin_cpu_is ("intel") >= 0);
	383
	384	assert (__builtin_cpu_is ("atom") >= 0);
	385
	386	assert (__builtin_cpu_is ("core2") >= 0);
	387
	388	assert (__builtin_cpu_is ("corei7") >= 0);
	389
	390	assert (__builtin_cpu_is ("nehalem") >= 0);
	391
	392	assert (__builtin_cpu_is ("westmere") >= 0);
	393
	394	assert (__builtin_cpu_is ("sandybridge") >= 0);
	395
	396	assert (__builtin_cpu_is ("amdfam10h") >= 0);
	397
	398	assert (__builtin_cpu_is ("barcelona") >= 0);
	399
	400	assert (__builtin_cpu_is ("shanghai") >= 0);
	401
	402	assert (__builtin_cpu_is ("istanbul") >= 0);
	403
	404	assert (__builtin_cpu_is ("amdfam15h") >= 0);
	405
	406	assert (__builtin_cpu_is ("bdver1") >= 0);
	407
	408	assert (__builtin_cpu_is ("bdver2") >= 0);
	409
	410	return 0;
	411	}
	412
	413	int main ()
	414	{
	415	__builtin_cpu_init ();
91fe5efb ST	416	quick_check ();
	417	check_detailed ();
	418	return 0;
792317cc	419	}