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1# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
2# 2011 Free Software Foundation, Inc.
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3
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License as published by
cd976c16 6# the Free Software Foundation; either version 3 of the License, or
71152e6d 7# (at your option) any later version.
21526606 8#
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9# This program is distributed in the hope that it will be useful,
10# but WITHOUT ANY WARRANTY; without even the implied warranty of
11# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12# GNU General Public License for more details.
21526606 13#
71152e6d 14# You should have received a copy of the GNU General Public License
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NC
15# along with GCC; see the file COPYING3. If not see
16# <http://www.gnu.org/licenses/>.
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17
18# Please email any bugs, comments, and/or additions to this file to:
19# gcc-patches@gcc.gnu.org
20
21# This file defines procs for determining features supported by the target.
22
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23# Try to compile the code given by CONTENTS into an output file of
24# type TYPE, where TYPE is as for target_compile. Return a list
25# whose first element contains the compiler messages and whose
26# second element is the name of the output file.
b6dc500c 27#
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28# BASENAME is a prefix to use for source and output files.
29# If ARGS is not empty, its first element is a string that
30# should be added to the command line.
31#
9debda96
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32# Assume by default that CONTENTS is C code.
33# Otherwise, code should contain:
34# "// C++" for c++,
35# "! Fortran" for Fortran code,
36# "/* ObjC", for ObjC
7a938933
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37# "// ObjC++" for ObjC++
38# and "// Go" for Go
9debda96
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39# If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
40# allow for ObjC/ObjC++ specific flags.
0ffd38c8 41proc check_compile {basename type contents args} {
b6dc500c 42 global tool
9debda96 43 verbose "check_compile tool: $tool for $basename"
b6dc500c 44
b6e3f572 45 if { [llength $args] > 0 } {
c03b9206 46 set options [list "additional_flags=[lindex $args 0]"]
b6e3f572
HPN
47 } else {
48 set options ""
49 }
0ffd38c8
RS
50 switch -glob -- $contents {
51 "*! Fortran*" { set src ${basename}[pid].f90 }
52 "*// C++*" { set src ${basename}[pid].cc }
9debda96
IS
53 "*// ObjC++*" { set src ${basename}[pid].mm }
54 "*/* ObjC*" { set src ${basename}[pid].m }
7a938933 55 "*// Go*" { set src ${basename}[pid].go }
9debda96
IS
56 default {
57 switch -- $tool {
58 "objc" { set src ${basename}[pid].m }
59 "obj-c++" { set src ${basename}[pid].mm }
60 default { set src ${basename}[pid].c }
61 }
62 }
0ffd38c8 63 }
9debda96 64
ca8b555b
HPN
65 set compile_type $type
66 switch -glob $type {
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67 assembly { set output ${basename}[pid].s }
68 object { set output ${basename}[pid].o }
0ffd38c8 69 executable { set output ${basename}[pid].exe }
ca8b555b
HPN
70 "rtl-*" {
71 set output ${basename}[pid].s
72 lappend options "additional_flags=-fdump-$type"
73 set compile_type assembly
74 }
b6dc500c
JJ
75 }
76 set f [open $src "w"]
77 puts $f $contents
78 close $f
ca8b555b 79 set lines [${tool}_target_compile $src $output $compile_type "$options"]
b6dc500c 80 file delete $src
b6dc500c 81
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HPN
82 set scan_output $output
83 # Don't try folding this into the switch above; calling "glob" before the
84 # file is created won't work.
85 if [regexp "rtl-(.*)" $type dummy rtl_type] {
86 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
87 file delete $output
88 }
89
90 return [list $lines $scan_output]
b6dc500c
JJ
91}
92
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93proc current_target_name { } {
94 global target_info
95 if [info exists target_info(target,name)] {
96 set answer $target_info(target,name)
97 } else {
98 set answer ""
99 }
100 return $answer
101}
102
8ce1ac69 103# Implement an effective-target check for property PROP by invoking
1018b4c3
RS
104# the Tcl command ARGS and seeing if it returns true.
105
106proc check_cached_effective_target { prop args } {
8ce1ac69
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107 global et_cache
108
109 set target [current_target_name]
110 if {![info exists et_cache($prop,target)]
111 || $et_cache($prop,target) != $target} {
1018b4c3 112 verbose "check_cached_effective_target $prop: checking $target" 2
19450f2b 113 set et_cache($prop,target) $target
1018b4c3 114 set et_cache($prop,value) [uplevel eval $args]
19450f2b
DJ
115 }
116 set value $et_cache($prop,value)
1018b4c3 117 verbose "check_cached_effective_target $prop: returning $value for $target" 2
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118 return $value
119}
120
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121# Like check_compile, but delete the output file and return true if the
122# compiler printed no messages.
123proc check_no_compiler_messages_nocache {args} {
124 set result [eval check_compile $args]
125 set lines [lindex $result 0]
126 set output [lindex $result 1]
127 remote_file build delete $output
128 return [string match "" $lines]
129}
130
131# Like check_no_compiler_messages_nocache, but cache the result.
132# PROP is the property we're checking, and doubles as a prefix for
133# temporary filenames.
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134proc check_no_compiler_messages {prop args} {
135 return [check_cached_effective_target $prop {
0ffd38c8 136 eval [list check_no_compiler_messages_nocache $prop] $args
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RS
137 }]
138}
139
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140# Like check_compile, but return true if the compiler printed no
141# messages and if the contents of the output file satisfy PATTERN.
142# If PATTERN has the form "!REGEXP", the contents satisfy it if they
143# don't match regular expression REGEXP, otherwise they satisfy it
144# if they do match regular expression PATTERN. (PATTERN can start
145# with something like "[!]" if the regular expression needs to match
146# "!" as the first character.)
147#
148# Delete the output file before returning. The other arguments are
149# as for check_compile.
150proc check_no_messages_and_pattern_nocache {basename pattern args} {
151 global tool
152
153 set result [eval [list check_compile $basename] $args]
154 set lines [lindex $result 0]
155 set output [lindex $result 1]
156
157 set ok 0
158 if { [string match "" $lines] } {
159 set chan [open "$output"]
160 set invert [regexp {^!(.*)} $pattern dummy pattern]
161 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
162 close $chan
163 }
164
165 remote_file build delete $output
166 return $ok
167}
168
169# Like check_no_messages_and_pattern_nocache, but cache the result.
170# PROP is the property we're checking, and doubles as a prefix for
171# temporary filenames.
19450f2b 172proc check_no_messages_and_pattern {prop pattern args} {
1018b4c3 173 return [check_cached_effective_target $prop {
0ffd38c8
RS
174 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
175 }]
176}
177
178# Try to compile and run an executable from code CONTENTS. Return true
179# if the compiler reports no messages and if execution "passes" in the
180# usual DejaGNU sense. The arguments are as for check_compile, with
181# TYPE implicitly being "executable".
182proc check_runtime_nocache {basename contents args} {
183 global tool
184
185 set result [eval [list check_compile $basename executable $contents] $args]
186 set lines [lindex $result 0]
187 set output [lindex $result 1]
188
189 set ok 0
190 if { [string match "" $lines] } {
191 # No error messages, everything is OK.
192 set result [remote_load target "./$output" "" ""]
193 set status [lindex $result 0]
194 verbose "check_runtime_nocache $basename: status is <$status>" 2
195 if { $status == "pass" } {
196 set ok 1
197 }
198 }
199 remote_file build delete $output
200 return $ok
201}
202
203# Like check_runtime_nocache, but cache the result. PROP is the
204# property we're checking, and doubles as a prefix for temporary
205# filenames.
206proc check_runtime {prop args} {
207 global tool
208
209 return [check_cached_effective_target $prop {
210 eval [list check_runtime_nocache $prop] $args
1018b4c3 211 }]
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212}
213
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214###############################
215# proc check_weak_available { }
216###############################
217
218# weak symbols are only supported in some configs/object formats
219# this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
220
221proc check_weak_available { } {
222 global target_cpu
223
224 # All mips targets should support it
21526606 225
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226 if { [ string first "mips" $target_cpu ] >= 0 } {
227 return 1
228 }
229
fa4211cb 230 # All solaris2 targets should support it
21526606 231
19073ebc 232 if { [istarget *-*-solaris2*] } {
fa4211cb
KG
233 return 1
234 }
235
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236 # DEC OSF/1/Digital UNIX/Tru64 UNIX supports it
237
19073ebc 238 if { [istarget alpha*-dec-osf*] } {
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239 return 1
240 }
241
c37780f5
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242 # Windows targets Cygwin and MingW32 support it
243
19073ebc 244 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
c37780f5
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245 return 1
246 }
247
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248 # HP-UX 10.X doesn't support it
249
19073ebc 250 if { [istarget hppa*-*-hpux10*] } {
6731e86d
JDA
251 return 0
252 }
253
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254 # ELF and ECOFF support it. a.out does with gas/gld but may also with
255 # other linkers, so we should try it
256
257 set objformat [gcc_target_object_format]
258
259 switch $objformat {
260 elf { return 1 }
261 ecoff { return 1 }
262 a.out { return 1 }
98f61f57 263 mach-o { return 1 }
6731e86d 264 som { return 1 }
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NC
265 unknown { return -1 }
266 default { return 0 }
267 }
268}
269
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270###############################
271# proc check_weak_override_available { }
272###############################
273
274# Like check_weak_available, but return 0 if weak symbol definitions
275# cannot be overridden.
276
277proc check_weak_override_available { } {
19073ebc 278 if { [istarget *-*-mingw*] } {
8a0963c3
JM
279 return 0
280 }
281 return [check_weak_available]
282}
283
facef326 284###############################
d3d9a67f 285# proc check_visibility_available { what_kind }
facef326
MA
286###############################
287
288# The visibility attribute is only support in some object formats
79c70e5a 289# This proc returns 1 if it is supported, 0 if not.
d3d9a67f 290# The argument is the kind of visibility, default/protected/hidden/internal.
facef326 291
d3d9a67f 292proc check_visibility_available { what_kind } {
d3d9a67f
GK
293 if [string match "" $what_kind] { set what_kind "hidden" }
294
8ce1ac69 295 return [check_no_compiler_messages visibility_available_$what_kind object "
d3d9a67f
GK
296 void f() __attribute__((visibility(\"$what_kind\")));
297 void f() {}
298 "]
facef326
MA
299}
300
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NC
301###############################
302# proc check_alias_available { }
303###############################
304
305# Determine if the target toolchain supports the alias attribute.
71152e6d 306
b4e0fcc3
MM
307# Returns 2 if the target supports aliases. Returns 1 if the target
308# only supports weak aliased. Returns 0 if the target does not
309# support aliases at all. Returns -1 if support for aliases could not
310# be determined.
311
312proc check_alias_available { } {
71152e6d 313 global alias_available_saved
bfa21a28
MM
314 global tool
315
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NC
316 if [info exists alias_available_saved] {
317 verbose "check_alias_available returning saved $alias_available_saved" 2
318 } else {
8dc84ef1
JJ
319 set src alias[pid].c
320 set obj alias[pid].o
321 verbose "check_alias_available compiling testfile $src" 2
322 set f [open $src "w"]
3348ded5
MM
323 # Compile a small test program. The definition of "g" is
324 # necessary to keep the Solaris assembler from complaining
325 # about the program.
54a47870 326 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
3348ded5 327 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
b4e0fcc3 328 close $f
8dc84ef1
JJ
329 set lines [${tool}_target_compile $src $obj object ""]
330 file delete $src
331 remote_file build delete $obj
b4e0fcc3 332
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NC
333 if [string match "" $lines] then {
334 # No error messages, everything is OK.
b4e0fcc3 335 set alias_available_saved 2
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NC
336 } else {
337 if [regexp "alias definitions not supported" $lines] {
338 verbose "check_alias_available target does not support aliases" 2
339
340 set objformat [gcc_target_object_format]
341
342 if { $objformat == "elf" } {
343 verbose "check_alias_available but target uses ELF format, so it ought to" 2
b4e0fcc3 344 set alias_available_saved -1
71152e6d 345 } else {
b4e0fcc3 346 set alias_available_saved 0
71152e6d
NC
347 }
348 } else {
9ef6d39a
JO
349 if [regexp "only weak aliases are supported" $lines] {
350 verbose "check_alias_available target supports only weak aliases" 2
b4e0fcc3 351 set alias_available_saved 1
9ef6d39a 352 } else {
b4e0fcc3 353 set alias_available_saved -1
9ef6d39a 354 }
71152e6d
NC
355 }
356 }
21526606 357
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NC
358 verbose "check_alias_available returning $alias_available_saved" 2
359 }
360
361 return $alias_available_saved
362}
b4e0fcc3 363
50823f95 364# Returns 1 if the target toolchain supports ifunc, 0 otherwise.
ba885ec5
NS
365
366proc check_ifunc_available { } {
e05de0a9
UB
367 return [check_no_compiler_messages ifunc_available object {
368 #ifdef __cplusplus
369 extern "C"
370 #endif
371 void g() {}
372 void f() __attribute__((ifunc("g")));
373 }]
ba885ec5
NS
374}
375
b4e0fcc3
MM
376# Returns true if --gc-sections is supported on the target.
377
378proc check_gc_sections_available { } {
379 global gc_sections_available_saved
bfa21a28 380 global tool
b4e0fcc3 381
4293f7cb 382 if {![info exists gc_sections_available_saved]} {
8138dfe4
RH
383 # Some targets don't support gc-sections despite whatever's
384 # advertised by ld's options.
385 if { [istarget alpha*-*-*]
386 || [istarget ia64-*-*] } {
387 set gc_sections_available_saved 0
388 return 0
389 }
390
fd86239d
KH
391 # elf2flt uses -q (--emit-relocs), which is incompatible with
392 # --gc-sections.
393 if { [board_info target exists ldflags]
394 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
395 set gc_sections_available_saved 0
396 return 0
397 }
398
75873b87
RS
399 # VxWorks kernel modules are relocatable objects linked with -r,
400 # while RTP executables are linked with -q (--emit-relocs).
401 # Both of these options are incompatible with --gc-sections.
402 if { [istarget *-*-vxworks*] } {
403 set gc_sections_available_saved 0
404 return 0
405 }
406
b4e0fcc3 407 # Check if the ld used by gcc supports --gc-sections.
61fec9ff 408 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
45456220 409 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
61fec9ff 410 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
b4e0fcc3
MM
411 set ld_output [remote_exec host "$gcc_ld" "--help"]
412 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
413 set gc_sections_available_saved 1
414 } else {
415 set gc_sections_available_saved 0
416 }
417 }
418 return $gc_sections_available_saved
419}
b8ee7f02 420
a21f9a56
AH
421# Return 1 if according to target_info struct and explicit target list
422# target is supposed to support trampolines.
423
424proc check_effective_target_trampolines { } {
425 if [target_info exists no_trampolines] {
426 return 0
427 }
428 if { [istarget avr-*-*]
429 || [istarget hppa2.0w-hp-hpux11.23]
430 || [istarget hppa64-hp-hpux11.23] } {
431 return 0;
432 }
433 return 1
434}
435
ad0dc07d
AH
436# Return 1 if according to target_info struct and explicit target list
437# target is supposed to keep null pointer checks. This could be due to
438# use of option fno-delete-null-pointer-checks or hardwired in target.
439
440proc check_effective_target_keeps_null_pointer_checks { } {
441 if [target_info exists keeps_null_pointer_checks] {
442 return 1
443 }
444 if { [istarget avr-*-*] } {
445 return 1;
446 }
447 return 0
448}
449
b8ee7f02
MM
450# Return true if profiling is supported on the target.
451
0d856ba2 452proc check_profiling_available { test_what } {
b8ee7f02
MM
453 global profiling_available_saved
454
0d856ba2
KG
455 verbose "Profiling argument is <$test_what>" 1
456
457 # These conditions depend on the argument so examine them before
458 # looking at the cache variable.
459
3f5cb251
RO
460 # Tree profiling requires TLS runtime support.
461 if { $test_what == "-fprofile-generate" } {
d22c9c31 462 if { ![check_effective_target_tls_runtime] } {
c8ecdaba
GJL
463 return 0
464 }
3f5cb251
RO
465 }
466
0d856ba2
KG
467 # Support for -p on solaris2 relies on mcrt1.o which comes with the
468 # vendor compiler. We cannot reliably predict the directory where the
469 # vendor compiler (and thus mcrt1.o) is installed so we can't
470 # necessarily find mcrt1.o even if we have it.
3f5cb251 471 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
0d856ba2
KG
472 return 0
473 }
474
475 # Support for -p on irix relies on libprof1.a which doesn't appear to
476 # exist on any irix6 system currently posting testsuite results.
477 # Support for -pg on irix relies on gcrt1.o which doesn't exist yet.
478 # See: http://gcc.gnu.org/ml/gcc/2002-10/msg00169.html
21526606 479 if { [istarget mips*-*-irix*]
3f5cb251 480 && ($test_what == "-p" || $test_what == "-pg") } {
0d856ba2 481 return 0
08d0963a
RS
482 }
483
484 # We don't yet support profiling for MIPS16.
485 if { [istarget mips*-*-*]
486 && ![check_effective_target_nomips16]
3f5cb251 487 && ($test_what == "-p" || $test_what == "-pg") } {
08d0963a 488 return 0
0d856ba2
KG
489 }
490
6a5e6663 491 # MinGW does not support -p.
3f5cb251 492 if { [istarget *-*-mingw*] && $test_what == "-p" } {
6a5e6663
JM
493 return 0
494 }
495
b7a0af68 496 # cygwin does not support -p.
3f5cb251 497 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
b7a0af68
DB
498 return 0
499 }
500
50f324bb
JM
501 # uClibc does not have gcrt1.o.
502 if { [check_effective_target_uclibc]
3f5cb251 503 && ($test_what == "-p" || $test_what == "-pg") } {
50f324bb 504 return 0
345f13fe
JB
505 }
506
0d856ba2 507 # Now examine the cache variable.
b8ee7f02
MM
508 if {![info exists profiling_available_saved]} {
509 # Some targets don't have any implementation of __bb_init_func or are
510 # missing other needed machinery.
0d8c8b1b 511 if { [istarget am3*-*-linux*]
2e32707b 512 || [istarget arm*-*-eabi*]
b8ee7f02 513 || [istarget arm*-*-elf]
2e32707b 514 || [istarget arm*-*-symbianelf*]
a21f9a56 515 || [istarget avr-*-*]
d5b7e972 516 || [istarget bfin-*-*]
b8ee7f02 517 || [istarget cris-*-*]
c7e30cf2 518 || [istarget crisv32-*-*]
da3ce502 519 || [istarget fido-*-elf]
21526606 520 || [istarget h8300-*-*]
0d8c8b1b
NC
521 || [istarget lm32-*-*]
522 || [istarget m32c-*-elf]
e3860a7d 523 || [istarget m68k-*-elf]
f8b45d4f 524 || [istarget m68k-*-uclinux*]
7acf4da6 525 || [istarget mep-*-elf]
37632195 526 || [istarget mips*-*-elf*]
0d8c8b1b
NC
527 || [istarget mmix-*-*]
528 || [istarget mn10300-*-elf*]
cceb575c 529 || [istarget moxie-*-elf*]
0d8c8b1b
NC
530 || [istarget picochip-*-*]
531 || [istarget powerpc-*-eabi*]
532 || [istarget powerpc-*-elf]
65a324b4 533 || [istarget rx-*-*]
294689c4 534 || [istarget tic6x-*-elf]
400d7a82 535 || [istarget xstormy16-*]
6d656178 536 || [istarget xtensa*-*-elf]
3ce1b2de 537 || [istarget *-*-rtems*]
cd985f66 538 || [istarget *-*-vxworks*] } {
b8ee7f02
MM
539 set profiling_available_saved 0
540 } else {
541 set profiling_available_saved 1
542 }
543 }
21526606 544
b8ee7f02
MM
545 return $profiling_available_saved
546}
21526606 547
7c280c72
HS
548# Check to see if a target is "freestanding". This is as per the definition
549# in Section 4 of C99 standard. Effectively, it is a target which supports no
550# extra headers or libraries other than what is considered essential.
551proc check_effective_target_freestanding { } {
552 if { [istarget picochip-*-*] } then {
553 return 1
554 } else {
555 return 0
556 }
557}
558
aa5c7673
HPN
559# Return 1 if target has packed layout of structure members by
560# default, 0 otherwise. Note that this is slightly different than
561# whether the target has "natural alignment": both attributes may be
562# false.
563
564proc check_effective_target_default_packed { } {
8ce1ac69
RS
565 return [check_no_compiler_messages default_packed assembly {
566 struct x { char a; long b; } c;
567 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
568 }]
aa5c7673
HPN
569}
570
edc5687e
HPN
571# Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
572# documentation, where the test also comes from.
573
574proc check_effective_target_pcc_bitfield_type_matters { } {
8ce1ac69
RS
575 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
576 # bitfields, but let's stick to the example code from the docs.
577 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
578 struct foo1 { char x; char :0; char y; };
579 struct foo2 { char x; int :0; char y; };
580 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
581 }]
edc5687e
HPN
582}
583
16c9d3b1
RO
584# Add to FLAGS all the target-specific flags needed to use thread-local storage.
585
586proc add_options_for_tls { flags } {
3451f439
RO
587 # Tru64 UNIX uses emutls, which relies on a couple of pthread functions
588 # which only live in libpthread, so always pass -pthread for TLS.
19073ebc 589 if { [istarget alpha*-dec-osf*] } {
3451f439
RO
590 return "$flags -pthread"
591 }
16c9d3b1
RO
592 # On Solaris 8 and 9, __tls_get_addr/___tls_get_addr only lives in
593 # libthread, so always pass -pthread for native TLS.
594 # Need to duplicate native TLS check from
595 # check_effective_target_tls_native to avoid recursion.
596 if { [istarget *-*-solaris2.\[89\]*] &&
597 [check_no_messages_and_pattern tls_native "!emutls" assembly {
598 __thread int i;
599 int f (void) { return i; }
600 void g (int j) { i = j; }
601 }] } {
602 return "$flags -pthread"
603 }
604 return $flags
605}
606
19bfb936 607# Return 1 if thread local storage (TLS) is supported, 0 otherwise.
ada80067
UB
608
609proc check_effective_target_tls {} {
0ffd38c8
RS
610 return [check_no_compiler_messages tls assembly {
611 __thread int i;
612 int f (void) { return i; }
613 void g (int j) { i = j; }
614 }]
19bfb936
SL
615}
616
617# Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
19bfb936
SL
618
619proc check_effective_target_tls_native {} {
feb60f03
NS
620 # VxWorks uses emulated TLS machinery, but with non-standard helper
621 # functions, so we fail to automatically detect it.
19073ebc 622 if { [istarget *-*-vxworks*] } {
feb60f03
NS
623 return 0
624 }
625
89a8fea0 626 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
0ffd38c8
RS
627 __thread int i;
628 int f (void) { return i; }
629 void g (int j) { i = j; }
630 }]
ada80067
UB
631}
632
63d90a96
IS
633# Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
634
635proc check_effective_target_tls_emulated {} {
636 # VxWorks uses emulated TLS machinery, but with non-standard helper
637 # functions, so we fail to automatically detect it.
19073ebc 638 if { [istarget *-*-vxworks*] } {
63d90a96
IS
639 return 1
640 }
641
642 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
643 __thread int i;
644 int f (void) { return i; }
645 void g (int j) { i = j; }
646 }]
647}
648
ada80067 649# Return 1 if TLS executables can run correctly, 0 otherwise.
ada80067
UB
650
651proc check_effective_target_tls_runtime {} {
0ffd38c8
RS
652 return [check_runtime tls_runtime {
653 __thread int thr = 0;
654 int main (void) { return thr; }
87d426f8 655 } [add_options_for_tls ""]]
ada80067
UB
656}
657
86951993
AM
658# Return 1 if atomic compare-and-swap is supported on 'int'
659
660proc check_effective_target_cas_char {} {
661 return [check_no_compiler_messages cas_char assembly {
662 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
663 #error unsupported
664 #endif
665 } ""]
666}
667
668proc check_effective_target_cas_int {} {
669 return [check_no_compiler_messages cas_int assembly {
670 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
671 /* ok */
672 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
673 /* ok */
674 #else
675 #error unsupported
676 #endif
677 } ""]
678}
679
257f5167
IS
680# Return 1 if -ffunction-sections is supported, 0 otherwise.
681
682proc check_effective_target_function_sections {} {
683 # Darwin has its own scheme and silently accepts -ffunction-sections.
19073ebc 684 if { [istarget *-*-darwin*] } {
257f5167
IS
685 return 0
686 }
687
688 return [check_no_compiler_messages functionsections assembly {
689 void foo (void) { }
690 } "-ffunction-sections"]
691}
692
5097ad6c
GJL
693# Return 1 if instruction scheduling is available, 0 otherwise.
694
695proc check_effective_target_scheduling {} {
696 return [check_no_compiler_messages scheduling object {
697 void foo (void) { }
698 } "-fschedule-insns"]
699}
700
f8bf9252
SP
701# Return 1 if compilation with -fgraphite is error-free for trivial
702# code, 0 otherwise.
703
704proc check_effective_target_fgraphite {} {
705 return [check_no_compiler_messages fgraphite object {
706 void foo (void) { }
0da366c7 707 } "-O1 -fgraphite"]
f8bf9252
SP
708}
709
a782ee45
HPN
710# Return 1 if compilation with -fopenmp is error-free for trivial
711# code, 0 otherwise.
712
713proc check_effective_target_fopenmp {} {
8ce1ac69
RS
714 return [check_no_compiler_messages fopenmp object {
715 void foo (void) { }
716 } "-fopenmp"]
a782ee45
HPN
717}
718
8175c19c
RO
719# Return 1 if the target supports mmap, 0 otherwise.
720
721proc check_effective_target_mmap {} {
a5f9523c 722 return [check_function_available "mmap"]
8175c19c
RO
723}
724
86595dba
SP
725# Return 1 if compilation with -pthread is error-free for trivial
726# code, 0 otherwise.
727
728proc check_effective_target_pthread {} {
729 return [check_no_compiler_messages pthread object {
730 void foo (void) { }
731 } "-pthread"]
732}
733
233215fe
DK
734# Return 1 if compilation with -mpe-aligned-commons is error-free
735# for trivial code, 0 otherwise.
736
737proc check_effective_target_pe_aligned_commons {} {
738 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
739 return [check_no_compiler_messages pe_aligned_commons object {
740 int foo;
741 } "-mpe-aligned-commons"]
742 }
743 return 0
744}
745
011a3198
UB
746# Return 1 if the target supports -static
747proc check_effective_target_static {} {
748 return [check_no_compiler_messages static executable {
749 int main (void) { return 0; }
750 } "-static"]
751}
752
34520c98 753# Return 1 if the target supports -fstack-protector
34520c98 754proc check_effective_target_fstack_protector {} {
0ffd38c8
RS
755 return [check_runtime fstack_protector {
756 int main (void) { return 0; }
757 } "-fstack-protector"]
34520c98
EC
758}
759
3b1a6677
SE
760# Return 1 if compilation with -freorder-blocks-and-partition is error-free
761# for trivial code, 0 otherwise.
762
763proc check_effective_target_freorder {} {
8ce1ac69
RS
764 return [check_no_compiler_messages freorder object {
765 void foo (void) { }
766 } "-freorder-blocks-and-partition"]
3b1a6677
SE
767}
768
b6e3f572
HPN
769# Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
770# emitted, 0 otherwise. Whether a shared library can actually be built is
771# out of scope for this test.
b6e3f572
HPN
772
773proc check_effective_target_fpic { } {
8ce1ac69
RS
774 # Note that M68K has a multilib that supports -fpic but not
775 # -fPIC, so we need to check both. We test with a program that
776 # requires GOT references.
777 foreach arg {fpic fPIC} {
778 if [check_no_compiler_messages $arg object {
b6e3f572
HPN
779 extern int foo (void); extern int bar;
780 int baz (void) { return foo () + bar; }
8ce1ac69
RS
781 } "-$arg"] {
782 return 1
b6e3f572
HPN
783 }
784 }
8ce1ac69 785 return 0
b6e3f572 786}
8340fbd7
RO
787
788# Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
789
790proc check_effective_target_pie { } {
791 if { [istarget *-*-darwin\[912\]*]
792 || [istarget *-*-linux*] } {
793 return 1;
794 }
795 return 0
796}
b6e3f572 797
245f0e1c
RS
798# Return true if the target supports -mpaired-single (as used on MIPS).
799
800proc check_effective_target_mpaired_single { } {
e9b1e828 801 return [check_no_compiler_messages mpaired_single object {
245f0e1c
RS
802 void foo (void) { }
803 } "-mpaired-single"]
804}
805
1a79f743 806# Return true if the target has access to FPU instructions.
d8538159 807
1a79f743 808proc check_effective_target_hard_float { } {
4e6a492c 809 if { [istarget mips*-*-*] } {
ca8b555b 810 return [check_no_compiler_messages hard_float assembly {
4e6a492c 811 #if (defined __mips_soft_float || defined __mips16)
ca8b555b
HPN
812 #error FOO
813 #endif
814 }]
815 }
816
65a324b4
NC
817 # This proc is actually checking the availabilty of FPU
818 # support for doubles, so on the RX we must fail if the
819 # 64-bit double multilib has been selected.
820 if { [istarget rx-*-*] } {
821 return 0
822 # return [check_no_compiler_messages hard_float assembly {
823 #if defined __RX_64_BIT_DOUBLES__
824 #error FOO
825 #endif
826 # }]
827 }
828
ca8b555b
HPN
829 # The generic test equates hard_float with "no call for adding doubles".
830 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
831 double a (double b, double c) { return b + c; }
d8538159
RS
832 }]
833}
834
334a9543
RS
835# Return true if the target is a 64-bit MIPS target.
836
837proc check_effective_target_mips64 { } {
838 return [check_no_compiler_messages mips64 assembly {
839 #ifndef __mips64
840 #error FOO
841 #endif
842 }]
843}
844
254d1646
RS
845# Return true if the target is a MIPS target that does not produce
846# MIPS16 code.
847
848proc check_effective_target_nomips16 { } {
849 return [check_no_compiler_messages nomips16 object {
850 #ifndef __mips
851 #error FOO
852 #else
853 /* A cheap way of testing for -mflip-mips16. */
854 void foo (void) { asm ("addiu $20,$20,1"); }
855 void bar (void) { asm ("addiu $20,$20,1"); }
856 #endif
857 }]
858}
859
7dded683
RS
860# Add the options needed for MIPS16 function attributes. At the moment,
861# we don't support MIPS16 PIC.
862
863proc add_options_for_mips16_attribute { flags } {
b3aaa29a 864 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
7dded683
RS
865}
866
867# Return true if we can force a mode that allows MIPS16 code generation.
06d20fa9
RS
868# We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
869# for o32 and o64.
7dded683
RS
870
871proc check_effective_target_mips16_attribute { } {
872 return [check_no_compiler_messages mips16_attribute assembly {
06d20fa9
RS
873 #ifdef PIC
874 #error FOO
875 #endif
876 #if defined __mips_hard_float \
877 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
878 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
7dded683
RS
879 #error FOO
880 #endif
881 } [add_options_for_mips16_attribute ""]]
882}
883
b824522a
NF
884# Return 1 if the target supports long double larger than double when
885# using the new ABI, 0 otherwise.
886
887proc check_effective_target_mips_newabi_large_long_double { } {
888 return [check_no_compiler_messages mips_newabi_large_long_double object {
889 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
890 } "-mabi=64"]
891}
892
39a39c85
RS
893# Return 1 if the current multilib does not generate PIC by default.
894
895proc check_effective_target_nonpic { } {
896 return [check_no_compiler_messages nonpic assembly {
897 #if __PIC__
898 #error FOO
899 #endif
900 }]
901}
902
4be4340a
MM
903# Return 1 if the target does not use a status wrapper.
904
905proc check_effective_target_unwrapped { } {
906 if { [target_info needs_status_wrapper] != "" \
907 && [target_info needs_status_wrapper] != "0" } {
908 return 0
909 }
910 return 1
911}
912
74231b0f 913# Return true if iconv is supported on the target. In particular IBM1047.
21526606
EC
914
915proc check_iconv_available { test_what } {
5340bbea 916 global libiconv
21526606 917
0b3deaaf
MM
918 # If the tool configuration file has not set libiconv, try "-liconv"
919 if { ![info exists libiconv] } {
920 set libiconv "-liconv"
921 }
0ffd38c8
RS
922 set test_what [lindex $test_what 1]
923 return [check_runtime_nocache $test_what [subst {
924 #include <iconv.h>
925 int main (void)
926 {
927 iconv_t cd;
928
929 cd = iconv_open ("$test_what", "UTF-8");
930 if (cd == (iconv_t) -1)
931 return 1;
932 return 0;
5340bbea 933 }
0ffd38c8 934 }] $libiconv]
21526606 935}
ab37d57e 936
6dd2a13c
RO
937# Return 1 if an ASCII locale is supported on this host, 0 otherwise.
938
939proc check_ascii_locale_available { } {
940 if { ([ishost alpha*-dec-osf*] || [ishost mips-sgi-irix*]) } {
941 # Neither Tru64 UNIX nor IRIX support an ASCII locale.
942 return 0
943 } else {
944 return 1
945 }
946}
947
ab37d57e 948# Return true if named sections are supported on this target.
8ce1ac69 949
ab37d57e 950proc check_named_sections_available { } {
8ce1ac69 951 return [check_no_compiler_messages named_sections assembly {
b6dc500c 952 int __attribute__ ((section("whatever"))) foo;
8ce1ac69 953 }]
ab37d57e 954}
763ee179 955
32aa3bff 956# Return 1 if the target supports Fortran real kinds larger than real(8),
f6cf6841
JJ
957# 0 otherwise.
958#
959# When the target name changes, replace the cached result.
32aa3bff
FXC
960
961proc check_effective_target_fortran_large_real { } {
0ffd38c8
RS
962 return [check_no_compiler_messages fortran_large_real executable {
963 ! Fortran
964 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
965 real(kind=k) :: x
966 x = cos (x)
967 end
968 }]
32aa3bff
FXC
969}
970
f9576cc5
JD
971# Return 1 if the target supports Fortran real kind real(16),
972# 0 otherwise. Contrary to check_effective_target_fortran_large_real
973# this checks for Real(16) only; the other returned real(10) if
974# both real(10) and real(16) are available.
975#
976# When the target name changes, replace the cached result.
977
978proc check_effective_target_fortran_real_16 { } {
979 return [check_no_compiler_messages fortran_real_16 executable {
980 ! Fortran
981 real(kind=16) :: x
982 x = cos (x)
983 end
984 }]
985}
986
32aa3bff 987# Return 1 if the target supports Fortran integer kinds larger than
f6cf6841
JJ
988# integer(8), 0 otherwise.
989#
990# When the target name changes, replace the cached result.
32aa3bff
FXC
991
992proc check_effective_target_fortran_large_int { } {
0ffd38c8
RS
993 return [check_no_compiler_messages fortran_large_int executable {
994 ! Fortran
995 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
996 integer(kind=k) :: i
997 end
998 }]
32aa3bff
FXC
999}
1000
c129abb4
SL
1001# Return 1 if the target supports Fortran integer(16), 0 otherwise.
1002#
1003# When the target name changes, replace the cached result.
1004
1005proc check_effective_target_fortran_integer_16 { } {
1006 return [check_no_compiler_messages fortran_integer_16 executable {
1007 ! Fortran
1008 integer(16) :: i
1009 end
1010 }]
1011}
1012
f2ae4b2b
FXC
1013# Return 1 if we can statically link libgfortran, 0 otherwise.
1014#
1015# When the target name changes, replace the cached result.
1016
1017proc check_effective_target_static_libgfortran { } {
0ffd38c8
RS
1018 return [check_no_compiler_messages static_libgfortran executable {
1019 ! Fortran
1020 print *, 'test'
1021 end
1022 } "-static"]
f2ae4b2b
FXC
1023}
1024
3cf8ccdf
RG
1025proc check_linker_plugin_available { } {
1026 return [check_no_compiler_messages_nocache linker_plugin executable {
1027 int main() { return 0; }
1028 } "-flto -fuse-linker-plugin"]
1029}
1030
e2e95f45
RE
1031# Return 1 if the target supports executing 750CL paired-single instructions, 0
1032# otherwise. Cache the result.
1033
1034proc check_750cl_hw_available { } {
0ffd38c8
RS
1035 return [check_cached_effective_target 750cl_hw_available {
1036 # If this is not the right target then we can skip the test.
1037 if { ![istarget powerpc-*paired*] } {
1038 expr 0
1039 } else {
1040 check_runtime_nocache 750cl_hw_available {
1041 int main()
1042 {
1043 #ifdef __MACH__
1044 asm volatile ("ps_mul v0,v0,v0");
1045 #else
1046 asm volatile ("ps_mul 0,0,0");
1047 #endif
1048 return 0;
1049 }
1050 } "-mpaired"
1051 }
1052 }]
e2e95f45
RE
1053}
1054
39354b3b
RO
1055# Return 1 if the target OS supports running SSE executables, 0
1056# otherwise. Cache the result.
1057
1058proc check_sse_os_support_available { } {
1059 return [check_cached_effective_target sse_os_support_available {
1060 # If this is not the right target then we can skip the test.
1061 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1062 expr 0
1063 } elseif { [istarget i?86-*-solaris2*] } {
1064 # The Solaris 2 kernel doesn't save and restore SSE registers
1065 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1066 check_runtime_nocache sse_os_support_available {
1067 int main ()
1068 {
d4add952
UB
1069 asm volatile ("movaps %xmm0,%xmm0");
1070 return 0;
39354b3b
RO
1071 }
1072 } "-msse"
1073 } else {
1074 expr 1
1075 }
1076 }]
1077}
1078
d4add952
UB
1079# Return 1 if the target OS supports running AVX executables, 0
1080# otherwise. Cache the result.
1081
1082proc check_avx_os_support_available { } {
1083 return [check_cached_effective_target avx_os_support_available {
1084 # If this is not the right target then we can skip the test.
1085 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1086 expr 0
1087 } else {
1088 # Check that OS has AVX and SSE saving enabled.
1089 check_runtime_nocache avx_os_support_available {
1090 int main ()
1091 {
1092 unsigned int eax, edx;
1093
1094 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1095 return (eax & 6) != 6;
1096 }
1097 } ""
1098 }
1099 }]
1100}
1101
39354b3b
RO
1102# Return 1 if the target supports executing SSE instructions, 0
1103# otherwise. Cache the result.
1104
1105proc check_sse_hw_available { } {
1106 return [check_cached_effective_target sse_hw_available {
1107 # If this is not the right target then we can skip the test.
1108 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1109 expr 0
1110 } else {
1111 check_runtime_nocache sse_hw_available {
1112 #include "cpuid.h"
1113 int main ()
1114 {
1d8ec041 1115 unsigned int eax, ebx, ecx, edx;
39354b3b
RO
1116 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1117 return !(edx & bit_SSE);
1118 return 1;
1119 }
1120 } ""
1121 }
1122 }]
1123}
1124
8a313b81
VK
1125# Return 1 if the target supports executing SSE2 instructions, 0
1126# otherwise. Cache the result.
1127
1128proc check_sse2_hw_available { } {
1129 return [check_cached_effective_target sse2_hw_available {
1130 # If this is not the right target then we can skip the test.
1131 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1132 expr 0
1133 } else {
1134 check_runtime_nocache sse2_hw_available {
1135 #include "cpuid.h"
1136 int main ()
1137 {
1d8ec041 1138 unsigned int eax, ebx, ecx, edx;
8a313b81
VK
1139 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1140 return !(edx & bit_SSE2);
1141 return 1;
1142 }
1143 } ""
1144 }
1145 }]
1146}
1147
1d8ec041
UB
1148# Return 1 if the target supports executing AVX instructions, 0
1149# otherwise. Cache the result.
1150
1151proc check_avx_hw_available { } {
1152 return [check_cached_effective_target avx_hw_available {
1153 # If this is not the right target then we can skip the test.
1154 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1155 expr 0
1156 } else {
1157 check_runtime_nocache avx_hw_available {
1158 #include "cpuid.h"
1159 int main ()
1160 {
1161 unsigned int eax, ebx, ecx, edx;
1162 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1163 return ((ecx & (bit_AVX | bit_OSXSAVE))
1164 != (bit_AVX | bit_OSXSAVE));
1165 return 1;
1166 }
1167 } ""
1168 }
1169 }]
1170}
1171
39354b3b
RO
1172# Return 1 if the target supports running SSE executables, 0 otherwise.
1173
1174proc check_effective_target_sse_runtime { } {
1d8ec041
UB
1175 if { [check_effective_target_sse]
1176 && [check_sse_hw_available]
1177 && [check_sse_os_support_available] } {
39354b3b 1178 return 1
39354b3b 1179 }
1d8ec041 1180 return 0
39354b3b
RO
1181}
1182
1183# Return 1 if the target supports running SSE2 executables, 0 otherwise.
1184
1185proc check_effective_target_sse2_runtime { } {
1d8ec041
UB
1186 if { [check_effective_target_sse2]
1187 && [check_sse2_hw_available]
1188 && [check_sse_os_support_available] } {
39354b3b 1189 return 1
39354b3b 1190 }
1d8ec041
UB
1191 return 0
1192}
1193
1194# Return 1 if the target supports running AVX executables, 0 otherwise.
1195
1196proc check_effective_target_avx_runtime { } {
1197 if { [check_effective_target_avx]
d4add952
UB
1198 && [check_avx_hw_available]
1199 && [check_avx_os_support_available] } {
1d8ec041
UB
1200 return 1
1201 }
1202 return 0
39354b3b
RO
1203}
1204
29e6733c
MM
1205# Return 1 if the target supports executing VSX instructions, 0
1206# otherwise. Cache the result.
1207
1208proc check_vsx_hw_available { } {
1209 return [check_cached_effective_target vsx_hw_available {
1210 # Some simulators are known to not support VSX instructions.
1211 # For now, disable on Darwin
1212 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1213 expr 0
1214 } else {
1215 set options "-mvsx"
1216 check_runtime_nocache vsx_hw_available {
1217 int main()
1218 {
1219 #ifdef __MACH__
1220 asm volatile ("xxlor vs0,vs0,vs0");
1221 #else
1222 asm volatile ("xxlor 0,0,0");
1223 #endif
1224 return 0;
1225 }
1226 } $options
1227 }
1228 }]
1229}
1230
763ee179
JJ
1231# Return 1 if the target supports executing AltiVec instructions, 0
1232# otherwise. Cache the result.
1233
1234proc check_vmx_hw_available { } {
0ffd38c8 1235 return [check_cached_effective_target vmx_hw_available {
763ee179
JJ
1236 # Some simulators are known to not support VMX instructions.
1237 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
0ffd38c8 1238 expr 0
3562bc34 1239 } else {
0ffd38c8 1240 # Most targets don't require special flags for this test case, but
29e6733c
MM
1241 # Darwin does. Just to be sure, make sure VSX is not enabled for
1242 # the altivec tests.
0ffd38c8
RS
1243 if { [istarget *-*-darwin*]
1244 || [istarget *-*-aix*] } {
29e6733c 1245 set options "-maltivec -mno-vsx"
0ffd38c8 1246 } else {
29e6733c 1247 set options "-mno-vsx"
763ee179 1248 }
0ffd38c8
RS
1249 check_runtime_nocache vmx_hw_available {
1250 int main()
1251 {
1252 #ifdef __MACH__
1253 asm volatile ("vor v0,v0,v0");
1254 #else
1255 asm volatile ("vor 0,0,0");
1256 #endif
1257 return 0;
1258 }
1259 } $options
763ee179 1260 }
0ffd38c8 1261 }]
763ee179 1262}
b6dc500c 1263
92902797
MM
1264proc check_ppc_recip_hw_available { } {
1265 return [check_cached_effective_target ppc_recip_hw_available {
1266 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1267 # For now, disable on Darwin
1268 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1269 expr 0
1270 } else {
1271 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1272 check_runtime_nocache ppc_recip_hw_available {
1273 volatile double d_recip, d_rsqrt, d_four = 4.0;
1274 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1275 int main()
1276 {
1277 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1278 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1279 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1280 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1281 return 0;
1282 }
1283 } $options
1284 }
1285 }]
1286}
1287
5bdf05c8
DJ
1288# Return 1 if the target supports executing AltiVec and Cell PPU
1289# instructions, 0 otherwise. Cache the result.
1290
1291proc check_effective_target_cell_hw { } {
1292 return [check_cached_effective_target cell_hw_available {
1293 # Some simulators are known to not support VMX and PPU instructions.
1294 if { [istarget powerpc-*-eabi*] } {
1295 expr 0
1296 } else {
1297 # Most targets don't require special flags for this test
1298 # case, but Darwin and AIX do.
1299 if { [istarget *-*-darwin*]
1300 || [istarget *-*-aix*] } {
1301 set options "-maltivec -mcpu=cell"
1302 } else {
1303 set options "-mcpu=cell"
1304 }
1305 check_runtime_nocache cell_hw_available {
1306 int main()
1307 {
1308 #ifdef __MACH__
1309 asm volatile ("vor v0,v0,v0");
1310 asm volatile ("lvlx v0,r0,r0");
1311 #else
1312 asm volatile ("vor 0,0,0");
1313 asm volatile ("lvlx 0,0,0");
1314 #endif
1315 return 0;
1316 }
1317 } $options
1318 }
1319 }]
1320}
1321
1b82a065
NF
1322# Return 1 if the target supports executing 64-bit instructions, 0
1323# otherwise. Cache the result.
1324
1325proc check_effective_target_powerpc64 { } {
1326 global powerpc64_available_saved
1327 global tool
1328
1329 if [info exists powerpc64_available_saved] {
1330 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1331 } else {
1332 set powerpc64_available_saved 0
1333
1334 # Some simulators are known to not support powerpc64 instructions.
1335 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1336 verbose "check_effective_target_powerpc64 returning 0" 2
1337 return $powerpc64_available_saved
1338 }
1339
1340 # Set up, compile, and execute a test program containing a 64-bit
1341 # instruction. Include the current process ID in the file
1342 # names to prevent conflicts with invocations for multiple
1343 # testsuites.
1344 set src ppc[pid].c
1345 set exe ppc[pid].x
1346
1347 set f [open $src "w"]
1348 puts $f "int main() {"
1349 puts $f "#ifdef __MACH__"
1350 puts $f " asm volatile (\"extsw r0,r0\");"
1351 puts $f "#else"
1352 puts $f " asm volatile (\"extsw 0,0\");"
1353 puts $f "#endif"
1354 puts $f " return 0; }"
1355 close $f
1356
1357 set opts "additional_flags=-mcpu=G5"
1358
1359 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1360 set lines [${tool}_target_compile $src $exe executable "$opts"]
1361 file delete $src
1362
1363 if [string match "" $lines] then {
1364 # No error message, compilation succeeded.
1365 set result [${tool}_load "./$exe" "" ""]
1366 set status [lindex $result 0]
1367 remote_file build delete $exe
1368 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1369
1370 if { $status == "pass" } then {
1371 set powerpc64_available_saved 1
1372 }
1373 } else {
1374 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1375 }
1376 }
1377
1378 return $powerpc64_available_saved
1379}
1380
56afd7aa
JJ
1381# GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1382# complex float arguments. This affects gfortran tests that call cabsf
1383# in libm built by an earlier compiler. Return 1 if libm uses the same
1384# argument passing as the compiler under test, 0 otherwise.
1385#
1386# When the target name changes, replace the cached result.
1387
1388proc check_effective_target_broken_cplxf_arg { } {
0ffd38c8
RS
1389 return [check_cached_effective_target broken_cplxf_arg {
1390 # Skip the work for targets known not to be affected.
1391 if { ![istarget powerpc64-*-linux*] } {
1392 expr 0
1393 } elseif { ![is-effective-target lp64] } {
1394 expr 0
56afd7aa 1395 } else {
0ffd38c8
RS
1396 check_runtime_nocache broken_cplxf_arg {
1397 #include <complex.h>
1398 extern void abort (void);
1399 float fabsf (float);
1400 float cabsf (_Complex float);
1401 int main ()
1402 {
1403 _Complex float cf;
1404 float f;
1405 cf = 3 + 4.0fi;
1406 f = cabsf (cf);
1407 if (fabsf (f - 5.0) > 0.0001)
1408 abort ();
1409 return 0;
1410 }
1411 } "-lm"
56afd7aa 1412 }
0ffd38c8 1413 }]
56afd7aa
JJ
1414}
1415
294689c4
BS
1416# Return 1 is this is a TI C6X target supporting C67X instructions
1417proc check_effective_target_ti_c67x { } {
1418 return [check_no_compiler_messages ti_c67x assembly {
1419 #if !defined(_TMS320C6700)
1420 #error FOO
1421 #endif
1422 }]
1423}
1424
1425# Return 1 is this is a TI C6X target supporting C64X+ instructions
1426proc check_effective_target_ti_c64xp { } {
1427 return [check_no_compiler_messages ti_c64xp assembly {
1428 #if !defined(_TMS320C6400_PLUS)
1429 #error FOO
1430 #endif
1431 }]
1432}
1433
1434
31589ec6 1435proc check_alpha_max_hw_available { } {
0ffd38c8
RS
1436 return [check_runtime alpha_max_hw_available {
1437 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1438 }]
31589ec6
RH
1439}
1440
34f4edf8
MM
1441# Returns true iff the FUNCTION is available on the target system.
1442# (This is essentially a Tcl implementation of Autoconf's
1443# AC_CHECK_FUNC.)
1444
1445proc check_function_available { function } {
0ffd38c8
RS
1446 return [check_no_compiler_messages ${function}_available \
1447 executable [subst {
1448 #ifdef __cplusplus
1449 extern "C"
1450 #endif
1451 char $function ();
1452 int main () { $function (); }
8d598c74 1453 }] "-fno-builtin" ]
34f4edf8
MM
1454}
1455
cea02b6e 1456# Returns true iff "fork" is available on the target system.
34f4edf8
MM
1457
1458proc check_fork_available {} {
1459 return [check_function_available "fork"]
1460}
1461
cea02b6e 1462# Returns true iff "mkfifo" is available on the target system.
34f4edf8
MM
1463
1464proc check_mkfifo_available {} {
19073ebc 1465 if { [istarget *-*-cygwin*] } {
cea02b6e
DB
1466 # Cygwin has mkfifo, but support is incomplete.
1467 return 0
1468 }
1469
34f4edf8
MM
1470 return [check_function_available "mkfifo"]
1471}
1472
21f638b9
SE
1473# Returns true iff "__cxa_atexit" is used on the target system.
1474
1475proc check_cxa_atexit_available { } {
0ffd38c8 1476 return [check_cached_effective_target cxa_atexit_available {
19073ebc 1477 if { [istarget hppa*-*-hpux10*] } {
0ffd38c8
RS
1478 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1479 expr 0
19073ebc 1480 } elseif { [istarget *-*-vxworks] } {
8df03fe5
NS
1481 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1482 expr 0
21f638b9 1483 } else {
0ffd38c8
RS
1484 check_runtime_nocache cxa_atexit_available {
1485 // C++
1486 #include <stdlib.h>
1487 static unsigned int count;
1488 struct X
1489 {
1490 X() { count = 1; }
1491 ~X()
1492 {
1493 if (count != 3)
1494 exit(1);
1495 count = 4;
1496 }
1497 };
1498 void f()
1499 {
1500 static X x;
1501 }
1502 struct Y
1503 {
1504 Y() { f(); count = 2; }
1505 ~Y()
1506 {
1507 if (count != 2)
1508 exit(1);
1509 count = 3;
1510 }
1511 };
1512 Y y;
1513 int main() { return 0; }
1514 }
21f638b9 1515 }
0ffd38c8 1516 }]
21f638b9
SE
1517}
1518
9debda96
IS
1519proc check_effective_target_objc2 { } {
1520 return [check_no_compiler_messages objc2 object {
1521 #ifdef __OBJC2__
1522 int dummy[1];
1523 #else
1524 #error
1525 #endif
1526 }]
1527}
1528
1529proc check_effective_target_next_runtime { } {
1530 return [check_no_compiler_messages objc2 object {
1531 #ifdef __NEXT_RUNTIME__
1532 int dummy[1];
1533 #else
1534 #error
1535 #endif
1536 }]
1537}
21f638b9 1538
b6dc500c
JJ
1539# Return 1 if we're generating 32-bit code using default options, 0
1540# otherwise.
1541
1542proc check_effective_target_ilp32 { } {
8ce1ac69
RS
1543 return [check_no_compiler_messages ilp32 object {
1544 int dummy[sizeof (int) == 4
1545 && sizeof (void *) == 4
1546 && sizeof (long) == 4 ? 1 : -1];
1547 }]
b6dc500c
JJ
1548}
1549
489319d5
L
1550# Return 1 if we're generating ia32 code using default options, 0
1551# otherwise.
1552
1553proc check_effective_target_ia32 { } {
1554 return [check_no_compiler_messages ia32 object {
1555 int dummy[sizeof (int) == 4
1556 && sizeof (void *) == 4
1557 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1558 }]
1559}
1560
1561# Return 1 if we're generating x32 code using default options, 0
1562# otherwise.
1563
1564proc check_effective_target_x32 { } {
1565 return [check_no_compiler_messages x32 object {
1566 int dummy[sizeof (int) == 4
1567 && sizeof (void *) == 4
1568 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1569 }]
1570}
1571
a239aa95
DD
1572# Return 1 if we're generating 32-bit or larger integers using default
1573# options, 0 otherwise.
1574
1575proc check_effective_target_int32plus { } {
1576 return [check_no_compiler_messages int32plus object {
1577 int dummy[sizeof (int) >= 4 ? 1 : -1];
1578 }]
1579}
1580
1581# Return 1 if we're generating 32-bit or larger pointers using default
1582# options, 0 otherwise.
1583
1584proc check_effective_target_ptr32plus { } {
1585 return [check_no_compiler_messages ptr32plus object {
1586 int dummy[sizeof (void *) >= 4 ? 1 : -1];
1587 }]
1588}
1589
1590# Return 1 if we support 32-bit or larger array and structure sizes
1591# using default options, 0 otherwise.
1592
1593proc check_effective_target_size32plus { } {
1594 return [check_no_compiler_messages size32plus object {
1595 char dummy[65537];
1596 }]
1597}
1598
1599# Returns 1 if we're generating 16-bit or smaller integers with the
1600# default options, 0 otherwise.
1601
1602proc check_effective_target_int16 { } {
1603 return [check_no_compiler_messages int16 object {
1604 int dummy[sizeof (int) < 4 ? 1 : -1];
1605 }]
1606}
1607
b6dc500c
JJ
1608# Return 1 if we're generating 64-bit code using default options, 0
1609# otherwise.
1610
1611proc check_effective_target_lp64 { } {
8ce1ac69
RS
1612 return [check_no_compiler_messages lp64 object {
1613 int dummy[sizeof (int) == 4
1614 && sizeof (void *) == 8
1615 && sizeof (long) == 8 ? 1 : -1];
1616 }]
b6dc500c
JJ
1617}
1618
7ec59445
KT
1619# Return 1 if we're generating 64-bit code using default llp64 options,
1620# 0 otherwise.
1621
1622proc check_effective_target_llp64 { } {
1623 return [check_no_compiler_messages llp64 object {
1624 int dummy[sizeof (int) == 4
1625 && sizeof (void *) == 8
1626 && sizeof (long long) == 8
1627 && sizeof (long) == 4 ? 1 : -1];
1628 }]
1629}
1630
4efc447f
MLI
1631# Return 1 if the target supports long double larger than double,
1632# 0 otherwise.
1633
1634proc check_effective_target_large_long_double { } {
1635 return [check_no_compiler_messages large_long_double object {
1636 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1637 }]
1638}
1639
fb4fc714
DD
1640# Return 1 if the target supports double larger than float,
1641# 0 otherwise.
1642
1643proc check_effective_target_large_double { } {
1644 return [check_no_compiler_messages large_double object {
1645 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1646 }]
1647}
1648
1649# Return 1 if the target supports double of 64 bits,
1650# 0 otherwise.
1651
1652proc check_effective_target_double64 { } {
1653 return [check_no_compiler_messages double64 object {
1654 int dummy[sizeof(double) == 8 ? 1 : -1];
1655 }]
1656}
1657
1658# Return 1 if the target supports double of at least 64 bits,
1659# 0 otherwise.
1660
1661proc check_effective_target_double64plus { } {
1662 return [check_no_compiler_messages double64plus object {
1663 int dummy[sizeof(double) >= 8 ? 1 : -1];
1664 }]
1665}
1666
fca8ed94
CF
1667# Return 1 if the target supports compiling fixed-point,
1668# 0 otherwise.
1669
1670proc check_effective_target_fixed_point { } {
1671 return [check_no_compiler_messages fixed_point object {
1672 _Sat _Fract x; _Sat _Accum y;
1673 }]
1674}
4efc447f 1675
265e7d50
JJ
1676# Return 1 if the target supports compiling decimal floating point,
1677# 0 otherwise.
1678
1679proc check_effective_target_dfp_nocache { } {
1680 verbose "check_effective_target_dfp_nocache: compiling source" 2
0ffd38c8 1681 set ret [check_no_compiler_messages_nocache dfp object {
a9ab39d3 1682 float x __attribute__((mode(DD)));
0ffd38c8 1683 }]
265e7d50
JJ
1684 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1685 return $ret
1686}
1687
1688proc check_effective_target_dfprt_nocache { } {
0ffd38c8 1689 return [check_runtime_nocache dfprt {
a9ab39d3 1690 typedef float d64 __attribute__((mode(DD)));
efc7a2a5 1691 d64 x = 1.2df, y = 2.3dd, z;
0ffd38c8
RS
1692 int main () { z = x + y; return 0; }
1693 }]
265e7d50
JJ
1694}
1695
1696# Return 1 if the target supports compiling Decimal Floating Point,
1697# 0 otherwise.
27a2694f
JJ
1698#
1699# This won't change for different subtargets so cache the result.
1700
1701proc check_effective_target_dfp { } {
0ffd38c8
RS
1702 return [check_cached_effective_target dfp {
1703 check_effective_target_dfp_nocache
1704 }]
27a2694f
JJ
1705}
1706
265e7d50 1707# Return 1 if the target supports linking and executing Decimal Floating
72a30e3c 1708# Point, 0 otherwise.
265e7d50
JJ
1709#
1710# This won't change for different subtargets so cache the result.
1711
1712proc check_effective_target_dfprt { } {
0ffd38c8
RS
1713 return [check_cached_effective_target dfprt {
1714 check_effective_target_dfprt_nocache
1715 }]
265e7d50
JJ
1716}
1717
72a30e3c
RO
1718# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1719
1720proc check_effective_target_ucn_nocache { } {
1721 # -std=c99 is only valid for C
1722 if [check_effective_target_c] {
1723 set ucnopts "-std=c99"
1724 }
1725 append ucnopts " -fextended-identifiers"
1726 verbose "check_effective_target_ucn_nocache: compiling source" 2
1727 set ret [check_no_compiler_messages_nocache ucn object {
1728 int \u00C0;
1729 } $ucnopts]
1730 verbose "check_effective_target_ucn_nocache: returning $ret" 2
1731 return $ret
1732}
1733
1734# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1735#
1736# This won't change for different subtargets, so cache the result.
1737
1738proc check_effective_target_ucn { } {
1739 return [check_cached_effective_target ucn {
1740 check_effective_target_ucn_nocache
1741 }]
1742}
1743
b956116e
PB
1744# Return 1 if the target needs a command line argument to enable a SIMD
1745# instruction set.
b956116e
PB
1746
1747proc check_effective_target_vect_cmdline_needed { } {
1748 global et_vect_cmdline_needed_saved
e87a56b4
JM
1749 global et_vect_cmdline_needed_target_name
1750
1751 if { ![info exists et_vect_cmdline_needed_target_name] } {
1752 set et_vect_cmdline_needed_target_name ""
1753 }
1754
1755 # If the target has changed since we set the cached value, clear it.
1756 set current_target [current_target_name]
1757 if { $current_target != $et_vect_cmdline_needed_target_name } {
1758 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
1759 set et_vect_cmdline_needed_target_name $current_target
1760 if { [info exists et_vect_cmdline_needed_saved] } {
1761 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
1762 unset et_vect_cmdline_needed_saved
1763 }
1764 }
b956116e
PB
1765
1766 if [info exists et_vect_cmdline_needed_saved] {
1767 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
1768 } else {
1769 set et_vect_cmdline_needed_saved 1
f32c6a2b
UB
1770 if { [istarget alpha*-*-*]
1771 || [istarget ia64-*-*]
e87a56b4 1772 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
489319d5
L
1773 && ([check_effective_target_x32]
1774 || [check_effective_target_lp64]))
624168de 1775 || ([istarget powerpc*-*-*]
5eb96b60 1776 && ([check_effective_target_powerpc_spe]
95730f5e 1777 || [check_effective_target_powerpc_altivec]))
65c5ced3 1778 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
b61b26e4
JM
1779 || [istarget spu-*-*]
1780 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
b956116e
PB
1781 set et_vect_cmdline_needed_saved 0
1782 }
1783 }
1784
1785 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
1786 return $et_vect_cmdline_needed_saved
1787}
1788
07d05ffd
JJ
1789# Return 1 if the target supports hardware vectors of int, 0 otherwise.
1790#
1791# This won't change for different subtargets so cache the result.
1792
1793proc check_effective_target_vect_int { } {
1794 global et_vect_int_saved
1795
1796 if [info exists et_vect_int_saved] {
1797 verbose "check_effective_target_vect_int: using cached result" 2
1798 } else {
1799 set et_vect_int_saved 0
1800 if { [istarget i?86-*-*]
e2e95f45
RE
1801 || ([istarget powerpc*-*-*]
1802 && ![istarget powerpc-*-linux*paired*])
0f6909b9 1803 || [istarget spu-*-*]
07d05ffd 1804 || [istarget x86_64-*-*]
31589ec6 1805 || [istarget sparc*-*-*]
f61134e8 1806 || [istarget alpha*-*-*]
b61b26e4 1807 || [istarget ia64-*-*]
0d108d15
MX
1808 || [check_effective_target_arm32]
1809 || ([istarget mips*-*-*]
1810 && [check_effective_target_mips_loongson]) } {
07d05ffd
JJ
1811 set et_vect_int_saved 1
1812 }
1813 }
1814
1815 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
1816 return $et_vect_int_saved
1817}
1818
5dc7911e 1819# Return 1 if the target supports signed int->float conversion
cb9ed5d7
DN
1820#
1821
1822proc check_effective_target_vect_intfloat_cvt { } {
1823 global et_vect_intfloat_cvt_saved
1824
1825 if [info exists et_vect_intfloat_cvt_saved] {
1826 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
1827 } else {
1828 set et_vect_intfloat_cvt_saved 0
1829 if { [istarget i?86-*-*]
e2e95f45
RE
1830 || ([istarget powerpc*-*-*]
1831 && ![istarget powerpc-*-linux*paired*])
cb9ed5d7
DN
1832 || [istarget x86_64-*-*] } {
1833 set et_vect_intfloat_cvt_saved 1
1834 }
1835 }
1836
1837 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
1838 return $et_vect_intfloat_cvt_saved
1839}
1840
a6766312
KT
1841#Return 1 if we're supporting __int128 for target, 0 otherwise.
1842
1843proc check_effective_target_int128 { } {
1844 return [check_no_compiler_messages int128 object {
1845 int dummy[
1846 #ifndef __SIZEOF_INT128__
1847 -1
1848 #else
1849 1
1850 #endif
1851 ];
1852 }]
1853}
cb9ed5d7 1854
5dc7911e
RG
1855# Return 1 if the target supports unsigned int->float conversion
1856#
1857
1858proc check_effective_target_vect_uintfloat_cvt { } {
1859 global et_vect_uintfloat_cvt_saved
1860
1861 if [info exists et_vect_uintfloat_cvt_saved] {
1862 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
1863 } else {
1864 set et_vect_uintfloat_cvt_saved 0
54e86f6b
UB
1865 if { [istarget i?86-*-*]
1866 || ([istarget powerpc*-*-*]
1867 && ![istarget powerpc-*-linux*paired*])
1868 || [istarget x86_64-*-*] } {
5dc7911e
RG
1869 set et_vect_uintfloat_cvt_saved 1
1870 }
1871 }
1872
1873 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
1874 return $et_vect_uintfloat_cvt_saved
1875}
1876
1877
1878# Return 1 if the target supports signed float->int conversion
cb9ed5d7
DN
1879#
1880
1881proc check_effective_target_vect_floatint_cvt { } {
1882 global et_vect_floatint_cvt_saved
1883
1884 if [info exists et_vect_floatint_cvt_saved] {
1885 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
1886 } else {
1887 set et_vect_floatint_cvt_saved 0
1888 if { [istarget i?86-*-*]
7910ae0c
DN
1889 || ([istarget powerpc*-*-*]
1890 && ![istarget powerpc-*-linux*paired*])
cb9ed5d7
DN
1891 || [istarget x86_64-*-*] } {
1892 set et_vect_floatint_cvt_saved 1
1893 }
1894 }
1895
1896 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
1897 return $et_vect_floatint_cvt_saved
1898}
1899
5dc7911e
RG
1900# Return 1 if the target supports unsigned float->int conversion
1901#
1902
1903proc check_effective_target_vect_floatuint_cvt { } {
1904 global et_vect_floatuint_cvt_saved
1905
1906 if [info exists et_vect_floatuint_cvt_saved] {
1907 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
1908 } else {
1909 set et_vect_floatuint_cvt_saved 0
1910 if { ([istarget powerpc*-*-*]
1911 && ![istarget powerpc-*-linux*paired*]) } {
1912 set et_vect_floatuint_cvt_saved 1
1913 }
1914 }
1915
1916 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
1917 return $et_vect_floatuint_cvt_saved
1918}
1919
0d341a6a
PB
1920# Return 1 is this is an arm target using 32-bit instructions
1921proc check_effective_target_arm32 { } {
336e494f
DJ
1922 return [check_no_compiler_messages arm32 assembly {
1923 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
1924 #error FOO
1925 #endif
1926 }]
0d341a6a
PB
1927}
1928
3b99e635
JJ
1929# Return 1 is this is an arm target not using Thumb
1930proc check_effective_target_arm_nothumb { } {
1931 return [check_no_compiler_messages arm_nothumb assembly {
1932 #if (defined(__thumb__) || defined(__thumb2__))
1933 #error FOO
1934 #endif
1935 }]
1936}
1937
0094f21b
JB
1938# Return 1 if this is a little-endian ARM target
1939proc check_effective_target_arm_little_endian { } {
1940 return [check_no_compiler_messages arm_little_endian assembly {
1941 #if !defined(__arm__) || !defined(__ARMEL__)
1942 #error FOO
1943 #endif
1944 }]
1945}
1946
c452684d
JB
1947# Return 1 if this is an ARM target that only supports aligned vector accesses
1948proc check_effective_target_arm_vect_no_misalign { } {
1949 return [check_no_compiler_messages arm_vect_no_misalign assembly {
1950 #if !defined(__arm__) \
1951 || (defined(__ARMEL__) \
1952 && (!defined(__thumb__) || defined(__thumb2__)))
1953 #error FOO
1954 #endif
1955 }]
1956}
1957
1958
c03b9206
JM
1959# Return 1 if this is an ARM target supporting -mfpu=vfp
1960# -mfloat-abi=softfp. Some multilibs may be incompatible with these
1961# options.
1962
1963proc check_effective_target_arm_vfp_ok { } {
1964 if { [check_effective_target_arm32] } {
1965 return [check_no_compiler_messages arm_vfp_ok object {
1966 int dummy;
1967 } "-mfpu=vfp -mfloat-abi=softfp"]
1968 } else {
1969 return 0
1970 }
1971}
1972
390b17c2
RE
1973# Return 1 if this is an ARM target supporting -mfpu=vfp
1974# -mfloat-abi=hard. Some multilibs may be incompatible with these
1975# options.
1976
1977proc check_effective_target_arm_hard_vfp_ok { } {
1978 if { [check_effective_target_arm32] } {
1979 return [check_no_compiler_messages arm_hard_vfp_ok executable {
1980 int main() { return 0;}
1981 } "-mfpu=vfp -mfloat-abi=hard"]
1982 } else {
1983 return 0
1984 }
1985}
1986
09411ce3
JJ
1987# Return 1 if this is an ARM target that supports DSP multiply with
1988# current multilib flags.
1989
1990proc check_effective_target_arm_dsp { } {
1991 return [check_no_compiler_messages arm_dsp assembly {
1992 #ifndef __ARM_FEATURE_DSP
1993 #error not DSP
1994 #endif
1995 int i;
1996 }]
1997}
1998
6cc4833a
JB
1999# Return 1 if this is an ARM target that supports unaligned word/halfword
2000# load/store instructions.
2001
2002proc check_effective_target_arm_unaligned { } {
2003 return [check_no_compiler_messages arm_unaligned assembly {
2004 #ifndef __ARM_FEATURE_UNALIGNED
2005 #error no unaligned support
2006 #endif
2007 int i;
2008 }]
2009}
2010
0c422e74
DJ
2011# Add the options needed for NEON. We need either -mfloat-abi=softfp
2012# or -mfloat-abi=hard, but if one is already specified by the
2013# multilib, use it. Similarly, if a -mfpu option already enables
2014# NEON, do not add -mfpu=neon.
2015
2016proc add_options_for_arm_neon { flags } {
2017 if { ! [check_effective_target_arm_neon_ok] } {
2018 return "$flags"
2019 }
2020 global et_arm_neon_flags
2021 return "$flags $et_arm_neon_flags"
2022}
2023
88f77cba 2024# Return 1 if this is an ARM target supporting -mfpu=neon
0c422e74
DJ
2025# -mfloat-abi=softfp or equivalent options. Some multilibs may be
2026# incompatible with these options. Also set et_arm_neon_flags to the
2027# best options to add.
2028
2029proc check_effective_target_arm_neon_ok_nocache { } {
2030 global et_arm_neon_flags
2031 set et_arm_neon_flags ""
2032 if { [check_effective_target_arm32] } {
2033 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2034 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2035 #include "arm_neon.h"
2036 int dummy;
2037 } "$flags"] } {
2038 set et_arm_neon_flags $flags
2039 return 1
2040 }
2041 }
2042 }
2043
2044 return 0
2045}
88f77cba
JB
2046
2047proc check_effective_target_arm_neon_ok { } {
0c422e74
DJ
2048 return [check_cached_effective_target arm_neon_ok \
2049 check_effective_target_arm_neon_ok_nocache]
2050}
2051
2052# Add the options needed for NEON. We need either -mfloat-abi=softfp
2053# or -mfloat-abi=hard, but if one is already specified by the
2054# multilib, use it.
2055
cf0a9c20
JJ
2056proc add_options_for_arm_fp16 { flags } {
2057 if { ! [check_effective_target_arm_fp16_ok] } {
0c422e74
DJ
2058 return "$flags"
2059 }
cf0a9c20
JJ
2060 global et_arm_fp16_flags
2061 return "$flags $et_arm_fp16_flags"
0c422e74
DJ
2062}
2063
cf0a9c20
JJ
2064# Return 1 if this is an ARM target that can support a VFP fp16 variant.
2065# Skip multilibs that are incompatible with these options and set
2066# et_arm_fp16_flags to the best options to add.
0c422e74 2067
cf0a9c20
JJ
2068proc check_effective_target_arm_fp16_ok_nocache { } {
2069 global et_arm_fp16_flags
2070 set et_arm_fp16_flags ""
2071 if { ! [check_effective_target_arm32] } {
2072 return 0;
2073 }
2074 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2075 # Multilib flags would override -mfpu.
2076 return 0
2077 }
2078 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2079 # Must generate floating-point instructions.
2080 return 0
2081 }
2082 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2083 # The existing -mfpu value is OK; use it, but add softfp.
2084 set et_arm_fp16_flags "-mfloat-abi=softfp"
2085 return 1;
2086 }
2087 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2088 # macro to check for this support.
2089 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2090 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2091 int dummy;
2092 } "$flags"] } {
2093 set et_arm_fp16_flags "$flags"
2094 return 1
88f77cba 2095 }
0c422e74
DJ
2096
2097 return 0
2098}
2099
cf0a9c20
JJ
2100proc check_effective_target_arm_fp16_ok { } {
2101 return [check_cached_effective_target arm_fp16_ok \
2102 check_effective_target_arm_fp16_ok_nocache]
88f77cba
JB
2103}
2104
e11a4c80
DAG
2105# Creates a series of routines that return 1 if the given architecture
2106# can be selected and a routine to give the flags to select that architecture
2107# Note: Extra flags may be added to disable options from newer compilers
2108# (Thumb in particular - but others may be added in the future)
2109# Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2110# /* { dg-add-options arm_arch_v5 } */
2111foreach { armfunc armflag armdef } { v5 "-march=armv5 -marm" __ARM_ARCH_5__
2112 v6 "-march=armv6" __ARM_ARCH_6__
2113 v6k "-march=armv6k" __ARM_ARCH_6K__
2114 v7a "-march=armv7-a" __ARM_ARCH_7A__ } {
2115 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2116 proc check_effective_target_arm_arch_FUNC_ok { } {
2117 if { [ string match "*-marm*" "FLAG" ] &&
2118 ![check_effective_target_arm_arm_ok] } {
2119 return 0
2120 }
2121 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2122 #if !defined (DEF)
2123 #error FOO
2124 #endif
2125 } "FLAG" ]
2126 }
2127
2128 proc add_options_for_arm_arch_FUNC { flags } {
2129 return "$flags FLAG"
2130 }
2131 }]
2132}
2133
2134# Return 1 if this is an ARM target where -marm causes ARM to be
2135# used (not Thumb)
2136
2137proc check_effective_target_arm_arm_ok { } {
2138 return [check_no_compiler_messages arm_arm_ok assembly {
2139 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2140 #error FOO
2141 #endif
2142 } "-marm"]
2143}
2144
2145
4a0c473d
JM
2146# Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2147# used.
2148
2149proc check_effective_target_arm_thumb1_ok { } {
2150 return [check_no_compiler_messages arm_thumb1_ok assembly {
2151 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2152 #error FOO
2153 #endif
2154 } "-mthumb"]
2155}
2156
7d31a807
MM
2157# Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2158# used.
2159
2160proc check_effective_target_arm_thumb2_ok { } {
2161 return [check_no_compiler_messages arm_thumb2_ok assembly {
2162 #if !defined(__thumb2__)
2163 #error FOO
2164 #endif
2165 } "-mthumb"]
2166}
2167
7122998a
JJ
2168# Return 1 if this is an ARM target where Thumb-1 is used without options
2169# added by the test.
2170
2171proc check_effective_target_arm_thumb1 { } {
2172 return [check_no_compiler_messages arm_thumb1 assembly {
2173 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2174 #error not thumb1
2175 #endif
2176 int i;
2177 } ""]
2178}
2179
2180# Return 1 if this is an ARM target where Thumb-2 is used without options
2181# added by the test.
3b99e635
JJ
2182
2183proc check_effective_target_arm_thumb2 { } {
2184 return [check_no_compiler_messages arm_thumb2 assembly {
2185 #if !defined(__thumb2__)
2186 #error FOO
2187 #endif
7122998a 2188 int i;
3b99e635
JJ
2189 } ""]
2190}
2191
a3f94870
JY
2192# Return 1 if this is an ARM cortex-M profile cpu
2193
2194proc check_effective_target_arm_cortex_m { } {
2195 return [check_no_compiler_messages arm_cortex_m assembly {
2196 #if !defined(__ARM_ARCH_7M__) \
2197 && !defined (__ARM_ARCH_7EM__) \
2198 && !defined (__ARM_ARCH_6M__)
2199 #error FOO
2200 #endif
2201 int i;
2202 } "-mthumb"]
2203}
2204
88f77cba
JB
2205# Return 1 if the target supports executing NEON instructions, 0
2206# otherwise. Cache the result.
2207
2208proc check_effective_target_arm_neon_hw { } {
0ffd38c8
RS
2209 return [check_runtime arm_neon_hw_available {
2210 int
2211 main (void)
2212 {
2213 long long a = 0, b = 1;
2214 asm ("vorr %P0, %P1, %P2"
2215 : "=w" (a)
2216 : "0" (a), "w" (b));
2217 return (a != 1);
2218 }
0c422e74 2219 } [add_options_for_arm_neon ""]]
88f77cba
JB
2220}
2221
b61b26e4
JM
2222# Return 1 if this is a ARM target with NEON enabled.
2223
2224proc check_effective_target_arm_neon { } {
2225 if { [check_effective_target_arm32] } {
2226 return [check_no_compiler_messages arm_neon object {
2227 #ifndef __ARM_NEON__
2228 #error not NEON
2229 #else
2230 int dummy;
2231 #endif
2232 }]
2233 } else {
2234 return 0
2235 }
2236}
2237
93581857
MS
2238# Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2239# the Loongson vector modes.
2240
2241proc check_effective_target_mips_loongson { } {
2242 return [check_no_compiler_messages loongson assembly {
2243 #if !defined(__mips_loongson_vector_rev)
2244 #error FOO
2245 #endif
2246 }]
2247}
2248
07d8efe3
MM
2249# Return 1 if this is an ARM target that adheres to the ABI for the ARM
2250# Architecture.
2251
2252proc check_effective_target_arm_eabi { } {
2253 return [check_no_compiler_messages arm_eabi object {
2254 #ifndef __ARM_EABI__
2255 #error not EABI
2256 #else
2257 int dummy;
2258 #endif
2259 }]
2260}
2261
5399093b
MR
2262# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2263# Some multilibs may be incompatible with this option.
2264
2265proc check_effective_target_arm_iwmmxt_ok { } {
2266 if { [check_effective_target_arm32] } {
2267 return [check_no_compiler_messages arm_iwmmxt_ok object {
2268 int dummy;
2269 } "-mcpu=iwmmxt"]
2270 } else {
2271 return 0
2272 }
2273}
2274
1dbf8c24
JM
2275# Return 1 if this is a PowerPC target with floating-point registers.
2276
2277proc check_effective_target_powerpc_fprs { } {
2278 if { [istarget powerpc*-*-*]
2279 || [istarget rs6000-*-*] } {
2280 return [check_no_compiler_messages powerpc_fprs object {
2281 #ifdef __NO_FPRS__
2282 #error no FPRs
2283 #else
2284 int dummy;
2285 #endif
2286 }]
2287 } else {
2288 return 0
2289 }
2290}
2291
1b811175
JM
2292# Return 1 if this is a PowerPC target with hardware double-precision
2293# floating point.
2294
2295proc check_effective_target_powerpc_hard_double { } {
2296 if { [istarget powerpc*-*-*]
2297 || [istarget rs6000-*-*] } {
2298 return [check_no_compiler_messages powerpc_hard_double object {
2299 #ifdef _SOFT_DOUBLE
2300 #error soft double
2301 #else
2302 int dummy;
2303 #endif
2304 }]
2305 } else {
2306 return 0
2307 }
2308}
2309
1dbf8c24
JM
2310# Return 1 if this is a PowerPC target supporting -maltivec.
2311
2312proc check_effective_target_powerpc_altivec_ok { } {
e2e95f45
RE
2313 if { ([istarget powerpc*-*-*]
2314 && ![istarget powerpc-*-linux*paired*])
1dbf8c24 2315 || [istarget rs6000-*-*] } {
fc632f6e
DE
2316 # AltiVec is not supported on AIX before 5.3.
2317 if { [istarget powerpc*-*-aix4*]
2318 || [istarget powerpc*-*-aix5.1*]
2319 || [istarget powerpc*-*-aix5.2*] } {
1dbf8c24
JM
2320 return 0
2321 }
2322 return [check_no_compiler_messages powerpc_altivec_ok object {
2323 int dummy;
2324 } "-maltivec"]
2325 } else {
2326 return 0
2327 }
2328}
2329
29e6733c
MM
2330# Return 1 if this is a PowerPC target supporting -mvsx
2331
2332proc check_effective_target_powerpc_vsx_ok { } {
2333 if { ([istarget powerpc*-*-*]
2334 && ![istarget powerpc-*-linux*paired*])
2335 || [istarget rs6000-*-*] } {
2336 # AltiVec is not supported on AIX before 5.3.
2337 if { [istarget powerpc*-*-aix4*]
2338 || [istarget powerpc*-*-aix5.1*]
2339 || [istarget powerpc*-*-aix5.2*] } {
2340 return 0
2341 }
2342 return [check_no_compiler_messages powerpc_vsx_ok object {
2343 int main (void) {
2344#ifdef __MACH__
2345 asm volatile ("xxlor vs0,vs0,vs0");
2346#else
2347 asm volatile ("xxlor 0,0,0");
2348#endif
2349 return 0;
2350 }
2351 } "-mvsx"]
2352 } else {
2353 return 0
2354 }
2355}
2356
f7790b41
JJ
2357# Return 1 if this is a PowerPC target supporting -mcpu=cell.
2358
2359proc check_effective_target_powerpc_ppu_ok { } {
2360 if [check_effective_target_powerpc_altivec_ok] {
2361 return [check_no_compiler_messages cell_asm_available object {
2362 int main (void) {
2363#ifdef __MACH__
2364 asm volatile ("lvlx v0,v0,v0");
2365#else
2366 asm volatile ("lvlx 0,0,0");
2367#endif
2368 return 0;
2369 }
2370 }]
2371 } else {
2372 return 0
2373 }
2374}
2375
6dd116be
JJ
2376# Return 1 if this is a PowerPC target that supports SPU.
2377
2378proc check_effective_target_powerpc_spu { } {
19073ebc 2379 if { [istarget powerpc*-*-linux*] } {
6130e0f0
JM
2380 return [check_effective_target_powerpc_altivec_ok]
2381 } else {
2382 return 0
2383 }
6dd116be
JJ
2384}
2385
96a995c4
DJ
2386# Return 1 if this is a PowerPC SPE target. The check includes options
2387# specified by dg-options for this test, so don't cache the result.
2388
2389proc check_effective_target_powerpc_spe_nocache { } {
2390 if { [istarget powerpc*-*-*] } {
2391 return [check_no_compiler_messages_nocache powerpc_spe object {
2392 #ifndef __SPE__
2393 #error not SPE
2394 #else
2395 int dummy;
2396 #endif
2397 } [current_compiler_flags]]
2398 } else {
2399 return 0
2400 }
2401}
2402
624168de
JM
2403# Return 1 if this is a PowerPC target with SPE enabled.
2404
2405proc check_effective_target_powerpc_spe { } {
2406 if { [istarget powerpc*-*-*] } {
2407 return [check_no_compiler_messages powerpc_spe object {
2408 #ifndef __SPE__
2409 #error not SPE
2410 #else
2411 int dummy;
2412 #endif
2413 }]
2414 } else {
2415 return 0
2416 }
2417}
2418
5eb96b60
JM
2419# Return 1 if this is a PowerPC target with Altivec enabled.
2420
2421proc check_effective_target_powerpc_altivec { } {
2422 if { [istarget powerpc*-*-*] } {
2423 return [check_no_compiler_messages powerpc_altivec object {
2424 #ifndef __ALTIVEC__
2425 #error not Altivec
2426 #else
2427 int dummy;
2428 #endif
2429 }]
2430 } else {
2431 return 0
2432 }
2433}
2434
79ee9e8b
JS
2435# Return 1 if this is a PowerPC 405 target. The check includes options
2436# specified by dg-options for this test, so don't cache the result.
2437
2438proc check_effective_target_powerpc_405_nocache { } {
2439 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
2440 return [check_no_compiler_messages_nocache powerpc_405 object {
2441 #ifdef __PPC405__
2442 int dummy;
2443 #else
2444 #error not a PPC405
2445 #endif
2446 } [current_compiler_flags]]
2447 } else {
2448 return 0
2449 }
2450}
2451
73883255
UW
2452# Return 1 if this is a SPU target with a toolchain that
2453# supports automatic overlay generation.
2454
2455proc check_effective_target_spu_auto_overlay { } {
2456 if { [istarget spu*-*-elf*] } {
2457 return [check_no_compiler_messages spu_auto_overlay executable {
2458 int main (void) { }
2459 } "-Wl,--auto-overlay" ]
2460 } else {
2461 return 0
2462 }
2463}
2464
d566f2e6
NF
2465# The VxWorks SPARC simulator accepts only EM_SPARC executables and
2466# chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
2467# test environment appears to run executables on such a simulator.
2468
2469proc check_effective_target_ultrasparc_hw { } {
0ffd38c8
RS
2470 return [check_runtime ultrasparc_hw {
2471 int main() { return 0; }
2472 } "-mcpu=ultrasparc"]
d566f2e6
NF
2473}
2474
79cad86d
DM
2475# Return 1 if the test environment supports executing UltraSPARC VIS2
2476# instructions. We check this by attempting: "bmask %g0, %g0, %g0"
2477
2478proc check_effective_target_ultrasparc_vis2_hw { } {
2479 return [check_runtime ultrasparc_hw {
2480 int main() { __asm__(".word 0x81b00320"); return 0; }
2481 } "-mcpu=ultrasparc3"]
2482}
2483
2484# Return 1 if the test environment supports executing UltraSPARC VIS3
2485# instructions. We check this by attempting: "addxc %g0, %g0, %g0"
2486
2487proc check_effective_target_ultrasparc_vis3_hw { } {
2488 return [check_runtime ultrasparc_hw {
2489 int main() { __asm__(".word 0x81b00220"); return 0; }
2490 } "-mcpu=niagara3"]
2491}
2492
65c5ced3
DM
2493# Return 1 if this is a Sparc target with VIS enabled.
2494
2495proc check_effective_target_sparc_vis { } {
2496 if { [istarget sparc*-*-*] } {
2497 return [check_no_compiler_messages sparc_vis object {
2498 #ifndef __VIS__
2499 #error not VIS
2500 #else
2501 int dummy;
2502 #endif
2503 }]
2504 } else {
2505 return 0
2506 }
2507}
2508
3e0de9d1
DP
2509# Return 1 if the target supports hardware vector shift operation.
2510
2511proc check_effective_target_vect_shift { } {
41a182c6
UB
2512 global et_vect_shift_saved
2513
2514 if [info exists et_vect_shift_saved] {
2515 verbose "check_effective_target_vect_shift: using cached result" 2
3e0de9d1 2516 } else {
41a182c6 2517 set et_vect_shift_saved 0
e2e95f45
RE
2518 if { ([istarget powerpc*-*-*]
2519 && ![istarget powerpc-*-linux*paired*])
41a182c6
UB
2520 || [istarget ia64-*-*]
2521 || [istarget i?86-*-*]
b61b26e4 2522 || [istarget x86_64-*-*]
0d108d15
MX
2523 || [check_effective_target_arm32]
2524 || ([istarget mips*-*-*]
2525 && [check_effective_target_mips_loongson]) } {
41a182c6
UB
2526 set et_vect_shift_saved 1
2527 }
3e0de9d1
DP
2528 }
2529
41a182c6
UB
2530 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
2531 return $et_vect_shift_saved
3e0de9d1
DP
2532}
2533
cfc99488
DJ
2534# Return 1 if the target supports hardware vector shift operation for char.
2535
2536proc check_effective_target_vect_shift_char { } {
2537 global et_vect_shift_char_saved
2538
2539 if [info exists et_vect_shift_char_saved] {
2540 verbose "check_effective_target_vect_shift_char: using cached result" 2
2541 } else {
2542 set et_vect_shift_char_saved 0
2543 if { ([istarget powerpc*-*-*]
2544 && ![istarget powerpc-*-linux*paired*])
2545 || [check_effective_target_arm32] } {
2546 set et_vect_shift_char_saved 1
2547 }
2548 }
2549
2550 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
2551 return $et_vect_shift_char_saved
2552}
2553
31589ec6
RH
2554# Return 1 if the target supports hardware vectors of long, 0 otherwise.
2555#
f470b1e5 2556# This can change for different subtargets so do not cache the result.
31589ec6
RH
2557
2558proc check_effective_target_vect_long { } {
f470b1e5 2559 if { [istarget i?86-*-*]
e2e95f45
RE
2560 || (([istarget powerpc*-*-*]
2561 && ![istarget powerpc-*-linux*paired*])
2562 && [check_effective_target_ilp32])
f470b1e5 2563 || [istarget x86_64-*-*]
b61b26e4 2564 || [check_effective_target_arm32]
f470b1e5
JJ
2565 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
2566 set answer 1
31589ec6 2567 } else {
f470b1e5 2568 set answer 0
31589ec6
RH
2569 }
2570
f470b1e5
JJ
2571 verbose "check_effective_target_vect_long: returning $answer" 2
2572 return $answer
31589ec6
RH
2573}
2574
07d05ffd
JJ
2575# Return 1 if the target supports hardware vectors of float, 0 otherwise.
2576#
2577# This won't change for different subtargets so cache the result.
2578
2579proc check_effective_target_vect_float { } {
2580 global et_vect_float_saved
2581
2582 if [info exists et_vect_float_saved] {
2583 verbose "check_effective_target_vect_float: using cached result" 2
2584 } else {
2585 set et_vect_float_saved 0
2586 if { [istarget i?86-*-*]
2587 || [istarget powerpc*-*-*]
0f6909b9 2588 || [istarget spu-*-*]
07d05ffd 2589 || [istarget mipsisa64*-*-*]
f61134e8 2590 || [istarget x86_64-*-*]
b61b26e4
JM
2591 || [istarget ia64-*-*]
2592 || [check_effective_target_arm32] } {
07d05ffd
JJ
2593 set et_vect_float_saved 1
2594 }
2595 }
2596
2597 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
2598 return $et_vect_float_saved
2599}
2600
2601# Return 1 if the target supports hardware vectors of double, 0 otherwise.
2602#
2603# This won't change for different subtargets so cache the result.
2604
2605proc check_effective_target_vect_double { } {
2606 global et_vect_double_saved
2607
2608 if [info exists et_vect_double_saved] {
2609 verbose "check_effective_target_vect_double: using cached result" 2
2610 } else {
2611 set et_vect_double_saved 0
2612 if { [istarget i?86-*-*]
e72eba85
L
2613 || [istarget x86_64-*-*] } {
2614 if { [check_no_compiler_messages vect_double assembly {
2615 #ifdef __tune_atom__
2616 # error No double vectorizer support.
2617 #endif
2618 }] } {
2619 set et_vect_double_saved 1
2620 } else {
2621 set et_vect_double_saved 0
2622 }
2623 } elseif { [istarget spu-*-*] } {
07d05ffd
JJ
2624 set et_vect_double_saved 1
2625 }
2626 }
2627
2628 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
2629 return $et_vect_double_saved
2630}
2631
5d593372
IR
2632# Return 1 if the target supports hardware vectors of long long, 0 otherwise.
2633#
2634# This won't change for different subtargets so cache the result.
2635
2636proc check_effective_target_vect_long_long { } {
2637 global et_vect_long_long_saved
2638
2639 if [info exists et_vect_long_long_saved] {
2640 verbose "check_effective_target_vect_long_long: using cached result" 2
2641 } else {
2642 set et_vect_long_long_saved 0
2643 if { [istarget i?86-*-*]
d0011a1a 2644 || [istarget x86_64-*-*] } {
5d593372
IR
2645 set et_vect_long_long_saved 1
2646 }
2647 }
2648
2649 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
2650 return $et_vect_long_long_saved
2651}
2652
2653
eeea13c2 2654# Return 1 if the target plus current options does not support a vector
d5dfe0b8 2655# max instruction on "int", 0 otherwise.
eeea13c2
JJ
2656#
2657# This won't change for different subtargets so cache the result.
2658
d5dfe0b8
RH
2659proc check_effective_target_vect_no_int_max { } {
2660 global et_vect_no_int_max_saved
eeea13c2 2661
d5dfe0b8
RH
2662 if [info exists et_vect_no_int_max_saved] {
2663 verbose "check_effective_target_vect_no_int_max: using cached result" 2
eeea13c2 2664 } else {
d5dfe0b8 2665 set et_vect_no_int_max_saved 0
9fb93f89 2666 if { [istarget sparc*-*-*]
0f6909b9 2667 || [istarget spu-*-*]
0d108d15
MX
2668 || [istarget alpha*-*-*]
2669 || ([istarget mips*-*-*]
2670 && [check_effective_target_mips_loongson]) } {
d5dfe0b8 2671 set et_vect_no_int_max_saved 1
eeea13c2
JJ
2672 }
2673 }
d5dfe0b8
RH
2674 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
2675 return $et_vect_no_int_max_saved
2676}
2677
2678# Return 1 if the target plus current options does not support a vector
2679# add instruction on "int", 0 otherwise.
2680#
2681# This won't change for different subtargets so cache the result.
2682
2683proc check_effective_target_vect_no_int_add { } {
2684 global et_vect_no_int_add_saved
2685
2686 if [info exists et_vect_no_int_add_saved] {
2687 verbose "check_effective_target_vect_no_int_add: using cached result" 2
2688 } else {
2689 set et_vect_no_int_add_saved 0
2690 # Alpha only supports vector add on V8QI and V4HI.
2691 if { [istarget alpha*-*-*] } {
2692 set et_vect_no_int_add_saved 1
2693 }
2694 }
2695 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
2696 return $et_vect_no_int_add_saved
eeea13c2
JJ
2697}
2698
2699# Return 1 if the target plus current options does not support vector
2700# bitwise instructions, 0 otherwise.
2701#
2702# This won't change for different subtargets so cache the result.
2703
2704proc check_effective_target_vect_no_bitwise { } {
2705 global et_vect_no_bitwise_saved
2706
2707 if [info exists et_vect_no_bitwise_saved] {
2708 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
2709 } else {
2710 set et_vect_no_bitwise_saved 0
eeea13c2
JJ
2711 }
2712 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
2713 return $et_vect_no_bitwise_saved
2714}
2715
0fca40f5
IR
2716# Return 1 if the target plus current options supports vector permutation,
2717# 0 otherwise.
2718#
2719# This won't change for different subtargets so cache the result.
2720
2721proc check_effective_target_vect_perm { } {
2722 global et_vect_perm
2723
2724 if [info exists et_vect_perm_saved] {
2725 verbose "check_effective_target_vect_perm: using cached result" 2
2726 } else {
2727 set et_vect_perm_saved 0
2728 if { [istarget powerpc*-*-*]
18ba3ce7 2729 || [istarget spu-*-*]
5e979df3 2730 || [istarget i?86-*-*]
18ba3ce7 2731 || [istarget x86_64-*-*] } {
0fca40f5
IR
2732 set et_vect_perm_saved 1
2733 }
2734 }
2735 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
2736 return $et_vect_perm_saved
2737}
2738
18ba3ce7
MM
2739# Return 1 if the target plus current options supports vector permutation
2740# on byte-sized elements, 0 otherwise.
2741#
2742# This won't change for different subtargets so cache the result.
2743
2744proc check_effective_target_vect_perm_byte { } {
2745 global et_vect_perm_byte
2746
2747 if [info exists et_vect_perm_byte_saved] {
2748 verbose "check_effective_target_vect_perm_byte: using cached result" 2
2749 } else {
2750 set et_vect_perm_byte_saved 0
2751 if { [istarget powerpc*-*-*]
2752 || [istarget spu-*-*] } {
2753 set et_vect_perm_byte_saved 1
2754 }
2755 }
2756 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
2757 return $et_vect_perm_byte_saved
2758}
2759
2760# Return 1 if the target plus current options supports vector permutation
2761# on short-sized elements, 0 otherwise.
2762#
2763# This won't change for different subtargets so cache the result.
2764
2765proc check_effective_target_vect_perm_short { } {
2766 global et_vect_perm_short
2767
2768 if [info exists et_vect_perm_short_saved] {
2769 verbose "check_effective_target_vect_perm_short: using cached result" 2
2770 } else {
2771 set et_vect_perm_short_saved 0
2772 if { [istarget powerpc*-*-*]
2773 || [istarget spu-*-*] } {
2774 set et_vect_perm_short_saved 1
2775 }
2776 }
2777 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
2778 return $et_vect_perm_short_saved
2779}
2780
b5aeb3bb
IR
2781# Return 1 if the target plus current options supports a vector
2782# widening summation of *short* args into *int* result, 0 otherwise.
2783#
2784# This won't change for different subtargets so cache the result.
2785
2786proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
2787 global et_vect_widen_sum_hi_to_si_pattern
2788
2789 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
2790 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
2791 } else {
2792 set et_vect_widen_sum_hi_to_si_pattern_saved 0
604e3ff3
RH
2793 if { [istarget powerpc*-*-*]
2794 || [istarget ia64-*-*] } {
b5aeb3bb
IR
2795 set et_vect_widen_sum_hi_to_si_pattern_saved 1
2796 }
2797 }
2798 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
2799 return $et_vect_widen_sum_hi_to_si_pattern_saved
2800}
0fca40f5 2801
4035f245
VK
2802# Return 1 if the target plus current options supports a vector
2803# widening summation of *short* args into *int* result, 0 otherwise.
89d67cca
DN
2804# A target can also support this widening summation if it can support
2805# promotion (unpacking) from shorts to ints.
4035f245
VK
2806#
2807# This won't change for different subtargets so cache the result.
2808
2809proc check_effective_target_vect_widen_sum_hi_to_si { } {
2810 global et_vect_widen_sum_hi_to_si
89d67cca 2811
4035f245
VK
2812 if [info exists et_vect_widen_sum_hi_to_si_saved] {
2813 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
2814 } else {
89d67cca 2815 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
01c104ef
DN
2816 if { [istarget powerpc*-*-*]
2817 || [istarget ia64-*-*] } {
4035f245
VK
2818 set et_vect_widen_sum_hi_to_si_saved 1
2819 }
2820 }
2821 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
2822 return $et_vect_widen_sum_hi_to_si_saved
2823}
2824
2825# Return 1 if the target plus current options supports a vector
2826# widening summation of *char* args into *short* result, 0 otherwise.
89d67cca
DN
2827# A target can also support this widening summation if it can support
2828# promotion (unpacking) from chars to shorts.
4035f245
VK
2829#
2830# This won't change for different subtargets so cache the result.
2831
2832proc check_effective_target_vect_widen_sum_qi_to_hi { } {
2833 global et_vect_widen_sum_qi_to_hi
89d67cca 2834
4035f245
VK
2835 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
2836 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
2837 } else {
2838 set et_vect_widen_sum_qi_to_hi_saved 0
01c104ef
DN
2839 if { [check_effective_target_vect_unpack]
2840 || [istarget ia64-*-*] } {
4035f245 2841 set et_vect_widen_sum_qi_to_hi_saved 1
89d67cca 2842 }
4035f245
VK
2843 }
2844 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
2845 return $et_vect_widen_sum_qi_to_hi_saved
2846}
2847
2848# Return 1 if the target plus current options supports a vector
2849# widening summation of *char* args into *int* result, 0 otherwise.
2850#
2851# This won't change for different subtargets so cache the result.
2852
2853proc check_effective_target_vect_widen_sum_qi_to_si { } {
2854 global et_vect_widen_sum_qi_to_si
89d67cca 2855
4035f245
VK
2856 if [info exists et_vect_widen_sum_qi_to_si_saved] {
2857 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
2858 } else {
2859 set et_vect_widen_sum_qi_to_si_saved 0
2860 if { [istarget powerpc*-*-*] } {
2861 set et_vect_widen_sum_qi_to_si_saved 1
2862 }
2863 }
2864 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
2865 return $et_vect_widen_sum_qi_to_si_saved
2866}
2867
20f06221 2868# Return 1 if the target plus current options supports a vector
89d67cca
DN
2869# widening multiplication of *char* args into *short* result, 0 otherwise.
2870# A target can also support this widening multplication if it can support
2871# promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
2872# multiplication of shorts).
20f06221
DN
2873#
2874# This won't change for different subtargets so cache the result.
89d67cca
DN
2875
2876
2877proc check_effective_target_vect_widen_mult_qi_to_hi { } {
2878 global et_vect_widen_mult_qi_to_hi
2879
2880 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
2881 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
20f06221 2882 } else {
89d67cca
DN
2883 if { [check_effective_target_vect_unpack]
2884 && [check_effective_target_vect_short_mult] } {
2885 set et_vect_widen_mult_qi_to_hi_saved 1
2886 } else {
2887 set et_vect_widen_mult_qi_to_hi_saved 0
2888 }
383d9c83
IR
2889 if { [istarget powerpc*-*-*]
2890 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
89d67cca 2891 set et_vect_widen_mult_qi_to_hi_saved 1
20f06221
DN
2892 }
2893 }
89d67cca
DN
2894 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
2895 return $et_vect_widen_mult_qi_to_hi_saved
2896}
2897
2898# Return 1 if the target plus current options supports a vector
2899# widening multiplication of *short* args into *int* result, 0 otherwise.
2900# A target can also support this widening multplication if it can support
2901# promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
2902# multiplication of ints).
2903#
2904# This won't change for different subtargets so cache the result.
2905
2906
2907proc check_effective_target_vect_widen_mult_hi_to_si { } {
2908 global et_vect_widen_mult_hi_to_si
2909
2910 if [info exists et_vect_widen_mult_hi_to_si_saved] {
2911 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
2912 } else {
2913 if { [check_effective_target_vect_unpack]
2914 && [check_effective_target_vect_int_mult] } {
2915 set et_vect_widen_mult_hi_to_si_saved 1
2916 } else {
2917 set et_vect_widen_mult_hi_to_si_saved 0
2918 }
0e9dac9e 2919 if { [istarget powerpc*-*-*]
c882a2c2 2920 || [istarget spu-*-*]
604e3ff3 2921 || [istarget ia64-*-*]
0e9dac9e 2922 || [istarget i?86-*-*]
383d9c83
IR
2923 || [istarget x86_64-*-*]
2924 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
89d67cca
DN
2925 set et_vect_widen_mult_hi_to_si_saved 1
2926 }
2927 }
2928 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
2929 return $et_vect_widen_mult_hi_to_si_saved
20f06221
DN
2930}
2931
383d9c83
IR
2932# Return 1 if the target plus current options supports a vector
2933# widening multiplication of *char* args into *short* result, 0 otherwise.
2934#
2935# This won't change for different subtargets so cache the result.
2936
2937proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
2938 global et_vect_widen_mult_qi_to_hi_pattern
2939
2940 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
2941 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
2942 } else {
2943 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
2944 if { [istarget powerpc*-*-*]
2945 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
2946 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
2947 }
2948 }
2949 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
2950 return $et_vect_widen_mult_qi_to_hi_pattern_saved
2951}
2952
2953# Return 1 if the target plus current options supports a vector
2954# widening multiplication of *short* args into *int* result, 0 otherwise.
2955#
2956# This won't change for different subtargets so cache the result.
2957
2958proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
2959 global et_vect_widen_mult_hi_to_si_pattern
2960
2961 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
2962 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
2963 } else {
2964 set et_vect_widen_mult_hi_to_si_pattern_saved 0
2965 if { [istarget powerpc*-*-*]
2966 || [istarget spu-*-*]
2967 || [istarget ia64-*-*]
2968 || [istarget i?86-*-*]
2969 || [istarget x86_64-*-*]
2970 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
2971 set et_vect_widen_mult_hi_to_si_pattern_saved 1
2972 }
2973 }
2974 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
2975 return $et_vect_widen_mult_hi_to_si_pattern_saved
2976}
2977
36ba4aae
IR
2978# Return 1 if the target plus current options supports a vector
2979# widening shift, 0 otherwise.
2980#
2981# This won't change for different subtargets so cache the result.
2982
2983proc check_effective_target_vect_widen_shift { } {
2984 global et_vect_widen_shift_saved
2985
2986 if [info exists et_vect_shift_saved] {
2987 verbose "check_effective_target_vect_widen_shift: using cached result" 2
2988 } else {
2989 set et_vect_widen_shift_saved 0
2990 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
2991 set et_vect_widen_shift_saved 1
2992 }
2993 }
2994 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
2995 return $et_vect_widen_shift_saved
2996}
2997
20f06221
DN
2998# Return 1 if the target plus current options supports a vector
2999# dot-product of signed chars, 0 otherwise.
3000#
3001# This won't change for different subtargets so cache the result.
3002
3003proc check_effective_target_vect_sdot_qi { } {
3004 global et_vect_sdot_qi
3005
3006 if [info exists et_vect_sdot_qi_saved] {
3007 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3008 } else {
3009 set et_vect_sdot_qi_saved 0
604e3ff3
RH
3010 if { [istarget ia64-*-*] } {
3011 set et_vect_udot_qi_saved 1
3012 }
20f06221
DN
3013 }
3014 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3015 return $et_vect_sdot_qi_saved
3016}
3017
3018# Return 1 if the target plus current options supports a vector
3019# dot-product of unsigned chars, 0 otherwise.
3020#
3021# This won't change for different subtargets so cache the result.
3022
3023proc check_effective_target_vect_udot_qi { } {
3024 global et_vect_udot_qi
3025
3026 if [info exists et_vect_udot_qi_saved] {
3027 verbose "check_effective_target_vect_udot_qi: using cached result" 2
3028 } else {
3029 set et_vect_udot_qi_saved 0
604e3ff3
RH
3030 if { [istarget powerpc*-*-*]
3031 || [istarget ia64-*-*] } {
20f06221
DN
3032 set et_vect_udot_qi_saved 1
3033 }
3034 }
3035 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3036 return $et_vect_udot_qi_saved
3037}
3038
3039# Return 1 if the target plus current options supports a vector
3040# dot-product of signed shorts, 0 otherwise.
3041#
3042# This won't change for different subtargets so cache the result.
3043
3044proc check_effective_target_vect_sdot_hi { } {
3045 global et_vect_sdot_hi
3046
3047 if [info exists et_vect_sdot_hi_saved] {
3048 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3049 } else {
3050 set et_vect_sdot_hi_saved 0
e2e95f45 3051 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
604e3ff3 3052 || [istarget ia64-*-*]
20f06221 3053 || [istarget i?86-*-*]
89d67cca 3054 || [istarget x86_64-*-*] } {
20f06221
DN
3055 set et_vect_sdot_hi_saved 1
3056 }
3057 }
3058 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3059 return $et_vect_sdot_hi_saved
3060}
3061
3062# Return 1 if the target plus current options supports a vector
3063# dot-product of unsigned shorts, 0 otherwise.
3064#
3065# This won't change for different subtargets so cache the result.
3066
3067proc check_effective_target_vect_udot_hi { } {
3068 global et_vect_udot_hi
3069
3070 if [info exists et_vect_udot_hi_saved] {
3071 verbose "check_effective_target_vect_udot_hi: using cached result" 2
3072 } else {
3073 set et_vect_udot_hi_saved 0
e2e95f45 3074 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
20f06221
DN
3075 set et_vect_udot_hi_saved 1
3076 }
3077 }
3078 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
3079 return $et_vect_udot_hi_saved
3080}
3081
3082
89d67cca
DN
3083# Return 1 if the target plus current options supports a vector
3084# demotion (packing) of shorts (to chars) and ints (to shorts)
3085# using modulo arithmetic, 0 otherwise.
3086#
3087# This won't change for different subtargets so cache the result.
3088
8b3cc882
UB
3089proc check_effective_target_vect_pack_trunc { } {
3090 global et_vect_pack_trunc
89d67cca 3091
8b3cc882
UB
3092 if [info exists et_vect_pack_trunc_saved] {
3093 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
89d67cca 3094 } else {
8b3cc882 3095 set et_vect_pack_trunc_saved 0
e2e95f45 3096 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
89d67cca 3097 || [istarget i?86-*-*]
8ff27c24 3098 || [istarget x86_64-*-*]
0f38f229 3099 || [istarget spu-*-*]
0094f21b
JB
3100 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]
3101 && [check_effective_target_arm_little_endian]) } {
8b3cc882 3102 set et_vect_pack_trunc_saved 1
89d67cca
DN
3103 }
3104 }
8b3cc882
UB
3105 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
3106 return $et_vect_pack_trunc_saved
89d67cca
DN
3107}
3108
3109# Return 1 if the target plus current options supports a vector
3110# promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
3111#
3112# This won't change for different subtargets so cache the result.
3113
3114proc check_effective_target_vect_unpack { } {
3115 global et_vect_unpack
3116
3117 if [info exists et_vect_unpack_saved] {
3118 verbose "check_effective_target_vect_unpack: using cached result" 2
3119 } else {
3120 set et_vect_unpack_saved 0
e2e95f45 3121 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
89d67cca 3122 || [istarget i?86-*-*]
76a893cf 3123 || [istarget x86_64-*-*]
46b57af1 3124 || [istarget spu-*-*]
604e3ff3 3125 || [istarget ia64-*-*]
0094f21b
JB
3126 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]
3127 && [check_effective_target_arm_little_endian]) } {
89d67cca
DN
3128 set et_vect_unpack_saved 1
3129 }
3130 }
3131 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
3132 return $et_vect_unpack_saved
3133}
3134
a96681aa
DN
3135# Return 1 if the target plus current options does not guarantee
3136# that its STACK_BOUNDARY is >= the reguired vector alignment.
3137#
3138# This won't change for different subtargets so cache the result.
3139
3140proc check_effective_target_unaligned_stack { } {
3141 global et_unaligned_stack_saved
3142
3143 if [info exists et_unaligned_stack_saved] {
3144 verbose "check_effective_target_unaligned_stack: using cached result" 2
3145 } else {
3146 set et_unaligned_stack_saved 0
a96681aa
DN
3147 }
3148 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
3149 return $et_unaligned_stack_saved
3150}
3151
eeea13c2
JJ
3152# Return 1 if the target plus current options does not support a vector
3153# alignment mechanism, 0 otherwise.
3154#
3155# This won't change for different subtargets so cache the result.
3156
3157proc check_effective_target_vect_no_align { } {
3158 global et_vect_no_align_saved
3159
3160 if [info exists et_vect_no_align_saved] {
3161 verbose "check_effective_target_vect_no_align: using cached result" 2
3162 } else {
3163 set et_vect_no_align_saved 0
3e8aba34 3164 if { [istarget mipsisa64*-*-*]
f61134e8 3165 || [istarget sparc*-*-*]
b61b26e4 3166 || [istarget ia64-*-*]
c452684d 3167 || [check_effective_target_arm_vect_no_misalign]
0d108d15
MX
3168 || ([istarget mips*-*-*]
3169 && [check_effective_target_mips_loongson]) } {
eeea13c2
JJ
3170 set et_vect_no_align_saved 1
3171 }
3172 }
3173 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
3174 return $et_vect_no_align_saved
3175}
3176
8f439681
RE
3177# Return 1 if the target supports a vector misalign access, 0 otherwise.
3178#
3179# This won't change for different subtargets so cache the result.
3180
3181proc check_effective_target_vect_hw_misalign { } {
3182 global et_vect_hw_misalign_saved
3183
3184 if [info exists et_vect_hw_misalign_saved] {
3185 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
3186 } else {
3187 set et_vect_hw_misalign_saved 0
06ddd871
RE
3188 if { ([istarget x86_64-*-*]
3189 || [istarget i?86-*-*]) } {
8f439681
RE
3190 set et_vect_hw_misalign_saved 1
3191 }
3192 }
3193 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
3194 return $et_vect_hw_misalign_saved
3195}
3196
3197
e3b715a0
UB
3198# Return 1 if arrays are aligned to the vector alignment
3199# boundary, 0 otherwise.
5de7f07c
UB
3200#
3201# This won't change for different subtargets so cache the result.
3202
3203proc check_effective_target_vect_aligned_arrays { } {
3204 global et_vect_aligned_arrays
3205
3206 if [info exists et_vect_aligned_arrays_saved] {
3207 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
3208 } else {
3209 set et_vect_aligned_arrays_saved 0
8d0e5316
IR
3210 if { (([istarget x86_64-*-*]
3211 || [istarget i?86-*-*]) && [is-effective-target lp64])
3212 || [istarget spu-*-*] } {
5de7f07c
UB
3213 set et_vect_aligned_arrays_saved 1
3214 }
3215 }
3216 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
3217 return $et_vect_aligned_arrays_saved
3218}
3219
8d0e5316
IR
3220# Return 1 if types of size 32 bit or less are naturally aligned
3221# (aligned to their type-size), 0 otherwise.
3222#
3223# This won't change for different subtargets so cache the result.
3224
3225proc check_effective_target_natural_alignment_32 { } {
3226 global et_natural_alignment_32
3227
3228 if [info exists et_natural_alignment_32_saved] {
3229 verbose "check_effective_target_natural_alignment_32: using cached result" 2
3230 } else {
3231 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
3232 set et_natural_alignment_32_saved 1
3233 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
3234 set et_natural_alignment_32_saved 0
3235 }
3236 }
3237 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
3238 return $et_natural_alignment_32_saved
3239}
3240
3241# Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
3242# type-size), 0 otherwise.
99c9c69a
DN
3243#
3244# This won't change for different subtargets so cache the result.
3245
8d0e5316
IR
3246proc check_effective_target_natural_alignment_64 { } {
3247 global et_natural_alignment_64
99c9c69a 3248
8d0e5316
IR
3249 if [info exists et_natural_alignment_64_saved] {
3250 verbose "check_effective_target_natural_alignment_64: using cached result" 2
99c9c69a 3251 } else {
8d0e5316
IR
3252 set et_natural_alignment_64_saved 0
3253 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
3254 || [istarget spu-*-*] } {
3255 set et_natural_alignment_64_saved 1
99c9c69a
DN
3256 }
3257 }
8d0e5316
IR
3258 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
3259 return $et_natural_alignment_64_saved
99c9c69a
DN
3260}
3261
8d0e5316 3262# Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
99c9c69a
DN
3263#
3264# This won't change for different subtargets so cache the result.
3265
3266proc check_effective_target_vector_alignment_reachable { } {
3267 global et_vector_alignment_reachable
3268
3269 if [info exists et_vector_alignment_reachable_saved] {
3270 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
3271 } else {
3272 if { [check_effective_target_vect_aligned_arrays]
8d0e5316 3273 || [check_effective_target_natural_alignment_32] } {
99c9c69a
DN
3274 set et_vector_alignment_reachable_saved 1
3275 } else {
3276 set et_vector_alignment_reachable_saved 0
3277 }
3278 }
3279 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
3280 return $et_vector_alignment_reachable_saved
3281}
3282
8d0e5316 3283# Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
b11040a8
DN
3284#
3285# This won't change for different subtargets so cache the result.
3286
8d0e5316
IR
3287proc check_effective_target_vector_alignment_reachable_for_64bit { } {
3288 global et_vector_alignment_reachable_for_64bit
b11040a8 3289
8d0e5316
IR
3290 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
3291 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
b11040a8 3292 } else {
8d0e5316
IR
3293 if { [check_effective_target_vect_aligned_arrays]
3294 || [check_effective_target_natural_alignment_64] } {
3295 set et_vector_alignment_reachable_for_64bit_saved 1
b11040a8 3296 } else {
8d0e5316 3297 set et_vector_alignment_reachable_for_64bit_saved 0
b11040a8
DN
3298 }
3299 }
8d0e5316
IR
3300 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
3301 return $et_vector_alignment_reachable_for_64bit_saved
b11040a8
DN
3302}
3303
c452684d
JB
3304# Return 1 if the target only requires element alignment for vector accesses
3305
3306proc check_effective_target_vect_element_align { } {
3307 global et_vect_element_align
3308
3309 if [info exists et_vect_element_align] {
3310 verbose "check_effective_target_vect_element_align: using cached result" 2
3311 } else {
3312 set et_vect_element_align 0
0094f21b
JB
3313 if { ([istarget arm*-*-*]
3314 && ![check_effective_target_arm_vect_no_misalign])
c452684d
JB
3315 || [check_effective_target_vect_hw_misalign] } {
3316 set et_vect_element_align 1
3317 }
3318 }
3319
3320 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
3321 return $et_vect_element_align
3322}
3323
b52485c6
DP
3324# Return 1 if the target supports vector conditional operations, 0 otherwise.
3325
3326proc check_effective_target_vect_condition { } {
3327 global et_vect_cond_saved
3328
41a182c6 3329 if [info exists et_vect_cond_saved] {
b52485c6
DP
3330 verbose "check_effective_target_vect_cond: using cached result" 2
3331 } else {
3332 set et_vect_cond_saved 0
ae46a07a
RH
3333 if { [istarget powerpc*-*-*]
3334 || [istarget ia64-*-*]
3335 || [istarget i?86-*-*]
39aeae85 3336 || [istarget spu-*-*]
ae46a07a 3337 || [istarget x86_64-*-*] } {
b52485c6
DP
3338 set et_vect_cond_saved 1
3339 }
3340 }
3341
3342 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
3343 return $et_vect_cond_saved
3344}
3345
69d2aade
JJ
3346# Return 1 if the target supports vector conditional operations where
3347# the comparison has different type from the lhs, 0 otherwise.
3348
3349proc check_effective_target_vect_cond_mixed { } {
3350 global et_vect_cond_mixed_saved
3351
3352 if [info exists et_vect_cond_mixed_saved] {
3353 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
3354 } else {
3355 set et_vect_cond_mixed_saved 0
3356 if { [istarget i?86-*-*]
69d3d957
JJ
3357 || [istarget x86_64-*-*]
3358 || [istarget powerpc*-*-*] } {
69d2aade
JJ
3359 set et_vect_cond_mixed_saved 1
3360 }
3361 }
3362
3363 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
3364 return $et_vect_cond_mixed_saved
3365}
3366
4035f245
VK
3367# Return 1 if the target supports vector char multiplication, 0 otherwise.
3368
3369proc check_effective_target_vect_char_mult { } {
3370 global et_vect_char_mult_saved
3371
3372 if [info exists et_vect_char_mult_saved] {
3373 verbose "check_effective_target_vect_char_mult: using cached result" 2
3374 } else {
3375 set et_vect_char_mult_saved 0
3376 if { [istarget ia64-*-*]
3377 || [istarget i?86-*-*]
3378 || [istarget x86_64-*-*] } {
3379 set et_vect_char_mult_saved 1
3380 }
3381 }
3382
3383 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
3384 return $et_vect_char_mult_saved
3385}
3386
3387# Return 1 if the target supports vector short multiplication, 0 otherwise.
3388
3389proc check_effective_target_vect_short_mult { } {
3390 global et_vect_short_mult_saved
3391
3392 if [info exists et_vect_short_mult_saved] {
3393 verbose "check_effective_target_vect_short_mult: using cached result" 2
3394 } else {
3395 set et_vect_short_mult_saved 0
3396 if { [istarget ia64-*-*]
76a893cf 3397 || [istarget spu-*-*]
4035f245 3398 || [istarget i?86-*-*]
65a324b4 3399 || [istarget x86_64-*-*]
0d108d15
MX
3400 || [istarget powerpc*-*-*]
3401 || [check_effective_target_arm32]
3402 || ([istarget mips*-*-*]
3403 && [check_effective_target_mips_loongson]) } {
4035f245
VK
3404 set et_vect_short_mult_saved 1
3405 }
3406 }
3407
3408 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
3409 return $et_vect_short_mult_saved
3410}
3411
a45f6936
DP
3412# Return 1 if the target supports vector int multiplication, 0 otherwise.
3413
3414proc check_effective_target_vect_int_mult { } {
3415 global et_vect_int_mult_saved
3416
f12b785d 3417 if [info exists et_vect_int_mult_saved] {
a45f6936
DP
3418 verbose "check_effective_target_vect_int_mult: using cached result" 2
3419 } else {
3420 set et_vect_int_mult_saved 0
e2e95f45 3421 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
e95b59d2 3422 || [istarget spu-*-*]
2b5bf0e2 3423 || [istarget i?86-*-*]
b61b26e4 3424 || [istarget x86_64-*-*]
604e3ff3 3425 || [istarget ia64-*-*]
b61b26e4 3426 || [check_effective_target_arm32] } {
a45f6936
DP
3427 set et_vect_int_mult_saved 1
3428 }
3429 }
3430
3431 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
3432 return $et_vect_int_mult_saved
3433}
b52485c6 3434
98b44b0e
IR
3435# Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
3436
3437proc check_effective_target_vect_extract_even_odd { } {
3438 global et_vect_extract_even_odd_saved
3439
3440 if [info exists et_vect_extract_even_odd_saved] {
3441 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
3442 } else {
3443 set et_vect_extract_even_odd_saved 0
0fac5151
RH
3444 if { [istarget powerpc*-*-*]
3445 || [istarget i?86-*-*]
3446 || [istarget x86_64-*-*]
604e3ff3 3447 || [istarget ia64-*-*]
8ff27c24 3448 || [istarget spu-*-*] } {
98b44b0e
IR
3449 set et_vect_extract_even_odd_saved 1
3450 }
3451 }
3452
3453 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
3454 return $et_vect_extract_even_odd_saved
3455}
3456
3457# Return 1 if the target supports vector interleaving, 0 otherwise.
3458
3459proc check_effective_target_vect_interleave { } {
3460 global et_vect_interleave_saved
3461
3462 if [info exists et_vect_interleave_saved] {
3463 verbose "check_effective_target_vect_interleave: using cached result" 2
3464 } else {
3465 set et_vect_interleave_saved 0
3466 if { [istarget powerpc*-*-*]
3467 || [istarget i?86-*-*]
8ff27c24 3468 || [istarget x86_64-*-*]
604e3ff3 3469 || [istarget ia64-*-*]
8ff27c24 3470 || [istarget spu-*-*] } {
98b44b0e
IR
3471 set et_vect_interleave_saved 1
3472 }
3473 }
3474
3475 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
3476 return $et_vect_interleave_saved
3477}
3478
9afa0361
RS
3479foreach N {2 3 4 8} {
3480 eval [string map [list N $N] {
3481 # Return 1 if the target supports 2-vector interleaving
3482 proc check_effective_target_vect_stridedN { } {
3483 global et_vect_stridedN_saved
3484
3485 if [info exists et_vect_stridedN_saved] {
3486 verbose "check_effective_target_vect_stridedN: using cached result" 2
3487 } else {
3488 set et_vect_stridedN_saved 0
3489 if { (N & -N) == N
3490 && [check_effective_target_vect_interleave]
3491 && [check_effective_target_vect_extract_even_odd] } {
3492 set et_vect_stridedN_saved 1
3493 }
3494 if { [istarget arm*-*-*] && N >= 2 && N <= 4 } {
3495 set et_vect_stridedN_saved 1
3496 }
3497 }
805e2059 3498
9afa0361
RS
3499 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
3500 return $et_vect_stridedN_saved
3501 }
3502 }]
805e2059
IR
3503}
3504
8f40ccea
IR
3505# Return 1 if the target supports multiple vector sizes
3506
3507proc check_effective_target_vect_multiple_sizes { } {
26ac3579 3508 global et_vect_multiple_sizes_saved
8f40ccea
IR
3509
3510 if [info exists et_vect_multiple_sizes_saved] {
3511 verbose "check_effective_target_vect_multiple_sizes: using cached result" 2
3512 } else {
3513 set et_vect_multiple_sizes_saved 0
3514 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
3515 set et_vect_multiple_sizes_saved 1
3516 }
3517 }
3518
3519 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
3520 return $et_vect_multiple_sizes_saved
3521}
3522
8e19f5a1
IR
3523# Return 1 if the target supports vectors of 64 bits.
3524
3525proc check_effective_target_vect64 { } {
26ac3579 3526 global et_vect64_saved
8e19f5a1
IR
3527
3528 if [info exists et_vect64_saved] {
3529 verbose "check_effective_target_vect64: using cached result" 2
3530 } else {
3531 set et_vect64_saved 0
3532 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3533 set et_vect64_saved 1
3534 }
3535 }
3536
3537 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
3538 return $et_vect64_saved
3539}
3540
190c2236
JJ
3541# Return 1 if the target supports vector copysignf calls.
3542
3543proc check_effective_target_vect_call_copysignf { } {
3544 global et_vect_call_copysignf_saved
3545
3546 if [info exists et_vect_call_copysignf_saved] {
3547 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
3548 } else {
3549 set et_vect_call_copysignf_saved 0
3550 if { [istarget i?86-*-*]
3551 || [istarget x86_64-*-*]
3552 || [istarget powerpc*-*-*] } {
3553 set et_vect_call_copysignf_saved 1
3554 }
3555 }
3556
3557 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
3558 return $et_vect_call_copysignf_saved
3559}
3560
3561# Return 1 if the target supports vector sqrtf calls.
3562
3563proc check_effective_target_vect_call_sqrtf { } {
3564 global et_vect_call_sqrtf_saved
3565
3566 if [info exists et_vect_call_sqrtf_saved] {
3567 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
3568 } else {
3569 set et_vect_call_sqrtf_saved 0
3570 if { [istarget i?86-*-*]
3571 || [istarget x86_64-*-*]
3572 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
3573 set et_vect_call_sqrtf_saved 1
3574 }
3575 }
3576
3577 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
3578 return $et_vect_call_sqrtf_saved
3579}
3580
3581# Return 1 if the target supports vector lrint calls.
3582
3583proc check_effective_target_vect_call_lrint { } {
3584 set et_vect_call_lrint 0
3585 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) && [check_effective_target_ilp32] } {
3586 set et_vect_call_lrint 1
3587 }
3588
3589 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
3590 return $et_vect_call_lrint
3591}
3592
0be79f24
DN
3593# Return 1 if the target supports section-anchors
3594
3595proc check_effective_target_section_anchors { } {
3596 global et_section_anchors_saved
3597
3598 if [info exists et_section_anchors_saved] {
3599 verbose "check_effective_target_section_anchors: using cached result" 2
3600 } else {
3601 set et_section_anchors_saved 0
65a324b4 3602 if { [istarget powerpc*-*-*]
cba146eb 3603 || [istarget arm*-*-*] } {
0be79f24
DN
3604 set et_section_anchors_saved 1
3605 }
3606 }
3607
3608 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
3609 return $et_section_anchors_saved
3610}
3611
86951993
AM
3612# Return 1 if the target supports atomic operations on "int_128" values.
3613
3614proc check_effective_target_sync_int_128 { } {
51e674b7
UB
3615 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
3616 && ![is-effective-target ia32] } {
3617 return 1
86951993 3618 } else {
51e674b7 3619 return 0
86951993 3620 }
86951993
AM
3621}
3622
3623# Return 1 if the target supports atomic operations on "long long".
3624
3625proc check_effective_target_sync_long_long { } {
51e674b7
UB
3626 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
3627 && ![is-effective-target ia32] } {
3628 return 1
86951993 3629 } else {
51e674b7 3630 return 0
86951993 3631 }
86951993
AM
3632}
3633
f12b785d
RH
3634# Return 1 if the target supports atomic operations on "int" and "long".
3635
3636proc check_effective_target_sync_int_long { } {
3637 global et_sync_int_long_saved
3638
3639 if [info exists et_sync_int_long_saved] {
3640 verbose "check_effective_target_sync_int_long: using cached result" 2
3641 } else {
3642 set et_sync_int_long_saved 0
915167f5
GK
3643# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
3644# load-reserved/store-conditional instructions.
f12b785d
RH
3645 if { [istarget ia64-*-*]
3646 || [istarget i?86-*-*]
3647 || [istarget x86_64-*-*]
915167f5 3648 || [istarget alpha*-*-*]
17fec01d 3649 || [istarget arm*-*-linux-gnueabi]
9840d30a 3650 || [istarget bfin*-*linux*]
4d053ac1 3651 || [istarget hppa*-*linux*]
89a590b3 3652 || [istarget s390*-*-*]
396b535a
JJ
3653 || [istarget powerpc*-*-*]
3654 || [istarget sparc64-*-*]
977502ff
DD
3655 || [istarget sparcv9-*-*]
3656 || [istarget mips*-*-*] } {
f12b785d
RH
3657 set et_sync_int_long_saved 1
3658 }
3659 }
3660
3661 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
3662 return $et_sync_int_long_saved
3663}
3664
e11a4c80
DAG
3665# Return 1 if the target supports atomic operations on "long long" and can
3666# execute them
3667# So far only put checks in for ARM, others may want to add their own
3668proc check_effective_target_sync_longlong { } {
3669 return [check_runtime sync_longlong_runtime {
3670 #include <stdlib.h>
3671 int main ()
3672 {
3673 long long l1;
3674
3675 if (sizeof (long long) != 8)
3676 exit (1);
3677
3678 #ifdef __arm__
3679 /* Just check for native; checking for kernel fallback is tricky. */
3680 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
3681 #else
3682 # error "Add other suitable archs here"
3683 #endif
3684
3685 exit (0);
3686 }
3687 } "" ]
3688}
3689
bc0f348e
GK
3690# Return 1 if the target supports atomic operations on "char" and "short".
3691
3692proc check_effective_target_sync_char_short { } {
3693 global et_sync_char_short_saved
3694
3695 if [info exists et_sync_char_short_saved] {
3696 verbose "check_effective_target_sync_char_short: using cached result" 2
3697 } else {
3698 set et_sync_char_short_saved 0
3699# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
3700# load-reserved/store-conditional instructions.
3701 if { [istarget ia64-*-*]
3702 || [istarget i?86-*-*]
3703 || [istarget x86_64-*-*]
38f31687 3704 || [istarget alpha*-*-*]
17fec01d 3705 || [istarget arm*-*-linux-gnueabi]
4d053ac1 3706 || [istarget hppa*-*linux*]
3093f076 3707 || [istarget s390*-*-*]
396b535a
JJ
3708 || [istarget powerpc*-*-*]
3709 || [istarget sparc64-*-*]
977502ff
DD
3710 || [istarget sparcv9-*-*]
3711 || [istarget mips*-*-*] } {
bc0f348e
GK
3712 set et_sync_char_short_saved 1
3713 }
3714 }
3715
3716 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
3717 return $et_sync_char_short_saved
3718}
3719
7fc564b7
RS
3720# Return 1 if the target uses a ColdFire FPU.
3721
3722proc check_effective_target_coldfire_fpu { } {
3723 return [check_no_compiler_messages coldfire_fpu assembly {
3724 #ifndef __mcffpu__
3725 #error FOO
3726 #endif
3727 }]
3728}
3729
2755c056
RS
3730# Return true if this is a uClibc target.
3731
3732proc check_effective_target_uclibc {} {
3733 return [check_no_compiler_messages uclibc object {
3734 #include <features.h>
3735 #if !defined (__UCLIBC__)
3736 #error FOO
3737 #endif
3738 }]
3739}
3740
e6625c44
RS
3741# Return true if this is a uclibc target and if the uclibc feature
3742# described by __$feature__ is not present.
3743
3744proc check_missing_uclibc_feature {feature} {
7a27dc2f
RS
3745 return [check_no_compiler_messages $feature object "
3746 #include <features.h>
3811dfcd 3747 #if !defined (__UCLIBC) || defined (__${feature}__)
7a27dc2f
RS
3748 #error FOO
3749 #endif
3750 "]
e6625c44
RS
3751}
3752
8371ec74
MM
3753# Return true if this is a Newlib target.
3754
3755proc check_effective_target_newlib {} {
3756 return [check_no_compiler_messages newlib object {
3757 #include <newlib.h>
3758 }]
3759}
3760
a5ea7a0b
RS
3761# Return 1 if
3762# (a) an error of a few ULP is expected in string to floating-point
3763# conversion functions; and
3764# (b) overflow is not always detected correctly by those functions.
3765
3766proc check_effective_target_lax_strtofp {} {
3767 # By default, assume that all uClibc targets suffer from this.
3768 return [check_effective_target_uclibc]
3769}
3770
3771# Return 1 if this is a target for which wcsftime is a dummy
3772# function that always returns 0.
3773
3774proc check_effective_target_dummy_wcsftime {} {
3775 # By default, assume that all uClibc targets suffer from this.
3776 return [check_effective_target_uclibc]
3777}
3778
fc8600f9
MM
3779# Return 1 if constructors with initialization priority arguments are
3780# supposed on this target.
3781
3782proc check_effective_target_init_priority {} {
fc8600f9
MM
3783 return [check_no_compiler_messages init_priority assembly "
3784 void f() __attribute__((constructor (1000)));
3785 void f() \{\}
3786 "]
3787}
3788
b6dc500c
JJ
3789# Return 1 if the target matches the effective target 'arg', 0 otherwise.
3790# This can be used with any check_* proc that takes no argument and
3791# returns only 1 or 0. It could be used with check_* procs that take
3792# arguments with keywords that pass particular arguments.
3793
3794proc is-effective-target { arg } {
3795 set selected 0
68897708
JJ
3796 if { [info procs check_effective_target_${arg}] != [list] } {
3797 set selected [check_effective_target_${arg}]
3798 } else {
3799 switch $arg {
3800 "vmx_hw" { set selected [check_vmx_hw_available] }
92902797
MM
3801 "vsx_hw" { set selected [check_vsx_hw_available] }
3802 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
68897708
JJ
3803 "named_sections" { set selected [check_named_sections_available] }
3804 "gc_sections" { set selected [check_gc_sections_available] }
294f1ce3 3805 "cxa_atexit" { set selected [check_cxa_atexit_available] }
68897708
JJ
3806 default { error "unknown effective target keyword `$arg'" }
3807 }
b6dc500c
JJ
3808 }
3809 verbose "is-effective-target: $arg $selected" 2
3810 return $selected
3811}
810838e7
JJ
3812
3813# Return 1 if the argument is an effective-target keyword, 0 otherwise.
3814
3815proc is-effective-target-keyword { arg } {
3816 if { [info procs check_effective_target_${arg}] != [list] } {
3817 return 1
3818 } else {
3819 # These have different names for their check_* procs.
3820 switch $arg {
3821 "vmx_hw" { return 1 }
92902797
MM
3822 "vsx_hw" { return 1 }
3823 "ppc_recip_hw" { return 1 }
810838e7
JJ
3824 "named_sections" { return 1 }
3825 "gc_sections" { return 1 }
294f1ce3 3826 "cxa_atexit" { return 1 }
810838e7
JJ
3827 default { return 0 }
3828 }
3829 }
3830}
efe5e271
PB
3831
3832# Return 1 if target default to short enums
3833
3834proc check_effective_target_short_enums { } {
8ce1ac69
RS
3835 return [check_no_compiler_messages short_enums assembly {
3836 enum foo { bar };
3837 int s[sizeof (enum foo) == 1 ? 1 : -1];
3838 }]
efe5e271
PB
3839}
3840
19450f2b
DJ
3841# Return 1 if target supports merging string constants at link time.
3842
3843proc check_effective_target_string_merging { } {
3844 return [check_no_messages_and_pattern string_merging \
3845 "rodata\\.str" assembly {
3846 const char *var = "String";
3847 } {-O2}]
3848}
8f3fc4aa
JDA
3849
3850# Return 1 if target has the basic signed and unsigned types in
207bf79d
JM
3851# <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
3852# working <stdint.h> for all targets.
8f3fc4aa
JDA
3853
3854proc check_effective_target_stdint_types { } {
3855 return [check_no_compiler_messages stdint_types assembly {
3856 #include <stdint.h>
3857 int8_t a; int16_t b; int32_t c; int64_t d;
3858 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
3859 }]
3860}
3920f1fd 3861
207bf79d
JM
3862# Return 1 if target has the basic signed and unsigned types in
3863# <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
3864# these types agree with those in the header, as some systems have
3865# only <inttypes.h>.
3866
3867proc check_effective_target_inttypes_types { } {
3868 return [check_no_compiler_messages inttypes_types assembly {
3869 #include <inttypes.h>
3870 int8_t a; int16_t b; int32_t c; int64_t d;
3871 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
3872 }]
3873}
3874
3920f1fd
HPN
3875# Return 1 if programs are intended to be run on a simulator
3876# (i.e. slowly) rather than hardware (i.e. fast).
3877
3878proc check_effective_target_simulator { } {
3879
3880 # All "src/sim" simulators set this one.
3881 if [board_info target exists is_simulator] {
3882 return [board_info target is_simulator]
3883 }
3884
3885 # The "sid" simulators don't set that one, but at least they set
3886 # this one.
3887 if [board_info target exists slow_simulator] {
3888 return [board_info target slow_simulator]
3889 }
3890
3891 return 0
3892}
56fca24a 3893
c6fee227 3894# Return 1 if the target is a VxWorks kernel.
56fca24a
RS
3895
3896proc check_effective_target_vxworks_kernel { } {
3897 return [check_no_compiler_messages vxworks_kernel assembly {
3898 #if !defined __vxworks || defined __RTP__
3899 #error NO
3900 #endif
3901 }]
3902}
e6625c44 3903
c6fee227
RS
3904# Return 1 if the target is a VxWorks RTP.
3905
3906proc check_effective_target_vxworks_rtp { } {
3907 return [check_no_compiler_messages vxworks_rtp assembly {
3908 #if !defined __vxworks || !defined __RTP__
3909 #error NO
3910 #endif
3911 }]
3912}
3913
e6625c44
RS
3914# Return 1 if the target is expected to provide wide character support.
3915
3916proc check_effective_target_wchar { } {
3917 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
3918 return 0
3919 }
3920 return [check_no_compiler_messages wchar assembly {
3921 #include <wchar.h>
3922 }]
3923}
db9a0df0 3924
eb587f4f
JM
3925# Return 1 if the target has <pthread.h>.
3926
3927proc check_effective_target_pthread_h { } {
3928 return [check_no_compiler_messages pthread_h assembly {
3929 #include <pthread.h>
3930 }]
3931}
3932
e054e17e
HPN
3933# Return 1 if the target can truncate a file from a file-descriptor,
3934# as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
3935# chsize. We test for a trivially functional truncation; no stubs.
3936# As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
3937# different function to be used.
3938
3939proc check_effective_target_fd_truncate { } {
3940 set prog {
3941 #define _FILE_OFFSET_BITS 64
3942 #include <unistd.h>
3943 #include <stdio.h>
3944 #include <stdlib.h>
3945 int main ()
3946 {
3947 FILE *f = fopen ("tst.tmp", "wb");
3948 int fd;
3949 const char t[] = "test writing more than ten characters";
3950 char s[11];
665f4c1f
UB
3951 int status = 0;
3952 fd = fileno (f);
e054e17e
HPN
3953 write (fd, t, sizeof (t) - 1);
3954 lseek (fd, 0, 0);
3955 if (ftruncate (fd, 10) != 0)
665f4c1f 3956 status = 1;
e054e17e 3957 close (fd);
665f4c1f
UB
3958 fclose (f);
3959 if (status)
3960 {
3961 unlink ("tst.tmp");
3962 exit (status);
3963 }
e054e17e
HPN
3964 f = fopen ("tst.tmp", "rb");
3965 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
665f4c1f
UB
3966 status = 1;
3967 fclose (f);
3968 unlink ("tst.tmp");
3969 exit (status);
e054e17e
HPN
3970 }
3971 }
3972
3973 if { [check_runtime ftruncate $prog] } {
3974 return 1;
3975 }
3976
3977 regsub "ftruncate" $prog "chsize" prog
3978 return [check_runtime chsize $prog]
3979}
3980
db9a0df0
RS
3981# Add to FLAGS all the target-specific flags needed to access the c99 runtime.
3982
3983proc add_options_for_c99_runtime { flags } {
3984 if { [istarget *-*-solaris2*] } {
3985 return "$flags -std=c99"
3986 }
67b6839f
RO
3987 if { [istarget mips-sgi-irix6.5*] } {
3988 return "$flags -std=c99"
3989 }
db9a0df0
RS
3990 if { [istarget powerpc-*-darwin*] } {
3991 return "$flags -mmacosx-version-min=10.3"
3992 }
3993 return $flags
3994}
1018b4c3 3995
8ceabd25
UB
3996# Add to FLAGS all the target-specific flags needed to enable
3997# full IEEE compliance mode.
3998
3999proc add_options_for_ieee { flags } {
19073ebc
UB
4000 if { [istarget alpha*-*-*]
4001 || [istarget sh*-*-*] } {
8ceabd25
UB
4002 return "$flags -mieee"
4003 }
19073ebc 4004 if { [istarget rx-*-*] } {
7036ee24
NC
4005 return "$flags -mnofpu"
4006 }
8ceabd25
UB
4007 return $flags
4008}
4009
fc5e3cd4
KG
4010# Add to FLAGS the flags needed to enable functions to bind locally
4011# when using pic/PIC passes in the testsuite.
4012
4013proc add_options_for_bind_pic_locally { flags } {
4014 if {[check_no_compiler_messages using_pic2 assembly {
4015 #if __PIC__ != 2
4016 #error FOO
4017 #endif
4018 }]} {
4019 return "$flags -fPIE"
4020 }
4021 if {[check_no_compiler_messages using_pic1 assembly {
4022 #if __PIC__ != 1
4023 #error FOO
4024 #endif
4025 }]} {
4026 return "$flags -fpie"
4027 }
4028
4029 return $flags
4030}
4031
8f40ccea 4032# Add to FLAGS the flags needed to enable 64-bit vectors.
c452684d 4033
8f40ccea 4034proc add_options_for_double_vectors { flags } {
c452684d 4035 if [is-effective-target arm_neon_ok] {
8f40ccea 4036 return "$flags -mvectorize-with-neon-double"
c452684d
JB
4037 }
4038
4039 return $flags
4040}
4041
1018b4c3
RS
4042# Return 1 if the target provides a full C99 runtime.
4043
4044proc check_effective_target_c99_runtime { } {
4045 return [check_cached_effective_target c99_runtime {
4046 global srcdir
4047
4048 set file [open "$srcdir/gcc.dg/builtins-config.h"]
4049 set contents [read $file]
4050 close $file
4051 append contents {
4052 #ifndef HAVE_C99_RUNTIME
4053 #error FOO
4054 #endif
4055 }
0ffd38c8
RS
4056 check_no_compiler_messages_nocache c99_runtime assembly \
4057 $contents [add_options_for_c99_runtime ""]
1018b4c3
RS
4058 }]
4059}
ab1cde23
DS
4060
4061# Return 1 if target wchar_t is at least 4 bytes.
4062
4063proc check_effective_target_4byte_wchar_t { } {
4064 return [check_no_compiler_messages 4byte_wchar_t object {
a6ce2774 4065 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
ab1cde23
DS
4066 }]
4067}
3b2488ca
L
4068
4069# Return 1 if the target supports automatic stack alignment.
4070
4071proc check_effective_target_automatic_stack_alignment { } {
cc825d98
RH
4072 # Ordinarily x86 supports automatic stack alignment ...
4073 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
4074 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
4075 # ... except Win64 SEH doesn't. Succeed for Win32 though.
4076 return [check_effective_target_ilp32];
4077 }
4078 return 1;
4079 }
4080 return 0;
3b2488ca 4081}
d6beb90e
XG
4082
4083# Return 1 if avx instructions can be compiled.
4084
4085proc check_effective_target_avx { } {
4086 return [check_no_compiler_messages avx object {
4087 void _mm256_zeroall (void)
4088 {
4089 __builtin_ia32_vzeroall ();
4090 }
4091 } "-O2 -mavx" ]
4092}
1b829d45 4093
ae6a0535
RO
4094# Return 1 if sse instructions can be compiled.
4095proc check_effective_target_sse { } {
4096 return [check_no_compiler_messages sse object {
4097 int main ()
4098 {
4099 __builtin_ia32_stmxcsr ();
4100 return 0;
4101 }
4102 } "-O2 -msse" ]
4103}
4104
40f1bdd9
RO
4105# Return 1 if sse2 instructions can be compiled.
4106proc check_effective_target_sse2 { } {
4107 return [check_no_compiler_messages sse2 object {
4108 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
4109
4110 __m128i _mm_srli_si128 (__m128i __A, int __N)
4111 {
4112 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
4113 }
4114 } "-O2 -msse2" ]
4115}
4116
4ee89d5f
L
4117# Return 1 if F16C instructions can be compiled.
4118
4119proc check_effective_target_f16c { } {
4120 return [check_no_compiler_messages f16c object {
4121 #include "immintrin.h"
4122 float
4123 foo (unsigned short val)
4124 {
4125 return _cvtsh_ss (val);
4126 }
4127 } "-O2 -mf16c" ]
4128}
4129
1b829d45
JJ
4130# Return 1 if C wchar_t type is compatible with char16_t.
4131
4132proc check_effective_target_wchar_t_char16_t_compatible { } {
4133 return [check_no_compiler_messages wchar_t_char16_t object {
4134 __WCHAR_TYPE__ wc;
4135 __CHAR16_TYPE__ *p16 = &wc;
4136 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
4137 }]
4138}
4139
4140# Return 1 if C wchar_t type is compatible with char32_t.
4141
4142proc check_effective_target_wchar_t_char32_t_compatible { } {
4143 return [check_no_compiler_messages wchar_t_char32_t object {
4144 __WCHAR_TYPE__ wc;
4145 __CHAR32_TYPE__ *p32 = &wc;
4146 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
4147 }]
4148}
8179c2f2
SE
4149
4150# Return 1 if pow10 function exists.
4151
4152proc check_effective_target_pow10 { } {
4153 return [check_runtime pow10 {
4154 #include <math.h>
4155 int main () {
4156 double x;
4157 x = pow10 (1);
4158 return 0;
4159 }
4160 } "-lm" ]
4161}
4f809983
JJ
4162
4163# Return 1 if current options generate DFP instructions, 0 otherwise.
4164
4165proc check_effective_target_hard_dfp {} {
4166 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
a9ab39d3
JJ
4167 typedef float d64 __attribute__((mode(DD)));
4168 d64 x, y, z;
4f809983
JJ
4169 void foo (void) { z = x + y; }
4170 }]
4171}
43014633
JJ
4172
4173# Return 1 if string.h and wchar.h headers provide C++ requires overloads
4174# for strchr etc. functions.
4175
4176proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
4177 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
4178 #include <string.h>
4179 #include <wchar.h>
4180 #if !defined(__cplusplus) \
4181 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
4182 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
4183 ISO C++ correct string.h and wchar.h protos not supported.
4184 #else
4185 int i;
4186 #endif
4187 }]
4188}
16a3d11c 4189
659b24d6
RO
4190# Return 1 if GNU as is used.
4191
4192proc check_effective_target_gas { } {
4193 global use_gas_saved
4194 global tool
4195
4196 if {![info exists use_gas_saved]} {
4197 # Check if the as used by gcc is GNU as.
4198 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
4199 # Provide /dev/null as input, otherwise gas times out reading from
4200 # stdin.
4201 set status [remote_exec host "$gcc_as" "-v /dev/null"]
4202 set as_output [lindex $status 1]
4203 if { [ string first "GNU" $as_output ] >= 0 } {
4204 set use_gas_saved 1
4205 } else {
4206 set use_gas_saved 0
4207 }
4208 }
4209 return $use_gas_saved
4210}
4211
14a393a3
RO
4212# Return 1 if GNU ld is used.
4213
4214proc check_effective_target_gld { } {
4215 global use_gld_saved
4216 global tool
4217
4218 if {![info exists use_gld_saved]} {
4219 # Check if the ld used by gcc is GNU ld.
4220 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
4221 set status [remote_exec host "$gcc_ld" "--version"]
4222 set ld_output [lindex $status 1]
4223 if { [ string first "GNU" $ld_output ] >= 0 } {
4224 set use_gld_saved 1
4225 } else {
4226 set use_gld_saved 0
4227 }
4228 }
4229 return $use_gld_saved
4230}
4231
d7f09764
DN
4232# Return 1 if the compiler has been configure with link-time optimization
4233# (LTO) support.
4234
4235proc check_effective_target_lto { } {
4236 global ENABLE_LTO
4237 return [info exists ENABLE_LTO]
4238}
4239
7458026b
ILT
4240# Return 1 if this target supports the -fsplit-stack option, 0
4241# otherwise.
4242
4243proc check_effective_target_split_stack {} {
4244 return [check_no_compiler_messages split_stack object {
4245 void foo (void) { }
4246 } "-fsplit-stack"]
4247}
4248
812a5d4b
MLI
4249# Return 1 if the language for the compiler under test is C.
4250
4251proc check_effective_target_c { } {
4252 global tool
4253 if [string match $tool "gcc"] {
4254 return 1
4255 }
4256 return 0
4257}
4258
4259# Return 1 if the language for the compiler under test is C++.
4260
4261proc check_effective_target_c++ { } {
4262 global tool
4263 if [string match $tool "g++"] {
4264 return 1
4265 }
4266 return 0
4267}
0fa3d594 4268
e399136a
JM
4269# Check which language standard is active by checking for the presence of
4270# one of the C++11 -std flags. This assumes that the default for the
4271# compiler is C++98, and that there will never be multiple -std= arguments
4272# on the command line.
4273proc check_effective_target_c++11 { } {
4274 if ![check_effective_target_c++] {
4275 return 0
4276 }
4277 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
4278}
4279
4280proc check_effective_target_c++98 { } {
4281 if ![check_effective_target_c++] {
4282 return 0
4283 }
4284 return [check-flags { { } { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
4285}
4286
0fa3d594
RO
4287# Return 1 if expensive testcases should be run.
4288
4289proc check_effective_target_run_expensive_tests { } {
4290 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
4291 return 1
4292 }
4293 return 0
4294}
8d598c74
SE
4295
4296# Returns 1 if "mempcpy" is available on the target system.
4297
4298proc check_effective_target_mempcpy {} {
4299 return [check_function_available "mempcpy"]
4300}
9a31f6a3
UB
4301
4302# Check whether the vectorizer tests are supported by the target and
4303# append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
4304# Set dg-do-what-default to either compile or run, depending on target
4305# capabilities. Return 1 if vectorizer tests are supported by
4306# target, 0 otherwise.
4307
4308proc check_vect_support_and_set_flags { } {
4309 global DEFAULT_VECTCFLAGS
4310 global dg-do-what-default
4311
19073ebc 4312 if [istarget powerpc-*paired*] {
9a31f6a3
UB
4313 lappend DEFAULT_VECTCFLAGS "-mpaired"
4314 if [check_750cl_hw_available] {
4315 set dg-do-what-default run
4316 } else {
4317 set dg-do-what-default compile
4318 }
19073ebc 4319 } elseif [istarget powerpc*-*-*] {
9a31f6a3
UB
4320 # Skip targets not supporting -maltivec.
4321 if ![is-effective-target powerpc_altivec_ok] {
4322 return 0
4323 }
4324
4325 lappend DEFAULT_VECTCFLAGS "-maltivec"
19073ebc 4326 if [check_vsx_hw_available] {
9a31f6a3
UB
4327 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
4328 }
4329
4330 if [check_vmx_hw_available] {
4331 set dg-do-what-default run
4332 } else {
4333 if [is-effective-target ilp32] {
4334 # Specify a cpu that supports VMX for compile-only tests.
4335 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
4336 }
4337 set dg-do-what-default compile
4338 }
19073ebc 4339 } elseif { [istarget spu-*-*] } {
9a31f6a3 4340 set dg-do-what-default run
19073ebc 4341 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9a31f6a3
UB
4342 lappend DEFAULT_VECTCFLAGS "-msse2"
4343 if { [check_effective_target_sse2_runtime] } {
4344 set dg-do-what-default run
4345 } else {
4346 set dg-do-what-default compile
4347 }
19073ebc 4348 } elseif { [istarget mips*-*-*]
9a31f6a3
UB
4349 && ([check_effective_target_mpaired_single]
4350 || [check_effective_target_mips_loongson])
4351 && [check_effective_target_nomips16] } {
4352 if { [check_effective_target_mpaired_single] } {
4353 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
4354 }
4355 set dg-do-what-default run
19073ebc 4356 } elseif [istarget sparc*-*-*] {
9a31f6a3
UB
4357 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
4358 if [check_effective_target_ultrasparc_hw] {
4359 set dg-do-what-default run
4360 } else {
4361 set dg-do-what-default compile
4362 }
19073ebc 4363 } elseif [istarget alpha*-*-*] {
9a31f6a3
UB
4364 # Alpha's vectorization capabilities are extremely limited.
4365 # It's more effort than its worth disabling all of the tests
4366 # that it cannot pass. But if you actually want to see what
4367 # does work, command out the return.
4368 return 0
4369
4370 lappend DEFAULT_VECTCFLAGS "-mmax"
4371 if [check_alpha_max_hw_available] {
4372 set dg-do-what-default run
4373 } else {
4374 set dg-do-what-default compile
4375 }
19073ebc 4376 } elseif [istarget ia64-*-*] {
9a31f6a3
UB
4377 set dg-do-what-default run
4378 } elseif [is-effective-target arm_neon_ok] {
4379 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
4380 # NEON does not support denormals, so is not used for vectorization by
4381 # default to avoid loss of precision. We must pass -ffast-math to test
4382 # vectorization of float operations.
4383 lappend DEFAULT_VECTCFLAGS "-ffast-math"
4384 if [is-effective-target arm_neon_hw] {
4385 set dg-do-what-default run
4386 } else {
4387 set dg-do-what-default compile
4388 }
4389 } else {
4390 return 0
4391 }
4392
4393 return 1
4394}
4395
4ff10c0e
JJ
4396proc check_effective_target_non_strict_align {} {
4397 return [check_no_compiler_messages non_strict_align assembly {
4398 char *y;
4399 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
4400 c *z;
4401 void foo(void) { z = (c *) y; }
4402 } "-Wcast-align"]
4403}
e14304ef
ILT
4404
4405# Return 1 if the target has <ucontext.h>.
4406
4407proc check_effective_target_ucontext_h { } {
4408 return [check_no_compiler_messages ucontext_h assembly {
4409 #include <ucontext.h>
4410 }]
4411}