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1# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
2# 2011 Free Software Foundation, Inc.
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3
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License as published by
cd976c16 6# the Free Software Foundation; either version 3 of the License, or
71152e6d 7# (at your option) any later version.
21526606 8#
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9# This program is distributed in the hope that it will be useful,
10# but WITHOUT ANY WARRANTY; without even the implied warranty of
11# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12# GNU General Public License for more details.
21526606 13#
71152e6d 14# You should have received a copy of the GNU General Public License
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NC
15# along with GCC; see the file COPYING3. If not see
16# <http://www.gnu.org/licenses/>.
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17
18# Please email any bugs, comments, and/or additions to this file to:
19# gcc-patches@gcc.gnu.org
20
21# This file defines procs for determining features supported by the target.
22
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23# Try to compile the code given by CONTENTS into an output file of
24# type TYPE, where TYPE is as for target_compile. Return a list
25# whose first element contains the compiler messages and whose
26# second element is the name of the output file.
b6dc500c 27#
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28# BASENAME is a prefix to use for source and output files.
29# If ARGS is not empty, its first element is a string that
30# should be added to the command line.
31#
9debda96
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32# Assume by default that CONTENTS is C code.
33# Otherwise, code should contain:
34# "// C++" for c++,
35# "! Fortran" for Fortran code,
36# "/* ObjC", for ObjC
7a938933
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37# "// ObjC++" for ObjC++
38# and "// Go" for Go
9debda96
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39# If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
40# allow for ObjC/ObjC++ specific flags.
0ffd38c8 41proc check_compile {basename type contents args} {
b6dc500c 42 global tool
9debda96 43 verbose "check_compile tool: $tool for $basename"
b6dc500c 44
b6e3f572 45 if { [llength $args] > 0 } {
c03b9206 46 set options [list "additional_flags=[lindex $args 0]"]
b6e3f572
HPN
47 } else {
48 set options ""
49 }
0ffd38c8
RS
50 switch -glob -- $contents {
51 "*! Fortran*" { set src ${basename}[pid].f90 }
52 "*// C++*" { set src ${basename}[pid].cc }
9debda96
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53 "*// ObjC++*" { set src ${basename}[pid].mm }
54 "*/* ObjC*" { set src ${basename}[pid].m }
7a938933 55 "*// Go*" { set src ${basename}[pid].go }
9debda96
IS
56 default {
57 switch -- $tool {
58 "objc" { set src ${basename}[pid].m }
59 "obj-c++" { set src ${basename}[pid].mm }
60 default { set src ${basename}[pid].c }
61 }
62 }
0ffd38c8 63 }
9debda96 64
ca8b555b
HPN
65 set compile_type $type
66 switch -glob $type {
b6dc500c
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67 assembly { set output ${basename}[pid].s }
68 object { set output ${basename}[pid].o }
0ffd38c8 69 executable { set output ${basename}[pid].exe }
ca8b555b
HPN
70 "rtl-*" {
71 set output ${basename}[pid].s
72 lappend options "additional_flags=-fdump-$type"
73 set compile_type assembly
74 }
b6dc500c
JJ
75 }
76 set f [open $src "w"]
77 puts $f $contents
78 close $f
ca8b555b 79 set lines [${tool}_target_compile $src $output $compile_type "$options"]
b6dc500c 80 file delete $src
b6dc500c 81
ca8b555b
HPN
82 set scan_output $output
83 # Don't try folding this into the switch above; calling "glob" before the
84 # file is created won't work.
85 if [regexp "rtl-(.*)" $type dummy rtl_type] {
86 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
87 file delete $output
88 }
89
90 return [list $lines $scan_output]
b6dc500c
JJ
91}
92
635b0f2a
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93proc current_target_name { } {
94 global target_info
95 if [info exists target_info(target,name)] {
96 set answer $target_info(target,name)
97 } else {
98 set answer ""
99 }
100 return $answer
101}
102
8ce1ac69 103# Implement an effective-target check for property PROP by invoking
1018b4c3
RS
104# the Tcl command ARGS and seeing if it returns true.
105
106proc check_cached_effective_target { prop args } {
8ce1ac69
RS
107 global et_cache
108
109 set target [current_target_name]
110 if {![info exists et_cache($prop,target)]
111 || $et_cache($prop,target) != $target} {
1018b4c3 112 verbose "check_cached_effective_target $prop: checking $target" 2
19450f2b 113 set et_cache($prop,target) $target
1018b4c3 114 set et_cache($prop,value) [uplevel eval $args]
19450f2b
DJ
115 }
116 set value $et_cache($prop,value)
1018b4c3 117 verbose "check_cached_effective_target $prop: returning $value for $target" 2
19450f2b
DJ
118 return $value
119}
120
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121# Like check_compile, but delete the output file and return true if the
122# compiler printed no messages.
123proc check_no_compiler_messages_nocache {args} {
124 set result [eval check_compile $args]
125 set lines [lindex $result 0]
126 set output [lindex $result 1]
127 remote_file build delete $output
128 return [string match "" $lines]
129}
130
131# Like check_no_compiler_messages_nocache, but cache the result.
132# PROP is the property we're checking, and doubles as a prefix for
133# temporary filenames.
1018b4c3
RS
134proc check_no_compiler_messages {prop args} {
135 return [check_cached_effective_target $prop {
0ffd38c8 136 eval [list check_no_compiler_messages_nocache $prop] $args
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RS
137 }]
138}
139
0ffd38c8
RS
140# Like check_compile, but return true if the compiler printed no
141# messages and if the contents of the output file satisfy PATTERN.
142# If PATTERN has the form "!REGEXP", the contents satisfy it if they
143# don't match regular expression REGEXP, otherwise they satisfy it
144# if they do match regular expression PATTERN. (PATTERN can start
145# with something like "[!]" if the regular expression needs to match
146# "!" as the first character.)
147#
148# Delete the output file before returning. The other arguments are
149# as for check_compile.
150proc check_no_messages_and_pattern_nocache {basename pattern args} {
151 global tool
152
153 set result [eval [list check_compile $basename] $args]
154 set lines [lindex $result 0]
155 set output [lindex $result 1]
156
157 set ok 0
158 if { [string match "" $lines] } {
159 set chan [open "$output"]
160 set invert [regexp {^!(.*)} $pattern dummy pattern]
161 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
162 close $chan
163 }
164
165 remote_file build delete $output
166 return $ok
167}
168
169# Like check_no_messages_and_pattern_nocache, but cache the result.
170# PROP is the property we're checking, and doubles as a prefix for
171# temporary filenames.
19450f2b 172proc check_no_messages_and_pattern {prop pattern args} {
1018b4c3 173 return [check_cached_effective_target $prop {
0ffd38c8
RS
174 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
175 }]
176}
177
178# Try to compile and run an executable from code CONTENTS. Return true
179# if the compiler reports no messages and if execution "passes" in the
180# usual DejaGNU sense. The arguments are as for check_compile, with
181# TYPE implicitly being "executable".
182proc check_runtime_nocache {basename contents args} {
183 global tool
184
185 set result [eval [list check_compile $basename executable $contents] $args]
186 set lines [lindex $result 0]
187 set output [lindex $result 1]
188
189 set ok 0
190 if { [string match "" $lines] } {
191 # No error messages, everything is OK.
192 set result [remote_load target "./$output" "" ""]
193 set status [lindex $result 0]
194 verbose "check_runtime_nocache $basename: status is <$status>" 2
195 if { $status == "pass" } {
196 set ok 1
197 }
198 }
199 remote_file build delete $output
200 return $ok
201}
202
203# Like check_runtime_nocache, but cache the result. PROP is the
204# property we're checking, and doubles as a prefix for temporary
205# filenames.
206proc check_runtime {prop args} {
207 global tool
208
209 return [check_cached_effective_target $prop {
210 eval [list check_runtime_nocache $prop] $args
1018b4c3 211 }]
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RS
212}
213
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214###############################
215# proc check_weak_available { }
216###############################
217
218# weak symbols are only supported in some configs/object formats
219# this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
220
221proc check_weak_available { } {
222 global target_cpu
223
224 # All mips targets should support it
21526606 225
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226 if { [ string first "mips" $target_cpu ] >= 0 } {
227 return 1
228 }
229
fa4211cb 230 # All solaris2 targets should support it
21526606 231
19073ebc 232 if { [istarget *-*-solaris2*] } {
fa4211cb
KG
233 return 1
234 }
235
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236 # DEC OSF/1/Digital UNIX/Tru64 UNIX supports it
237
19073ebc 238 if { [istarget alpha*-dec-osf*] } {
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239 return 1
240 }
241
c37780f5
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242 # Windows targets Cygwin and MingW32 support it
243
19073ebc 244 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
c37780f5
AL
245 return 1
246 }
247
6731e86d
JDA
248 # HP-UX 10.X doesn't support it
249
19073ebc 250 if { [istarget hppa*-*-hpux10*] } {
6731e86d
JDA
251 return 0
252 }
253
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NC
254 # ELF and ECOFF support it. a.out does with gas/gld but may also with
255 # other linkers, so we should try it
256
257 set objformat [gcc_target_object_format]
258
259 switch $objformat {
260 elf { return 1 }
261 ecoff { return 1 }
262 a.out { return 1 }
98f61f57 263 mach-o { return 1 }
6731e86d 264 som { return 1 }
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NC
265 unknown { return -1 }
266 default { return 0 }
267 }
268}
269
8a0963c3
JM
270###############################
271# proc check_weak_override_available { }
272###############################
273
274# Like check_weak_available, but return 0 if weak symbol definitions
275# cannot be overridden.
276
277proc check_weak_override_available { } {
19073ebc 278 if { [istarget *-*-mingw*] } {
8a0963c3
JM
279 return 0
280 }
281 return [check_weak_available]
282}
283
facef326 284###############################
d3d9a67f 285# proc check_visibility_available { what_kind }
facef326
MA
286###############################
287
288# The visibility attribute is only support in some object formats
79c70e5a 289# This proc returns 1 if it is supported, 0 if not.
d3d9a67f 290# The argument is the kind of visibility, default/protected/hidden/internal.
facef326 291
d3d9a67f 292proc check_visibility_available { what_kind } {
d3d9a67f
GK
293 if [string match "" $what_kind] { set what_kind "hidden" }
294
8ce1ac69 295 return [check_no_compiler_messages visibility_available_$what_kind object "
d3d9a67f
GK
296 void f() __attribute__((visibility(\"$what_kind\")));
297 void f() {}
298 "]
facef326
MA
299}
300
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NC
301###############################
302# proc check_alias_available { }
303###############################
304
305# Determine if the target toolchain supports the alias attribute.
71152e6d 306
b4e0fcc3
MM
307# Returns 2 if the target supports aliases. Returns 1 if the target
308# only supports weak aliased. Returns 0 if the target does not
309# support aliases at all. Returns -1 if support for aliases could not
310# be determined.
311
312proc check_alias_available { } {
71152e6d 313 global alias_available_saved
bfa21a28
MM
314 global tool
315
71152e6d
NC
316 if [info exists alias_available_saved] {
317 verbose "check_alias_available returning saved $alias_available_saved" 2
318 } else {
8dc84ef1
JJ
319 set src alias[pid].c
320 set obj alias[pid].o
321 verbose "check_alias_available compiling testfile $src" 2
322 set f [open $src "w"]
3348ded5
MM
323 # Compile a small test program. The definition of "g" is
324 # necessary to keep the Solaris assembler from complaining
325 # about the program.
54a47870 326 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
3348ded5 327 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
b4e0fcc3 328 close $f
8dc84ef1
JJ
329 set lines [${tool}_target_compile $src $obj object ""]
330 file delete $src
331 remote_file build delete $obj
b4e0fcc3 332
71152e6d
NC
333 if [string match "" $lines] then {
334 # No error messages, everything is OK.
b4e0fcc3 335 set alias_available_saved 2
71152e6d
NC
336 } else {
337 if [regexp "alias definitions not supported" $lines] {
338 verbose "check_alias_available target does not support aliases" 2
339
340 set objformat [gcc_target_object_format]
341
342 if { $objformat == "elf" } {
343 verbose "check_alias_available but target uses ELF format, so it ought to" 2
b4e0fcc3 344 set alias_available_saved -1
71152e6d 345 } else {
b4e0fcc3 346 set alias_available_saved 0
71152e6d
NC
347 }
348 } else {
9ef6d39a
JO
349 if [regexp "only weak aliases are supported" $lines] {
350 verbose "check_alias_available target supports only weak aliases" 2
b4e0fcc3 351 set alias_available_saved 1
9ef6d39a 352 } else {
b4e0fcc3 353 set alias_available_saved -1
9ef6d39a 354 }
71152e6d
NC
355 }
356 }
21526606 357
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NC
358 verbose "check_alias_available returning $alias_available_saved" 2
359 }
360
361 return $alias_available_saved
362}
b4e0fcc3 363
ba885ec5
NS
364###############################
365# proc check_ifunc_available { }
366###############################
367
f6c5fbfd 368# Determine if the target toolchain supports the ifunc attribute.
ba885ec5 369
f6c5fbfd
NS
370# Returns 1 if the target supports ifunc. Returns 0 if the target
371# does not support ifunc.
ba885ec5
NS
372
373proc check_ifunc_available { } {
374 global ifunc_available_saved
375 global tool
376
377 if [info exists ifunc_available_saved] {
378 verbose "check_ifunc_available returning saved $ifunc_available_saved" 2
379 } else {
380 set src ifunc[pid].c
381 set obj ifunc[pid].o
382 verbose "check_ifunc_available compiling testfile $src" 2
383 set f [open $src "w"]
f6c5fbfd
NS
384 puts $f "#endif"
385 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif"
386 puts $f "void g() {}"
387 puts $f "void f() __attribute__((ifunc(\"g\")));"
ba885ec5
NS
388 close $f
389 set lines [${tool}_target_compile $src $obj object ""]
390 file delete $src
391 remote_file build delete $obj
392
393 if [string match "" $lines] then {
f6c5fbfd 394 set ifunc_available_saved 1
ba885ec5 395 } else {
f6c5fbfd 396 set ifunc_available_saved 0
ba885ec5
NS
397 }
398
399 verbose "check_ifunc_available returning $ifunc_available_saved" 2
400 }
401
402 return $ifunc_available_saved
403}
404
b4e0fcc3
MM
405# Returns true if --gc-sections is supported on the target.
406
407proc check_gc_sections_available { } {
408 global gc_sections_available_saved
bfa21a28 409 global tool
b4e0fcc3 410
4293f7cb 411 if {![info exists gc_sections_available_saved]} {
8138dfe4
RH
412 # Some targets don't support gc-sections despite whatever's
413 # advertised by ld's options.
414 if { [istarget alpha*-*-*]
415 || [istarget ia64-*-*] } {
416 set gc_sections_available_saved 0
417 return 0
418 }
419
fd86239d
KH
420 # elf2flt uses -q (--emit-relocs), which is incompatible with
421 # --gc-sections.
422 if { [board_info target exists ldflags]
423 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
424 set gc_sections_available_saved 0
425 return 0
426 }
427
75873b87
RS
428 # VxWorks kernel modules are relocatable objects linked with -r,
429 # while RTP executables are linked with -q (--emit-relocs).
430 # Both of these options are incompatible with --gc-sections.
431 if { [istarget *-*-vxworks*] } {
432 set gc_sections_available_saved 0
433 return 0
434 }
435
b4e0fcc3 436 # Check if the ld used by gcc supports --gc-sections.
61fec9ff 437 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
45456220 438 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
61fec9ff 439 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
b4e0fcc3
MM
440 set ld_output [remote_exec host "$gcc_ld" "--help"]
441 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
442 set gc_sections_available_saved 1
443 } else {
444 set gc_sections_available_saved 0
445 }
446 }
447 return $gc_sections_available_saved
448}
b8ee7f02 449
a21f9a56
AH
450# Return 1 if according to target_info struct and explicit target list
451# target is supposed to support trampolines.
452
453proc check_effective_target_trampolines { } {
454 if [target_info exists no_trampolines] {
455 return 0
456 }
457 if { [istarget avr-*-*]
458 || [istarget hppa2.0w-hp-hpux11.23]
459 || [istarget hppa64-hp-hpux11.23] } {
460 return 0;
461 }
462 return 1
463}
464
ad0dc07d
AH
465# Return 1 if according to target_info struct and explicit target list
466# target is supposed to keep null pointer checks. This could be due to
467# use of option fno-delete-null-pointer-checks or hardwired in target.
468
469proc check_effective_target_keeps_null_pointer_checks { } {
470 if [target_info exists keeps_null_pointer_checks] {
471 return 1
472 }
473 if { [istarget avr-*-*] } {
474 return 1;
475 }
476 return 0
477}
478
b8ee7f02
MM
479# Return true if profiling is supported on the target.
480
0d856ba2 481proc check_profiling_available { test_what } {
b8ee7f02
MM
482 global profiling_available_saved
483
0d856ba2
KG
484 verbose "Profiling argument is <$test_what>" 1
485
486 # These conditions depend on the argument so examine them before
487 # looking at the cache variable.
488
3f5cb251
RO
489 # Tree profiling requires TLS runtime support.
490 if { $test_what == "-fprofile-generate" } {
c8ecdaba
GJL
491 # AVR does not support profile generation because
492 # it does not implement needed support functions.
493 if { [istarget avr-*-*] } {
494 return 0
495 }
3f5cb251
RO
496 return [check_effective_target_tls_runtime]
497 }
498
0d856ba2
KG
499 # Support for -p on solaris2 relies on mcrt1.o which comes with the
500 # vendor compiler. We cannot reliably predict the directory where the
501 # vendor compiler (and thus mcrt1.o) is installed so we can't
502 # necessarily find mcrt1.o even if we have it.
3f5cb251 503 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
0d856ba2
KG
504 return 0
505 }
506
507 # Support for -p on irix relies on libprof1.a which doesn't appear to
508 # exist on any irix6 system currently posting testsuite results.
509 # Support for -pg on irix relies on gcrt1.o which doesn't exist yet.
510 # See: http://gcc.gnu.org/ml/gcc/2002-10/msg00169.html
21526606 511 if { [istarget mips*-*-irix*]
3f5cb251 512 && ($test_what == "-p" || $test_what == "-pg") } {
0d856ba2 513 return 0
08d0963a
RS
514 }
515
516 # We don't yet support profiling for MIPS16.
517 if { [istarget mips*-*-*]
518 && ![check_effective_target_nomips16]
3f5cb251 519 && ($test_what == "-p" || $test_what == "-pg") } {
08d0963a 520 return 0
0d856ba2
KG
521 }
522
6a5e6663 523 # MinGW does not support -p.
3f5cb251 524 if { [istarget *-*-mingw*] && $test_what == "-p" } {
6a5e6663
JM
525 return 0
526 }
527
b7a0af68 528 # cygwin does not support -p.
3f5cb251 529 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
b7a0af68
DB
530 return 0
531 }
532
50f324bb
JM
533 # uClibc does not have gcrt1.o.
534 if { [check_effective_target_uclibc]
3f5cb251 535 && ($test_what == "-p" || $test_what == "-pg") } {
50f324bb 536 return 0
345f13fe
JB
537 }
538
0d856ba2 539 # Now examine the cache variable.
b8ee7f02
MM
540 if {![info exists profiling_available_saved]} {
541 # Some targets don't have any implementation of __bb_init_func or are
542 # missing other needed machinery.
0d8c8b1b 543 if { [istarget am3*-*-linux*]
2e32707b 544 || [istarget arm*-*-eabi*]
b8ee7f02 545 || [istarget arm*-*-elf]
2e32707b 546 || [istarget arm*-*-symbianelf*]
a21f9a56 547 || [istarget avr-*-*]
d5b7e972 548 || [istarget bfin-*-*]
b8ee7f02 549 || [istarget cris-*-*]
c7e30cf2 550 || [istarget crisv32-*-*]
da3ce502 551 || [istarget fido-*-elf]
21526606 552 || [istarget h8300-*-*]
0d8c8b1b
NC
553 || [istarget lm32-*-*]
554 || [istarget m32c-*-elf]
e3860a7d 555 || [istarget m68k-*-elf]
f8b45d4f 556 || [istarget m68k-*-uclinux*]
7acf4da6 557 || [istarget mep-*-elf]
37632195 558 || [istarget mips*-*-elf*]
0d8c8b1b
NC
559 || [istarget mmix-*-*]
560 || [istarget mn10300-*-elf*]
cceb575c 561 || [istarget moxie-*-elf*]
0d8c8b1b
NC
562 || [istarget picochip-*-*]
563 || [istarget powerpc-*-eabi*]
564 || [istarget powerpc-*-elf]
65a324b4 565 || [istarget rx-*-*]
294689c4 566 || [istarget tic6x-*-elf]
400d7a82 567 || [istarget xstormy16-*]
6d656178 568 || [istarget xtensa*-*-elf]
3ce1b2de 569 || [istarget *-*-rtems*]
cd985f66 570 || [istarget *-*-vxworks*] } {
b8ee7f02
MM
571 set profiling_available_saved 0
572 } else {
573 set profiling_available_saved 1
574 }
575 }
21526606 576
b8ee7f02
MM
577 return $profiling_available_saved
578}
21526606 579
7c280c72
HS
580# Check to see if a target is "freestanding". This is as per the definition
581# in Section 4 of C99 standard. Effectively, it is a target which supports no
582# extra headers or libraries other than what is considered essential.
583proc check_effective_target_freestanding { } {
584 if { [istarget picochip-*-*] } then {
585 return 1
586 } else {
587 return 0
588 }
589}
590
aa5c7673
HPN
591# Return 1 if target has packed layout of structure members by
592# default, 0 otherwise. Note that this is slightly different than
593# whether the target has "natural alignment": both attributes may be
594# false.
595
596proc check_effective_target_default_packed { } {
8ce1ac69
RS
597 return [check_no_compiler_messages default_packed assembly {
598 struct x { char a; long b; } c;
599 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
600 }]
aa5c7673
HPN
601}
602
edc5687e
HPN
603# Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
604# documentation, where the test also comes from.
605
606proc check_effective_target_pcc_bitfield_type_matters { } {
8ce1ac69
RS
607 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
608 # bitfields, but let's stick to the example code from the docs.
609 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
610 struct foo1 { char x; char :0; char y; };
611 struct foo2 { char x; int :0; char y; };
612 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
613 }]
edc5687e
HPN
614}
615
16c9d3b1
RO
616# Add to FLAGS all the target-specific flags needed to use thread-local storage.
617
618proc add_options_for_tls { flags } {
3451f439
RO
619 # Tru64 UNIX uses emutls, which relies on a couple of pthread functions
620 # which only live in libpthread, so always pass -pthread for TLS.
19073ebc 621 if { [istarget alpha*-dec-osf*] } {
3451f439
RO
622 return "$flags -pthread"
623 }
16c9d3b1
RO
624 # On Solaris 8 and 9, __tls_get_addr/___tls_get_addr only lives in
625 # libthread, so always pass -pthread for native TLS.
626 # Need to duplicate native TLS check from
627 # check_effective_target_tls_native to avoid recursion.
628 if { [istarget *-*-solaris2.\[89\]*] &&
629 [check_no_messages_and_pattern tls_native "!emutls" assembly {
630 __thread int i;
631 int f (void) { return i; }
632 void g (int j) { i = j; }
633 }] } {
634 return "$flags -pthread"
635 }
636 return $flags
637}
638
19bfb936 639# Return 1 if thread local storage (TLS) is supported, 0 otherwise.
ada80067
UB
640
641proc check_effective_target_tls {} {
0ffd38c8
RS
642 return [check_no_compiler_messages tls assembly {
643 __thread int i;
644 int f (void) { return i; }
645 void g (int j) { i = j; }
646 }]
19bfb936
SL
647}
648
649# Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
19bfb936
SL
650
651proc check_effective_target_tls_native {} {
feb60f03
NS
652 # VxWorks uses emulated TLS machinery, but with non-standard helper
653 # functions, so we fail to automatically detect it.
19073ebc 654 if { [istarget *-*-vxworks*] } {
feb60f03
NS
655 return 0
656 }
657
89a8fea0 658 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
0ffd38c8
RS
659 __thread int i;
660 int f (void) { return i; }
661 void g (int j) { i = j; }
662 }]
ada80067
UB
663}
664
63d90a96
IS
665# Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
666
667proc check_effective_target_tls_emulated {} {
668 # VxWorks uses emulated TLS machinery, but with non-standard helper
669 # functions, so we fail to automatically detect it.
19073ebc 670 if { [istarget *-*-vxworks*] } {
63d90a96
IS
671 return 1
672 }
673
674 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
675 __thread int i;
676 int f (void) { return i; }
677 void g (int j) { i = j; }
678 }]
679}
680
ada80067 681# Return 1 if TLS executables can run correctly, 0 otherwise.
ada80067
UB
682
683proc check_effective_target_tls_runtime {} {
0ffd38c8
RS
684 return [check_runtime tls_runtime {
685 __thread int thr = 0;
686 int main (void) { return thr; }
87d426f8 687 } [add_options_for_tls ""]]
ada80067
UB
688}
689
257f5167
IS
690# Return 1 if -ffunction-sections is supported, 0 otherwise.
691
692proc check_effective_target_function_sections {} {
693 # Darwin has its own scheme and silently accepts -ffunction-sections.
19073ebc 694 if { [istarget *-*-darwin*] } {
257f5167
IS
695 return 0
696 }
697
698 return [check_no_compiler_messages functionsections assembly {
699 void foo (void) { }
700 } "-ffunction-sections"]
701}
702
5097ad6c
GJL
703# Return 1 if instruction scheduling is available, 0 otherwise.
704
705proc check_effective_target_scheduling {} {
706 return [check_no_compiler_messages scheduling object {
707 void foo (void) { }
708 } "-fschedule-insns"]
709}
710
f8bf9252
SP
711# Return 1 if compilation with -fgraphite is error-free for trivial
712# code, 0 otherwise.
713
714proc check_effective_target_fgraphite {} {
715 return [check_no_compiler_messages fgraphite object {
716 void foo (void) { }
0da366c7 717 } "-O1 -fgraphite"]
f8bf9252
SP
718}
719
a782ee45
HPN
720# Return 1 if compilation with -fopenmp is error-free for trivial
721# code, 0 otherwise.
722
723proc check_effective_target_fopenmp {} {
8ce1ac69
RS
724 return [check_no_compiler_messages fopenmp object {
725 void foo (void) { }
726 } "-fopenmp"]
a782ee45
HPN
727}
728
86595dba
SP
729# Return 1 if compilation with -pthread is error-free for trivial
730# code, 0 otherwise.
731
732proc check_effective_target_pthread {} {
733 return [check_no_compiler_messages pthread object {
734 void foo (void) { }
735 } "-pthread"]
736}
737
233215fe
DK
738# Return 1 if compilation with -mpe-aligned-commons is error-free
739# for trivial code, 0 otherwise.
740
741proc check_effective_target_pe_aligned_commons {} {
742 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
743 return [check_no_compiler_messages pe_aligned_commons object {
744 int foo;
745 } "-mpe-aligned-commons"]
746 }
747 return 0
748}
749
011a3198
UB
750# Return 1 if the target supports -static
751proc check_effective_target_static {} {
752 return [check_no_compiler_messages static executable {
753 int main (void) { return 0; }
754 } "-static"]
755}
756
34520c98 757# Return 1 if the target supports -fstack-protector
34520c98 758proc check_effective_target_fstack_protector {} {
0ffd38c8
RS
759 return [check_runtime fstack_protector {
760 int main (void) { return 0; }
761 } "-fstack-protector"]
34520c98
EC
762}
763
3b1a6677
SE
764# Return 1 if compilation with -freorder-blocks-and-partition is error-free
765# for trivial code, 0 otherwise.
766
767proc check_effective_target_freorder {} {
8ce1ac69
RS
768 return [check_no_compiler_messages freorder object {
769 void foo (void) { }
770 } "-freorder-blocks-and-partition"]
3b1a6677
SE
771}
772
b6e3f572
HPN
773# Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
774# emitted, 0 otherwise. Whether a shared library can actually be built is
775# out of scope for this test.
b6e3f572
HPN
776
777proc check_effective_target_fpic { } {
8ce1ac69
RS
778 # Note that M68K has a multilib that supports -fpic but not
779 # -fPIC, so we need to check both. We test with a program that
780 # requires GOT references.
781 foreach arg {fpic fPIC} {
782 if [check_no_compiler_messages $arg object {
b6e3f572
HPN
783 extern int foo (void); extern int bar;
784 int baz (void) { return foo () + bar; }
8ce1ac69
RS
785 } "-$arg"] {
786 return 1
b6e3f572
HPN
787 }
788 }
8ce1ac69 789 return 0
b6e3f572 790}
8340fbd7
RO
791
792# Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
793
794proc check_effective_target_pie { } {
795 if { [istarget *-*-darwin\[912\]*]
796 || [istarget *-*-linux*] } {
797 return 1;
798 }
799 return 0
800}
b6e3f572 801
245f0e1c
RS
802# Return true if the target supports -mpaired-single (as used on MIPS).
803
804proc check_effective_target_mpaired_single { } {
e9b1e828 805 return [check_no_compiler_messages mpaired_single object {
245f0e1c
RS
806 void foo (void) { }
807 } "-mpaired-single"]
808}
809
1a79f743 810# Return true if the target has access to FPU instructions.
d8538159 811
1a79f743 812proc check_effective_target_hard_float { } {
4e6a492c 813 if { [istarget mips*-*-*] } {
ca8b555b 814 return [check_no_compiler_messages hard_float assembly {
4e6a492c 815 #if (defined __mips_soft_float || defined __mips16)
ca8b555b
HPN
816 #error FOO
817 #endif
818 }]
819 }
820
65a324b4
NC
821 # This proc is actually checking the availabilty of FPU
822 # support for doubles, so on the RX we must fail if the
823 # 64-bit double multilib has been selected.
824 if { [istarget rx-*-*] } {
825 return 0
826 # return [check_no_compiler_messages hard_float assembly {
827 #if defined __RX_64_BIT_DOUBLES__
828 #error FOO
829 #endif
830 # }]
831 }
832
ca8b555b
HPN
833 # The generic test equates hard_float with "no call for adding doubles".
834 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
835 double a (double b, double c) { return b + c; }
d8538159
RS
836 }]
837}
838
334a9543
RS
839# Return true if the target is a 64-bit MIPS target.
840
841proc check_effective_target_mips64 { } {
842 return [check_no_compiler_messages mips64 assembly {
843 #ifndef __mips64
844 #error FOO
845 #endif
846 }]
847}
848
254d1646
RS
849# Return true if the target is a MIPS target that does not produce
850# MIPS16 code.
851
852proc check_effective_target_nomips16 { } {
853 return [check_no_compiler_messages nomips16 object {
854 #ifndef __mips
855 #error FOO
856 #else
857 /* A cheap way of testing for -mflip-mips16. */
858 void foo (void) { asm ("addiu $20,$20,1"); }
859 void bar (void) { asm ("addiu $20,$20,1"); }
860 #endif
861 }]
862}
863
7dded683
RS
864# Add the options needed for MIPS16 function attributes. At the moment,
865# we don't support MIPS16 PIC.
866
867proc add_options_for_mips16_attribute { flags } {
b3aaa29a 868 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
7dded683
RS
869}
870
871# Return true if we can force a mode that allows MIPS16 code generation.
06d20fa9
RS
872# We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
873# for o32 and o64.
7dded683
RS
874
875proc check_effective_target_mips16_attribute { } {
876 return [check_no_compiler_messages mips16_attribute assembly {
06d20fa9
RS
877 #ifdef PIC
878 #error FOO
879 #endif
880 #if defined __mips_hard_float \
881 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
882 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
7dded683
RS
883 #error FOO
884 #endif
885 } [add_options_for_mips16_attribute ""]]
886}
887
b824522a
NF
888# Return 1 if the target supports long double larger than double when
889# using the new ABI, 0 otherwise.
890
891proc check_effective_target_mips_newabi_large_long_double { } {
892 return [check_no_compiler_messages mips_newabi_large_long_double object {
893 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
894 } "-mabi=64"]
895}
896
39a39c85
RS
897# Return 1 if the current multilib does not generate PIC by default.
898
899proc check_effective_target_nonpic { } {
900 return [check_no_compiler_messages nonpic assembly {
901 #if __PIC__
902 #error FOO
903 #endif
904 }]
905}
906
4be4340a
MM
907# Return 1 if the target does not use a status wrapper.
908
909proc check_effective_target_unwrapped { } {
910 if { [target_info needs_status_wrapper] != "" \
911 && [target_info needs_status_wrapper] != "0" } {
912 return 0
913 }
914 return 1
915}
916
74231b0f 917# Return true if iconv is supported on the target. In particular IBM1047.
21526606
EC
918
919proc check_iconv_available { test_what } {
5340bbea 920 global libiconv
21526606 921
0b3deaaf
MM
922 # If the tool configuration file has not set libiconv, try "-liconv"
923 if { ![info exists libiconv] } {
924 set libiconv "-liconv"
925 }
0ffd38c8
RS
926 set test_what [lindex $test_what 1]
927 return [check_runtime_nocache $test_what [subst {
928 #include <iconv.h>
929 int main (void)
930 {
931 iconv_t cd;
932
933 cd = iconv_open ("$test_what", "UTF-8");
934 if (cd == (iconv_t) -1)
935 return 1;
936 return 0;
5340bbea 937 }
0ffd38c8 938 }] $libiconv]
21526606 939}
ab37d57e 940
6dd2a13c
RO
941# Return 1 if an ASCII locale is supported on this host, 0 otherwise.
942
943proc check_ascii_locale_available { } {
944 if { ([ishost alpha*-dec-osf*] || [ishost mips-sgi-irix*]) } {
945 # Neither Tru64 UNIX nor IRIX support an ASCII locale.
946 return 0
947 } else {
948 return 1
949 }
950}
951
ab37d57e 952# Return true if named sections are supported on this target.
8ce1ac69 953
ab37d57e 954proc check_named_sections_available { } {
8ce1ac69 955 return [check_no_compiler_messages named_sections assembly {
b6dc500c 956 int __attribute__ ((section("whatever"))) foo;
8ce1ac69 957 }]
ab37d57e 958}
763ee179 959
32aa3bff 960# Return 1 if the target supports Fortran real kinds larger than real(8),
f6cf6841
JJ
961# 0 otherwise.
962#
963# When the target name changes, replace the cached result.
32aa3bff
FXC
964
965proc check_effective_target_fortran_large_real { } {
0ffd38c8
RS
966 return [check_no_compiler_messages fortran_large_real executable {
967 ! Fortran
968 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
969 real(kind=k) :: x
970 x = cos (x)
971 end
972 }]
32aa3bff
FXC
973}
974
f9576cc5
JD
975# Return 1 if the target supports Fortran real kind real(16),
976# 0 otherwise. Contrary to check_effective_target_fortran_large_real
977# this checks for Real(16) only; the other returned real(10) if
978# both real(10) and real(16) are available.
979#
980# When the target name changes, replace the cached result.
981
982proc check_effective_target_fortran_real_16 { } {
983 return [check_no_compiler_messages fortran_real_16 executable {
984 ! Fortran
985 real(kind=16) :: x
986 x = cos (x)
987 end
988 }]
989}
990
32aa3bff 991# Return 1 if the target supports Fortran integer kinds larger than
f6cf6841
JJ
992# integer(8), 0 otherwise.
993#
994# When the target name changes, replace the cached result.
32aa3bff
FXC
995
996proc check_effective_target_fortran_large_int { } {
0ffd38c8
RS
997 return [check_no_compiler_messages fortran_large_int executable {
998 ! Fortran
999 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1000 integer(kind=k) :: i
1001 end
1002 }]
32aa3bff
FXC
1003}
1004
c129abb4
SL
1005# Return 1 if the target supports Fortran integer(16), 0 otherwise.
1006#
1007# When the target name changes, replace the cached result.
1008
1009proc check_effective_target_fortran_integer_16 { } {
1010 return [check_no_compiler_messages fortran_integer_16 executable {
1011 ! Fortran
1012 integer(16) :: i
1013 end
1014 }]
1015}
1016
f2ae4b2b
FXC
1017# Return 1 if we can statically link libgfortran, 0 otherwise.
1018#
1019# When the target name changes, replace the cached result.
1020
1021proc check_effective_target_static_libgfortran { } {
0ffd38c8
RS
1022 return [check_no_compiler_messages static_libgfortran executable {
1023 ! Fortran
1024 print *, 'test'
1025 end
1026 } "-static"]
f2ae4b2b
FXC
1027}
1028
3cf8ccdf
RG
1029proc check_linker_plugin_available { } {
1030 return [check_no_compiler_messages_nocache linker_plugin executable {
1031 int main() { return 0; }
1032 } "-flto -fuse-linker-plugin"]
1033}
1034
e2e95f45
RE
1035# Return 1 if the target supports executing 750CL paired-single instructions, 0
1036# otherwise. Cache the result.
1037
1038proc check_750cl_hw_available { } {
0ffd38c8
RS
1039 return [check_cached_effective_target 750cl_hw_available {
1040 # If this is not the right target then we can skip the test.
1041 if { ![istarget powerpc-*paired*] } {
1042 expr 0
1043 } else {
1044 check_runtime_nocache 750cl_hw_available {
1045 int main()
1046 {
1047 #ifdef __MACH__
1048 asm volatile ("ps_mul v0,v0,v0");
1049 #else
1050 asm volatile ("ps_mul 0,0,0");
1051 #endif
1052 return 0;
1053 }
1054 } "-mpaired"
1055 }
1056 }]
e2e95f45
RE
1057}
1058
39354b3b
RO
1059# Return 1 if the target OS supports running SSE executables, 0
1060# otherwise. Cache the result.
1061
1062proc check_sse_os_support_available { } {
1063 return [check_cached_effective_target sse_os_support_available {
1064 # If this is not the right target then we can skip the test.
1065 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1066 expr 0
1067 } elseif { [istarget i?86-*-solaris2*] } {
1068 # The Solaris 2 kernel doesn't save and restore SSE registers
1069 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1070 check_runtime_nocache sse_os_support_available {
1071 int main ()
1072 {
1b7a0148 1073 __asm__ volatile ("movaps %xmm0,%xmm0");
39354b3b
RO
1074 return 0;
1075 }
1076 } "-msse"
1077 } else {
1078 expr 1
1079 }
1080 }]
1081}
1082
1083# Return 1 if the target supports executing SSE instructions, 0
1084# otherwise. Cache the result.
1085
1086proc check_sse_hw_available { } {
1087 return [check_cached_effective_target sse_hw_available {
1088 # If this is not the right target then we can skip the test.
1089 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1090 expr 0
1091 } else {
1092 check_runtime_nocache sse_hw_available {
1093 #include "cpuid.h"
1094 int main ()
1095 {
1d8ec041 1096 unsigned int eax, ebx, ecx, edx;
39354b3b
RO
1097 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1098 return !(edx & bit_SSE);
1099 return 1;
1100 }
1101 } ""
1102 }
1103 }]
1104}
1105
8a313b81
VK
1106# Return 1 if the target supports executing SSE2 instructions, 0
1107# otherwise. Cache the result.
1108
1109proc check_sse2_hw_available { } {
1110 return [check_cached_effective_target sse2_hw_available {
1111 # If this is not the right target then we can skip the test.
1112 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1113 expr 0
1114 } else {
1115 check_runtime_nocache sse2_hw_available {
1116 #include "cpuid.h"
1117 int main ()
1118 {
1d8ec041 1119 unsigned int eax, ebx, ecx, edx;
8a313b81
VK
1120 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1121 return !(edx & bit_SSE2);
1122 return 1;
1123 }
1124 } ""
1125 }
1126 }]
1127}
1128
1d8ec041
UB
1129# Return 1 if the target supports executing AVX instructions, 0
1130# otherwise. Cache the result.
1131
1132proc check_avx_hw_available { } {
1133 return [check_cached_effective_target avx_hw_available {
1134 # If this is not the right target then we can skip the test.
1135 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1136 expr 0
1137 } else {
1138 check_runtime_nocache avx_hw_available {
1139 #include "cpuid.h"
1140 int main ()
1141 {
1142 unsigned int eax, ebx, ecx, edx;
1143 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1144 return ((ecx & (bit_AVX | bit_OSXSAVE))
1145 != (bit_AVX | bit_OSXSAVE));
1146 return 1;
1147 }
1148 } ""
1149 }
1150 }]
1151}
1152
39354b3b
RO
1153# Return 1 if the target supports running SSE executables, 0 otherwise.
1154
1155proc check_effective_target_sse_runtime { } {
1d8ec041
UB
1156 if { [check_effective_target_sse]
1157 && [check_sse_hw_available]
1158 && [check_sse_os_support_available] } {
39354b3b 1159 return 1
39354b3b 1160 }
1d8ec041 1161 return 0
39354b3b
RO
1162}
1163
1164# Return 1 if the target supports running SSE2 executables, 0 otherwise.
1165
1166proc check_effective_target_sse2_runtime { } {
1d8ec041
UB
1167 if { [check_effective_target_sse2]
1168 && [check_sse2_hw_available]
1169 && [check_sse_os_support_available] } {
39354b3b 1170 return 1
39354b3b 1171 }
1d8ec041
UB
1172 return 0
1173}
1174
1175# Return 1 if the target supports running AVX executables, 0 otherwise.
1176
1177proc check_effective_target_avx_runtime { } {
1178 if { [check_effective_target_avx]
1179 && [check_avx_hw_available] } {
1180 return 1
1181 }
1182 return 0
39354b3b
RO
1183}
1184
29e6733c
MM
1185# Return 1 if the target supports executing VSX instructions, 0
1186# otherwise. Cache the result.
1187
1188proc check_vsx_hw_available { } {
1189 return [check_cached_effective_target vsx_hw_available {
1190 # Some simulators are known to not support VSX instructions.
1191 # For now, disable on Darwin
1192 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1193 expr 0
1194 } else {
1195 set options "-mvsx"
1196 check_runtime_nocache vsx_hw_available {
1197 int main()
1198 {
1199 #ifdef __MACH__
1200 asm volatile ("xxlor vs0,vs0,vs0");
1201 #else
1202 asm volatile ("xxlor 0,0,0");
1203 #endif
1204 return 0;
1205 }
1206 } $options
1207 }
1208 }]
1209}
1210
763ee179
JJ
1211# Return 1 if the target supports executing AltiVec instructions, 0
1212# otherwise. Cache the result.
1213
1214proc check_vmx_hw_available { } {
0ffd38c8 1215 return [check_cached_effective_target vmx_hw_available {
763ee179
JJ
1216 # Some simulators are known to not support VMX instructions.
1217 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
0ffd38c8 1218 expr 0
3562bc34 1219 } else {
0ffd38c8 1220 # Most targets don't require special flags for this test case, but
29e6733c
MM
1221 # Darwin does. Just to be sure, make sure VSX is not enabled for
1222 # the altivec tests.
0ffd38c8
RS
1223 if { [istarget *-*-darwin*]
1224 || [istarget *-*-aix*] } {
29e6733c 1225 set options "-maltivec -mno-vsx"
0ffd38c8 1226 } else {
29e6733c 1227 set options "-mno-vsx"
763ee179 1228 }
0ffd38c8
RS
1229 check_runtime_nocache vmx_hw_available {
1230 int main()
1231 {
1232 #ifdef __MACH__
1233 asm volatile ("vor v0,v0,v0");
1234 #else
1235 asm volatile ("vor 0,0,0");
1236 #endif
1237 return 0;
1238 }
1239 } $options
763ee179 1240 }
0ffd38c8 1241 }]
763ee179 1242}
b6dc500c 1243
92902797
MM
1244proc check_ppc_recip_hw_available { } {
1245 return [check_cached_effective_target ppc_recip_hw_available {
1246 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1247 # For now, disable on Darwin
1248 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1249 expr 0
1250 } else {
1251 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1252 check_runtime_nocache ppc_recip_hw_available {
1253 volatile double d_recip, d_rsqrt, d_four = 4.0;
1254 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1255 int main()
1256 {
1257 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1258 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1259 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1260 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1261 return 0;
1262 }
1263 } $options
1264 }
1265 }]
1266}
1267
5bdf05c8
DJ
1268# Return 1 if the target supports executing AltiVec and Cell PPU
1269# instructions, 0 otherwise. Cache the result.
1270
1271proc check_effective_target_cell_hw { } {
1272 return [check_cached_effective_target cell_hw_available {
1273 # Some simulators are known to not support VMX and PPU instructions.
1274 if { [istarget powerpc-*-eabi*] } {
1275 expr 0
1276 } else {
1277 # Most targets don't require special flags for this test
1278 # case, but Darwin and AIX do.
1279 if { [istarget *-*-darwin*]
1280 || [istarget *-*-aix*] } {
1281 set options "-maltivec -mcpu=cell"
1282 } else {
1283 set options "-mcpu=cell"
1284 }
1285 check_runtime_nocache cell_hw_available {
1286 int main()
1287 {
1288 #ifdef __MACH__
1289 asm volatile ("vor v0,v0,v0");
1290 asm volatile ("lvlx v0,r0,r0");
1291 #else
1292 asm volatile ("vor 0,0,0");
1293 asm volatile ("lvlx 0,0,0");
1294 #endif
1295 return 0;
1296 }
1297 } $options
1298 }
1299 }]
1300}
1301
1b82a065
NF
1302# Return 1 if the target supports executing 64-bit instructions, 0
1303# otherwise. Cache the result.
1304
1305proc check_effective_target_powerpc64 { } {
1306 global powerpc64_available_saved
1307 global tool
1308
1309 if [info exists powerpc64_available_saved] {
1310 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1311 } else {
1312 set powerpc64_available_saved 0
1313
1314 # Some simulators are known to not support powerpc64 instructions.
1315 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1316 verbose "check_effective_target_powerpc64 returning 0" 2
1317 return $powerpc64_available_saved
1318 }
1319
1320 # Set up, compile, and execute a test program containing a 64-bit
1321 # instruction. Include the current process ID in the file
1322 # names to prevent conflicts with invocations for multiple
1323 # testsuites.
1324 set src ppc[pid].c
1325 set exe ppc[pid].x
1326
1327 set f [open $src "w"]
1328 puts $f "int main() {"
1329 puts $f "#ifdef __MACH__"
1330 puts $f " asm volatile (\"extsw r0,r0\");"
1331 puts $f "#else"
1332 puts $f " asm volatile (\"extsw 0,0\");"
1333 puts $f "#endif"
1334 puts $f " return 0; }"
1335 close $f
1336
1337 set opts "additional_flags=-mcpu=G5"
1338
1339 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1340 set lines [${tool}_target_compile $src $exe executable "$opts"]
1341 file delete $src
1342
1343 if [string match "" $lines] then {
1344 # No error message, compilation succeeded.
1345 set result [${tool}_load "./$exe" "" ""]
1346 set status [lindex $result 0]
1347 remote_file build delete $exe
1348 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1349
1350 if { $status == "pass" } then {
1351 set powerpc64_available_saved 1
1352 }
1353 } else {
1354 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1355 }
1356 }
1357
1358 return $powerpc64_available_saved
1359}
1360
56afd7aa
JJ
1361# GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1362# complex float arguments. This affects gfortran tests that call cabsf
1363# in libm built by an earlier compiler. Return 1 if libm uses the same
1364# argument passing as the compiler under test, 0 otherwise.
1365#
1366# When the target name changes, replace the cached result.
1367
1368proc check_effective_target_broken_cplxf_arg { } {
0ffd38c8
RS
1369 return [check_cached_effective_target broken_cplxf_arg {
1370 # Skip the work for targets known not to be affected.
1371 if { ![istarget powerpc64-*-linux*] } {
1372 expr 0
1373 } elseif { ![is-effective-target lp64] } {
1374 expr 0
56afd7aa 1375 } else {
0ffd38c8
RS
1376 check_runtime_nocache broken_cplxf_arg {
1377 #include <complex.h>
1378 extern void abort (void);
1379 float fabsf (float);
1380 float cabsf (_Complex float);
1381 int main ()
1382 {
1383 _Complex float cf;
1384 float f;
1385 cf = 3 + 4.0fi;
1386 f = cabsf (cf);
1387 if (fabsf (f - 5.0) > 0.0001)
1388 abort ();
1389 return 0;
1390 }
1391 } "-lm"
56afd7aa 1392 }
0ffd38c8 1393 }]
56afd7aa
JJ
1394}
1395
294689c4
BS
1396# Return 1 is this is a TI C6X target supporting C67X instructions
1397proc check_effective_target_ti_c67x { } {
1398 return [check_no_compiler_messages ti_c67x assembly {
1399 #if !defined(_TMS320C6700)
1400 #error FOO
1401 #endif
1402 }]
1403}
1404
1405# Return 1 is this is a TI C6X target supporting C64X+ instructions
1406proc check_effective_target_ti_c64xp { } {
1407 return [check_no_compiler_messages ti_c64xp assembly {
1408 #if !defined(_TMS320C6400_PLUS)
1409 #error FOO
1410 #endif
1411 }]
1412}
1413
1414
31589ec6 1415proc check_alpha_max_hw_available { } {
0ffd38c8
RS
1416 return [check_runtime alpha_max_hw_available {
1417 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1418 }]
31589ec6
RH
1419}
1420
34f4edf8
MM
1421# Returns true iff the FUNCTION is available on the target system.
1422# (This is essentially a Tcl implementation of Autoconf's
1423# AC_CHECK_FUNC.)
1424
1425proc check_function_available { function } {
0ffd38c8
RS
1426 return [check_no_compiler_messages ${function}_available \
1427 executable [subst {
1428 #ifdef __cplusplus
1429 extern "C"
1430 #endif
1431 char $function ();
1432 int main () { $function (); }
8d598c74 1433 }] "-fno-builtin" ]
34f4edf8
MM
1434}
1435
cea02b6e 1436# Returns true iff "fork" is available on the target system.
34f4edf8
MM
1437
1438proc check_fork_available {} {
1439 return [check_function_available "fork"]
1440}
1441
cea02b6e 1442# Returns true iff "mkfifo" is available on the target system.
34f4edf8
MM
1443
1444proc check_mkfifo_available {} {
19073ebc 1445 if { [istarget *-*-cygwin*] } {
cea02b6e
DB
1446 # Cygwin has mkfifo, but support is incomplete.
1447 return 0
1448 }
1449
34f4edf8
MM
1450 return [check_function_available "mkfifo"]
1451}
1452
21f638b9
SE
1453# Returns true iff "__cxa_atexit" is used on the target system.
1454
1455proc check_cxa_atexit_available { } {
0ffd38c8 1456 return [check_cached_effective_target cxa_atexit_available {
19073ebc 1457 if { [istarget hppa*-*-hpux10*] } {
0ffd38c8
RS
1458 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1459 expr 0
19073ebc 1460 } elseif { [istarget *-*-vxworks] } {
8df03fe5
NS
1461 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1462 expr 0
21f638b9 1463 } else {
0ffd38c8
RS
1464 check_runtime_nocache cxa_atexit_available {
1465 // C++
1466 #include <stdlib.h>
1467 static unsigned int count;
1468 struct X
1469 {
1470 X() { count = 1; }
1471 ~X()
1472 {
1473 if (count != 3)
1474 exit(1);
1475 count = 4;
1476 }
1477 };
1478 void f()
1479 {
1480 static X x;
1481 }
1482 struct Y
1483 {
1484 Y() { f(); count = 2; }
1485 ~Y()
1486 {
1487 if (count != 2)
1488 exit(1);
1489 count = 3;
1490 }
1491 };
1492 Y y;
1493 int main() { return 0; }
1494 }
21f638b9 1495 }
0ffd38c8 1496 }]
21f638b9
SE
1497}
1498
9debda96
IS
1499proc check_effective_target_objc2 { } {
1500 return [check_no_compiler_messages objc2 object {
1501 #ifdef __OBJC2__
1502 int dummy[1];
1503 #else
1504 #error
1505 #endif
1506 }]
1507}
1508
1509proc check_effective_target_next_runtime { } {
1510 return [check_no_compiler_messages objc2 object {
1511 #ifdef __NEXT_RUNTIME__
1512 int dummy[1];
1513 #else
1514 #error
1515 #endif
1516 }]
1517}
21f638b9 1518
b6dc500c
JJ
1519# Return 1 if we're generating 32-bit code using default options, 0
1520# otherwise.
1521
1522proc check_effective_target_ilp32 { } {
8ce1ac69
RS
1523 return [check_no_compiler_messages ilp32 object {
1524 int dummy[sizeof (int) == 4
1525 && sizeof (void *) == 4
1526 && sizeof (long) == 4 ? 1 : -1];
1527 }]
b6dc500c
JJ
1528}
1529
489319d5
L
1530# Return 1 if we're generating ia32 code using default options, 0
1531# otherwise.
1532
1533proc check_effective_target_ia32 { } {
1534 return [check_no_compiler_messages ia32 object {
1535 int dummy[sizeof (int) == 4
1536 && sizeof (void *) == 4
1537 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1538 }]
1539}
1540
1541# Return 1 if we're generating x32 code using default options, 0
1542# otherwise.
1543
1544proc check_effective_target_x32 { } {
1545 return [check_no_compiler_messages x32 object {
1546 int dummy[sizeof (int) == 4
1547 && sizeof (void *) == 4
1548 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1549 }]
1550}
1551
a239aa95
DD
1552# Return 1 if we're generating 32-bit or larger integers using default
1553# options, 0 otherwise.
1554
1555proc check_effective_target_int32plus { } {
1556 return [check_no_compiler_messages int32plus object {
1557 int dummy[sizeof (int) >= 4 ? 1 : -1];
1558 }]
1559}
1560
1561# Return 1 if we're generating 32-bit or larger pointers using default
1562# options, 0 otherwise.
1563
1564proc check_effective_target_ptr32plus { } {
1565 return [check_no_compiler_messages ptr32plus object {
1566 int dummy[sizeof (void *) >= 4 ? 1 : -1];
1567 }]
1568}
1569
1570# Return 1 if we support 32-bit or larger array and structure sizes
1571# using default options, 0 otherwise.
1572
1573proc check_effective_target_size32plus { } {
1574 return [check_no_compiler_messages size32plus object {
1575 char dummy[65537];
1576 }]
1577}
1578
1579# Returns 1 if we're generating 16-bit or smaller integers with the
1580# default options, 0 otherwise.
1581
1582proc check_effective_target_int16 { } {
1583 return [check_no_compiler_messages int16 object {
1584 int dummy[sizeof (int) < 4 ? 1 : -1];
1585 }]
1586}
1587
b6dc500c
JJ
1588# Return 1 if we're generating 64-bit code using default options, 0
1589# otherwise.
1590
1591proc check_effective_target_lp64 { } {
8ce1ac69
RS
1592 return [check_no_compiler_messages lp64 object {
1593 int dummy[sizeof (int) == 4
1594 && sizeof (void *) == 8
1595 && sizeof (long) == 8 ? 1 : -1];
1596 }]
b6dc500c
JJ
1597}
1598
7ec59445
KT
1599# Return 1 if we're generating 64-bit code using default llp64 options,
1600# 0 otherwise.
1601
1602proc check_effective_target_llp64 { } {
1603 return [check_no_compiler_messages llp64 object {
1604 int dummy[sizeof (int) == 4
1605 && sizeof (void *) == 8
1606 && sizeof (long long) == 8
1607 && sizeof (long) == 4 ? 1 : -1];
1608 }]
1609}
1610
4efc447f
MLI
1611# Return 1 if the target supports long double larger than double,
1612# 0 otherwise.
1613
1614proc check_effective_target_large_long_double { } {
1615 return [check_no_compiler_messages large_long_double object {
1616 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1617 }]
1618}
1619
fb4fc714
DD
1620# Return 1 if the target supports double larger than float,
1621# 0 otherwise.
1622
1623proc check_effective_target_large_double { } {
1624 return [check_no_compiler_messages large_double object {
1625 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1626 }]
1627}
1628
1629# Return 1 if the target supports double of 64 bits,
1630# 0 otherwise.
1631
1632proc check_effective_target_double64 { } {
1633 return [check_no_compiler_messages double64 object {
1634 int dummy[sizeof(double) == 8 ? 1 : -1];
1635 }]
1636}
1637
1638# Return 1 if the target supports double of at least 64 bits,
1639# 0 otherwise.
1640
1641proc check_effective_target_double64plus { } {
1642 return [check_no_compiler_messages double64plus object {
1643 int dummy[sizeof(double) >= 8 ? 1 : -1];
1644 }]
1645}
1646
fca8ed94
CF
1647# Return 1 if the target supports compiling fixed-point,
1648# 0 otherwise.
1649
1650proc check_effective_target_fixed_point { } {
1651 return [check_no_compiler_messages fixed_point object {
1652 _Sat _Fract x; _Sat _Accum y;
1653 }]
1654}
4efc447f 1655
265e7d50
JJ
1656# Return 1 if the target supports compiling decimal floating point,
1657# 0 otherwise.
1658
1659proc check_effective_target_dfp_nocache { } {
1660 verbose "check_effective_target_dfp_nocache: compiling source" 2
0ffd38c8 1661 set ret [check_no_compiler_messages_nocache dfp object {
a9ab39d3 1662 float x __attribute__((mode(DD)));
0ffd38c8 1663 }]
265e7d50
JJ
1664 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1665 return $ret
1666}
1667
1668proc check_effective_target_dfprt_nocache { } {
0ffd38c8 1669 return [check_runtime_nocache dfprt {
a9ab39d3 1670 typedef float d64 __attribute__((mode(DD)));
efc7a2a5 1671 d64 x = 1.2df, y = 2.3dd, z;
0ffd38c8
RS
1672 int main () { z = x + y; return 0; }
1673 }]
265e7d50
JJ
1674}
1675
1676# Return 1 if the target supports compiling Decimal Floating Point,
1677# 0 otherwise.
27a2694f
JJ
1678#
1679# This won't change for different subtargets so cache the result.
1680
1681proc check_effective_target_dfp { } {
0ffd38c8
RS
1682 return [check_cached_effective_target dfp {
1683 check_effective_target_dfp_nocache
1684 }]
27a2694f
JJ
1685}
1686
265e7d50 1687# Return 1 if the target supports linking and executing Decimal Floating
72a30e3c 1688# Point, 0 otherwise.
265e7d50
JJ
1689#
1690# This won't change for different subtargets so cache the result.
1691
1692proc check_effective_target_dfprt { } {
0ffd38c8
RS
1693 return [check_cached_effective_target dfprt {
1694 check_effective_target_dfprt_nocache
1695 }]
265e7d50
JJ
1696}
1697
72a30e3c
RO
1698# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1699
1700proc check_effective_target_ucn_nocache { } {
1701 # -std=c99 is only valid for C
1702 if [check_effective_target_c] {
1703 set ucnopts "-std=c99"
1704 }
1705 append ucnopts " -fextended-identifiers"
1706 verbose "check_effective_target_ucn_nocache: compiling source" 2
1707 set ret [check_no_compiler_messages_nocache ucn object {
1708 int \u00C0;
1709 } $ucnopts]
1710 verbose "check_effective_target_ucn_nocache: returning $ret" 2
1711 return $ret
1712}
1713
1714# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1715#
1716# This won't change for different subtargets, so cache the result.
1717
1718proc check_effective_target_ucn { } {
1719 return [check_cached_effective_target ucn {
1720 check_effective_target_ucn_nocache
1721 }]
1722}
1723
b956116e
PB
1724# Return 1 if the target needs a command line argument to enable a SIMD
1725# instruction set.
b956116e
PB
1726
1727proc check_effective_target_vect_cmdline_needed { } {
1728 global et_vect_cmdline_needed_saved
e87a56b4
JM
1729 global et_vect_cmdline_needed_target_name
1730
1731 if { ![info exists et_vect_cmdline_needed_target_name] } {
1732 set et_vect_cmdline_needed_target_name ""
1733 }
1734
1735 # If the target has changed since we set the cached value, clear it.
1736 set current_target [current_target_name]
1737 if { $current_target != $et_vect_cmdline_needed_target_name } {
1738 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
1739 set et_vect_cmdline_needed_target_name $current_target
1740 if { [info exists et_vect_cmdline_needed_saved] } {
1741 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
1742 unset et_vect_cmdline_needed_saved
1743 }
1744 }
b956116e
PB
1745
1746 if [info exists et_vect_cmdline_needed_saved] {
1747 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
1748 } else {
1749 set et_vect_cmdline_needed_saved 1
f32c6a2b
UB
1750 if { [istarget alpha*-*-*]
1751 || [istarget ia64-*-*]
e87a56b4 1752 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
489319d5
L
1753 && ([check_effective_target_x32]
1754 || [check_effective_target_lp64]))
624168de 1755 || ([istarget powerpc*-*-*]
5eb96b60 1756 && ([check_effective_target_powerpc_spe]
95730f5e 1757 || [check_effective_target_powerpc_altivec]))
b61b26e4
JM
1758 || [istarget spu-*-*]
1759 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
b956116e
PB
1760 set et_vect_cmdline_needed_saved 0
1761 }
1762 }
1763
1764 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
1765 return $et_vect_cmdline_needed_saved
1766}
1767
07d05ffd
JJ
1768# Return 1 if the target supports hardware vectors of int, 0 otherwise.
1769#
1770# This won't change for different subtargets so cache the result.
1771
1772proc check_effective_target_vect_int { } {
1773 global et_vect_int_saved
1774
1775 if [info exists et_vect_int_saved] {
1776 verbose "check_effective_target_vect_int: using cached result" 2
1777 } else {
1778 set et_vect_int_saved 0
1779 if { [istarget i?86-*-*]
e2e95f45
RE
1780 || ([istarget powerpc*-*-*]
1781 && ![istarget powerpc-*-linux*paired*])
0f6909b9 1782 || [istarget spu-*-*]
07d05ffd 1783 || [istarget x86_64-*-*]
31589ec6 1784 || [istarget sparc*-*-*]
f61134e8 1785 || [istarget alpha*-*-*]
b61b26e4 1786 || [istarget ia64-*-*]
0d108d15
MX
1787 || [check_effective_target_arm32]
1788 || ([istarget mips*-*-*]
1789 && [check_effective_target_mips_loongson]) } {
07d05ffd
JJ
1790 set et_vect_int_saved 1
1791 }
1792 }
1793
1794 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
1795 return $et_vect_int_saved
1796}
1797
5dc7911e 1798# Return 1 if the target supports signed int->float conversion
cb9ed5d7
DN
1799#
1800
1801proc check_effective_target_vect_intfloat_cvt { } {
1802 global et_vect_intfloat_cvt_saved
1803
1804 if [info exists et_vect_intfloat_cvt_saved] {
1805 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
1806 } else {
1807 set et_vect_intfloat_cvt_saved 0
1808 if { [istarget i?86-*-*]
e2e95f45
RE
1809 || ([istarget powerpc*-*-*]
1810 && ![istarget powerpc-*-linux*paired*])
cb9ed5d7
DN
1811 || [istarget x86_64-*-*] } {
1812 set et_vect_intfloat_cvt_saved 1
1813 }
1814 }
1815
1816 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
1817 return $et_vect_intfloat_cvt_saved
1818}
1819
a6766312
KT
1820#Return 1 if we're supporting __int128 for target, 0 otherwise.
1821
1822proc check_effective_target_int128 { } {
1823 return [check_no_compiler_messages int128 object {
1824 int dummy[
1825 #ifndef __SIZEOF_INT128__
1826 -1
1827 #else
1828 1
1829 #endif
1830 ];
1831 }]
1832}
cb9ed5d7 1833
5dc7911e
RG
1834# Return 1 if the target supports unsigned int->float conversion
1835#
1836
1837proc check_effective_target_vect_uintfloat_cvt { } {
1838 global et_vect_uintfloat_cvt_saved
1839
1840 if [info exists et_vect_uintfloat_cvt_saved] {
1841 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
1842 } else {
1843 set et_vect_uintfloat_cvt_saved 0
54e86f6b
UB
1844 if { [istarget i?86-*-*]
1845 || ([istarget powerpc*-*-*]
1846 && ![istarget powerpc-*-linux*paired*])
1847 || [istarget x86_64-*-*] } {
5dc7911e
RG
1848 set et_vect_uintfloat_cvt_saved 1
1849 }
1850 }
1851
1852 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
1853 return $et_vect_uintfloat_cvt_saved
1854}
1855
1856
1857# Return 1 if the target supports signed float->int conversion
cb9ed5d7
DN
1858#
1859
1860proc check_effective_target_vect_floatint_cvt { } {
1861 global et_vect_floatint_cvt_saved
1862
1863 if [info exists et_vect_floatint_cvt_saved] {
1864 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
1865 } else {
1866 set et_vect_floatint_cvt_saved 0
1867 if { [istarget i?86-*-*]
7910ae0c
DN
1868 || ([istarget powerpc*-*-*]
1869 && ![istarget powerpc-*-linux*paired*])
cb9ed5d7
DN
1870 || [istarget x86_64-*-*] } {
1871 set et_vect_floatint_cvt_saved 1
1872 }
1873 }
1874
1875 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
1876 return $et_vect_floatint_cvt_saved
1877}
1878
5dc7911e
RG
1879# Return 1 if the target supports unsigned float->int conversion
1880#
1881
1882proc check_effective_target_vect_floatuint_cvt { } {
1883 global et_vect_floatuint_cvt_saved
1884
1885 if [info exists et_vect_floatuint_cvt_saved] {
1886 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
1887 } else {
1888 set et_vect_floatuint_cvt_saved 0
1889 if { ([istarget powerpc*-*-*]
1890 && ![istarget powerpc-*-linux*paired*]) } {
1891 set et_vect_floatuint_cvt_saved 1
1892 }
1893 }
1894
1895 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
1896 return $et_vect_floatuint_cvt_saved
1897}
1898
0d341a6a
PB
1899# Return 1 is this is an arm target using 32-bit instructions
1900proc check_effective_target_arm32 { } {
336e494f
DJ
1901 return [check_no_compiler_messages arm32 assembly {
1902 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
1903 #error FOO
1904 #endif
1905 }]
0d341a6a
PB
1906}
1907
3b99e635
JJ
1908# Return 1 is this is an arm target not using Thumb
1909proc check_effective_target_arm_nothumb { } {
1910 return [check_no_compiler_messages arm_nothumb assembly {
1911 #if (defined(__thumb__) || defined(__thumb2__))
1912 #error FOO
1913 #endif
1914 }]
1915}
1916
0094f21b
JB
1917# Return 1 if this is a little-endian ARM target
1918proc check_effective_target_arm_little_endian { } {
1919 return [check_no_compiler_messages arm_little_endian assembly {
1920 #if !defined(__arm__) || !defined(__ARMEL__)
1921 #error FOO
1922 #endif
1923 }]
1924}
1925
c452684d
JB
1926# Return 1 if this is an ARM target that only supports aligned vector accesses
1927proc check_effective_target_arm_vect_no_misalign { } {
1928 return [check_no_compiler_messages arm_vect_no_misalign assembly {
1929 #if !defined(__arm__) \
1930 || (defined(__ARMEL__) \
1931 && (!defined(__thumb__) || defined(__thumb2__)))
1932 #error FOO
1933 #endif
1934 }]
1935}
1936
1937
c03b9206
JM
1938# Return 1 if this is an ARM target supporting -mfpu=vfp
1939# -mfloat-abi=softfp. Some multilibs may be incompatible with these
1940# options.
1941
1942proc check_effective_target_arm_vfp_ok { } {
1943 if { [check_effective_target_arm32] } {
1944 return [check_no_compiler_messages arm_vfp_ok object {
1945 int dummy;
1946 } "-mfpu=vfp -mfloat-abi=softfp"]
1947 } else {
1948 return 0
1949 }
1950}
1951
390b17c2
RE
1952# Return 1 if this is an ARM target supporting -mfpu=vfp
1953# -mfloat-abi=hard. Some multilibs may be incompatible with these
1954# options.
1955
1956proc check_effective_target_arm_hard_vfp_ok { } {
1957 if { [check_effective_target_arm32] } {
1958 return [check_no_compiler_messages arm_hard_vfp_ok executable {
1959 int main() { return 0;}
1960 } "-mfpu=vfp -mfloat-abi=hard"]
1961 } else {
1962 return 0
1963 }
1964}
1965
09411ce3
JJ
1966# Return 1 if this is an ARM target that supports DSP multiply with
1967# current multilib flags.
1968
1969proc check_effective_target_arm_dsp { } {
1970 return [check_no_compiler_messages arm_dsp assembly {
1971 #ifndef __ARM_FEATURE_DSP
1972 #error not DSP
1973 #endif
1974 int i;
1975 }]
1976}
1977
0c422e74
DJ
1978# Add the options needed for NEON. We need either -mfloat-abi=softfp
1979# or -mfloat-abi=hard, but if one is already specified by the
1980# multilib, use it. Similarly, if a -mfpu option already enables
1981# NEON, do not add -mfpu=neon.
1982
1983proc add_options_for_arm_neon { flags } {
1984 if { ! [check_effective_target_arm_neon_ok] } {
1985 return "$flags"
1986 }
1987 global et_arm_neon_flags
1988 return "$flags $et_arm_neon_flags"
1989}
1990
88f77cba 1991# Return 1 if this is an ARM target supporting -mfpu=neon
0c422e74
DJ
1992# -mfloat-abi=softfp or equivalent options. Some multilibs may be
1993# incompatible with these options. Also set et_arm_neon_flags to the
1994# best options to add.
1995
1996proc check_effective_target_arm_neon_ok_nocache { } {
1997 global et_arm_neon_flags
1998 set et_arm_neon_flags ""
1999 if { [check_effective_target_arm32] } {
2000 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2001 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2002 #include "arm_neon.h"
2003 int dummy;
2004 } "$flags"] } {
2005 set et_arm_neon_flags $flags
2006 return 1
2007 }
2008 }
2009 }
2010
2011 return 0
2012}
88f77cba
JB
2013
2014proc check_effective_target_arm_neon_ok { } {
0c422e74
DJ
2015 return [check_cached_effective_target arm_neon_ok \
2016 check_effective_target_arm_neon_ok_nocache]
2017}
2018
2019# Add the options needed for NEON. We need either -mfloat-abi=softfp
2020# or -mfloat-abi=hard, but if one is already specified by the
2021# multilib, use it.
2022
cf0a9c20
JJ
2023proc add_options_for_arm_fp16 { flags } {
2024 if { ! [check_effective_target_arm_fp16_ok] } {
0c422e74
DJ
2025 return "$flags"
2026 }
cf0a9c20
JJ
2027 global et_arm_fp16_flags
2028 return "$flags $et_arm_fp16_flags"
0c422e74
DJ
2029}
2030
cf0a9c20
JJ
2031# Return 1 if this is an ARM target that can support a VFP fp16 variant.
2032# Skip multilibs that are incompatible with these options and set
2033# et_arm_fp16_flags to the best options to add.
0c422e74 2034
cf0a9c20
JJ
2035proc check_effective_target_arm_fp16_ok_nocache { } {
2036 global et_arm_fp16_flags
2037 set et_arm_fp16_flags ""
2038 if { ! [check_effective_target_arm32] } {
2039 return 0;
2040 }
2041 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2042 # Multilib flags would override -mfpu.
2043 return 0
2044 }
2045 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2046 # Must generate floating-point instructions.
2047 return 0
2048 }
2049 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2050 # The existing -mfpu value is OK; use it, but add softfp.
2051 set et_arm_fp16_flags "-mfloat-abi=softfp"
2052 return 1;
2053 }
2054 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2055 # macro to check for this support.
2056 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2057 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2058 int dummy;
2059 } "$flags"] } {
2060 set et_arm_fp16_flags "$flags"
2061 return 1
88f77cba 2062 }
0c422e74
DJ
2063
2064 return 0
2065}
2066
cf0a9c20
JJ
2067proc check_effective_target_arm_fp16_ok { } {
2068 return [check_cached_effective_target arm_fp16_ok \
2069 check_effective_target_arm_fp16_ok_nocache]
88f77cba
JB
2070}
2071
4a0c473d
JM
2072# Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2073# used.
2074
2075proc check_effective_target_arm_thumb1_ok { } {
2076 return [check_no_compiler_messages arm_thumb1_ok assembly {
2077 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2078 #error FOO
2079 #endif
2080 } "-mthumb"]
2081}
2082
7d31a807
MM
2083# Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2084# used.
2085
2086proc check_effective_target_arm_thumb2_ok { } {
2087 return [check_no_compiler_messages arm_thumb2_ok assembly {
2088 #if !defined(__thumb2__)
2089 #error FOO
2090 #endif
2091 } "-mthumb"]
2092}
2093
7122998a
JJ
2094# Return 1 if this is an ARM target where Thumb-1 is used without options
2095# added by the test.
2096
2097proc check_effective_target_arm_thumb1 { } {
2098 return [check_no_compiler_messages arm_thumb1 assembly {
2099 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2100 #error not thumb1
2101 #endif
2102 int i;
2103 } ""]
2104}
2105
2106# Return 1 if this is an ARM target where Thumb-2 is used without options
2107# added by the test.
3b99e635
JJ
2108
2109proc check_effective_target_arm_thumb2 { } {
2110 return [check_no_compiler_messages arm_thumb2 assembly {
2111 #if !defined(__thumb2__)
2112 #error FOO
2113 #endif
7122998a 2114 int i;
3b99e635
JJ
2115 } ""]
2116}
2117
88f77cba
JB
2118# Return 1 if the target supports executing NEON instructions, 0
2119# otherwise. Cache the result.
2120
2121proc check_effective_target_arm_neon_hw { } {
0ffd38c8
RS
2122 return [check_runtime arm_neon_hw_available {
2123 int
2124 main (void)
2125 {
2126 long long a = 0, b = 1;
2127 asm ("vorr %P0, %P1, %P2"
2128 : "=w" (a)
2129 : "0" (a), "w" (b));
2130 return (a != 1);
2131 }
0c422e74 2132 } [add_options_for_arm_neon ""]]
88f77cba
JB
2133}
2134
b61b26e4
JM
2135# Return 1 if this is a ARM target with NEON enabled.
2136
2137proc check_effective_target_arm_neon { } {
2138 if { [check_effective_target_arm32] } {
2139 return [check_no_compiler_messages arm_neon object {
2140 #ifndef __ARM_NEON__
2141 #error not NEON
2142 #else
2143 int dummy;
2144 #endif
2145 }]
2146 } else {
2147 return 0
2148 }
2149}
2150
93581857
MS
2151# Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2152# the Loongson vector modes.
2153
2154proc check_effective_target_mips_loongson { } {
2155 return [check_no_compiler_messages loongson assembly {
2156 #if !defined(__mips_loongson_vector_rev)
2157 #error FOO
2158 #endif
2159 }]
2160}
2161
07d8efe3
MM
2162# Return 1 if this is an ARM target that adheres to the ABI for the ARM
2163# Architecture.
2164
2165proc check_effective_target_arm_eabi { } {
2166 return [check_no_compiler_messages arm_eabi object {
2167 #ifndef __ARM_EABI__
2168 #error not EABI
2169 #else
2170 int dummy;
2171 #endif
2172 }]
2173}
2174
5399093b
MR
2175# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2176# Some multilibs may be incompatible with this option.
2177
2178proc check_effective_target_arm_iwmmxt_ok { } {
2179 if { [check_effective_target_arm32] } {
2180 return [check_no_compiler_messages arm_iwmmxt_ok object {
2181 int dummy;
2182 } "-mcpu=iwmmxt"]
2183 } else {
2184 return 0
2185 }
2186}
2187
1dbf8c24
JM
2188# Return 1 if this is a PowerPC target with floating-point registers.
2189
2190proc check_effective_target_powerpc_fprs { } {
2191 if { [istarget powerpc*-*-*]
2192 || [istarget rs6000-*-*] } {
2193 return [check_no_compiler_messages powerpc_fprs object {
2194 #ifdef __NO_FPRS__
2195 #error no FPRs
2196 #else
2197 int dummy;
2198 #endif
2199 }]
2200 } else {
2201 return 0
2202 }
2203}
2204
1b811175
JM
2205# Return 1 if this is a PowerPC target with hardware double-precision
2206# floating point.
2207
2208proc check_effective_target_powerpc_hard_double { } {
2209 if { [istarget powerpc*-*-*]
2210 || [istarget rs6000-*-*] } {
2211 return [check_no_compiler_messages powerpc_hard_double object {
2212 #ifdef _SOFT_DOUBLE
2213 #error soft double
2214 #else
2215 int dummy;
2216 #endif
2217 }]
2218 } else {
2219 return 0
2220 }
2221}
2222
1dbf8c24
JM
2223# Return 1 if this is a PowerPC target supporting -maltivec.
2224
2225proc check_effective_target_powerpc_altivec_ok { } {
e2e95f45
RE
2226 if { ([istarget powerpc*-*-*]
2227 && ![istarget powerpc-*-linux*paired*])
1dbf8c24 2228 || [istarget rs6000-*-*] } {
fc632f6e
DE
2229 # AltiVec is not supported on AIX before 5.3.
2230 if { [istarget powerpc*-*-aix4*]
2231 || [istarget powerpc*-*-aix5.1*]
2232 || [istarget powerpc*-*-aix5.2*] } {
1dbf8c24
JM
2233 return 0
2234 }
2235 return [check_no_compiler_messages powerpc_altivec_ok object {
2236 int dummy;
2237 } "-maltivec"]
2238 } else {
2239 return 0
2240 }
2241}
2242
29e6733c
MM
2243# Return 1 if this is a PowerPC target supporting -mvsx
2244
2245proc check_effective_target_powerpc_vsx_ok { } {
2246 if { ([istarget powerpc*-*-*]
2247 && ![istarget powerpc-*-linux*paired*])
2248 || [istarget rs6000-*-*] } {
2249 # AltiVec is not supported on AIX before 5.3.
2250 if { [istarget powerpc*-*-aix4*]
2251 || [istarget powerpc*-*-aix5.1*]
2252 || [istarget powerpc*-*-aix5.2*] } {
2253 return 0
2254 }
2255 return [check_no_compiler_messages powerpc_vsx_ok object {
2256 int main (void) {
2257#ifdef __MACH__
2258 asm volatile ("xxlor vs0,vs0,vs0");
2259#else
2260 asm volatile ("xxlor 0,0,0");
2261#endif
2262 return 0;
2263 }
2264 } "-mvsx"]
2265 } else {
2266 return 0
2267 }
2268}
2269
f7790b41
JJ
2270# Return 1 if this is a PowerPC target supporting -mcpu=cell.
2271
2272proc check_effective_target_powerpc_ppu_ok { } {
2273 if [check_effective_target_powerpc_altivec_ok] {
2274 return [check_no_compiler_messages cell_asm_available object {
2275 int main (void) {
2276#ifdef __MACH__
2277 asm volatile ("lvlx v0,v0,v0");
2278#else
2279 asm volatile ("lvlx 0,0,0");
2280#endif
2281 return 0;
2282 }
2283 }]
2284 } else {
2285 return 0
2286 }
2287}
2288
6dd116be
JJ
2289# Return 1 if this is a PowerPC target that supports SPU.
2290
2291proc check_effective_target_powerpc_spu { } {
19073ebc 2292 if { [istarget powerpc*-*-linux*] } {
6130e0f0
JM
2293 return [check_effective_target_powerpc_altivec_ok]
2294 } else {
2295 return 0
2296 }
6dd116be
JJ
2297}
2298
96a995c4
DJ
2299# Return 1 if this is a PowerPC SPE target. The check includes options
2300# specified by dg-options for this test, so don't cache the result.
2301
2302proc check_effective_target_powerpc_spe_nocache { } {
2303 if { [istarget powerpc*-*-*] } {
2304 return [check_no_compiler_messages_nocache powerpc_spe object {
2305 #ifndef __SPE__
2306 #error not SPE
2307 #else
2308 int dummy;
2309 #endif
2310 } [current_compiler_flags]]
2311 } else {
2312 return 0
2313 }
2314}
2315
624168de
JM
2316# Return 1 if this is a PowerPC target with SPE enabled.
2317
2318proc check_effective_target_powerpc_spe { } {
2319 if { [istarget powerpc*-*-*] } {
2320 return [check_no_compiler_messages powerpc_spe object {
2321 #ifndef __SPE__
2322 #error not SPE
2323 #else
2324 int dummy;
2325 #endif
2326 }]
2327 } else {
2328 return 0
2329 }
2330}
2331
5eb96b60
JM
2332# Return 1 if this is a PowerPC target with Altivec enabled.
2333
2334proc check_effective_target_powerpc_altivec { } {
2335 if { [istarget powerpc*-*-*] } {
2336 return [check_no_compiler_messages powerpc_altivec object {
2337 #ifndef __ALTIVEC__
2338 #error not Altivec
2339 #else
2340 int dummy;
2341 #endif
2342 }]
2343 } else {
2344 return 0
2345 }
2346}
2347
79ee9e8b
JS
2348# Return 1 if this is a PowerPC 405 target. The check includes options
2349# specified by dg-options for this test, so don't cache the result.
2350
2351proc check_effective_target_powerpc_405_nocache { } {
2352 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
2353 return [check_no_compiler_messages_nocache powerpc_405 object {
2354 #ifdef __PPC405__
2355 int dummy;
2356 #else
2357 #error not a PPC405
2358 #endif
2359 } [current_compiler_flags]]
2360 } else {
2361 return 0
2362 }
2363}
2364
73883255
UW
2365# Return 1 if this is a SPU target with a toolchain that
2366# supports automatic overlay generation.
2367
2368proc check_effective_target_spu_auto_overlay { } {
2369 if { [istarget spu*-*-elf*] } {
2370 return [check_no_compiler_messages spu_auto_overlay executable {
2371 int main (void) { }
2372 } "-Wl,--auto-overlay" ]
2373 } else {
2374 return 0
2375 }
2376}
2377
d566f2e6
NF
2378# The VxWorks SPARC simulator accepts only EM_SPARC executables and
2379# chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
2380# test environment appears to run executables on such a simulator.
2381
2382proc check_effective_target_ultrasparc_hw { } {
0ffd38c8
RS
2383 return [check_runtime ultrasparc_hw {
2384 int main() { return 0; }
2385 } "-mcpu=ultrasparc"]
d566f2e6
NF
2386}
2387
3e0de9d1
DP
2388# Return 1 if the target supports hardware vector shift operation.
2389
2390proc check_effective_target_vect_shift { } {
41a182c6
UB
2391 global et_vect_shift_saved
2392
2393 if [info exists et_vect_shift_saved] {
2394 verbose "check_effective_target_vect_shift: using cached result" 2
3e0de9d1 2395 } else {
41a182c6 2396 set et_vect_shift_saved 0
e2e95f45
RE
2397 if { ([istarget powerpc*-*-*]
2398 && ![istarget powerpc-*-linux*paired*])
41a182c6
UB
2399 || [istarget ia64-*-*]
2400 || [istarget i?86-*-*]
b61b26e4 2401 || [istarget x86_64-*-*]
0d108d15
MX
2402 || [check_effective_target_arm32]
2403 || ([istarget mips*-*-*]
2404 && [check_effective_target_mips_loongson]) } {
41a182c6
UB
2405 set et_vect_shift_saved 1
2406 }
3e0de9d1
DP
2407 }
2408
41a182c6
UB
2409 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
2410 return $et_vect_shift_saved
3e0de9d1
DP
2411}
2412
d92826be
IR
2413# Return 1 if the target supports hardware vector shift operation with
2414# scalar shift argument.
2415
2416proc check_effective_target_vect_shift_scalar { } {
2417 global et_vect_shift_scalar_saved
2418
2419 if [info exists et_vect_shift_scalar_saved] {
2420 verbose "check_effective_target_vect_shift_scalar: using cached result" 2
2421 } else {
2422 set et_vect_shift_scalar_saved 0
2423 if { [istarget x86_64-*-*]
2424 || [istarget i?86-*-*] } {
2425 set et_vect_shift_scalar_saved 1
2426 }
2427 }
2428
2429 verbose "check_effective_target_vect_shift_scalar: returning $et_vect_shift_scalar_saved" 2
2430 return $et_vect_shift_scalar_saved
2431}
2432
2433
cfc99488
DJ
2434# Return 1 if the target supports hardware vector shift operation for char.
2435
2436proc check_effective_target_vect_shift_char { } {
2437 global et_vect_shift_char_saved
2438
2439 if [info exists et_vect_shift_char_saved] {
2440 verbose "check_effective_target_vect_shift_char: using cached result" 2
2441 } else {
2442 set et_vect_shift_char_saved 0
2443 if { ([istarget powerpc*-*-*]
2444 && ![istarget powerpc-*-linux*paired*])
2445 || [check_effective_target_arm32] } {
2446 set et_vect_shift_char_saved 1
2447 }
2448 }
2449
2450 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
2451 return $et_vect_shift_char_saved
2452}
2453
31589ec6
RH
2454# Return 1 if the target supports hardware vectors of long, 0 otherwise.
2455#
f470b1e5 2456# This can change for different subtargets so do not cache the result.
31589ec6
RH
2457
2458proc check_effective_target_vect_long { } {
f470b1e5 2459 if { [istarget i?86-*-*]
e2e95f45
RE
2460 || (([istarget powerpc*-*-*]
2461 && ![istarget powerpc-*-linux*paired*])
2462 && [check_effective_target_ilp32])
f470b1e5 2463 || [istarget x86_64-*-*]
b61b26e4 2464 || [check_effective_target_arm32]
f470b1e5
JJ
2465 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
2466 set answer 1
31589ec6 2467 } else {
f470b1e5 2468 set answer 0
31589ec6
RH
2469 }
2470
f470b1e5
JJ
2471 verbose "check_effective_target_vect_long: returning $answer" 2
2472 return $answer
31589ec6
RH
2473}
2474
07d05ffd
JJ
2475# Return 1 if the target supports hardware vectors of float, 0 otherwise.
2476#
2477# This won't change for different subtargets so cache the result.
2478
2479proc check_effective_target_vect_float { } {
2480 global et_vect_float_saved
2481
2482 if [info exists et_vect_float_saved] {
2483 verbose "check_effective_target_vect_float: using cached result" 2
2484 } else {
2485 set et_vect_float_saved 0
2486 if { [istarget i?86-*-*]
2487 || [istarget powerpc*-*-*]
0f6909b9 2488 || [istarget spu-*-*]
07d05ffd 2489 || [istarget mipsisa64*-*-*]
f61134e8 2490 || [istarget x86_64-*-*]
b61b26e4
JM
2491 || [istarget ia64-*-*]
2492 || [check_effective_target_arm32] } {
07d05ffd
JJ
2493 set et_vect_float_saved 1
2494 }
2495 }
2496
2497 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
2498 return $et_vect_float_saved
2499}
2500
2501# Return 1 if the target supports hardware vectors of double, 0 otherwise.
2502#
2503# This won't change for different subtargets so cache the result.
2504
2505proc check_effective_target_vect_double { } {
2506 global et_vect_double_saved
2507
2508 if [info exists et_vect_double_saved] {
2509 verbose "check_effective_target_vect_double: using cached result" 2
2510 } else {
2511 set et_vect_double_saved 0
2512 if { [istarget i?86-*-*]
e72eba85
L
2513 || [istarget x86_64-*-*] } {
2514 if { [check_no_compiler_messages vect_double assembly {
2515 #ifdef __tune_atom__
2516 # error No double vectorizer support.
2517 #endif
2518 }] } {
2519 set et_vect_double_saved 1
2520 } else {
2521 set et_vect_double_saved 0
2522 }
2523 } elseif { [istarget spu-*-*] } {
07d05ffd
JJ
2524 set et_vect_double_saved 1
2525 }
2526 }
2527
2528 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
2529 return $et_vect_double_saved
2530}
2531
5d593372
IR
2532# Return 1 if the target supports hardware vectors of long long, 0 otherwise.
2533#
2534# This won't change for different subtargets so cache the result.
2535
2536proc check_effective_target_vect_long_long { } {
2537 global et_vect_long_long_saved
2538
2539 if [info exists et_vect_long_long_saved] {
2540 verbose "check_effective_target_vect_long_long: using cached result" 2
2541 } else {
2542 set et_vect_long_long_saved 0
2543 if { [istarget i?86-*-*]
d0011a1a 2544 || [istarget x86_64-*-*] } {
5d593372
IR
2545 set et_vect_long_long_saved 1
2546 }
2547 }
2548
2549 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
2550 return $et_vect_long_long_saved
2551}
2552
2553
eeea13c2 2554# Return 1 if the target plus current options does not support a vector
d5dfe0b8 2555# max instruction on "int", 0 otherwise.
eeea13c2
JJ
2556#
2557# This won't change for different subtargets so cache the result.
2558
d5dfe0b8
RH
2559proc check_effective_target_vect_no_int_max { } {
2560 global et_vect_no_int_max_saved
eeea13c2 2561
d5dfe0b8
RH
2562 if [info exists et_vect_no_int_max_saved] {
2563 verbose "check_effective_target_vect_no_int_max: using cached result" 2
eeea13c2 2564 } else {
d5dfe0b8 2565 set et_vect_no_int_max_saved 0
9fb93f89 2566 if { [istarget sparc*-*-*]
0f6909b9 2567 || [istarget spu-*-*]
0d108d15
MX
2568 || [istarget alpha*-*-*]
2569 || ([istarget mips*-*-*]
2570 && [check_effective_target_mips_loongson]) } {
d5dfe0b8 2571 set et_vect_no_int_max_saved 1
eeea13c2
JJ
2572 }
2573 }
d5dfe0b8
RH
2574 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
2575 return $et_vect_no_int_max_saved
2576}
2577
2578# Return 1 if the target plus current options does not support a vector
2579# add instruction on "int", 0 otherwise.
2580#
2581# This won't change for different subtargets so cache the result.
2582
2583proc check_effective_target_vect_no_int_add { } {
2584 global et_vect_no_int_add_saved
2585
2586 if [info exists et_vect_no_int_add_saved] {
2587 verbose "check_effective_target_vect_no_int_add: using cached result" 2
2588 } else {
2589 set et_vect_no_int_add_saved 0
2590 # Alpha only supports vector add on V8QI and V4HI.
2591 if { [istarget alpha*-*-*] } {
2592 set et_vect_no_int_add_saved 1
2593 }
2594 }
2595 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
2596 return $et_vect_no_int_add_saved
eeea13c2
JJ
2597}
2598
2599# Return 1 if the target plus current options does not support vector
2600# bitwise instructions, 0 otherwise.
2601#
2602# This won't change for different subtargets so cache the result.
2603
2604proc check_effective_target_vect_no_bitwise { } {
2605 global et_vect_no_bitwise_saved
2606
2607 if [info exists et_vect_no_bitwise_saved] {
2608 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
2609 } else {
2610 set et_vect_no_bitwise_saved 0
eeea13c2
JJ
2611 }
2612 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
2613 return $et_vect_no_bitwise_saved
2614}
2615
0fca40f5
IR
2616# Return 1 if the target plus current options supports vector permutation,
2617# 0 otherwise.
2618#
2619# This won't change for different subtargets so cache the result.
2620
2621proc check_effective_target_vect_perm { } {
2622 global et_vect_perm
2623
2624 if [info exists et_vect_perm_saved] {
2625 verbose "check_effective_target_vect_perm: using cached result" 2
2626 } else {
2627 set et_vect_perm_saved 0
2628 if { [istarget powerpc*-*-*]
18ba3ce7 2629 || [istarget spu-*-*]
5e979df3 2630 || [istarget i?86-*-*]
18ba3ce7 2631 || [istarget x86_64-*-*] } {
0fca40f5
IR
2632 set et_vect_perm_saved 1
2633 }
2634 }
2635 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
2636 return $et_vect_perm_saved
2637}
2638
18ba3ce7
MM
2639# Return 1 if the target plus current options supports vector permutation
2640# on byte-sized elements, 0 otherwise.
2641#
2642# This won't change for different subtargets so cache the result.
2643
2644proc check_effective_target_vect_perm_byte { } {
2645 global et_vect_perm_byte
2646
2647 if [info exists et_vect_perm_byte_saved] {
2648 verbose "check_effective_target_vect_perm_byte: using cached result" 2
2649 } else {
2650 set et_vect_perm_byte_saved 0
2651 if { [istarget powerpc*-*-*]
2652 || [istarget spu-*-*] } {
2653 set et_vect_perm_byte_saved 1
2654 }
2655 }
2656 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
2657 return $et_vect_perm_byte_saved
2658}
2659
2660# Return 1 if the target plus current options supports vector permutation
2661# on short-sized elements, 0 otherwise.
2662#
2663# This won't change for different subtargets so cache the result.
2664
2665proc check_effective_target_vect_perm_short { } {
2666 global et_vect_perm_short
2667
2668 if [info exists et_vect_perm_short_saved] {
2669 verbose "check_effective_target_vect_perm_short: using cached result" 2
2670 } else {
2671 set et_vect_perm_short_saved 0
2672 if { [istarget powerpc*-*-*]
2673 || [istarget spu-*-*] } {
2674 set et_vect_perm_short_saved 1
2675 }
2676 }
2677 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
2678 return $et_vect_perm_short_saved
2679}
2680
b5aeb3bb
IR
2681# Return 1 if the target plus current options supports a vector
2682# widening summation of *short* args into *int* result, 0 otherwise.
2683#
2684# This won't change for different subtargets so cache the result.
2685
2686proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
2687 global et_vect_widen_sum_hi_to_si_pattern
2688
2689 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
2690 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
2691 } else {
2692 set et_vect_widen_sum_hi_to_si_pattern_saved 0
604e3ff3
RH
2693 if { [istarget powerpc*-*-*]
2694 || [istarget ia64-*-*] } {
b5aeb3bb
IR
2695 set et_vect_widen_sum_hi_to_si_pattern_saved 1
2696 }
2697 }
2698 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
2699 return $et_vect_widen_sum_hi_to_si_pattern_saved
2700}
0fca40f5 2701
4035f245
VK
2702# Return 1 if the target plus current options supports a vector
2703# widening summation of *short* args into *int* result, 0 otherwise.
89d67cca
DN
2704# A target can also support this widening summation if it can support
2705# promotion (unpacking) from shorts to ints.
4035f245
VK
2706#
2707# This won't change for different subtargets so cache the result.
2708
2709proc check_effective_target_vect_widen_sum_hi_to_si { } {
2710 global et_vect_widen_sum_hi_to_si
89d67cca 2711
4035f245
VK
2712 if [info exists et_vect_widen_sum_hi_to_si_saved] {
2713 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
2714 } else {
89d67cca 2715 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
01c104ef
DN
2716 if { [istarget powerpc*-*-*]
2717 || [istarget ia64-*-*] } {
4035f245
VK
2718 set et_vect_widen_sum_hi_to_si_saved 1
2719 }
2720 }
2721 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
2722 return $et_vect_widen_sum_hi_to_si_saved
2723}
2724
2725# Return 1 if the target plus current options supports a vector
2726# widening summation of *char* args into *short* result, 0 otherwise.
89d67cca
DN
2727# A target can also support this widening summation if it can support
2728# promotion (unpacking) from chars to shorts.
4035f245
VK
2729#
2730# This won't change for different subtargets so cache the result.
2731
2732proc check_effective_target_vect_widen_sum_qi_to_hi { } {
2733 global et_vect_widen_sum_qi_to_hi
89d67cca 2734
4035f245
VK
2735 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
2736 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
2737 } else {
2738 set et_vect_widen_sum_qi_to_hi_saved 0
01c104ef
DN
2739 if { [check_effective_target_vect_unpack]
2740 || [istarget ia64-*-*] } {
4035f245 2741 set et_vect_widen_sum_qi_to_hi_saved 1
89d67cca 2742 }
4035f245
VK
2743 }
2744 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
2745 return $et_vect_widen_sum_qi_to_hi_saved
2746}
2747
2748# Return 1 if the target plus current options supports a vector
2749# widening summation of *char* args into *int* result, 0 otherwise.
2750#
2751# This won't change for different subtargets so cache the result.
2752
2753proc check_effective_target_vect_widen_sum_qi_to_si { } {
2754 global et_vect_widen_sum_qi_to_si
89d67cca 2755
4035f245
VK
2756 if [info exists et_vect_widen_sum_qi_to_si_saved] {
2757 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
2758 } else {
2759 set et_vect_widen_sum_qi_to_si_saved 0
2760 if { [istarget powerpc*-*-*] } {
2761 set et_vect_widen_sum_qi_to_si_saved 1
2762 }
2763 }
2764 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
2765 return $et_vect_widen_sum_qi_to_si_saved
2766}
2767
20f06221 2768# Return 1 if the target plus current options supports a vector
89d67cca
DN
2769# widening multiplication of *char* args into *short* result, 0 otherwise.
2770# A target can also support this widening multplication if it can support
2771# promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
2772# multiplication of shorts).
20f06221
DN
2773#
2774# This won't change for different subtargets so cache the result.
89d67cca
DN
2775
2776
2777proc check_effective_target_vect_widen_mult_qi_to_hi { } {
2778 global et_vect_widen_mult_qi_to_hi
2779
2780 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
2781 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
20f06221 2782 } else {
89d67cca
DN
2783 if { [check_effective_target_vect_unpack]
2784 && [check_effective_target_vect_short_mult] } {
2785 set et_vect_widen_mult_qi_to_hi_saved 1
2786 } else {
2787 set et_vect_widen_mult_qi_to_hi_saved 0
2788 }
383d9c83
IR
2789 if { [istarget powerpc*-*-*]
2790 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
89d67cca 2791 set et_vect_widen_mult_qi_to_hi_saved 1
20f06221
DN
2792 }
2793 }
89d67cca
DN
2794 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
2795 return $et_vect_widen_mult_qi_to_hi_saved
2796}
2797
2798# Return 1 if the target plus current options supports a vector
2799# widening multiplication of *short* args into *int* result, 0 otherwise.
2800# A target can also support this widening multplication if it can support
2801# promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
2802# multiplication of ints).
2803#
2804# This won't change for different subtargets so cache the result.
2805
2806
2807proc check_effective_target_vect_widen_mult_hi_to_si { } {
2808 global et_vect_widen_mult_hi_to_si
2809
2810 if [info exists et_vect_widen_mult_hi_to_si_saved] {
2811 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
2812 } else {
2813 if { [check_effective_target_vect_unpack]
2814 && [check_effective_target_vect_int_mult] } {
2815 set et_vect_widen_mult_hi_to_si_saved 1
2816 } else {
2817 set et_vect_widen_mult_hi_to_si_saved 0
2818 }
0e9dac9e 2819 if { [istarget powerpc*-*-*]
c882a2c2 2820 || [istarget spu-*-*]
604e3ff3 2821 || [istarget ia64-*-*]
0e9dac9e 2822 || [istarget i?86-*-*]
383d9c83
IR
2823 || [istarget x86_64-*-*]
2824 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
89d67cca
DN
2825 set et_vect_widen_mult_hi_to_si_saved 1
2826 }
2827 }
2828 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
2829 return $et_vect_widen_mult_hi_to_si_saved
20f06221
DN
2830}
2831
383d9c83
IR
2832# Return 1 if the target plus current options supports a vector
2833# widening multiplication of *char* args into *short* result, 0 otherwise.
2834#
2835# This won't change for different subtargets so cache the result.
2836
2837proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
2838 global et_vect_widen_mult_qi_to_hi_pattern
2839
2840 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
2841 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
2842 } else {
2843 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
2844 if { [istarget powerpc*-*-*]
2845 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
2846 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
2847 }
2848 }
2849 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
2850 return $et_vect_widen_mult_qi_to_hi_pattern_saved
2851}
2852
2853# Return 1 if the target plus current options supports a vector
2854# widening multiplication of *short* args into *int* result, 0 otherwise.
2855#
2856# This won't change for different subtargets so cache the result.
2857
2858proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
2859 global et_vect_widen_mult_hi_to_si_pattern
2860
2861 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
2862 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
2863 } else {
2864 set et_vect_widen_mult_hi_to_si_pattern_saved 0
2865 if { [istarget powerpc*-*-*]
2866 || [istarget spu-*-*]
2867 || [istarget ia64-*-*]
2868 || [istarget i?86-*-*]
2869 || [istarget x86_64-*-*]
2870 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
2871 set et_vect_widen_mult_hi_to_si_pattern_saved 1
2872 }
2873 }
2874 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
2875 return $et_vect_widen_mult_hi_to_si_pattern_saved
2876}
2877
20f06221
DN
2878# Return 1 if the target plus current options supports a vector
2879# dot-product of signed chars, 0 otherwise.
2880#
2881# This won't change for different subtargets so cache the result.
2882
2883proc check_effective_target_vect_sdot_qi { } {
2884 global et_vect_sdot_qi
2885
2886 if [info exists et_vect_sdot_qi_saved] {
2887 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
2888 } else {
2889 set et_vect_sdot_qi_saved 0
604e3ff3
RH
2890 if { [istarget ia64-*-*] } {
2891 set et_vect_udot_qi_saved 1
2892 }
20f06221
DN
2893 }
2894 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
2895 return $et_vect_sdot_qi_saved
2896}
2897
2898# Return 1 if the target plus current options supports a vector
2899# dot-product of unsigned chars, 0 otherwise.
2900#
2901# This won't change for different subtargets so cache the result.
2902
2903proc check_effective_target_vect_udot_qi { } {
2904 global et_vect_udot_qi
2905
2906 if [info exists et_vect_udot_qi_saved] {
2907 verbose "check_effective_target_vect_udot_qi: using cached result" 2
2908 } else {
2909 set et_vect_udot_qi_saved 0
604e3ff3
RH
2910 if { [istarget powerpc*-*-*]
2911 || [istarget ia64-*-*] } {
20f06221
DN
2912 set et_vect_udot_qi_saved 1
2913 }
2914 }
2915 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
2916 return $et_vect_udot_qi_saved
2917}
2918
2919# Return 1 if the target plus current options supports a vector
2920# dot-product of signed shorts, 0 otherwise.
2921#
2922# This won't change for different subtargets so cache the result.
2923
2924proc check_effective_target_vect_sdot_hi { } {
2925 global et_vect_sdot_hi
2926
2927 if [info exists et_vect_sdot_hi_saved] {
2928 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
2929 } else {
2930 set et_vect_sdot_hi_saved 0
e2e95f45 2931 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
604e3ff3 2932 || [istarget ia64-*-*]
20f06221 2933 || [istarget i?86-*-*]
89d67cca 2934 || [istarget x86_64-*-*] } {
20f06221
DN
2935 set et_vect_sdot_hi_saved 1
2936 }
2937 }
2938 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
2939 return $et_vect_sdot_hi_saved
2940}
2941
2942# Return 1 if the target plus current options supports a vector
2943# dot-product of unsigned shorts, 0 otherwise.
2944#
2945# This won't change for different subtargets so cache the result.
2946
2947proc check_effective_target_vect_udot_hi { } {
2948 global et_vect_udot_hi
2949
2950 if [info exists et_vect_udot_hi_saved] {
2951 verbose "check_effective_target_vect_udot_hi: using cached result" 2
2952 } else {
2953 set et_vect_udot_hi_saved 0
e2e95f45 2954 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
20f06221
DN
2955 set et_vect_udot_hi_saved 1
2956 }
2957 }
2958 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
2959 return $et_vect_udot_hi_saved
2960}
2961
2962
89d67cca
DN
2963# Return 1 if the target plus current options supports a vector
2964# demotion (packing) of shorts (to chars) and ints (to shorts)
2965# using modulo arithmetic, 0 otherwise.
2966#
2967# This won't change for different subtargets so cache the result.
2968
8b3cc882
UB
2969proc check_effective_target_vect_pack_trunc { } {
2970 global et_vect_pack_trunc
89d67cca 2971
8b3cc882
UB
2972 if [info exists et_vect_pack_trunc_saved] {
2973 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
89d67cca 2974 } else {
8b3cc882 2975 set et_vect_pack_trunc_saved 0
e2e95f45 2976 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
89d67cca 2977 || [istarget i?86-*-*]
8ff27c24 2978 || [istarget x86_64-*-*]
0f38f229 2979 || [istarget spu-*-*]
0094f21b
JB
2980 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]
2981 && [check_effective_target_arm_little_endian]) } {
8b3cc882 2982 set et_vect_pack_trunc_saved 1
89d67cca
DN
2983 }
2984 }
8b3cc882
UB
2985 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
2986 return $et_vect_pack_trunc_saved
89d67cca
DN
2987}
2988
2989# Return 1 if the target plus current options supports a vector
2990# promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
2991#
2992# This won't change for different subtargets so cache the result.
2993
2994proc check_effective_target_vect_unpack { } {
2995 global et_vect_unpack
2996
2997 if [info exists et_vect_unpack_saved] {
2998 verbose "check_effective_target_vect_unpack: using cached result" 2
2999 } else {
3000 set et_vect_unpack_saved 0
e2e95f45 3001 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
89d67cca 3002 || [istarget i?86-*-*]
76a893cf 3003 || [istarget x86_64-*-*]
46b57af1 3004 || [istarget spu-*-*]
604e3ff3 3005 || [istarget ia64-*-*]
0094f21b
JB
3006 || ([istarget arm*-*-*] && [check_effective_target_arm_neon]
3007 && [check_effective_target_arm_little_endian]) } {
89d67cca
DN
3008 set et_vect_unpack_saved 1
3009 }
3010 }
3011 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
3012 return $et_vect_unpack_saved
3013}
3014
a96681aa
DN
3015# Return 1 if the target plus current options does not guarantee
3016# that its STACK_BOUNDARY is >= the reguired vector alignment.
3017#
3018# This won't change for different subtargets so cache the result.
3019
3020proc check_effective_target_unaligned_stack { } {
3021 global et_unaligned_stack_saved
3022
3023 if [info exists et_unaligned_stack_saved] {
3024 verbose "check_effective_target_unaligned_stack: using cached result" 2
3025 } else {
3026 set et_unaligned_stack_saved 0
a96681aa
DN
3027 }
3028 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
3029 return $et_unaligned_stack_saved
3030}
3031
eeea13c2
JJ
3032# Return 1 if the target plus current options does not support a vector
3033# alignment mechanism, 0 otherwise.
3034#
3035# This won't change for different subtargets so cache the result.
3036
3037proc check_effective_target_vect_no_align { } {
3038 global et_vect_no_align_saved
3039
3040 if [info exists et_vect_no_align_saved] {
3041 verbose "check_effective_target_vect_no_align: using cached result" 2
3042 } else {
3043 set et_vect_no_align_saved 0
3e8aba34 3044 if { [istarget mipsisa64*-*-*]
f61134e8 3045 || [istarget sparc*-*-*]
b61b26e4 3046 || [istarget ia64-*-*]
c452684d 3047 || [check_effective_target_arm_vect_no_misalign]
0d108d15
MX
3048 || ([istarget mips*-*-*]
3049 && [check_effective_target_mips_loongson]) } {
eeea13c2
JJ
3050 set et_vect_no_align_saved 1
3051 }
3052 }
3053 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
3054 return $et_vect_no_align_saved
3055}
3056
8f439681
RE
3057# Return 1 if the target supports a vector misalign access, 0 otherwise.
3058#
3059# This won't change for different subtargets so cache the result.
3060
3061proc check_effective_target_vect_hw_misalign { } {
3062 global et_vect_hw_misalign_saved
3063
3064 if [info exists et_vect_hw_misalign_saved] {
3065 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
3066 } else {
3067 set et_vect_hw_misalign_saved 0
06ddd871
RE
3068 if { ([istarget x86_64-*-*]
3069 || [istarget i?86-*-*]) } {
8f439681
RE
3070 set et_vect_hw_misalign_saved 1
3071 }
3072 }
3073 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
3074 return $et_vect_hw_misalign_saved
3075}
3076
3077
e3b715a0
UB
3078# Return 1 if arrays are aligned to the vector alignment
3079# boundary, 0 otherwise.
5de7f07c
UB
3080#
3081# This won't change for different subtargets so cache the result.
3082
3083proc check_effective_target_vect_aligned_arrays { } {
3084 global et_vect_aligned_arrays
3085
3086 if [info exists et_vect_aligned_arrays_saved] {
3087 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
3088 } else {
3089 set et_vect_aligned_arrays_saved 0
8d0e5316
IR
3090 if { (([istarget x86_64-*-*]
3091 || [istarget i?86-*-*]) && [is-effective-target lp64])
3092 || [istarget spu-*-*] } {
5de7f07c
UB
3093 set et_vect_aligned_arrays_saved 1
3094 }
3095 }
3096 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
3097 return $et_vect_aligned_arrays_saved
3098}
3099
8d0e5316
IR
3100# Return 1 if types of size 32 bit or less are naturally aligned
3101# (aligned to their type-size), 0 otherwise.
3102#
3103# This won't change for different subtargets so cache the result.
3104
3105proc check_effective_target_natural_alignment_32 { } {
3106 global et_natural_alignment_32
3107
3108 if [info exists et_natural_alignment_32_saved] {
3109 verbose "check_effective_target_natural_alignment_32: using cached result" 2
3110 } else {
3111 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
3112 set et_natural_alignment_32_saved 1
3113 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
3114 set et_natural_alignment_32_saved 0
3115 }
3116 }
3117 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
3118 return $et_natural_alignment_32_saved
3119}
3120
3121# Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
3122# type-size), 0 otherwise.
99c9c69a
DN
3123#
3124# This won't change for different subtargets so cache the result.
3125
8d0e5316
IR
3126proc check_effective_target_natural_alignment_64 { } {
3127 global et_natural_alignment_64
99c9c69a 3128
8d0e5316
IR
3129 if [info exists et_natural_alignment_64_saved] {
3130 verbose "check_effective_target_natural_alignment_64: using cached result" 2
99c9c69a 3131 } else {
8d0e5316
IR
3132 set et_natural_alignment_64_saved 0
3133 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
3134 || [istarget spu-*-*] } {
3135 set et_natural_alignment_64_saved 1
99c9c69a
DN
3136 }
3137 }
8d0e5316
IR
3138 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
3139 return $et_natural_alignment_64_saved
99c9c69a
DN
3140}
3141
8d0e5316 3142# Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
99c9c69a
DN
3143#
3144# This won't change for different subtargets so cache the result.
3145
3146proc check_effective_target_vector_alignment_reachable { } {
3147 global et_vector_alignment_reachable
3148
3149 if [info exists et_vector_alignment_reachable_saved] {
3150 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
3151 } else {
3152 if { [check_effective_target_vect_aligned_arrays]
8d0e5316 3153 || [check_effective_target_natural_alignment_32] } {
99c9c69a
DN
3154 set et_vector_alignment_reachable_saved 1
3155 } else {
3156 set et_vector_alignment_reachable_saved 0
3157 }
3158 }
3159 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
3160 return $et_vector_alignment_reachable_saved
3161}
3162
8d0e5316 3163# Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
b11040a8
DN
3164#
3165# This won't change for different subtargets so cache the result.
3166
8d0e5316
IR
3167proc check_effective_target_vector_alignment_reachable_for_64bit { } {
3168 global et_vector_alignment_reachable_for_64bit
b11040a8 3169
8d0e5316
IR
3170 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
3171 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
b11040a8 3172 } else {
8d0e5316
IR
3173 if { [check_effective_target_vect_aligned_arrays]
3174 || [check_effective_target_natural_alignment_64] } {
3175 set et_vector_alignment_reachable_for_64bit_saved 1
b11040a8 3176 } else {
8d0e5316 3177 set et_vector_alignment_reachable_for_64bit_saved 0
b11040a8
DN
3178 }
3179 }
8d0e5316
IR
3180 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
3181 return $et_vector_alignment_reachable_for_64bit_saved
b11040a8
DN
3182}
3183
c452684d
JB
3184# Return 1 if the target only requires element alignment for vector accesses
3185
3186proc check_effective_target_vect_element_align { } {
3187 global et_vect_element_align
3188
3189 if [info exists et_vect_element_align] {
3190 verbose "check_effective_target_vect_element_align: using cached result" 2
3191 } else {
3192 set et_vect_element_align 0
0094f21b
JB
3193 if { ([istarget arm*-*-*]
3194 && ![check_effective_target_arm_vect_no_misalign])
c452684d
JB
3195 || [check_effective_target_vect_hw_misalign] } {
3196 set et_vect_element_align 1
3197 }
3198 }
3199
3200 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
3201 return $et_vect_element_align
3202}
3203
b52485c6
DP
3204# Return 1 if the target supports vector conditional operations, 0 otherwise.
3205
3206proc check_effective_target_vect_condition { } {
3207 global et_vect_cond_saved
3208
41a182c6 3209 if [info exists et_vect_cond_saved] {
b52485c6
DP
3210 verbose "check_effective_target_vect_cond: using cached result" 2
3211 } else {
3212 set et_vect_cond_saved 0
ae46a07a
RH
3213 if { [istarget powerpc*-*-*]
3214 || [istarget ia64-*-*]
3215 || [istarget i?86-*-*]
39aeae85 3216 || [istarget spu-*-*]
ae46a07a 3217 || [istarget x86_64-*-*] } {
b52485c6
DP
3218 set et_vect_cond_saved 1
3219 }
3220 }
3221
3222 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
3223 return $et_vect_cond_saved
3224}
3225
4035f245
VK
3226# Return 1 if the target supports vector char multiplication, 0 otherwise.
3227
3228proc check_effective_target_vect_char_mult { } {
3229 global et_vect_char_mult_saved
3230
3231 if [info exists et_vect_char_mult_saved] {
3232 verbose "check_effective_target_vect_char_mult: using cached result" 2
3233 } else {
3234 set et_vect_char_mult_saved 0
3235 if { [istarget ia64-*-*]
3236 || [istarget i?86-*-*]
3237 || [istarget x86_64-*-*] } {
3238 set et_vect_char_mult_saved 1
3239 }
3240 }
3241
3242 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
3243 return $et_vect_char_mult_saved
3244}
3245
3246# Return 1 if the target supports vector short multiplication, 0 otherwise.
3247
3248proc check_effective_target_vect_short_mult { } {
3249 global et_vect_short_mult_saved
3250
3251 if [info exists et_vect_short_mult_saved] {
3252 verbose "check_effective_target_vect_short_mult: using cached result" 2
3253 } else {
3254 set et_vect_short_mult_saved 0
3255 if { [istarget ia64-*-*]
76a893cf 3256 || [istarget spu-*-*]
4035f245 3257 || [istarget i?86-*-*]
65a324b4 3258 || [istarget x86_64-*-*]
0d108d15
MX
3259 || [istarget powerpc*-*-*]
3260 || [check_effective_target_arm32]
3261 || ([istarget mips*-*-*]
3262 && [check_effective_target_mips_loongson]) } {
4035f245
VK
3263 set et_vect_short_mult_saved 1
3264 }
3265 }
3266
3267 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
3268 return $et_vect_short_mult_saved
3269}
3270
a45f6936
DP
3271# Return 1 if the target supports vector int multiplication, 0 otherwise.
3272
3273proc check_effective_target_vect_int_mult { } {
3274 global et_vect_int_mult_saved
3275
f12b785d 3276 if [info exists et_vect_int_mult_saved] {
a45f6936
DP
3277 verbose "check_effective_target_vect_int_mult: using cached result" 2
3278 } else {
3279 set et_vect_int_mult_saved 0
e2e95f45 3280 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
e95b59d2 3281 || [istarget spu-*-*]
2b5bf0e2 3282 || [istarget i?86-*-*]
b61b26e4 3283 || [istarget x86_64-*-*]
604e3ff3 3284 || [istarget ia64-*-*]
b61b26e4 3285 || [check_effective_target_arm32] } {
a45f6936
DP
3286 set et_vect_int_mult_saved 1
3287 }
3288 }
3289
3290 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
3291 return $et_vect_int_mult_saved
3292}
b52485c6 3293
98b44b0e
IR
3294# Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
3295
3296proc check_effective_target_vect_extract_even_odd { } {
3297 global et_vect_extract_even_odd_saved
3298
3299 if [info exists et_vect_extract_even_odd_saved] {
3300 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
3301 } else {
3302 set et_vect_extract_even_odd_saved 0
0fac5151
RH
3303 if { [istarget powerpc*-*-*]
3304 || [istarget i?86-*-*]
3305 || [istarget x86_64-*-*]
604e3ff3 3306 || [istarget ia64-*-*]
8ff27c24 3307 || [istarget spu-*-*] } {
98b44b0e
IR
3308 set et_vect_extract_even_odd_saved 1
3309 }
3310 }
3311
3312 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
3313 return $et_vect_extract_even_odd_saved
3314}
3315
3316# Return 1 if the target supports vector interleaving, 0 otherwise.
3317
3318proc check_effective_target_vect_interleave { } {
3319 global et_vect_interleave_saved
3320
3321 if [info exists et_vect_interleave_saved] {
3322 verbose "check_effective_target_vect_interleave: using cached result" 2
3323 } else {
3324 set et_vect_interleave_saved 0
3325 if { [istarget powerpc*-*-*]
3326 || [istarget i?86-*-*]
8ff27c24 3327 || [istarget x86_64-*-*]
604e3ff3 3328 || [istarget ia64-*-*]
8ff27c24 3329 || [istarget spu-*-*] } {
98b44b0e
IR
3330 set et_vect_interleave_saved 1
3331 }
3332 }
3333
3334 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
3335 return $et_vect_interleave_saved
3336}
3337
9afa0361
RS
3338foreach N {2 3 4 8} {
3339 eval [string map [list N $N] {
3340 # Return 1 if the target supports 2-vector interleaving
3341 proc check_effective_target_vect_stridedN { } {
3342 global et_vect_stridedN_saved
3343
3344 if [info exists et_vect_stridedN_saved] {
3345 verbose "check_effective_target_vect_stridedN: using cached result" 2
3346 } else {
3347 set et_vect_stridedN_saved 0
3348 if { (N & -N) == N
3349 && [check_effective_target_vect_interleave]
3350 && [check_effective_target_vect_extract_even_odd] } {
3351 set et_vect_stridedN_saved 1
3352 }
3353 if { [istarget arm*-*-*] && N >= 2 && N <= 4 } {
3354 set et_vect_stridedN_saved 1
3355 }
3356 }
805e2059 3357
9afa0361
RS
3358 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
3359 return $et_vect_stridedN_saved
3360 }
3361 }]
805e2059
IR
3362}
3363
0be79f24
DN
3364# Return 1 if the target supports section-anchors
3365
3366proc check_effective_target_section_anchors { } {
3367 global et_section_anchors_saved
3368
3369 if [info exists et_section_anchors_saved] {
3370 verbose "check_effective_target_section_anchors: using cached result" 2
3371 } else {
3372 set et_section_anchors_saved 0
65a324b4 3373 if { [istarget powerpc*-*-*]
cba146eb 3374 || [istarget arm*-*-*] } {
0be79f24
DN
3375 set et_section_anchors_saved 1
3376 }
3377 }
3378
3379 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
3380 return $et_section_anchors_saved
3381}
3382
f12b785d
RH
3383# Return 1 if the target supports atomic operations on "int" and "long".
3384
3385proc check_effective_target_sync_int_long { } {
3386 global et_sync_int_long_saved
3387
3388 if [info exists et_sync_int_long_saved] {
3389 verbose "check_effective_target_sync_int_long: using cached result" 2
3390 } else {
3391 set et_sync_int_long_saved 0
915167f5
GK
3392# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
3393# load-reserved/store-conditional instructions.
f12b785d
RH
3394 if { [istarget ia64-*-*]
3395 || [istarget i?86-*-*]
3396 || [istarget x86_64-*-*]
915167f5 3397 || [istarget alpha*-*-*]
17fec01d 3398 || [istarget arm*-*-linux-gnueabi]
9840d30a 3399 || [istarget bfin*-*linux*]
4d053ac1 3400 || [istarget hppa*-*linux*]
89a590b3 3401 || [istarget s390*-*-*]
396b535a
JJ
3402 || [istarget powerpc*-*-*]
3403 || [istarget sparc64-*-*]
977502ff
DD
3404 || [istarget sparcv9-*-*]
3405 || [istarget mips*-*-*] } {
f12b785d
RH
3406 set et_sync_int_long_saved 1
3407 }
3408 }
3409
3410 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
3411 return $et_sync_int_long_saved
3412}
3413
bc0f348e
GK
3414# Return 1 if the target supports atomic operations on "char" and "short".
3415
3416proc check_effective_target_sync_char_short { } {
3417 global et_sync_char_short_saved
3418
3419 if [info exists et_sync_char_short_saved] {
3420 verbose "check_effective_target_sync_char_short: using cached result" 2
3421 } else {
3422 set et_sync_char_short_saved 0
3423# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
3424# load-reserved/store-conditional instructions.
3425 if { [istarget ia64-*-*]
3426 || [istarget i?86-*-*]
3427 || [istarget x86_64-*-*]
38f31687 3428 || [istarget alpha*-*-*]
17fec01d 3429 || [istarget arm*-*-linux-gnueabi]
4d053ac1 3430 || [istarget hppa*-*linux*]
3093f076 3431 || [istarget s390*-*-*]
396b535a
JJ
3432 || [istarget powerpc*-*-*]
3433 || [istarget sparc64-*-*]
977502ff
DD
3434 || [istarget sparcv9-*-*]
3435 || [istarget mips*-*-*] } {
bc0f348e
GK
3436 set et_sync_char_short_saved 1
3437 }
3438 }
3439
3440 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
3441 return $et_sync_char_short_saved
3442}
3443
7fc564b7
RS
3444# Return 1 if the target uses a ColdFire FPU.
3445
3446proc check_effective_target_coldfire_fpu { } {
3447 return [check_no_compiler_messages coldfire_fpu assembly {
3448 #ifndef __mcffpu__
3449 #error FOO
3450 #endif
3451 }]
3452}
3453
2755c056
RS
3454# Return true if this is a uClibc target.
3455
3456proc check_effective_target_uclibc {} {
3457 return [check_no_compiler_messages uclibc object {
3458 #include <features.h>
3459 #if !defined (__UCLIBC__)
3460 #error FOO
3461 #endif
3462 }]
3463}
3464
e6625c44
RS
3465# Return true if this is a uclibc target and if the uclibc feature
3466# described by __$feature__ is not present.
3467
3468proc check_missing_uclibc_feature {feature} {
7a27dc2f
RS
3469 return [check_no_compiler_messages $feature object "
3470 #include <features.h>
3811dfcd 3471 #if !defined (__UCLIBC) || defined (__${feature}__)
7a27dc2f
RS
3472 #error FOO
3473 #endif
3474 "]
e6625c44
RS
3475}
3476
8371ec74
MM
3477# Return true if this is a Newlib target.
3478
3479proc check_effective_target_newlib {} {
3480 return [check_no_compiler_messages newlib object {
3481 #include <newlib.h>
3482 }]
3483}
3484
a5ea7a0b
RS
3485# Return 1 if
3486# (a) an error of a few ULP is expected in string to floating-point
3487# conversion functions; and
3488# (b) overflow is not always detected correctly by those functions.
3489
3490proc check_effective_target_lax_strtofp {} {
3491 # By default, assume that all uClibc targets suffer from this.
3492 return [check_effective_target_uclibc]
3493}
3494
3495# Return 1 if this is a target for which wcsftime is a dummy
3496# function that always returns 0.
3497
3498proc check_effective_target_dummy_wcsftime {} {
3499 # By default, assume that all uClibc targets suffer from this.
3500 return [check_effective_target_uclibc]
3501}
3502
fc8600f9
MM
3503# Return 1 if constructors with initialization priority arguments are
3504# supposed on this target.
3505
3506proc check_effective_target_init_priority {} {
fc8600f9
MM
3507 return [check_no_compiler_messages init_priority assembly "
3508 void f() __attribute__((constructor (1000)));
3509 void f() \{\}
3510 "]
3511}
3512
b6dc500c
JJ
3513# Return 1 if the target matches the effective target 'arg', 0 otherwise.
3514# This can be used with any check_* proc that takes no argument and
3515# returns only 1 or 0. It could be used with check_* procs that take
3516# arguments with keywords that pass particular arguments.
3517
3518proc is-effective-target { arg } {
3519 set selected 0
68897708
JJ
3520 if { [info procs check_effective_target_${arg}] != [list] } {
3521 set selected [check_effective_target_${arg}]
3522 } else {
3523 switch $arg {
3524 "vmx_hw" { set selected [check_vmx_hw_available] }
92902797
MM
3525 "vsx_hw" { set selected [check_vsx_hw_available] }
3526 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
68897708
JJ
3527 "named_sections" { set selected [check_named_sections_available] }
3528 "gc_sections" { set selected [check_gc_sections_available] }
294f1ce3 3529 "cxa_atexit" { set selected [check_cxa_atexit_available] }
68897708
JJ
3530 default { error "unknown effective target keyword `$arg'" }
3531 }
b6dc500c
JJ
3532 }
3533 verbose "is-effective-target: $arg $selected" 2
3534 return $selected
3535}
810838e7
JJ
3536
3537# Return 1 if the argument is an effective-target keyword, 0 otherwise.
3538
3539proc is-effective-target-keyword { arg } {
3540 if { [info procs check_effective_target_${arg}] != [list] } {
3541 return 1
3542 } else {
3543 # These have different names for their check_* procs.
3544 switch $arg {
3545 "vmx_hw" { return 1 }
92902797
MM
3546 "vsx_hw" { return 1 }
3547 "ppc_recip_hw" { return 1 }
810838e7
JJ
3548 "named_sections" { return 1 }
3549 "gc_sections" { return 1 }
294f1ce3 3550 "cxa_atexit" { return 1 }
810838e7
JJ
3551 default { return 0 }
3552 }
3553 }
3554}
efe5e271
PB
3555
3556# Return 1 if target default to short enums
3557
3558proc check_effective_target_short_enums { } {
8ce1ac69
RS
3559 return [check_no_compiler_messages short_enums assembly {
3560 enum foo { bar };
3561 int s[sizeof (enum foo) == 1 ? 1 : -1];
3562 }]
efe5e271
PB
3563}
3564
19450f2b
DJ
3565# Return 1 if target supports merging string constants at link time.
3566
3567proc check_effective_target_string_merging { } {
3568 return [check_no_messages_and_pattern string_merging \
3569 "rodata\\.str" assembly {
3570 const char *var = "String";
3571 } {-O2}]
3572}
8f3fc4aa
JDA
3573
3574# Return 1 if target has the basic signed and unsigned types in
207bf79d
JM
3575# <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
3576# working <stdint.h> for all targets.
8f3fc4aa
JDA
3577
3578proc check_effective_target_stdint_types { } {
3579 return [check_no_compiler_messages stdint_types assembly {
3580 #include <stdint.h>
3581 int8_t a; int16_t b; int32_t c; int64_t d;
3582 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
3583 }]
3584}
3920f1fd 3585
207bf79d
JM
3586# Return 1 if target has the basic signed and unsigned types in
3587# <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
3588# these types agree with those in the header, as some systems have
3589# only <inttypes.h>.
3590
3591proc check_effective_target_inttypes_types { } {
3592 return [check_no_compiler_messages inttypes_types assembly {
3593 #include <inttypes.h>
3594 int8_t a; int16_t b; int32_t c; int64_t d;
3595 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
3596 }]
3597}
3598
3920f1fd
HPN
3599# Return 1 if programs are intended to be run on a simulator
3600# (i.e. slowly) rather than hardware (i.e. fast).
3601
3602proc check_effective_target_simulator { } {
3603
3604 # All "src/sim" simulators set this one.
3605 if [board_info target exists is_simulator] {
3606 return [board_info target is_simulator]
3607 }
3608
3609 # The "sid" simulators don't set that one, but at least they set
3610 # this one.
3611 if [board_info target exists slow_simulator] {
3612 return [board_info target slow_simulator]
3613 }
3614
3615 return 0
3616}
56fca24a 3617
c6fee227 3618# Return 1 if the target is a VxWorks kernel.
56fca24a
RS
3619
3620proc check_effective_target_vxworks_kernel { } {
3621 return [check_no_compiler_messages vxworks_kernel assembly {
3622 #if !defined __vxworks || defined __RTP__
3623 #error NO
3624 #endif
3625 }]
3626}
e6625c44 3627
c6fee227
RS
3628# Return 1 if the target is a VxWorks RTP.
3629
3630proc check_effective_target_vxworks_rtp { } {
3631 return [check_no_compiler_messages vxworks_rtp assembly {
3632 #if !defined __vxworks || !defined __RTP__
3633 #error NO
3634 #endif
3635 }]
3636}
3637
e6625c44
RS
3638# Return 1 if the target is expected to provide wide character support.
3639
3640proc check_effective_target_wchar { } {
3641 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
3642 return 0
3643 }
3644 return [check_no_compiler_messages wchar assembly {
3645 #include <wchar.h>
3646 }]
3647}
db9a0df0 3648
eb587f4f
JM
3649# Return 1 if the target has <pthread.h>.
3650
3651proc check_effective_target_pthread_h { } {
3652 return [check_no_compiler_messages pthread_h assembly {
3653 #include <pthread.h>
3654 }]
3655}
3656
e054e17e
HPN
3657# Return 1 if the target can truncate a file from a file-descriptor,
3658# as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
3659# chsize. We test for a trivially functional truncation; no stubs.
3660# As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
3661# different function to be used.
3662
3663proc check_effective_target_fd_truncate { } {
3664 set prog {
3665 #define _FILE_OFFSET_BITS 64
3666 #include <unistd.h>
3667 #include <stdio.h>
3668 #include <stdlib.h>
3669 int main ()
3670 {
3671 FILE *f = fopen ("tst.tmp", "wb");
3672 int fd;
3673 const char t[] = "test writing more than ten characters";
3674 char s[11];
3675 fd = fileno (f);
3676 write (fd, t, sizeof (t) - 1);
3677 lseek (fd, 0, 0);
3678 if (ftruncate (fd, 10) != 0)
3679 exit (1);
3680 close (fd);
3681 f = fopen ("tst.tmp", "rb");
3682 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
3683 exit (1);
3684 exit (0);
3685 }
3686 }
3687
3688 if { [check_runtime ftruncate $prog] } {
3689 return 1;
3690 }
3691
3692 regsub "ftruncate" $prog "chsize" prog
3693 return [check_runtime chsize $prog]
3694}
3695
db9a0df0
RS
3696# Add to FLAGS all the target-specific flags needed to access the c99 runtime.
3697
3698proc add_options_for_c99_runtime { flags } {
3699 if { [istarget *-*-solaris2*] } {
3700 return "$flags -std=c99"
3701 }
67b6839f
RO
3702 if { [istarget mips-sgi-irix6.5*] } {
3703 return "$flags -std=c99"
3704 }
db9a0df0
RS
3705 if { [istarget powerpc-*-darwin*] } {
3706 return "$flags -mmacosx-version-min=10.3"
3707 }
3708 return $flags
3709}
1018b4c3 3710
8ceabd25
UB
3711# Add to FLAGS all the target-specific flags needed to enable
3712# full IEEE compliance mode.
3713
3714proc add_options_for_ieee { flags } {
19073ebc
UB
3715 if { [istarget alpha*-*-*]
3716 || [istarget sh*-*-*] } {
8ceabd25
UB
3717 return "$flags -mieee"
3718 }
19073ebc 3719 if { [istarget rx-*-*] } {
7036ee24
NC
3720 return "$flags -mnofpu"
3721 }
8ceabd25
UB
3722 return $flags
3723}
3724
fc5e3cd4
KG
3725# Add to FLAGS the flags needed to enable functions to bind locally
3726# when using pic/PIC passes in the testsuite.
3727
3728proc add_options_for_bind_pic_locally { flags } {
3729 if {[check_no_compiler_messages using_pic2 assembly {
3730 #if __PIC__ != 2
3731 #error FOO
3732 #endif
3733 }]} {
3734 return "$flags -fPIE"
3735 }
3736 if {[check_no_compiler_messages using_pic1 assembly {
3737 #if __PIC__ != 1
3738 #error FOO
3739 #endif
3740 }]} {
3741 return "$flags -fpie"
3742 }
3743
3744 return $flags
3745}
3746
c452684d
JB
3747# Add to FLAGS the flags needed to enable 128-bit vectors.
3748
3749proc add_options_for_quad_vectors { flags } {
3750 if [is-effective-target arm_neon_ok] {
3751 return "$flags -mvectorize-with-neon-quad"
3752 }
3753
3754 return $flags
3755}
3756
1018b4c3
RS
3757# Return 1 if the target provides a full C99 runtime.
3758
3759proc check_effective_target_c99_runtime { } {
3760 return [check_cached_effective_target c99_runtime {
3761 global srcdir
3762
3763 set file [open "$srcdir/gcc.dg/builtins-config.h"]
3764 set contents [read $file]
3765 close $file
3766 append contents {
3767 #ifndef HAVE_C99_RUNTIME
3768 #error FOO
3769 #endif
3770 }
0ffd38c8
RS
3771 check_no_compiler_messages_nocache c99_runtime assembly \
3772 $contents [add_options_for_c99_runtime ""]
1018b4c3
RS
3773 }]
3774}
ab1cde23
DS
3775
3776# Return 1 if target wchar_t is at least 4 bytes.
3777
3778proc check_effective_target_4byte_wchar_t { } {
3779 return [check_no_compiler_messages 4byte_wchar_t object {
a6ce2774 3780 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
ab1cde23
DS
3781 }]
3782}
3b2488ca
L
3783
3784# Return 1 if the target supports automatic stack alignment.
3785
3786proc check_effective_target_automatic_stack_alignment { } {
cc825d98
RH
3787 # Ordinarily x86 supports automatic stack alignment ...
3788 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
3789 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
3790 # ... except Win64 SEH doesn't. Succeed for Win32 though.
3791 return [check_effective_target_ilp32];
3792 }
3793 return 1;
3794 }
3795 return 0;
3b2488ca 3796}
d6beb90e
XG
3797
3798# Return 1 if avx instructions can be compiled.
3799
3800proc check_effective_target_avx { } {
3801 return [check_no_compiler_messages avx object {
3802 void _mm256_zeroall (void)
3803 {
3804 __builtin_ia32_vzeroall ();
3805 }
3806 } "-O2 -mavx" ]
3807}
1b829d45 3808
ae6a0535
RO
3809# Return 1 if sse instructions can be compiled.
3810proc check_effective_target_sse { } {
3811 return [check_no_compiler_messages sse object {
3812 int main ()
3813 {
3814 __builtin_ia32_stmxcsr ();
3815 return 0;
3816 }
3817 } "-O2 -msse" ]
3818}
3819
40f1bdd9
RO
3820# Return 1 if sse2 instructions can be compiled.
3821proc check_effective_target_sse2 { } {
3822 return [check_no_compiler_messages sse2 object {
3823 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
3824
3825 __m128i _mm_srli_si128 (__m128i __A, int __N)
3826 {
3827 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
3828 }
3829 } "-O2 -msse2" ]
3830}
3831
4ee89d5f
L
3832# Return 1 if F16C instructions can be compiled.
3833
3834proc check_effective_target_f16c { } {
3835 return [check_no_compiler_messages f16c object {
3836 #include "immintrin.h"
3837 float
3838 foo (unsigned short val)
3839 {
3840 return _cvtsh_ss (val);
3841 }
3842 } "-O2 -mf16c" ]
3843}
3844
1b829d45
JJ
3845# Return 1 if C wchar_t type is compatible with char16_t.
3846
3847proc check_effective_target_wchar_t_char16_t_compatible { } {
3848 return [check_no_compiler_messages wchar_t_char16_t object {
3849 __WCHAR_TYPE__ wc;
3850 __CHAR16_TYPE__ *p16 = &wc;
3851 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
3852 }]
3853}
3854
3855# Return 1 if C wchar_t type is compatible with char32_t.
3856
3857proc check_effective_target_wchar_t_char32_t_compatible { } {
3858 return [check_no_compiler_messages wchar_t_char32_t object {
3859 __WCHAR_TYPE__ wc;
3860 __CHAR32_TYPE__ *p32 = &wc;
3861 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
3862 }]
3863}
8179c2f2
SE
3864
3865# Return 1 if pow10 function exists.
3866
3867proc check_effective_target_pow10 { } {
3868 return [check_runtime pow10 {
3869 #include <math.h>
3870 int main () {
3871 double x;
3872 x = pow10 (1);
3873 return 0;
3874 }
3875 } "-lm" ]
3876}
4f809983
JJ
3877
3878# Return 1 if current options generate DFP instructions, 0 otherwise.
3879
3880proc check_effective_target_hard_dfp {} {
3881 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
a9ab39d3
JJ
3882 typedef float d64 __attribute__((mode(DD)));
3883 d64 x, y, z;
4f809983
JJ
3884 void foo (void) { z = x + y; }
3885 }]
3886}
43014633
JJ
3887
3888# Return 1 if string.h and wchar.h headers provide C++ requires overloads
3889# for strchr etc. functions.
3890
3891proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
3892 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
3893 #include <string.h>
3894 #include <wchar.h>
3895 #if !defined(__cplusplus) \
3896 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
3897 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
3898 ISO C++ correct string.h and wchar.h protos not supported.
3899 #else
3900 int i;
3901 #endif
3902 }]
3903}
16a3d11c 3904
659b24d6
RO
3905# Return 1 if GNU as is used.
3906
3907proc check_effective_target_gas { } {
3908 global use_gas_saved
3909 global tool
3910
3911 if {![info exists use_gas_saved]} {
3912 # Check if the as used by gcc is GNU as.
3913 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
3914 # Provide /dev/null as input, otherwise gas times out reading from
3915 # stdin.
3916 set status [remote_exec host "$gcc_as" "-v /dev/null"]
3917 set as_output [lindex $status 1]
3918 if { [ string first "GNU" $as_output ] >= 0 } {
3919 set use_gas_saved 1
3920 } else {
3921 set use_gas_saved 0
3922 }
3923 }
3924 return $use_gas_saved
3925}
3926
14a393a3
RO
3927# Return 1 if GNU ld is used.
3928
3929proc check_effective_target_gld { } {
3930 global use_gld_saved
3931 global tool
3932
3933 if {![info exists use_gld_saved]} {
3934 # Check if the ld used by gcc is GNU ld.
3935 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
3936 set status [remote_exec host "$gcc_ld" "--version"]
3937 set ld_output [lindex $status 1]
3938 if { [ string first "GNU" $ld_output ] >= 0 } {
3939 set use_gld_saved 1
3940 } else {
3941 set use_gld_saved 0
3942 }
3943 }
3944 return $use_gld_saved
3945}
3946
d7f09764
DN
3947# Return 1 if the compiler has been configure with link-time optimization
3948# (LTO) support.
3949
3950proc check_effective_target_lto { } {
3951 global ENABLE_LTO
3952 return [info exists ENABLE_LTO]
3953}
3954
7458026b
ILT
3955# Return 1 if this target supports the -fsplit-stack option, 0
3956# otherwise.
3957
3958proc check_effective_target_split_stack {} {
3959 return [check_no_compiler_messages split_stack object {
3960 void foo (void) { }
3961 } "-fsplit-stack"]
3962}
3963
812a5d4b
MLI
3964# Return 1 if the language for the compiler under test is C.
3965
3966proc check_effective_target_c { } {
3967 global tool
3968 if [string match $tool "gcc"] {
3969 return 1
3970 }
3971 return 0
3972}
3973
3974# Return 1 if the language for the compiler under test is C++.
3975
3976proc check_effective_target_c++ { } {
3977 global tool
3978 if [string match $tool "g++"] {
3979 return 1
3980 }
3981 return 0
3982}
0fa3d594
RO
3983
3984# Return 1 if expensive testcases should be run.
3985
3986proc check_effective_target_run_expensive_tests { } {
3987 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
3988 return 1
3989 }
3990 return 0
3991}
8d598c74
SE
3992
3993# Returns 1 if "mempcpy" is available on the target system.
3994
3995proc check_effective_target_mempcpy {} {
3996 return [check_function_available "mempcpy"]
3997}
9a31f6a3
UB
3998
3999# Check whether the vectorizer tests are supported by the target and
4000# append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
4001# Set dg-do-what-default to either compile or run, depending on target
4002# capabilities. Return 1 if vectorizer tests are supported by
4003# target, 0 otherwise.
4004
4005proc check_vect_support_and_set_flags { } {
4006 global DEFAULT_VECTCFLAGS
4007 global dg-do-what-default
4008
19073ebc 4009 if [istarget powerpc-*paired*] {
9a31f6a3
UB
4010 lappend DEFAULT_VECTCFLAGS "-mpaired"
4011 if [check_750cl_hw_available] {
4012 set dg-do-what-default run
4013 } else {
4014 set dg-do-what-default compile
4015 }
19073ebc 4016 } elseif [istarget powerpc*-*-*] {
9a31f6a3
UB
4017 # Skip targets not supporting -maltivec.
4018 if ![is-effective-target powerpc_altivec_ok] {
4019 return 0
4020 }
4021
4022 lappend DEFAULT_VECTCFLAGS "-maltivec"
19073ebc 4023 if [check_vsx_hw_available] {
9a31f6a3
UB
4024 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
4025 }
4026
4027 if [check_vmx_hw_available] {
4028 set dg-do-what-default run
4029 } else {
4030 if [is-effective-target ilp32] {
4031 # Specify a cpu that supports VMX for compile-only tests.
4032 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
4033 }
4034 set dg-do-what-default compile
4035 }
19073ebc 4036 } elseif { [istarget spu-*-*] } {
9a31f6a3 4037 set dg-do-what-default run
19073ebc 4038 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9a31f6a3
UB
4039 lappend DEFAULT_VECTCFLAGS "-msse2"
4040 if { [check_effective_target_sse2_runtime] } {
4041 set dg-do-what-default run
4042 } else {
4043 set dg-do-what-default compile
4044 }
19073ebc 4045 } elseif { [istarget mips*-*-*]
9a31f6a3
UB
4046 && ([check_effective_target_mpaired_single]
4047 || [check_effective_target_mips_loongson])
4048 && [check_effective_target_nomips16] } {
4049 if { [check_effective_target_mpaired_single] } {
4050 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
4051 }
4052 set dg-do-what-default run
19073ebc 4053 } elseif [istarget sparc*-*-*] {
9a31f6a3
UB
4054 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
4055 if [check_effective_target_ultrasparc_hw] {
4056 set dg-do-what-default run
4057 } else {
4058 set dg-do-what-default compile
4059 }
19073ebc 4060 } elseif [istarget alpha*-*-*] {
9a31f6a3
UB
4061 # Alpha's vectorization capabilities are extremely limited.
4062 # It's more effort than its worth disabling all of the tests
4063 # that it cannot pass. But if you actually want to see what
4064 # does work, command out the return.
4065 return 0
4066
4067 lappend DEFAULT_VECTCFLAGS "-mmax"
4068 if [check_alpha_max_hw_available] {
4069 set dg-do-what-default run
4070 } else {
4071 set dg-do-what-default compile
4072 }
19073ebc 4073 } elseif [istarget ia64-*-*] {
9a31f6a3
UB
4074 set dg-do-what-default run
4075 } elseif [is-effective-target arm_neon_ok] {
4076 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
4077 # NEON does not support denormals, so is not used for vectorization by
4078 # default to avoid loss of precision. We must pass -ffast-math to test
4079 # vectorization of float operations.
4080 lappend DEFAULT_VECTCFLAGS "-ffast-math"
4081 if [is-effective-target arm_neon_hw] {
4082 set dg-do-what-default run
4083 } else {
4084 set dg-do-what-default compile
4085 }
4086 } else {
4087 return 0
4088 }
4089
4090 return 1
4091}
4092
4ff10c0e
JJ
4093proc check_effective_target_non_strict_align {} {
4094 return [check_no_compiler_messages non_strict_align assembly {
4095 char *y;
4096 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
4097 c *z;
4098 void foo(void) { z = (c *) y; }
4099 } "-Wcast-align"]
4100}