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32b4b7f5 | 1 | /* GCC instrumentation plugin for ThreadSanitizer. |
d1e082c2 | 2 | Copyright (C) 2011-2013 Free Software Foundation, Inc. |
32b4b7f5 DV |
3 | Contributed by Dmitry Vyukov <dvyukov@google.com> |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it under | |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 3, or (at your option) any later | |
10 | version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | ||
22 | #include "config.h" | |
23 | #include "system.h" | |
24 | #include "coretypes.h" | |
25 | #include "tree.h" | |
26 | #include "intl.h" | |
27 | #include "tm.h" | |
28 | #include "basic-block.h" | |
29 | #include "gimple.h" | |
30 | #include "function.h" | |
442b4905 AM |
31 | #include "gimple-ssa.h" |
32 | #include "cgraph.h" | |
33 | #include "tree-cfg.h" | |
34 | #include "tree-ssanames.h" | |
32b4b7f5 DV |
35 | #include "tree-pass.h" |
36 | #include "tree-iterator.h" | |
37 | #include "langhooks.h" | |
38 | #include "output.h" | |
39 | #include "options.h" | |
40 | #include "target.h" | |
32b4b7f5 | 41 | #include "diagnostic.h" |
c954bddd | 42 | #include "tree-ssa-propagate.h" |
0e668eaf JJ |
43 | #include "tsan.h" |
44 | #include "asan.h" | |
32b4b7f5 DV |
45 | |
46 | /* Number of instrumented memory accesses in the current function. */ | |
47 | ||
48 | /* Builds the following decl | |
49 | void __tsan_read/writeX (void *addr); */ | |
50 | ||
51 | static tree | |
52 | get_memory_access_decl (bool is_write, unsigned size) | |
53 | { | |
54 | enum built_in_function fcode; | |
55 | ||
56 | if (size <= 1) | |
0e668eaf JJ |
57 | fcode = is_write ? BUILT_IN_TSAN_WRITE1 |
58 | : BUILT_IN_TSAN_READ1; | |
32b4b7f5 | 59 | else if (size <= 3) |
0e668eaf JJ |
60 | fcode = is_write ? BUILT_IN_TSAN_WRITE2 |
61 | : BUILT_IN_TSAN_READ2; | |
32b4b7f5 | 62 | else if (size <= 7) |
0e668eaf JJ |
63 | fcode = is_write ? BUILT_IN_TSAN_WRITE4 |
64 | : BUILT_IN_TSAN_READ4; | |
32b4b7f5 | 65 | else if (size <= 15) |
0e668eaf JJ |
66 | fcode = is_write ? BUILT_IN_TSAN_WRITE8 |
67 | : BUILT_IN_TSAN_READ8; | |
32b4b7f5 | 68 | else |
0e668eaf JJ |
69 | fcode = is_write ? BUILT_IN_TSAN_WRITE16 |
70 | : BUILT_IN_TSAN_READ16; | |
32b4b7f5 DV |
71 | |
72 | return builtin_decl_implicit (fcode); | |
73 | } | |
74 | ||
75 | /* Check as to whether EXPR refers to a store to vptr. */ | |
76 | ||
77 | static tree | |
78 | is_vptr_store (gimple stmt, tree expr, bool is_write) | |
79 | { | |
80 | if (is_write == true | |
81 | && gimple_assign_single_p (stmt) | |
82 | && TREE_CODE (expr) == COMPONENT_REF) | |
83 | { | |
84 | tree field = TREE_OPERAND (expr, 1); | |
85 | if (TREE_CODE (field) == FIELD_DECL | |
86 | && DECL_VIRTUAL_P (field)) | |
87 | return gimple_assign_rhs1 (stmt); | |
88 | } | |
89 | return NULL; | |
90 | } | |
91 | ||
32b4b7f5 | 92 | /* Instruments EXPR if needed. If any instrumentation is inserted, |
8ddf5c28 | 93 | return true. */ |
32b4b7f5 DV |
94 | |
95 | static bool | |
96 | instrument_expr (gimple_stmt_iterator gsi, tree expr, bool is_write) | |
97 | { | |
5c972fb6 | 98 | tree base, rhs, expr_ptr, builtin_decl; |
32b4b7f5 DV |
99 | basic_block bb; |
100 | HOST_WIDE_INT size; | |
101 | gimple stmt, g; | |
5c972fb6 | 102 | gimple_seq seq; |
32b4b7f5 DV |
103 | location_t loc; |
104 | ||
32b4b7f5 DV |
105 | size = int_size_in_bytes (TREE_TYPE (expr)); |
106 | if (size == -1) | |
107 | return false; | |
108 | ||
109 | /* For now just avoid instrumenting bit field acceses. | |
110 | TODO: handle bit-fields as if touching the whole field. */ | |
111 | HOST_WIDE_INT bitsize, bitpos; | |
112 | tree offset; | |
113 | enum machine_mode mode; | |
114 | int volatilep = 0, unsignedp = 0; | |
7a36dc06 JJ |
115 | base = get_inner_reference (expr, &bitsize, &bitpos, &offset, |
116 | &mode, &unsignedp, &volatilep, false); | |
117 | ||
118 | /* No need to instrument accesses to decls that don't escape, | |
119 | they can't escape to other threads then. */ | |
120 | if (DECL_P (base)) | |
121 | { | |
122 | struct pt_solution pt; | |
123 | memset (&pt, 0, sizeof (pt)); | |
124 | pt.escaped = 1; | |
125 | pt.ipa_escaped = flag_ipa_pta != 0; | |
126 | pt.nonlocal = 1; | |
127 | if (!pt_solution_includes (&pt, base)) | |
128 | return false; | |
129 | if (!is_global_var (base) && !may_be_aliased (base)) | |
130 | return false; | |
131 | } | |
132 | ||
abc27962 JJ |
133 | if (TREE_READONLY (base) |
134 | || (TREE_CODE (base) == VAR_DECL | |
135 | && DECL_HARD_REGISTER (base))) | |
32b4b7f5 DV |
136 | return false; |
137 | ||
829d0168 MP |
138 | if (size == 0 |
139 | || bitpos % (size * BITS_PER_UNIT) | |
7a36dc06 | 140 | || bitsize != size * BITS_PER_UNIT) |
32b4b7f5 DV |
141 | return false; |
142 | ||
143 | stmt = gsi_stmt (gsi); | |
144 | loc = gimple_location (stmt); | |
145 | rhs = is_vptr_store (stmt, expr, is_write); | |
146 | gcc_checking_assert (rhs != NULL || is_gimple_addressable (expr)); | |
147 | expr_ptr = build_fold_addr_expr (unshare_expr (expr)); | |
5c972fb6 JJ |
148 | seq = NULL; |
149 | if (!is_gimple_val (expr_ptr)) | |
32b4b7f5 | 150 | { |
5c972fb6 JJ |
151 | g = gimple_build_assign (make_ssa_name (TREE_TYPE (expr_ptr), NULL), |
152 | expr_ptr); | |
153 | expr_ptr = gimple_assign_lhs (g); | |
154 | gimple_set_location (g, loc); | |
155 | gimple_seq_add_stmt_without_update (&seq, g); | |
32b4b7f5 | 156 | } |
5c972fb6 JJ |
157 | if (rhs == NULL) |
158 | g = gimple_build_call (get_memory_access_decl (is_write, size), | |
159 | 1, expr_ptr); | |
32b4b7f5 DV |
160 | else |
161 | { | |
162 | builtin_decl = builtin_decl_implicit (BUILT_IN_TSAN_VPTR_UPDATE); | |
163 | g = gimple_build_call (builtin_decl, 1, expr_ptr); | |
164 | } | |
165 | gimple_set_location (g, loc); | |
5c972fb6 | 166 | gimple_seq_add_stmt_without_update (&seq, g); |
32b4b7f5 DV |
167 | /* Instrumentation for assignment of a function result |
168 | must be inserted after the call. Instrumentation for | |
169 | reads of function arguments must be inserted before the call. | |
170 | That's because the call can contain synchronization. */ | |
171 | if (is_gimple_call (stmt) && is_write) | |
172 | { | |
173 | /* If the call can throw, it must be the last stmt in | |
174 | a basic block, so the instrumented stmts need to be | |
8ddf5c28 | 175 | inserted in successor bbs. */ |
32b4b7f5 DV |
176 | if (is_ctrl_altering_stmt (stmt)) |
177 | { | |
178 | edge e; | |
179 | ||
180 | bb = gsi_bb (gsi); | |
181 | e = find_fallthru_edge (bb->succs); | |
182 | if (e) | |
5c972fb6 | 183 | gsi_insert_seq_on_edge_immediate (e, seq); |
32b4b7f5 DV |
184 | } |
185 | else | |
5c972fb6 | 186 | gsi_insert_seq_after (&gsi, seq, GSI_NEW_STMT); |
32b4b7f5 DV |
187 | } |
188 | else | |
5c972fb6 | 189 | gsi_insert_seq_before (&gsi, seq, GSI_SAME_STMT); |
32b4b7f5 DV |
190 | |
191 | return true; | |
192 | } | |
193 | ||
c954bddd JJ |
194 | /* Actions for sync/atomic builtin transformations. */ |
195 | enum tsan_atomic_action | |
196 | { | |
197 | check_last, add_seq_cst, add_acquire, weak_cas, strong_cas, | |
198 | bool_cas, val_cas, lock_release, fetch_op, fetch_op_seq_cst | |
199 | }; | |
200 | ||
201 | /* Table how to map sync/atomic builtins to their corresponding | |
202 | tsan equivalents. */ | |
34c136b6 | 203 | static const struct tsan_map_atomic |
c954bddd JJ |
204 | { |
205 | enum built_in_function fcode, tsan_fcode; | |
206 | enum tsan_atomic_action action; | |
207 | enum tree_code code; | |
208 | } tsan_atomic_table[] = | |
209 | { | |
210 | #define TRANSFORM(fcode, tsan_fcode, action, code) \ | |
211 | { BUILT_IN_##fcode, BUILT_IN_##tsan_fcode, action, code } | |
212 | #define CHECK_LAST(fcode, tsan_fcode) \ | |
213 | TRANSFORM (fcode, tsan_fcode, check_last, ERROR_MARK) | |
214 | #define ADD_SEQ_CST(fcode, tsan_fcode) \ | |
215 | TRANSFORM (fcode, tsan_fcode, add_seq_cst, ERROR_MARK) | |
216 | #define ADD_ACQUIRE(fcode, tsan_fcode) \ | |
217 | TRANSFORM (fcode, tsan_fcode, add_acquire, ERROR_MARK) | |
218 | #define WEAK_CAS(fcode, tsan_fcode) \ | |
219 | TRANSFORM (fcode, tsan_fcode, weak_cas, ERROR_MARK) | |
220 | #define STRONG_CAS(fcode, tsan_fcode) \ | |
221 | TRANSFORM (fcode, tsan_fcode, strong_cas, ERROR_MARK) | |
222 | #define BOOL_CAS(fcode, tsan_fcode) \ | |
223 | TRANSFORM (fcode, tsan_fcode, bool_cas, ERROR_MARK) | |
224 | #define VAL_CAS(fcode, tsan_fcode) \ | |
225 | TRANSFORM (fcode, tsan_fcode, val_cas, ERROR_MARK) | |
226 | #define LOCK_RELEASE(fcode, tsan_fcode) \ | |
227 | TRANSFORM (fcode, tsan_fcode, lock_release, ERROR_MARK) | |
228 | #define FETCH_OP(fcode, tsan_fcode, code) \ | |
229 | TRANSFORM (fcode, tsan_fcode, fetch_op, code) | |
230 | #define FETCH_OPS(fcode, tsan_fcode, code) \ | |
231 | TRANSFORM (fcode, tsan_fcode, fetch_op_seq_cst, code) | |
232 | ||
233 | CHECK_LAST (ATOMIC_LOAD_1, TSAN_ATOMIC8_LOAD), | |
234 | CHECK_LAST (ATOMIC_LOAD_2, TSAN_ATOMIC16_LOAD), | |
235 | CHECK_LAST (ATOMIC_LOAD_4, TSAN_ATOMIC32_LOAD), | |
236 | CHECK_LAST (ATOMIC_LOAD_8, TSAN_ATOMIC64_LOAD), | |
237 | CHECK_LAST (ATOMIC_LOAD_16, TSAN_ATOMIC128_LOAD), | |
238 | CHECK_LAST (ATOMIC_STORE_1, TSAN_ATOMIC8_STORE), | |
239 | CHECK_LAST (ATOMIC_STORE_2, TSAN_ATOMIC16_STORE), | |
240 | CHECK_LAST (ATOMIC_STORE_4, TSAN_ATOMIC32_STORE), | |
241 | CHECK_LAST (ATOMIC_STORE_8, TSAN_ATOMIC64_STORE), | |
242 | CHECK_LAST (ATOMIC_STORE_16, TSAN_ATOMIC128_STORE), | |
243 | CHECK_LAST (ATOMIC_EXCHANGE_1, TSAN_ATOMIC8_EXCHANGE), | |
244 | CHECK_LAST (ATOMIC_EXCHANGE_2, TSAN_ATOMIC16_EXCHANGE), | |
245 | CHECK_LAST (ATOMIC_EXCHANGE_4, TSAN_ATOMIC32_EXCHANGE), | |
246 | CHECK_LAST (ATOMIC_EXCHANGE_8, TSAN_ATOMIC64_EXCHANGE), | |
247 | CHECK_LAST (ATOMIC_EXCHANGE_16, TSAN_ATOMIC128_EXCHANGE), | |
248 | CHECK_LAST (ATOMIC_FETCH_ADD_1, TSAN_ATOMIC8_FETCH_ADD), | |
249 | CHECK_LAST (ATOMIC_FETCH_ADD_2, TSAN_ATOMIC16_FETCH_ADD), | |
250 | CHECK_LAST (ATOMIC_FETCH_ADD_4, TSAN_ATOMIC32_FETCH_ADD), | |
251 | CHECK_LAST (ATOMIC_FETCH_ADD_8, TSAN_ATOMIC64_FETCH_ADD), | |
252 | CHECK_LAST (ATOMIC_FETCH_ADD_16, TSAN_ATOMIC128_FETCH_ADD), | |
253 | CHECK_LAST (ATOMIC_FETCH_SUB_1, TSAN_ATOMIC8_FETCH_SUB), | |
254 | CHECK_LAST (ATOMIC_FETCH_SUB_2, TSAN_ATOMIC16_FETCH_SUB), | |
255 | CHECK_LAST (ATOMIC_FETCH_SUB_4, TSAN_ATOMIC32_FETCH_SUB), | |
256 | CHECK_LAST (ATOMIC_FETCH_SUB_8, TSAN_ATOMIC64_FETCH_SUB), | |
257 | CHECK_LAST (ATOMIC_FETCH_SUB_16, TSAN_ATOMIC128_FETCH_SUB), | |
258 | CHECK_LAST (ATOMIC_FETCH_AND_1, TSAN_ATOMIC8_FETCH_AND), | |
259 | CHECK_LAST (ATOMIC_FETCH_AND_2, TSAN_ATOMIC16_FETCH_AND), | |
260 | CHECK_LAST (ATOMIC_FETCH_AND_4, TSAN_ATOMIC32_FETCH_AND), | |
261 | CHECK_LAST (ATOMIC_FETCH_AND_8, TSAN_ATOMIC64_FETCH_AND), | |
262 | CHECK_LAST (ATOMIC_FETCH_AND_16, TSAN_ATOMIC128_FETCH_AND), | |
263 | CHECK_LAST (ATOMIC_FETCH_OR_1, TSAN_ATOMIC8_FETCH_OR), | |
264 | CHECK_LAST (ATOMIC_FETCH_OR_2, TSAN_ATOMIC16_FETCH_OR), | |
265 | CHECK_LAST (ATOMIC_FETCH_OR_4, TSAN_ATOMIC32_FETCH_OR), | |
266 | CHECK_LAST (ATOMIC_FETCH_OR_8, TSAN_ATOMIC64_FETCH_OR), | |
267 | CHECK_LAST (ATOMIC_FETCH_OR_16, TSAN_ATOMIC128_FETCH_OR), | |
268 | CHECK_LAST (ATOMIC_FETCH_XOR_1, TSAN_ATOMIC8_FETCH_XOR), | |
269 | CHECK_LAST (ATOMIC_FETCH_XOR_2, TSAN_ATOMIC16_FETCH_XOR), | |
270 | CHECK_LAST (ATOMIC_FETCH_XOR_4, TSAN_ATOMIC32_FETCH_XOR), | |
271 | CHECK_LAST (ATOMIC_FETCH_XOR_8, TSAN_ATOMIC64_FETCH_XOR), | |
272 | CHECK_LAST (ATOMIC_FETCH_XOR_16, TSAN_ATOMIC128_FETCH_XOR), | |
273 | CHECK_LAST (ATOMIC_FETCH_NAND_1, TSAN_ATOMIC8_FETCH_NAND), | |
274 | CHECK_LAST (ATOMIC_FETCH_NAND_2, TSAN_ATOMIC16_FETCH_NAND), | |
275 | CHECK_LAST (ATOMIC_FETCH_NAND_4, TSAN_ATOMIC32_FETCH_NAND), | |
276 | CHECK_LAST (ATOMIC_FETCH_NAND_8, TSAN_ATOMIC64_FETCH_NAND), | |
277 | CHECK_LAST (ATOMIC_FETCH_NAND_16, TSAN_ATOMIC128_FETCH_NAND), | |
278 | ||
279 | CHECK_LAST (ATOMIC_THREAD_FENCE, TSAN_ATOMIC_THREAD_FENCE), | |
280 | CHECK_LAST (ATOMIC_SIGNAL_FENCE, TSAN_ATOMIC_SIGNAL_FENCE), | |
281 | ||
282 | FETCH_OP (ATOMIC_ADD_FETCH_1, TSAN_ATOMIC8_FETCH_ADD, PLUS_EXPR), | |
283 | FETCH_OP (ATOMIC_ADD_FETCH_2, TSAN_ATOMIC16_FETCH_ADD, PLUS_EXPR), | |
284 | FETCH_OP (ATOMIC_ADD_FETCH_4, TSAN_ATOMIC32_FETCH_ADD, PLUS_EXPR), | |
285 | FETCH_OP (ATOMIC_ADD_FETCH_8, TSAN_ATOMIC64_FETCH_ADD, PLUS_EXPR), | |
286 | FETCH_OP (ATOMIC_ADD_FETCH_16, TSAN_ATOMIC128_FETCH_ADD, PLUS_EXPR), | |
287 | FETCH_OP (ATOMIC_SUB_FETCH_1, TSAN_ATOMIC8_FETCH_SUB, MINUS_EXPR), | |
288 | FETCH_OP (ATOMIC_SUB_FETCH_2, TSAN_ATOMIC16_FETCH_SUB, MINUS_EXPR), | |
289 | FETCH_OP (ATOMIC_SUB_FETCH_4, TSAN_ATOMIC32_FETCH_SUB, MINUS_EXPR), | |
290 | FETCH_OP (ATOMIC_SUB_FETCH_8, TSAN_ATOMIC64_FETCH_SUB, MINUS_EXPR), | |
291 | FETCH_OP (ATOMIC_SUB_FETCH_16, TSAN_ATOMIC128_FETCH_SUB, MINUS_EXPR), | |
292 | FETCH_OP (ATOMIC_AND_FETCH_1, TSAN_ATOMIC8_FETCH_AND, BIT_AND_EXPR), | |
293 | FETCH_OP (ATOMIC_AND_FETCH_2, TSAN_ATOMIC16_FETCH_AND, BIT_AND_EXPR), | |
294 | FETCH_OP (ATOMIC_AND_FETCH_4, TSAN_ATOMIC32_FETCH_AND, BIT_AND_EXPR), | |
295 | FETCH_OP (ATOMIC_AND_FETCH_8, TSAN_ATOMIC64_FETCH_AND, BIT_AND_EXPR), | |
296 | FETCH_OP (ATOMIC_AND_FETCH_16, TSAN_ATOMIC128_FETCH_AND, BIT_AND_EXPR), | |
297 | FETCH_OP (ATOMIC_OR_FETCH_1, TSAN_ATOMIC8_FETCH_OR, BIT_IOR_EXPR), | |
298 | FETCH_OP (ATOMIC_OR_FETCH_2, TSAN_ATOMIC16_FETCH_OR, BIT_IOR_EXPR), | |
299 | FETCH_OP (ATOMIC_OR_FETCH_4, TSAN_ATOMIC32_FETCH_OR, BIT_IOR_EXPR), | |
300 | FETCH_OP (ATOMIC_OR_FETCH_8, TSAN_ATOMIC64_FETCH_OR, BIT_IOR_EXPR), | |
301 | FETCH_OP (ATOMIC_OR_FETCH_16, TSAN_ATOMIC128_FETCH_OR, BIT_IOR_EXPR), | |
302 | FETCH_OP (ATOMIC_XOR_FETCH_1, TSAN_ATOMIC8_FETCH_XOR, BIT_XOR_EXPR), | |
303 | FETCH_OP (ATOMIC_XOR_FETCH_2, TSAN_ATOMIC16_FETCH_XOR, BIT_XOR_EXPR), | |
304 | FETCH_OP (ATOMIC_XOR_FETCH_4, TSAN_ATOMIC32_FETCH_XOR, BIT_XOR_EXPR), | |
305 | FETCH_OP (ATOMIC_XOR_FETCH_8, TSAN_ATOMIC64_FETCH_XOR, BIT_XOR_EXPR), | |
306 | FETCH_OP (ATOMIC_XOR_FETCH_16, TSAN_ATOMIC128_FETCH_XOR, BIT_XOR_EXPR), | |
307 | FETCH_OP (ATOMIC_NAND_FETCH_1, TSAN_ATOMIC8_FETCH_NAND, BIT_NOT_EXPR), | |
308 | FETCH_OP (ATOMIC_NAND_FETCH_2, TSAN_ATOMIC16_FETCH_NAND, BIT_NOT_EXPR), | |
309 | FETCH_OP (ATOMIC_NAND_FETCH_4, TSAN_ATOMIC32_FETCH_NAND, BIT_NOT_EXPR), | |
310 | FETCH_OP (ATOMIC_NAND_FETCH_8, TSAN_ATOMIC64_FETCH_NAND, BIT_NOT_EXPR), | |
311 | FETCH_OP (ATOMIC_NAND_FETCH_16, TSAN_ATOMIC128_FETCH_NAND, BIT_NOT_EXPR), | |
312 | ||
313 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_1, TSAN_ATOMIC8_EXCHANGE), | |
314 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_2, TSAN_ATOMIC16_EXCHANGE), | |
315 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_4, TSAN_ATOMIC32_EXCHANGE), | |
316 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_8, TSAN_ATOMIC64_EXCHANGE), | |
317 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_16, TSAN_ATOMIC128_EXCHANGE), | |
318 | ||
319 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_1, TSAN_ATOMIC8_FETCH_ADD), | |
320 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_2, TSAN_ATOMIC16_FETCH_ADD), | |
321 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_4, TSAN_ATOMIC32_FETCH_ADD), | |
322 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_8, TSAN_ATOMIC64_FETCH_ADD), | |
323 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_16, TSAN_ATOMIC128_FETCH_ADD), | |
324 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_1, TSAN_ATOMIC8_FETCH_SUB), | |
325 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_2, TSAN_ATOMIC16_FETCH_SUB), | |
326 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_4, TSAN_ATOMIC32_FETCH_SUB), | |
327 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_8, TSAN_ATOMIC64_FETCH_SUB), | |
328 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_16, TSAN_ATOMIC128_FETCH_SUB), | |
329 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_1, TSAN_ATOMIC8_FETCH_AND), | |
330 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_2, TSAN_ATOMIC16_FETCH_AND), | |
331 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_4, TSAN_ATOMIC32_FETCH_AND), | |
332 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_8, TSAN_ATOMIC64_FETCH_AND), | |
333 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_16, TSAN_ATOMIC128_FETCH_AND), | |
334 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_1, TSAN_ATOMIC8_FETCH_OR), | |
335 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_2, TSAN_ATOMIC16_FETCH_OR), | |
336 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_4, TSAN_ATOMIC32_FETCH_OR), | |
337 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_8, TSAN_ATOMIC64_FETCH_OR), | |
338 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_16, TSAN_ATOMIC128_FETCH_OR), | |
339 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_1, TSAN_ATOMIC8_FETCH_XOR), | |
340 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_2, TSAN_ATOMIC16_FETCH_XOR), | |
341 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_4, TSAN_ATOMIC32_FETCH_XOR), | |
342 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_8, TSAN_ATOMIC64_FETCH_XOR), | |
343 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_16, TSAN_ATOMIC128_FETCH_XOR), | |
344 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_1, TSAN_ATOMIC8_FETCH_NAND), | |
345 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_2, TSAN_ATOMIC16_FETCH_NAND), | |
346 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_4, TSAN_ATOMIC32_FETCH_NAND), | |
347 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_8, TSAN_ATOMIC64_FETCH_NAND), | |
348 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_16, TSAN_ATOMIC128_FETCH_NAND), | |
349 | ||
350 | ADD_SEQ_CST (SYNC_SYNCHRONIZE, TSAN_ATOMIC_THREAD_FENCE), | |
351 | ||
352 | FETCH_OPS (SYNC_ADD_AND_FETCH_1, TSAN_ATOMIC8_FETCH_ADD, PLUS_EXPR), | |
353 | FETCH_OPS (SYNC_ADD_AND_FETCH_2, TSAN_ATOMIC16_FETCH_ADD, PLUS_EXPR), | |
354 | FETCH_OPS (SYNC_ADD_AND_FETCH_4, TSAN_ATOMIC32_FETCH_ADD, PLUS_EXPR), | |
355 | FETCH_OPS (SYNC_ADD_AND_FETCH_8, TSAN_ATOMIC64_FETCH_ADD, PLUS_EXPR), | |
356 | FETCH_OPS (SYNC_ADD_AND_FETCH_16, TSAN_ATOMIC128_FETCH_ADD, PLUS_EXPR), | |
357 | FETCH_OPS (SYNC_SUB_AND_FETCH_1, TSAN_ATOMIC8_FETCH_SUB, MINUS_EXPR), | |
358 | FETCH_OPS (SYNC_SUB_AND_FETCH_2, TSAN_ATOMIC16_FETCH_SUB, MINUS_EXPR), | |
359 | FETCH_OPS (SYNC_SUB_AND_FETCH_4, TSAN_ATOMIC32_FETCH_SUB, MINUS_EXPR), | |
360 | FETCH_OPS (SYNC_SUB_AND_FETCH_8, TSAN_ATOMIC64_FETCH_SUB, MINUS_EXPR), | |
361 | FETCH_OPS (SYNC_SUB_AND_FETCH_16, TSAN_ATOMIC128_FETCH_SUB, MINUS_EXPR), | |
362 | FETCH_OPS (SYNC_AND_AND_FETCH_1, TSAN_ATOMIC8_FETCH_AND, BIT_AND_EXPR), | |
363 | FETCH_OPS (SYNC_AND_AND_FETCH_2, TSAN_ATOMIC16_FETCH_AND, BIT_AND_EXPR), | |
364 | FETCH_OPS (SYNC_AND_AND_FETCH_4, TSAN_ATOMIC32_FETCH_AND, BIT_AND_EXPR), | |
365 | FETCH_OPS (SYNC_AND_AND_FETCH_8, TSAN_ATOMIC64_FETCH_AND, BIT_AND_EXPR), | |
366 | FETCH_OPS (SYNC_AND_AND_FETCH_16, TSAN_ATOMIC128_FETCH_AND, BIT_AND_EXPR), | |
367 | FETCH_OPS (SYNC_OR_AND_FETCH_1, TSAN_ATOMIC8_FETCH_OR, BIT_IOR_EXPR), | |
368 | FETCH_OPS (SYNC_OR_AND_FETCH_2, TSAN_ATOMIC16_FETCH_OR, BIT_IOR_EXPR), | |
369 | FETCH_OPS (SYNC_OR_AND_FETCH_4, TSAN_ATOMIC32_FETCH_OR, BIT_IOR_EXPR), | |
370 | FETCH_OPS (SYNC_OR_AND_FETCH_8, TSAN_ATOMIC64_FETCH_OR, BIT_IOR_EXPR), | |
371 | FETCH_OPS (SYNC_OR_AND_FETCH_16, TSAN_ATOMIC128_FETCH_OR, BIT_IOR_EXPR), | |
372 | FETCH_OPS (SYNC_XOR_AND_FETCH_1, TSAN_ATOMIC8_FETCH_XOR, BIT_XOR_EXPR), | |
373 | FETCH_OPS (SYNC_XOR_AND_FETCH_2, TSAN_ATOMIC16_FETCH_XOR, BIT_XOR_EXPR), | |
374 | FETCH_OPS (SYNC_XOR_AND_FETCH_4, TSAN_ATOMIC32_FETCH_XOR, BIT_XOR_EXPR), | |
375 | FETCH_OPS (SYNC_XOR_AND_FETCH_8, TSAN_ATOMIC64_FETCH_XOR, BIT_XOR_EXPR), | |
376 | FETCH_OPS (SYNC_XOR_AND_FETCH_16, TSAN_ATOMIC128_FETCH_XOR, BIT_XOR_EXPR), | |
377 | FETCH_OPS (SYNC_NAND_AND_FETCH_1, TSAN_ATOMIC8_FETCH_NAND, BIT_NOT_EXPR), | |
378 | FETCH_OPS (SYNC_NAND_AND_FETCH_2, TSAN_ATOMIC16_FETCH_NAND, BIT_NOT_EXPR), | |
379 | FETCH_OPS (SYNC_NAND_AND_FETCH_4, TSAN_ATOMIC32_FETCH_NAND, BIT_NOT_EXPR), | |
380 | FETCH_OPS (SYNC_NAND_AND_FETCH_8, TSAN_ATOMIC64_FETCH_NAND, BIT_NOT_EXPR), | |
381 | FETCH_OPS (SYNC_NAND_AND_FETCH_16, TSAN_ATOMIC128_FETCH_NAND, BIT_NOT_EXPR), | |
382 | ||
383 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_1, TSAN_ATOMIC8_COMPARE_EXCHANGE_WEAK), | |
384 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_2, TSAN_ATOMIC16_COMPARE_EXCHANGE_WEAK), | |
385 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_4, TSAN_ATOMIC32_COMPARE_EXCHANGE_WEAK), | |
386 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_8, TSAN_ATOMIC64_COMPARE_EXCHANGE_WEAK), | |
387 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_16, TSAN_ATOMIC128_COMPARE_EXCHANGE_WEAK), | |
388 | ||
389 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_1, TSAN_ATOMIC8_COMPARE_EXCHANGE_STRONG), | |
390 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_2, | |
391 | TSAN_ATOMIC16_COMPARE_EXCHANGE_STRONG), | |
392 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_4, | |
393 | TSAN_ATOMIC32_COMPARE_EXCHANGE_STRONG), | |
394 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_8, | |
395 | TSAN_ATOMIC64_COMPARE_EXCHANGE_STRONG), | |
396 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_16, | |
397 | TSAN_ATOMIC128_COMPARE_EXCHANGE_STRONG), | |
398 | ||
399 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_1, | |
400 | TSAN_ATOMIC8_COMPARE_EXCHANGE_STRONG), | |
401 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_2, | |
402 | TSAN_ATOMIC16_COMPARE_EXCHANGE_STRONG), | |
403 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_4, | |
404 | TSAN_ATOMIC32_COMPARE_EXCHANGE_STRONG), | |
405 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_8, | |
406 | TSAN_ATOMIC64_COMPARE_EXCHANGE_STRONG), | |
407 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_16, | |
408 | TSAN_ATOMIC128_COMPARE_EXCHANGE_STRONG), | |
409 | ||
410 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_1, TSAN_ATOMIC8_COMPARE_EXCHANGE_STRONG), | |
411 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_2, TSAN_ATOMIC16_COMPARE_EXCHANGE_STRONG), | |
412 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_4, TSAN_ATOMIC32_COMPARE_EXCHANGE_STRONG), | |
413 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_8, TSAN_ATOMIC64_COMPARE_EXCHANGE_STRONG), | |
414 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_16, | |
415 | TSAN_ATOMIC128_COMPARE_EXCHANGE_STRONG), | |
416 | ||
417 | LOCK_RELEASE (SYNC_LOCK_RELEASE_1, TSAN_ATOMIC8_STORE), | |
418 | LOCK_RELEASE (SYNC_LOCK_RELEASE_2, TSAN_ATOMIC16_STORE), | |
419 | LOCK_RELEASE (SYNC_LOCK_RELEASE_4, TSAN_ATOMIC32_STORE), | |
420 | LOCK_RELEASE (SYNC_LOCK_RELEASE_8, TSAN_ATOMIC64_STORE), | |
421 | LOCK_RELEASE (SYNC_LOCK_RELEASE_16, TSAN_ATOMIC128_STORE) | |
422 | }; | |
423 | ||
424 | /* Instrument an atomic builtin. */ | |
425 | ||
426 | static void | |
427 | instrument_builtin_call (gimple_stmt_iterator *gsi) | |
428 | { | |
429 | gimple stmt = gsi_stmt (*gsi), g; | |
430 | tree callee = gimple_call_fndecl (stmt), last_arg, args[6], t, lhs; | |
431 | enum built_in_function fcode = DECL_FUNCTION_CODE (callee); | |
432 | unsigned int i, num = gimple_call_num_args (stmt), j; | |
433 | for (j = 0; j < 6 && j < num; j++) | |
434 | args[j] = gimple_call_arg (stmt, j); | |
435 | for (i = 0; i < ARRAY_SIZE (tsan_atomic_table); i++) | |
436 | if (fcode != tsan_atomic_table[i].fcode) | |
437 | continue; | |
438 | else | |
439 | { | |
440 | tree decl = builtin_decl_implicit (tsan_atomic_table[i].tsan_fcode); | |
441 | if (decl == NULL_TREE) | |
442 | return; | |
443 | switch (tsan_atomic_table[i].action) | |
444 | { | |
445 | case check_last: | |
446 | case fetch_op: | |
447 | last_arg = gimple_call_arg (stmt, num - 1); | |
448 | if (!host_integerp (last_arg, 1) | |
449 | || (unsigned HOST_WIDE_INT) tree_low_cst (last_arg, 1) | |
450 | > MEMMODEL_SEQ_CST) | |
451 | return; | |
452 | gimple_call_set_fndecl (stmt, decl); | |
453 | update_stmt (stmt); | |
454 | if (tsan_atomic_table[i].action == fetch_op) | |
455 | { | |
456 | args[1] = gimple_call_arg (stmt, 1); | |
457 | goto adjust_result; | |
458 | } | |
459 | return; | |
460 | case add_seq_cst: | |
461 | case add_acquire: | |
462 | case fetch_op_seq_cst: | |
463 | gcc_assert (num <= 2); | |
464 | for (j = 0; j < num; j++) | |
465 | args[j] = gimple_call_arg (stmt, j); | |
466 | for (; j < 2; j++) | |
467 | args[j] = NULL_TREE; | |
468 | args[num] = build_int_cst (NULL_TREE, | |
469 | tsan_atomic_table[i].action | |
470 | != add_acquire | |
471 | ? MEMMODEL_SEQ_CST | |
472 | : MEMMODEL_ACQUIRE); | |
473 | update_gimple_call (gsi, decl, num + 1, args[0], args[1], args[2]); | |
474 | stmt = gsi_stmt (*gsi); | |
475 | if (tsan_atomic_table[i].action == fetch_op_seq_cst) | |
476 | { | |
477 | adjust_result: | |
478 | lhs = gimple_call_lhs (stmt); | |
479 | if (lhs == NULL_TREE) | |
480 | return; | |
481 | if (!useless_type_conversion_p (TREE_TYPE (lhs), | |
482 | TREE_TYPE (args[1]))) | |
483 | { | |
484 | tree var = make_ssa_name (TREE_TYPE (lhs), NULL); | |
485 | g = gimple_build_assign_with_ops (NOP_EXPR, var, | |
486 | args[1], NULL_TREE); | |
487 | gsi_insert_after (gsi, g, GSI_NEW_STMT); | |
488 | args[1] = var; | |
489 | } | |
490 | gimple_call_set_lhs (stmt, | |
491 | make_ssa_name (TREE_TYPE (lhs), NULL)); | |
492 | /* BIT_NOT_EXPR stands for NAND. */ | |
493 | if (tsan_atomic_table[i].code == BIT_NOT_EXPR) | |
494 | { | |
495 | tree var = make_ssa_name (TREE_TYPE (lhs), NULL); | |
496 | g = gimple_build_assign_with_ops (BIT_AND_EXPR, var, | |
497 | gimple_call_lhs (stmt), | |
498 | args[1]); | |
499 | gsi_insert_after (gsi, g, GSI_NEW_STMT); | |
500 | g = gimple_build_assign_with_ops (BIT_NOT_EXPR, lhs, var, | |
501 | NULL_TREE); | |
502 | } | |
503 | else | |
504 | g = gimple_build_assign_with_ops (tsan_atomic_table[i].code, | |
505 | lhs, | |
506 | gimple_call_lhs (stmt), | |
507 | args[1]); | |
508 | update_stmt (stmt); | |
509 | gsi_insert_after (gsi, g, GSI_NEW_STMT); | |
510 | } | |
511 | return; | |
512 | case weak_cas: | |
513 | if (!integer_nonzerop (gimple_call_arg (stmt, 3))) | |
514 | continue; | |
515 | /* FALLTHRU */ | |
516 | case strong_cas: | |
517 | gcc_assert (num == 6); | |
518 | for (j = 0; j < 6; j++) | |
519 | args[j] = gimple_call_arg (stmt, j); | |
520 | if (!host_integerp (args[4], 1) | |
521 | || (unsigned HOST_WIDE_INT) tree_low_cst (args[4], 1) | |
522 | > MEMMODEL_SEQ_CST) | |
523 | return; | |
524 | if (!host_integerp (args[5], 1) | |
525 | || (unsigned HOST_WIDE_INT) tree_low_cst (args[5], 1) | |
526 | > MEMMODEL_SEQ_CST) | |
527 | return; | |
528 | update_gimple_call (gsi, decl, 5, args[0], args[1], args[2], | |
529 | args[4], args[5]); | |
530 | return; | |
531 | case bool_cas: | |
532 | case val_cas: | |
533 | gcc_assert (num == 3); | |
534 | for (j = 0; j < 3; j++) | |
535 | args[j] = gimple_call_arg (stmt, j); | |
536 | t = TYPE_ARG_TYPES (TREE_TYPE (decl)); | |
537 | t = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (t))); | |
538 | t = create_tmp_var (t, NULL); | |
539 | mark_addressable (t); | |
540 | if (!useless_type_conversion_p (TREE_TYPE (t), | |
541 | TREE_TYPE (args[1]))) | |
542 | { | |
543 | g = gimple_build_assign_with_ops (NOP_EXPR, | |
544 | make_ssa_name (TREE_TYPE (t), | |
545 | NULL), | |
546 | args[1], NULL_TREE); | |
547 | gsi_insert_before (gsi, g, GSI_SAME_STMT); | |
548 | args[1] = gimple_assign_lhs (g); | |
549 | } | |
550 | g = gimple_build_assign (t, args[1]); | |
551 | gsi_insert_before (gsi, g, GSI_SAME_STMT); | |
552 | lhs = gimple_call_lhs (stmt); | |
553 | update_gimple_call (gsi, decl, 5, args[0], | |
554 | build_fold_addr_expr (t), args[2], | |
555 | build_int_cst (NULL_TREE, | |
556 | MEMMODEL_SEQ_CST), | |
557 | build_int_cst (NULL_TREE, | |
558 | MEMMODEL_SEQ_CST)); | |
559 | if (tsan_atomic_table[i].action == val_cas && lhs) | |
560 | { | |
561 | tree cond; | |
562 | stmt = gsi_stmt (*gsi); | |
563 | g = gimple_build_assign (make_ssa_name (TREE_TYPE (t), NULL), | |
564 | t); | |
565 | gsi_insert_after (gsi, g, GSI_NEW_STMT); | |
566 | t = make_ssa_name (TREE_TYPE (TREE_TYPE (decl)), stmt); | |
567 | cond = build2 (NE_EXPR, boolean_type_node, t, | |
568 | build_int_cst (TREE_TYPE (t), 0)); | |
569 | g = gimple_build_assign_with_ops (COND_EXPR, lhs, cond, | |
570 | args[1], | |
571 | gimple_assign_lhs (g)); | |
572 | gimple_call_set_lhs (stmt, t); | |
573 | update_stmt (stmt); | |
574 | gsi_insert_after (gsi, g, GSI_NEW_STMT); | |
575 | } | |
576 | return; | |
577 | case lock_release: | |
578 | gcc_assert (num == 1); | |
579 | t = TYPE_ARG_TYPES (TREE_TYPE (decl)); | |
580 | t = TREE_VALUE (TREE_CHAIN (t)); | |
581 | update_gimple_call (gsi, decl, 3, gimple_call_arg (stmt, 0), | |
582 | build_int_cst (t, 0), | |
583 | build_int_cst (NULL_TREE, | |
584 | MEMMODEL_RELEASE)); | |
585 | return; | |
586 | default: | |
587 | continue; | |
588 | } | |
589 | } | |
590 | } | |
591 | ||
32b4b7f5 | 592 | /* Instruments the gimple pointed to by GSI. Return |
8ddf5c28 | 593 | true if func entry/exit should be instrumented. */ |
32b4b7f5 DV |
594 | |
595 | static bool | |
c954bddd | 596 | instrument_gimple (gimple_stmt_iterator *gsi) |
32b4b7f5 DV |
597 | { |
598 | gimple stmt; | |
599 | tree rhs, lhs; | |
600 | bool instrumented = false; | |
601 | ||
c954bddd | 602 | stmt = gsi_stmt (*gsi); |
32b4b7f5 DV |
603 | if (is_gimple_call (stmt) |
604 | && (gimple_call_fndecl (stmt) | |
605 | != builtin_decl_implicit (BUILT_IN_TSAN_INIT))) | |
c954bddd JJ |
606 | { |
607 | if (is_gimple_builtin_call (stmt)) | |
608 | instrument_builtin_call (gsi); | |
609 | return true; | |
610 | } | |
8ddf5c28 JJ |
611 | else if (is_gimple_assign (stmt) |
612 | && !gimple_clobber_p (stmt)) | |
32b4b7f5 DV |
613 | { |
614 | if (gimple_store_p (stmt)) | |
615 | { | |
616 | lhs = gimple_assign_lhs (stmt); | |
c954bddd | 617 | instrumented = instrument_expr (*gsi, lhs, true); |
32b4b7f5 DV |
618 | } |
619 | if (gimple_assign_load_p (stmt)) | |
620 | { | |
621 | rhs = gimple_assign_rhs1 (stmt); | |
c954bddd | 622 | instrumented = instrument_expr (*gsi, rhs, false); |
32b4b7f5 DV |
623 | } |
624 | } | |
625 | return instrumented; | |
626 | } | |
627 | ||
628 | /* Instruments all interesting memory accesses in the current function. | |
8ddf5c28 | 629 | Return true if func entry/exit should be instrumented. */ |
32b4b7f5 DV |
630 | |
631 | static bool | |
632 | instrument_memory_accesses (void) | |
633 | { | |
634 | basic_block bb; | |
635 | gimple_stmt_iterator gsi; | |
636 | bool fentry_exit_instrument = false; | |
637 | ||
638 | FOR_EACH_BB (bb) | |
639 | for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) | |
c954bddd | 640 | fentry_exit_instrument |= instrument_gimple (&gsi); |
32b4b7f5 DV |
641 | return fentry_exit_instrument; |
642 | } | |
643 | ||
644 | /* Instruments function entry. */ | |
645 | ||
646 | static void | |
647 | instrument_func_entry (void) | |
648 | { | |
649 | basic_block succ_bb; | |
650 | gimple_stmt_iterator gsi; | |
651 | tree ret_addr, builtin_decl; | |
652 | gimple g; | |
653 | ||
654 | succ_bb = single_succ (ENTRY_BLOCK_PTR); | |
655 | gsi = gsi_after_labels (succ_bb); | |
656 | ||
657 | builtin_decl = builtin_decl_implicit (BUILT_IN_RETURN_ADDRESS); | |
658 | g = gimple_build_call (builtin_decl, 1, integer_zero_node); | |
659 | ret_addr = make_ssa_name (ptr_type_node, NULL); | |
660 | gimple_call_set_lhs (g, ret_addr); | |
661 | gimple_set_location (g, cfun->function_start_locus); | |
662 | gsi_insert_before (&gsi, g, GSI_SAME_STMT); | |
663 | ||
664 | builtin_decl = builtin_decl_implicit (BUILT_IN_TSAN_FUNC_ENTRY); | |
665 | g = gimple_build_call (builtin_decl, 1, ret_addr); | |
666 | gimple_set_location (g, cfun->function_start_locus); | |
667 | gsi_insert_before (&gsi, g, GSI_SAME_STMT); | |
668 | } | |
669 | ||
670 | /* Instruments function exits. */ | |
671 | ||
672 | static void | |
673 | instrument_func_exit (void) | |
674 | { | |
675 | location_t loc; | |
676 | basic_block exit_bb; | |
677 | gimple_stmt_iterator gsi; | |
678 | gimple stmt, g; | |
679 | tree builtin_decl; | |
680 | edge e; | |
681 | edge_iterator ei; | |
682 | ||
683 | /* Find all function exits. */ | |
684 | exit_bb = EXIT_BLOCK_PTR; | |
685 | FOR_EACH_EDGE (e, ei, exit_bb->preds) | |
686 | { | |
687 | gsi = gsi_last_bb (e->src); | |
688 | stmt = gsi_stmt (gsi); | |
71c581e7 MP |
689 | gcc_assert (gimple_code (stmt) == GIMPLE_RETURN |
690 | || gimple_call_builtin_p (stmt, BUILT_IN_RETURN)); | |
32b4b7f5 DV |
691 | loc = gimple_location (stmt); |
692 | builtin_decl = builtin_decl_implicit (BUILT_IN_TSAN_FUNC_EXIT); | |
693 | g = gimple_build_call (builtin_decl, 0); | |
694 | gimple_set_location (g, loc); | |
695 | gsi_insert_before (&gsi, g, GSI_SAME_STMT); | |
696 | } | |
697 | } | |
698 | ||
699 | /* ThreadSanitizer instrumentation pass. */ | |
700 | ||
701 | static unsigned | |
702 | tsan_pass (void) | |
703 | { | |
0e668eaf | 704 | initialize_sanitizer_builtins (); |
32b4b7f5 DV |
705 | if (instrument_memory_accesses ()) |
706 | { | |
707 | instrument_func_entry (); | |
708 | instrument_func_exit (); | |
709 | } | |
710 | return 0; | |
711 | } | |
712 | ||
713 | /* The pass's gate. */ | |
714 | ||
715 | static bool | |
716 | tsan_gate (void) | |
717 | { | |
de5a5fa1 | 718 | return (flag_sanitize & SANITIZE_THREAD) != 0; |
32b4b7f5 DV |
719 | } |
720 | ||
721 | /* Inserts __tsan_init () into the list of CTORs. */ | |
722 | ||
723 | void | |
724 | tsan_finish_file (void) | |
725 | { | |
0e668eaf | 726 | tree ctor_statements = NULL_TREE; |
32b4b7f5 | 727 | |
0e668eaf JJ |
728 | initialize_sanitizer_builtins (); |
729 | tree init_decl = builtin_decl_implicit (BUILT_IN_TSAN_INIT); | |
32b4b7f5 DV |
730 | append_to_statement_list (build_call_expr (init_decl, 0), |
731 | &ctor_statements); | |
732 | cgraph_build_static_cdtor ('I', ctor_statements, | |
733 | MAX_RESERVED_INIT_PRIORITY - 1); | |
734 | } | |
735 | ||
736 | /* The pass descriptor. */ | |
737 | ||
27a4cd48 DM |
738 | namespace { |
739 | ||
740 | const pass_data pass_data_tsan = | |
32b4b7f5 | 741 | { |
27a4cd48 DM |
742 | GIMPLE_PASS, /* type */ |
743 | "tsan", /* name */ | |
744 | OPTGROUP_NONE, /* optinfo_flags */ | |
745 | true, /* has_gate */ | |
746 | true, /* has_execute */ | |
747 | TV_NONE, /* tv_id */ | |
748 | ( PROP_ssa | PROP_cfg ), /* properties_required */ | |
749 | 0, /* properties_provided */ | |
750 | 0, /* properties_destroyed */ | |
751 | 0, /* todo_flags_start */ | |
752 | ( TODO_verify_all | TODO_update_ssa ), /* todo_flags_finish */ | |
32b4b7f5 DV |
753 | }; |
754 | ||
27a4cd48 DM |
755 | class pass_tsan : public gimple_opt_pass |
756 | { | |
757 | public: | |
c3284718 RS |
758 | pass_tsan (gcc::context *ctxt) |
759 | : gimple_opt_pass (pass_data_tsan, ctxt) | |
27a4cd48 DM |
760 | {} |
761 | ||
762 | /* opt_pass methods: */ | |
65d3284b | 763 | opt_pass * clone () { return new pass_tsan (m_ctxt); } |
27a4cd48 DM |
764 | bool gate () { return tsan_gate (); } |
765 | unsigned int execute () { return tsan_pass (); } | |
766 | ||
767 | }; // class pass_tsan | |
768 | ||
769 | } // anon namespace | |
770 | ||
771 | gimple_opt_pass * | |
772 | make_pass_tsan (gcc::context *ctxt) | |
773 | { | |
774 | return new pass_tsan (ctxt); | |
775 | } | |
776 | ||
32b4b7f5 DV |
777 | static bool |
778 | tsan_gate_O0 (void) | |
779 | { | |
de5a5fa1 | 780 | return (flag_sanitize & SANITIZE_THREAD) != 0 && !optimize; |
32b4b7f5 DV |
781 | } |
782 | ||
27a4cd48 DM |
783 | namespace { |
784 | ||
785 | const pass_data pass_data_tsan_O0 = | |
32b4b7f5 | 786 | { |
27a4cd48 DM |
787 | GIMPLE_PASS, /* type */ |
788 | "tsan0", /* name */ | |
789 | OPTGROUP_NONE, /* optinfo_flags */ | |
790 | true, /* has_gate */ | |
791 | true, /* has_execute */ | |
792 | TV_NONE, /* tv_id */ | |
793 | ( PROP_ssa | PROP_cfg ), /* properties_required */ | |
794 | 0, /* properties_provided */ | |
795 | 0, /* properties_destroyed */ | |
796 | 0, /* todo_flags_start */ | |
797 | ( TODO_verify_all | TODO_update_ssa ), /* todo_flags_finish */ | |
32b4b7f5 | 798 | }; |
27a4cd48 DM |
799 | |
800 | class pass_tsan_O0 : public gimple_opt_pass | |
801 | { | |
802 | public: | |
c3284718 RS |
803 | pass_tsan_O0 (gcc::context *ctxt) |
804 | : gimple_opt_pass (pass_data_tsan_O0, ctxt) | |
27a4cd48 DM |
805 | {} |
806 | ||
807 | /* opt_pass methods: */ | |
808 | bool gate () { return tsan_gate_O0 (); } | |
809 | unsigned int execute () { return tsan_pass (); } | |
810 | ||
811 | }; // class pass_tsan_O0 | |
812 | ||
813 | } // anon namespace | |
814 | ||
815 | gimple_opt_pass * | |
816 | make_pass_tsan_O0 (gcc::context *ctxt) | |
817 | { | |
818 | return new pass_tsan_O0 (ctxt); | |
819 | } |