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32b4b7f5 | 1 | /* GCC instrumentation plugin for ThreadSanitizer. |
23a5b65a | 2 | Copyright (C) 2011-2014 Free Software Foundation, Inc. |
32b4b7f5 DV |
3 | Contributed by Dmitry Vyukov <dvyukov@google.com> |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it under | |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 3, or (at your option) any later | |
10 | version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | ||
22 | #include "config.h" | |
23 | #include "system.h" | |
24 | #include "coretypes.h" | |
25 | #include "tree.h" | |
d8a2d370 | 26 | #include "expr.h" |
32b4b7f5 DV |
27 | #include "intl.h" |
28 | #include "tm.h" | |
60393bbc AM |
29 | #include "predict.h" |
30 | #include "vec.h" | |
31 | #include "hashtab.h" | |
32 | #include "hash-set.h" | |
33 | #include "machmode.h" | |
34 | #include "hard-reg-set.h" | |
35 | #include "input.h" | |
36 | #include "function.h" | |
37 | #include "dominance.h" | |
38 | #include "cfg.h" | |
32b4b7f5 | 39 | #include "basic-block.h" |
2fb9a547 AM |
40 | #include "tree-ssa-alias.h" |
41 | #include "internal-fn.h" | |
42 | #include "gimple-expr.h" | |
43 | #include "is-a.h" | |
18f429e2 | 44 | #include "gimple.h" |
45b0be94 | 45 | #include "gimplify.h" |
5be5c238 | 46 | #include "gimple-iterator.h" |
442b4905 | 47 | #include "gimple-ssa.h" |
c582198b AM |
48 | #include "hash-map.h" |
49 | #include "plugin-api.h" | |
50 | #include "ipa-ref.h" | |
442b4905 AM |
51 | #include "cgraph.h" |
52 | #include "tree-cfg.h" | |
d8a2d370 | 53 | #include "stringpool.h" |
442b4905 | 54 | #include "tree-ssanames.h" |
32b4b7f5 DV |
55 | #include "tree-pass.h" |
56 | #include "tree-iterator.h" | |
57 | #include "langhooks.h" | |
58 | #include "output.h" | |
59 | #include "options.h" | |
60 | #include "target.h" | |
32b4b7f5 | 61 | #include "diagnostic.h" |
c954bddd | 62 | #include "tree-ssa-propagate.h" |
0e668eaf JJ |
63 | #include "tsan.h" |
64 | #include "asan.h" | |
32b4b7f5 DV |
65 | |
66 | /* Number of instrumented memory accesses in the current function. */ | |
67 | ||
68 | /* Builds the following decl | |
69 | void __tsan_read/writeX (void *addr); */ | |
70 | ||
71 | static tree | |
72 | get_memory_access_decl (bool is_write, unsigned size) | |
73 | { | |
74 | enum built_in_function fcode; | |
75 | ||
76 | if (size <= 1) | |
0e668eaf JJ |
77 | fcode = is_write ? BUILT_IN_TSAN_WRITE1 |
78 | : BUILT_IN_TSAN_READ1; | |
32b4b7f5 | 79 | else if (size <= 3) |
0e668eaf JJ |
80 | fcode = is_write ? BUILT_IN_TSAN_WRITE2 |
81 | : BUILT_IN_TSAN_READ2; | |
32b4b7f5 | 82 | else if (size <= 7) |
0e668eaf JJ |
83 | fcode = is_write ? BUILT_IN_TSAN_WRITE4 |
84 | : BUILT_IN_TSAN_READ4; | |
32b4b7f5 | 85 | else if (size <= 15) |
0e668eaf JJ |
86 | fcode = is_write ? BUILT_IN_TSAN_WRITE8 |
87 | : BUILT_IN_TSAN_READ8; | |
32b4b7f5 | 88 | else |
0e668eaf JJ |
89 | fcode = is_write ? BUILT_IN_TSAN_WRITE16 |
90 | : BUILT_IN_TSAN_READ16; | |
32b4b7f5 DV |
91 | |
92 | return builtin_decl_implicit (fcode); | |
93 | } | |
94 | ||
95 | /* Check as to whether EXPR refers to a store to vptr. */ | |
96 | ||
97 | static tree | |
98 | is_vptr_store (gimple stmt, tree expr, bool is_write) | |
99 | { | |
100 | if (is_write == true | |
101 | && gimple_assign_single_p (stmt) | |
102 | && TREE_CODE (expr) == COMPONENT_REF) | |
103 | { | |
104 | tree field = TREE_OPERAND (expr, 1); | |
105 | if (TREE_CODE (field) == FIELD_DECL | |
106 | && DECL_VIRTUAL_P (field)) | |
107 | return gimple_assign_rhs1 (stmt); | |
108 | } | |
109 | return NULL; | |
110 | } | |
111 | ||
32b4b7f5 | 112 | /* Instruments EXPR if needed. If any instrumentation is inserted, |
8ddf5c28 | 113 | return true. */ |
32b4b7f5 DV |
114 | |
115 | static bool | |
116 | instrument_expr (gimple_stmt_iterator gsi, tree expr, bool is_write) | |
117 | { | |
5c972fb6 | 118 | tree base, rhs, expr_ptr, builtin_decl; |
32b4b7f5 DV |
119 | basic_block bb; |
120 | HOST_WIDE_INT size; | |
121 | gimple stmt, g; | |
5c972fb6 | 122 | gimple_seq seq; |
32b4b7f5 DV |
123 | location_t loc; |
124 | ||
32b4b7f5 DV |
125 | size = int_size_in_bytes (TREE_TYPE (expr)); |
126 | if (size == -1) | |
127 | return false; | |
128 | ||
129 | /* For now just avoid instrumenting bit field acceses. | |
130 | TODO: handle bit-fields as if touching the whole field. */ | |
131 | HOST_WIDE_INT bitsize, bitpos; | |
132 | tree offset; | |
ef4bddc2 | 133 | machine_mode mode; |
32b4b7f5 | 134 | int volatilep = 0, unsignedp = 0; |
7a36dc06 | 135 | base = get_inner_reference (expr, &bitsize, &bitpos, &offset, |
b3ecff82 | 136 | &mode, &unsignedp, &volatilep, false); |
7a36dc06 JJ |
137 | |
138 | /* No need to instrument accesses to decls that don't escape, | |
139 | they can't escape to other threads then. */ | |
140 | if (DECL_P (base)) | |
141 | { | |
142 | struct pt_solution pt; | |
143 | memset (&pt, 0, sizeof (pt)); | |
144 | pt.escaped = 1; | |
145 | pt.ipa_escaped = flag_ipa_pta != 0; | |
146 | pt.nonlocal = 1; | |
147 | if (!pt_solution_includes (&pt, base)) | |
148 | return false; | |
149 | if (!is_global_var (base) && !may_be_aliased (base)) | |
150 | return false; | |
151 | } | |
152 | ||
abc27962 JJ |
153 | if (TREE_READONLY (base) |
154 | || (TREE_CODE (base) == VAR_DECL | |
155 | && DECL_HARD_REGISTER (base))) | |
32b4b7f5 DV |
156 | return false; |
157 | ||
829d0168 MP |
158 | if (size == 0 |
159 | || bitpos % (size * BITS_PER_UNIT) | |
7a36dc06 | 160 | || bitsize != size * BITS_PER_UNIT) |
32b4b7f5 DV |
161 | return false; |
162 | ||
163 | stmt = gsi_stmt (gsi); | |
164 | loc = gimple_location (stmt); | |
165 | rhs = is_vptr_store (stmt, expr, is_write); | |
166 | gcc_checking_assert (rhs != NULL || is_gimple_addressable (expr)); | |
167 | expr_ptr = build_fold_addr_expr (unshare_expr (expr)); | |
5c972fb6 JJ |
168 | seq = NULL; |
169 | if (!is_gimple_val (expr_ptr)) | |
32b4b7f5 | 170 | { |
b731b390 | 171 | g = gimple_build_assign (make_ssa_name (TREE_TYPE (expr_ptr)), expr_ptr); |
5c972fb6 JJ |
172 | expr_ptr = gimple_assign_lhs (g); |
173 | gimple_set_location (g, loc); | |
174 | gimple_seq_add_stmt_without_update (&seq, g); | |
32b4b7f5 | 175 | } |
5c972fb6 JJ |
176 | if (rhs == NULL) |
177 | g = gimple_build_call (get_memory_access_decl (is_write, size), | |
178 | 1, expr_ptr); | |
32b4b7f5 DV |
179 | else |
180 | { | |
181 | builtin_decl = builtin_decl_implicit (BUILT_IN_TSAN_VPTR_UPDATE); | |
182 | g = gimple_build_call (builtin_decl, 1, expr_ptr); | |
183 | } | |
184 | gimple_set_location (g, loc); | |
5c972fb6 | 185 | gimple_seq_add_stmt_without_update (&seq, g); |
32b4b7f5 DV |
186 | /* Instrumentation for assignment of a function result |
187 | must be inserted after the call. Instrumentation for | |
188 | reads of function arguments must be inserted before the call. | |
189 | That's because the call can contain synchronization. */ | |
190 | if (is_gimple_call (stmt) && is_write) | |
191 | { | |
192 | /* If the call can throw, it must be the last stmt in | |
193 | a basic block, so the instrumented stmts need to be | |
8ddf5c28 | 194 | inserted in successor bbs. */ |
32b4b7f5 DV |
195 | if (is_ctrl_altering_stmt (stmt)) |
196 | { | |
197 | edge e; | |
198 | ||
199 | bb = gsi_bb (gsi); | |
200 | e = find_fallthru_edge (bb->succs); | |
201 | if (e) | |
5c972fb6 | 202 | gsi_insert_seq_on_edge_immediate (e, seq); |
32b4b7f5 DV |
203 | } |
204 | else | |
5c972fb6 | 205 | gsi_insert_seq_after (&gsi, seq, GSI_NEW_STMT); |
32b4b7f5 DV |
206 | } |
207 | else | |
5c972fb6 | 208 | gsi_insert_seq_before (&gsi, seq, GSI_SAME_STMT); |
32b4b7f5 DV |
209 | |
210 | return true; | |
211 | } | |
212 | ||
c954bddd JJ |
213 | /* Actions for sync/atomic builtin transformations. */ |
214 | enum tsan_atomic_action | |
215 | { | |
216 | check_last, add_seq_cst, add_acquire, weak_cas, strong_cas, | |
217 | bool_cas, val_cas, lock_release, fetch_op, fetch_op_seq_cst | |
218 | }; | |
219 | ||
220 | /* Table how to map sync/atomic builtins to their corresponding | |
221 | tsan equivalents. */ | |
34c136b6 | 222 | static const struct tsan_map_atomic |
c954bddd JJ |
223 | { |
224 | enum built_in_function fcode, tsan_fcode; | |
225 | enum tsan_atomic_action action; | |
226 | enum tree_code code; | |
227 | } tsan_atomic_table[] = | |
228 | { | |
229 | #define TRANSFORM(fcode, tsan_fcode, action, code) \ | |
230 | { BUILT_IN_##fcode, BUILT_IN_##tsan_fcode, action, code } | |
231 | #define CHECK_LAST(fcode, tsan_fcode) \ | |
232 | TRANSFORM (fcode, tsan_fcode, check_last, ERROR_MARK) | |
233 | #define ADD_SEQ_CST(fcode, tsan_fcode) \ | |
234 | TRANSFORM (fcode, tsan_fcode, add_seq_cst, ERROR_MARK) | |
235 | #define ADD_ACQUIRE(fcode, tsan_fcode) \ | |
236 | TRANSFORM (fcode, tsan_fcode, add_acquire, ERROR_MARK) | |
237 | #define WEAK_CAS(fcode, tsan_fcode) \ | |
238 | TRANSFORM (fcode, tsan_fcode, weak_cas, ERROR_MARK) | |
239 | #define STRONG_CAS(fcode, tsan_fcode) \ | |
240 | TRANSFORM (fcode, tsan_fcode, strong_cas, ERROR_MARK) | |
241 | #define BOOL_CAS(fcode, tsan_fcode) \ | |
242 | TRANSFORM (fcode, tsan_fcode, bool_cas, ERROR_MARK) | |
243 | #define VAL_CAS(fcode, tsan_fcode) \ | |
244 | TRANSFORM (fcode, tsan_fcode, val_cas, ERROR_MARK) | |
245 | #define LOCK_RELEASE(fcode, tsan_fcode) \ | |
246 | TRANSFORM (fcode, tsan_fcode, lock_release, ERROR_MARK) | |
247 | #define FETCH_OP(fcode, tsan_fcode, code) \ | |
248 | TRANSFORM (fcode, tsan_fcode, fetch_op, code) | |
249 | #define FETCH_OPS(fcode, tsan_fcode, code) \ | |
250 | TRANSFORM (fcode, tsan_fcode, fetch_op_seq_cst, code) | |
251 | ||
252 | CHECK_LAST (ATOMIC_LOAD_1, TSAN_ATOMIC8_LOAD), | |
253 | CHECK_LAST (ATOMIC_LOAD_2, TSAN_ATOMIC16_LOAD), | |
254 | CHECK_LAST (ATOMIC_LOAD_4, TSAN_ATOMIC32_LOAD), | |
255 | CHECK_LAST (ATOMIC_LOAD_8, TSAN_ATOMIC64_LOAD), | |
256 | CHECK_LAST (ATOMIC_LOAD_16, TSAN_ATOMIC128_LOAD), | |
257 | CHECK_LAST (ATOMIC_STORE_1, TSAN_ATOMIC8_STORE), | |
258 | CHECK_LAST (ATOMIC_STORE_2, TSAN_ATOMIC16_STORE), | |
259 | CHECK_LAST (ATOMIC_STORE_4, TSAN_ATOMIC32_STORE), | |
260 | CHECK_LAST (ATOMIC_STORE_8, TSAN_ATOMIC64_STORE), | |
261 | CHECK_LAST (ATOMIC_STORE_16, TSAN_ATOMIC128_STORE), | |
262 | CHECK_LAST (ATOMIC_EXCHANGE_1, TSAN_ATOMIC8_EXCHANGE), | |
263 | CHECK_LAST (ATOMIC_EXCHANGE_2, TSAN_ATOMIC16_EXCHANGE), | |
264 | CHECK_LAST (ATOMIC_EXCHANGE_4, TSAN_ATOMIC32_EXCHANGE), | |
265 | CHECK_LAST (ATOMIC_EXCHANGE_8, TSAN_ATOMIC64_EXCHANGE), | |
266 | CHECK_LAST (ATOMIC_EXCHANGE_16, TSAN_ATOMIC128_EXCHANGE), | |
267 | CHECK_LAST (ATOMIC_FETCH_ADD_1, TSAN_ATOMIC8_FETCH_ADD), | |
268 | CHECK_LAST (ATOMIC_FETCH_ADD_2, TSAN_ATOMIC16_FETCH_ADD), | |
269 | CHECK_LAST (ATOMIC_FETCH_ADD_4, TSAN_ATOMIC32_FETCH_ADD), | |
270 | CHECK_LAST (ATOMIC_FETCH_ADD_8, TSAN_ATOMIC64_FETCH_ADD), | |
271 | CHECK_LAST (ATOMIC_FETCH_ADD_16, TSAN_ATOMIC128_FETCH_ADD), | |
272 | CHECK_LAST (ATOMIC_FETCH_SUB_1, TSAN_ATOMIC8_FETCH_SUB), | |
273 | CHECK_LAST (ATOMIC_FETCH_SUB_2, TSAN_ATOMIC16_FETCH_SUB), | |
274 | CHECK_LAST (ATOMIC_FETCH_SUB_4, TSAN_ATOMIC32_FETCH_SUB), | |
275 | CHECK_LAST (ATOMIC_FETCH_SUB_8, TSAN_ATOMIC64_FETCH_SUB), | |
276 | CHECK_LAST (ATOMIC_FETCH_SUB_16, TSAN_ATOMIC128_FETCH_SUB), | |
277 | CHECK_LAST (ATOMIC_FETCH_AND_1, TSAN_ATOMIC8_FETCH_AND), | |
278 | CHECK_LAST (ATOMIC_FETCH_AND_2, TSAN_ATOMIC16_FETCH_AND), | |
279 | CHECK_LAST (ATOMIC_FETCH_AND_4, TSAN_ATOMIC32_FETCH_AND), | |
280 | CHECK_LAST (ATOMIC_FETCH_AND_8, TSAN_ATOMIC64_FETCH_AND), | |
281 | CHECK_LAST (ATOMIC_FETCH_AND_16, TSAN_ATOMIC128_FETCH_AND), | |
282 | CHECK_LAST (ATOMIC_FETCH_OR_1, TSAN_ATOMIC8_FETCH_OR), | |
283 | CHECK_LAST (ATOMIC_FETCH_OR_2, TSAN_ATOMIC16_FETCH_OR), | |
284 | CHECK_LAST (ATOMIC_FETCH_OR_4, TSAN_ATOMIC32_FETCH_OR), | |
285 | CHECK_LAST (ATOMIC_FETCH_OR_8, TSAN_ATOMIC64_FETCH_OR), | |
286 | CHECK_LAST (ATOMIC_FETCH_OR_16, TSAN_ATOMIC128_FETCH_OR), | |
287 | CHECK_LAST (ATOMIC_FETCH_XOR_1, TSAN_ATOMIC8_FETCH_XOR), | |
288 | CHECK_LAST (ATOMIC_FETCH_XOR_2, TSAN_ATOMIC16_FETCH_XOR), | |
289 | CHECK_LAST (ATOMIC_FETCH_XOR_4, TSAN_ATOMIC32_FETCH_XOR), | |
290 | CHECK_LAST (ATOMIC_FETCH_XOR_8, TSAN_ATOMIC64_FETCH_XOR), | |
291 | CHECK_LAST (ATOMIC_FETCH_XOR_16, TSAN_ATOMIC128_FETCH_XOR), | |
292 | CHECK_LAST (ATOMIC_FETCH_NAND_1, TSAN_ATOMIC8_FETCH_NAND), | |
293 | CHECK_LAST (ATOMIC_FETCH_NAND_2, TSAN_ATOMIC16_FETCH_NAND), | |
294 | CHECK_LAST (ATOMIC_FETCH_NAND_4, TSAN_ATOMIC32_FETCH_NAND), | |
295 | CHECK_LAST (ATOMIC_FETCH_NAND_8, TSAN_ATOMIC64_FETCH_NAND), | |
296 | CHECK_LAST (ATOMIC_FETCH_NAND_16, TSAN_ATOMIC128_FETCH_NAND), | |
297 | ||
298 | CHECK_LAST (ATOMIC_THREAD_FENCE, TSAN_ATOMIC_THREAD_FENCE), | |
299 | CHECK_LAST (ATOMIC_SIGNAL_FENCE, TSAN_ATOMIC_SIGNAL_FENCE), | |
300 | ||
301 | FETCH_OP (ATOMIC_ADD_FETCH_1, TSAN_ATOMIC8_FETCH_ADD, PLUS_EXPR), | |
302 | FETCH_OP (ATOMIC_ADD_FETCH_2, TSAN_ATOMIC16_FETCH_ADD, PLUS_EXPR), | |
303 | FETCH_OP (ATOMIC_ADD_FETCH_4, TSAN_ATOMIC32_FETCH_ADD, PLUS_EXPR), | |
304 | FETCH_OP (ATOMIC_ADD_FETCH_8, TSAN_ATOMIC64_FETCH_ADD, PLUS_EXPR), | |
305 | FETCH_OP (ATOMIC_ADD_FETCH_16, TSAN_ATOMIC128_FETCH_ADD, PLUS_EXPR), | |
306 | FETCH_OP (ATOMIC_SUB_FETCH_1, TSAN_ATOMIC8_FETCH_SUB, MINUS_EXPR), | |
307 | FETCH_OP (ATOMIC_SUB_FETCH_2, TSAN_ATOMIC16_FETCH_SUB, MINUS_EXPR), | |
308 | FETCH_OP (ATOMIC_SUB_FETCH_4, TSAN_ATOMIC32_FETCH_SUB, MINUS_EXPR), | |
309 | FETCH_OP (ATOMIC_SUB_FETCH_8, TSAN_ATOMIC64_FETCH_SUB, MINUS_EXPR), | |
310 | FETCH_OP (ATOMIC_SUB_FETCH_16, TSAN_ATOMIC128_FETCH_SUB, MINUS_EXPR), | |
311 | FETCH_OP (ATOMIC_AND_FETCH_1, TSAN_ATOMIC8_FETCH_AND, BIT_AND_EXPR), | |
312 | FETCH_OP (ATOMIC_AND_FETCH_2, TSAN_ATOMIC16_FETCH_AND, BIT_AND_EXPR), | |
313 | FETCH_OP (ATOMIC_AND_FETCH_4, TSAN_ATOMIC32_FETCH_AND, BIT_AND_EXPR), | |
314 | FETCH_OP (ATOMIC_AND_FETCH_8, TSAN_ATOMIC64_FETCH_AND, BIT_AND_EXPR), | |
315 | FETCH_OP (ATOMIC_AND_FETCH_16, TSAN_ATOMIC128_FETCH_AND, BIT_AND_EXPR), | |
316 | FETCH_OP (ATOMIC_OR_FETCH_1, TSAN_ATOMIC8_FETCH_OR, BIT_IOR_EXPR), | |
317 | FETCH_OP (ATOMIC_OR_FETCH_2, TSAN_ATOMIC16_FETCH_OR, BIT_IOR_EXPR), | |
318 | FETCH_OP (ATOMIC_OR_FETCH_4, TSAN_ATOMIC32_FETCH_OR, BIT_IOR_EXPR), | |
319 | FETCH_OP (ATOMIC_OR_FETCH_8, TSAN_ATOMIC64_FETCH_OR, BIT_IOR_EXPR), | |
320 | FETCH_OP (ATOMIC_OR_FETCH_16, TSAN_ATOMIC128_FETCH_OR, BIT_IOR_EXPR), | |
321 | FETCH_OP (ATOMIC_XOR_FETCH_1, TSAN_ATOMIC8_FETCH_XOR, BIT_XOR_EXPR), | |
322 | FETCH_OP (ATOMIC_XOR_FETCH_2, TSAN_ATOMIC16_FETCH_XOR, BIT_XOR_EXPR), | |
323 | FETCH_OP (ATOMIC_XOR_FETCH_4, TSAN_ATOMIC32_FETCH_XOR, BIT_XOR_EXPR), | |
324 | FETCH_OP (ATOMIC_XOR_FETCH_8, TSAN_ATOMIC64_FETCH_XOR, BIT_XOR_EXPR), | |
325 | FETCH_OP (ATOMIC_XOR_FETCH_16, TSAN_ATOMIC128_FETCH_XOR, BIT_XOR_EXPR), | |
326 | FETCH_OP (ATOMIC_NAND_FETCH_1, TSAN_ATOMIC8_FETCH_NAND, BIT_NOT_EXPR), | |
327 | FETCH_OP (ATOMIC_NAND_FETCH_2, TSAN_ATOMIC16_FETCH_NAND, BIT_NOT_EXPR), | |
328 | FETCH_OP (ATOMIC_NAND_FETCH_4, TSAN_ATOMIC32_FETCH_NAND, BIT_NOT_EXPR), | |
329 | FETCH_OP (ATOMIC_NAND_FETCH_8, TSAN_ATOMIC64_FETCH_NAND, BIT_NOT_EXPR), | |
330 | FETCH_OP (ATOMIC_NAND_FETCH_16, TSAN_ATOMIC128_FETCH_NAND, BIT_NOT_EXPR), | |
331 | ||
332 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_1, TSAN_ATOMIC8_EXCHANGE), | |
333 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_2, TSAN_ATOMIC16_EXCHANGE), | |
334 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_4, TSAN_ATOMIC32_EXCHANGE), | |
335 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_8, TSAN_ATOMIC64_EXCHANGE), | |
336 | ADD_ACQUIRE (SYNC_LOCK_TEST_AND_SET_16, TSAN_ATOMIC128_EXCHANGE), | |
337 | ||
338 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_1, TSAN_ATOMIC8_FETCH_ADD), | |
339 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_2, TSAN_ATOMIC16_FETCH_ADD), | |
340 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_4, TSAN_ATOMIC32_FETCH_ADD), | |
341 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_8, TSAN_ATOMIC64_FETCH_ADD), | |
342 | ADD_SEQ_CST (SYNC_FETCH_AND_ADD_16, TSAN_ATOMIC128_FETCH_ADD), | |
343 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_1, TSAN_ATOMIC8_FETCH_SUB), | |
344 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_2, TSAN_ATOMIC16_FETCH_SUB), | |
345 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_4, TSAN_ATOMIC32_FETCH_SUB), | |
346 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_8, TSAN_ATOMIC64_FETCH_SUB), | |
347 | ADD_SEQ_CST (SYNC_FETCH_AND_SUB_16, TSAN_ATOMIC128_FETCH_SUB), | |
348 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_1, TSAN_ATOMIC8_FETCH_AND), | |
349 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_2, TSAN_ATOMIC16_FETCH_AND), | |
350 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_4, TSAN_ATOMIC32_FETCH_AND), | |
351 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_8, TSAN_ATOMIC64_FETCH_AND), | |
352 | ADD_SEQ_CST (SYNC_FETCH_AND_AND_16, TSAN_ATOMIC128_FETCH_AND), | |
353 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_1, TSAN_ATOMIC8_FETCH_OR), | |
354 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_2, TSAN_ATOMIC16_FETCH_OR), | |
355 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_4, TSAN_ATOMIC32_FETCH_OR), | |
356 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_8, TSAN_ATOMIC64_FETCH_OR), | |
357 | ADD_SEQ_CST (SYNC_FETCH_AND_OR_16, TSAN_ATOMIC128_FETCH_OR), | |
358 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_1, TSAN_ATOMIC8_FETCH_XOR), | |
359 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_2, TSAN_ATOMIC16_FETCH_XOR), | |
360 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_4, TSAN_ATOMIC32_FETCH_XOR), | |
361 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_8, TSAN_ATOMIC64_FETCH_XOR), | |
362 | ADD_SEQ_CST (SYNC_FETCH_AND_XOR_16, TSAN_ATOMIC128_FETCH_XOR), | |
363 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_1, TSAN_ATOMIC8_FETCH_NAND), | |
364 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_2, TSAN_ATOMIC16_FETCH_NAND), | |
365 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_4, TSAN_ATOMIC32_FETCH_NAND), | |
366 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_8, TSAN_ATOMIC64_FETCH_NAND), | |
367 | ADD_SEQ_CST (SYNC_FETCH_AND_NAND_16, TSAN_ATOMIC128_FETCH_NAND), | |
368 | ||
369 | ADD_SEQ_CST (SYNC_SYNCHRONIZE, TSAN_ATOMIC_THREAD_FENCE), | |
370 | ||
371 | FETCH_OPS (SYNC_ADD_AND_FETCH_1, TSAN_ATOMIC8_FETCH_ADD, PLUS_EXPR), | |
372 | FETCH_OPS (SYNC_ADD_AND_FETCH_2, TSAN_ATOMIC16_FETCH_ADD, PLUS_EXPR), | |
373 | FETCH_OPS (SYNC_ADD_AND_FETCH_4, TSAN_ATOMIC32_FETCH_ADD, PLUS_EXPR), | |
374 | FETCH_OPS (SYNC_ADD_AND_FETCH_8, TSAN_ATOMIC64_FETCH_ADD, PLUS_EXPR), | |
375 | FETCH_OPS (SYNC_ADD_AND_FETCH_16, TSAN_ATOMIC128_FETCH_ADD, PLUS_EXPR), | |
376 | FETCH_OPS (SYNC_SUB_AND_FETCH_1, TSAN_ATOMIC8_FETCH_SUB, MINUS_EXPR), | |
377 | FETCH_OPS (SYNC_SUB_AND_FETCH_2, TSAN_ATOMIC16_FETCH_SUB, MINUS_EXPR), | |
378 | FETCH_OPS (SYNC_SUB_AND_FETCH_4, TSAN_ATOMIC32_FETCH_SUB, MINUS_EXPR), | |
379 | FETCH_OPS (SYNC_SUB_AND_FETCH_8, TSAN_ATOMIC64_FETCH_SUB, MINUS_EXPR), | |
380 | FETCH_OPS (SYNC_SUB_AND_FETCH_16, TSAN_ATOMIC128_FETCH_SUB, MINUS_EXPR), | |
381 | FETCH_OPS (SYNC_AND_AND_FETCH_1, TSAN_ATOMIC8_FETCH_AND, BIT_AND_EXPR), | |
382 | FETCH_OPS (SYNC_AND_AND_FETCH_2, TSAN_ATOMIC16_FETCH_AND, BIT_AND_EXPR), | |
383 | FETCH_OPS (SYNC_AND_AND_FETCH_4, TSAN_ATOMIC32_FETCH_AND, BIT_AND_EXPR), | |
384 | FETCH_OPS (SYNC_AND_AND_FETCH_8, TSAN_ATOMIC64_FETCH_AND, BIT_AND_EXPR), | |
385 | FETCH_OPS (SYNC_AND_AND_FETCH_16, TSAN_ATOMIC128_FETCH_AND, BIT_AND_EXPR), | |
386 | FETCH_OPS (SYNC_OR_AND_FETCH_1, TSAN_ATOMIC8_FETCH_OR, BIT_IOR_EXPR), | |
387 | FETCH_OPS (SYNC_OR_AND_FETCH_2, TSAN_ATOMIC16_FETCH_OR, BIT_IOR_EXPR), | |
388 | FETCH_OPS (SYNC_OR_AND_FETCH_4, TSAN_ATOMIC32_FETCH_OR, BIT_IOR_EXPR), | |
389 | FETCH_OPS (SYNC_OR_AND_FETCH_8, TSAN_ATOMIC64_FETCH_OR, BIT_IOR_EXPR), | |
390 | FETCH_OPS (SYNC_OR_AND_FETCH_16, TSAN_ATOMIC128_FETCH_OR, BIT_IOR_EXPR), | |
391 | FETCH_OPS (SYNC_XOR_AND_FETCH_1, TSAN_ATOMIC8_FETCH_XOR, BIT_XOR_EXPR), | |
392 | FETCH_OPS (SYNC_XOR_AND_FETCH_2, TSAN_ATOMIC16_FETCH_XOR, BIT_XOR_EXPR), | |
393 | FETCH_OPS (SYNC_XOR_AND_FETCH_4, TSAN_ATOMIC32_FETCH_XOR, BIT_XOR_EXPR), | |
394 | FETCH_OPS (SYNC_XOR_AND_FETCH_8, TSAN_ATOMIC64_FETCH_XOR, BIT_XOR_EXPR), | |
395 | FETCH_OPS (SYNC_XOR_AND_FETCH_16, TSAN_ATOMIC128_FETCH_XOR, BIT_XOR_EXPR), | |
396 | FETCH_OPS (SYNC_NAND_AND_FETCH_1, TSAN_ATOMIC8_FETCH_NAND, BIT_NOT_EXPR), | |
397 | FETCH_OPS (SYNC_NAND_AND_FETCH_2, TSAN_ATOMIC16_FETCH_NAND, BIT_NOT_EXPR), | |
398 | FETCH_OPS (SYNC_NAND_AND_FETCH_4, TSAN_ATOMIC32_FETCH_NAND, BIT_NOT_EXPR), | |
399 | FETCH_OPS (SYNC_NAND_AND_FETCH_8, TSAN_ATOMIC64_FETCH_NAND, BIT_NOT_EXPR), | |
400 | FETCH_OPS (SYNC_NAND_AND_FETCH_16, TSAN_ATOMIC128_FETCH_NAND, BIT_NOT_EXPR), | |
401 | ||
402 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_1, TSAN_ATOMIC8_COMPARE_EXCHANGE_WEAK), | |
403 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_2, TSAN_ATOMIC16_COMPARE_EXCHANGE_WEAK), | |
404 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_4, TSAN_ATOMIC32_COMPARE_EXCHANGE_WEAK), | |
405 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_8, TSAN_ATOMIC64_COMPARE_EXCHANGE_WEAK), | |
406 | WEAK_CAS (ATOMIC_COMPARE_EXCHANGE_16, TSAN_ATOMIC128_COMPARE_EXCHANGE_WEAK), | |
407 | ||
408 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_1, TSAN_ATOMIC8_COMPARE_EXCHANGE_STRONG), | |
409 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_2, | |
410 | TSAN_ATOMIC16_COMPARE_EXCHANGE_STRONG), | |
411 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_4, | |
412 | TSAN_ATOMIC32_COMPARE_EXCHANGE_STRONG), | |
413 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_8, | |
414 | TSAN_ATOMIC64_COMPARE_EXCHANGE_STRONG), | |
415 | STRONG_CAS (ATOMIC_COMPARE_EXCHANGE_16, | |
416 | TSAN_ATOMIC128_COMPARE_EXCHANGE_STRONG), | |
417 | ||
418 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_1, | |
419 | TSAN_ATOMIC8_COMPARE_EXCHANGE_STRONG), | |
420 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_2, | |
421 | TSAN_ATOMIC16_COMPARE_EXCHANGE_STRONG), | |
422 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_4, | |
423 | TSAN_ATOMIC32_COMPARE_EXCHANGE_STRONG), | |
424 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_8, | |
425 | TSAN_ATOMIC64_COMPARE_EXCHANGE_STRONG), | |
426 | BOOL_CAS (SYNC_BOOL_COMPARE_AND_SWAP_16, | |
427 | TSAN_ATOMIC128_COMPARE_EXCHANGE_STRONG), | |
428 | ||
429 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_1, TSAN_ATOMIC8_COMPARE_EXCHANGE_STRONG), | |
430 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_2, TSAN_ATOMIC16_COMPARE_EXCHANGE_STRONG), | |
431 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_4, TSAN_ATOMIC32_COMPARE_EXCHANGE_STRONG), | |
432 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_8, TSAN_ATOMIC64_COMPARE_EXCHANGE_STRONG), | |
433 | VAL_CAS (SYNC_VAL_COMPARE_AND_SWAP_16, | |
434 | TSAN_ATOMIC128_COMPARE_EXCHANGE_STRONG), | |
435 | ||
436 | LOCK_RELEASE (SYNC_LOCK_RELEASE_1, TSAN_ATOMIC8_STORE), | |
437 | LOCK_RELEASE (SYNC_LOCK_RELEASE_2, TSAN_ATOMIC16_STORE), | |
438 | LOCK_RELEASE (SYNC_LOCK_RELEASE_4, TSAN_ATOMIC32_STORE), | |
439 | LOCK_RELEASE (SYNC_LOCK_RELEASE_8, TSAN_ATOMIC64_STORE), | |
440 | LOCK_RELEASE (SYNC_LOCK_RELEASE_16, TSAN_ATOMIC128_STORE) | |
441 | }; | |
442 | ||
443 | /* Instrument an atomic builtin. */ | |
444 | ||
445 | static void | |
446 | instrument_builtin_call (gimple_stmt_iterator *gsi) | |
447 | { | |
448 | gimple stmt = gsi_stmt (*gsi), g; | |
449 | tree callee = gimple_call_fndecl (stmt), last_arg, args[6], t, lhs; | |
450 | enum built_in_function fcode = DECL_FUNCTION_CODE (callee); | |
451 | unsigned int i, num = gimple_call_num_args (stmt), j; | |
452 | for (j = 0; j < 6 && j < num; j++) | |
453 | args[j] = gimple_call_arg (stmt, j); | |
454 | for (i = 0; i < ARRAY_SIZE (tsan_atomic_table); i++) | |
455 | if (fcode != tsan_atomic_table[i].fcode) | |
456 | continue; | |
457 | else | |
458 | { | |
459 | tree decl = builtin_decl_implicit (tsan_atomic_table[i].tsan_fcode); | |
460 | if (decl == NULL_TREE) | |
461 | return; | |
462 | switch (tsan_atomic_table[i].action) | |
463 | { | |
464 | case check_last: | |
465 | case fetch_op: | |
466 | last_arg = gimple_call_arg (stmt, num - 1); | |
cc269bb6 | 467 | if (!tree_fits_uhwi_p (last_arg) |
7d362f6c | 468 | || tree_to_uhwi (last_arg) > MEMMODEL_SEQ_CST) |
c954bddd JJ |
469 | return; |
470 | gimple_call_set_fndecl (stmt, decl); | |
471 | update_stmt (stmt); | |
472 | if (tsan_atomic_table[i].action == fetch_op) | |
473 | { | |
474 | args[1] = gimple_call_arg (stmt, 1); | |
475 | goto adjust_result; | |
476 | } | |
477 | return; | |
478 | case add_seq_cst: | |
479 | case add_acquire: | |
480 | case fetch_op_seq_cst: | |
481 | gcc_assert (num <= 2); | |
482 | for (j = 0; j < num; j++) | |
483 | args[j] = gimple_call_arg (stmt, j); | |
484 | for (; j < 2; j++) | |
485 | args[j] = NULL_TREE; | |
486 | args[num] = build_int_cst (NULL_TREE, | |
487 | tsan_atomic_table[i].action | |
488 | != add_acquire | |
489 | ? MEMMODEL_SEQ_CST | |
490 | : MEMMODEL_ACQUIRE); | |
491 | update_gimple_call (gsi, decl, num + 1, args[0], args[1], args[2]); | |
492 | stmt = gsi_stmt (*gsi); | |
493 | if (tsan_atomic_table[i].action == fetch_op_seq_cst) | |
494 | { | |
495 | adjust_result: | |
496 | lhs = gimple_call_lhs (stmt); | |
497 | if (lhs == NULL_TREE) | |
498 | return; | |
499 | if (!useless_type_conversion_p (TREE_TYPE (lhs), | |
500 | TREE_TYPE (args[1]))) | |
501 | { | |
b731b390 | 502 | tree var = make_ssa_name (TREE_TYPE (lhs)); |
0d0e4a03 | 503 | g = gimple_build_assign (var, NOP_EXPR, args[1]); |
c954bddd JJ |
504 | gsi_insert_after (gsi, g, GSI_NEW_STMT); |
505 | args[1] = var; | |
506 | } | |
b731b390 | 507 | gimple_call_set_lhs (stmt, make_ssa_name (TREE_TYPE (lhs))); |
c954bddd JJ |
508 | /* BIT_NOT_EXPR stands for NAND. */ |
509 | if (tsan_atomic_table[i].code == BIT_NOT_EXPR) | |
510 | { | |
b731b390 | 511 | tree var = make_ssa_name (TREE_TYPE (lhs)); |
0d0e4a03 JJ |
512 | g = gimple_build_assign (var, BIT_AND_EXPR, |
513 | gimple_call_lhs (stmt), args[1]); | |
c954bddd | 514 | gsi_insert_after (gsi, g, GSI_NEW_STMT); |
0d0e4a03 | 515 | g = gimple_build_assign (lhs, BIT_NOT_EXPR, var); |
c954bddd JJ |
516 | } |
517 | else | |
0d0e4a03 JJ |
518 | g = gimple_build_assign (lhs, tsan_atomic_table[i].code, |
519 | gimple_call_lhs (stmt), args[1]); | |
c954bddd JJ |
520 | update_stmt (stmt); |
521 | gsi_insert_after (gsi, g, GSI_NEW_STMT); | |
522 | } | |
523 | return; | |
524 | case weak_cas: | |
525 | if (!integer_nonzerop (gimple_call_arg (stmt, 3))) | |
526 | continue; | |
527 | /* FALLTHRU */ | |
528 | case strong_cas: | |
529 | gcc_assert (num == 6); | |
530 | for (j = 0; j < 6; j++) | |
531 | args[j] = gimple_call_arg (stmt, j); | |
cc269bb6 | 532 | if (!tree_fits_uhwi_p (args[4]) |
7d362f6c | 533 | || tree_to_uhwi (args[4]) > MEMMODEL_SEQ_CST) |
c954bddd | 534 | return; |
cc269bb6 | 535 | if (!tree_fits_uhwi_p (args[5]) |
7d362f6c | 536 | || tree_to_uhwi (args[5]) > MEMMODEL_SEQ_CST) |
c954bddd JJ |
537 | return; |
538 | update_gimple_call (gsi, decl, 5, args[0], args[1], args[2], | |
539 | args[4], args[5]); | |
540 | return; | |
541 | case bool_cas: | |
542 | case val_cas: | |
543 | gcc_assert (num == 3); | |
544 | for (j = 0; j < 3; j++) | |
545 | args[j] = gimple_call_arg (stmt, j); | |
546 | t = TYPE_ARG_TYPES (TREE_TYPE (decl)); | |
547 | t = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (t))); | |
b731b390 | 548 | t = create_tmp_var (t); |
c954bddd JJ |
549 | mark_addressable (t); |
550 | if (!useless_type_conversion_p (TREE_TYPE (t), | |
551 | TREE_TYPE (args[1]))) | |
552 | { | |
0d0e4a03 JJ |
553 | g = gimple_build_assign (make_ssa_name (TREE_TYPE (t)), |
554 | NOP_EXPR, args[1]); | |
c954bddd JJ |
555 | gsi_insert_before (gsi, g, GSI_SAME_STMT); |
556 | args[1] = gimple_assign_lhs (g); | |
557 | } | |
558 | g = gimple_build_assign (t, args[1]); | |
559 | gsi_insert_before (gsi, g, GSI_SAME_STMT); | |
560 | lhs = gimple_call_lhs (stmt); | |
561 | update_gimple_call (gsi, decl, 5, args[0], | |
562 | build_fold_addr_expr (t), args[2], | |
563 | build_int_cst (NULL_TREE, | |
564 | MEMMODEL_SEQ_CST), | |
565 | build_int_cst (NULL_TREE, | |
566 | MEMMODEL_SEQ_CST)); | |
567 | if (tsan_atomic_table[i].action == val_cas && lhs) | |
568 | { | |
569 | tree cond; | |
570 | stmt = gsi_stmt (*gsi); | |
b731b390 | 571 | g = gimple_build_assign (make_ssa_name (TREE_TYPE (t)), t); |
c954bddd JJ |
572 | gsi_insert_after (gsi, g, GSI_NEW_STMT); |
573 | t = make_ssa_name (TREE_TYPE (TREE_TYPE (decl)), stmt); | |
574 | cond = build2 (NE_EXPR, boolean_type_node, t, | |
575 | build_int_cst (TREE_TYPE (t), 0)); | |
0d0e4a03 JJ |
576 | g = gimple_build_assign (lhs, COND_EXPR, cond, args[1], |
577 | gimple_assign_lhs (g)); | |
c954bddd JJ |
578 | gimple_call_set_lhs (stmt, t); |
579 | update_stmt (stmt); | |
580 | gsi_insert_after (gsi, g, GSI_NEW_STMT); | |
581 | } | |
582 | return; | |
583 | case lock_release: | |
584 | gcc_assert (num == 1); | |
585 | t = TYPE_ARG_TYPES (TREE_TYPE (decl)); | |
586 | t = TREE_VALUE (TREE_CHAIN (t)); | |
587 | update_gimple_call (gsi, decl, 3, gimple_call_arg (stmt, 0), | |
588 | build_int_cst (t, 0), | |
589 | build_int_cst (NULL_TREE, | |
590 | MEMMODEL_RELEASE)); | |
591 | return; | |
592 | default: | |
593 | continue; | |
594 | } | |
595 | } | |
596 | } | |
597 | ||
32b4b7f5 | 598 | /* Instruments the gimple pointed to by GSI. Return |
8ddf5c28 | 599 | true if func entry/exit should be instrumented. */ |
32b4b7f5 DV |
600 | |
601 | static bool | |
c954bddd | 602 | instrument_gimple (gimple_stmt_iterator *gsi) |
32b4b7f5 DV |
603 | { |
604 | gimple stmt; | |
605 | tree rhs, lhs; | |
606 | bool instrumented = false; | |
607 | ||
c954bddd | 608 | stmt = gsi_stmt (*gsi); |
32b4b7f5 DV |
609 | if (is_gimple_call (stmt) |
610 | && (gimple_call_fndecl (stmt) | |
611 | != builtin_decl_implicit (BUILT_IN_TSAN_INIT))) | |
c954bddd | 612 | { |
5c944c6c | 613 | if (gimple_call_builtin_p (stmt, BUILT_IN_NORMAL)) |
c954bddd JJ |
614 | instrument_builtin_call (gsi); |
615 | return true; | |
616 | } | |
8ddf5c28 JJ |
617 | else if (is_gimple_assign (stmt) |
618 | && !gimple_clobber_p (stmt)) | |
32b4b7f5 DV |
619 | { |
620 | if (gimple_store_p (stmt)) | |
621 | { | |
622 | lhs = gimple_assign_lhs (stmt); | |
c954bddd | 623 | instrumented = instrument_expr (*gsi, lhs, true); |
32b4b7f5 DV |
624 | } |
625 | if (gimple_assign_load_p (stmt)) | |
626 | { | |
627 | rhs = gimple_assign_rhs1 (stmt); | |
c954bddd | 628 | instrumented = instrument_expr (*gsi, rhs, false); |
32b4b7f5 DV |
629 | } |
630 | } | |
631 | return instrumented; | |
632 | } | |
633 | ||
634 | /* Instruments all interesting memory accesses in the current function. | |
8ddf5c28 | 635 | Return true if func entry/exit should be instrumented. */ |
32b4b7f5 DV |
636 | |
637 | static bool | |
638 | instrument_memory_accesses (void) | |
639 | { | |
640 | basic_block bb; | |
641 | gimple_stmt_iterator gsi; | |
642 | bool fentry_exit_instrument = false; | |
643 | ||
11cd3bed | 644 | FOR_EACH_BB_FN (bb, cfun) |
32b4b7f5 | 645 | for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) |
c954bddd | 646 | fentry_exit_instrument |= instrument_gimple (&gsi); |
32b4b7f5 DV |
647 | return fentry_exit_instrument; |
648 | } | |
649 | ||
650 | /* Instruments function entry. */ | |
651 | ||
652 | static void | |
653 | instrument_func_entry (void) | |
654 | { | |
32b4b7f5 DV |
655 | tree ret_addr, builtin_decl; |
656 | gimple g; | |
9ab3864f | 657 | gimple_seq seq = NULL; |
32b4b7f5 DV |
658 | |
659 | builtin_decl = builtin_decl_implicit (BUILT_IN_RETURN_ADDRESS); | |
660 | g = gimple_build_call (builtin_decl, 1, integer_zero_node); | |
b731b390 | 661 | ret_addr = make_ssa_name (ptr_type_node); |
32b4b7f5 DV |
662 | gimple_call_set_lhs (g, ret_addr); |
663 | gimple_set_location (g, cfun->function_start_locus); | |
9ab3864f | 664 | gimple_seq_add_stmt_without_update (&seq, g); |
32b4b7f5 | 665 | |
9ab3864f | 666 | builtin_decl = builtin_decl_implicit (BUILT_IN_TSAN_FUNC_ENTRY); |
32b4b7f5 DV |
667 | g = gimple_build_call (builtin_decl, 1, ret_addr); |
668 | gimple_set_location (g, cfun->function_start_locus); | |
9ab3864f JJ |
669 | gimple_seq_add_stmt_without_update (&seq, g); |
670 | ||
671 | edge e = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun)); | |
672 | gsi_insert_seq_on_edge_immediate (e, seq); | |
32b4b7f5 DV |
673 | } |
674 | ||
675 | /* Instruments function exits. */ | |
676 | ||
677 | static void | |
678 | instrument_func_exit (void) | |
679 | { | |
680 | location_t loc; | |
681 | basic_block exit_bb; | |
682 | gimple_stmt_iterator gsi; | |
683 | gimple stmt, g; | |
684 | tree builtin_decl; | |
685 | edge e; | |
686 | edge_iterator ei; | |
687 | ||
688 | /* Find all function exits. */ | |
fefa31b5 | 689 | exit_bb = EXIT_BLOCK_PTR_FOR_FN (cfun); |
32b4b7f5 DV |
690 | FOR_EACH_EDGE (e, ei, exit_bb->preds) |
691 | { | |
692 | gsi = gsi_last_bb (e->src); | |
693 | stmt = gsi_stmt (gsi); | |
71c581e7 MP |
694 | gcc_assert (gimple_code (stmt) == GIMPLE_RETURN |
695 | || gimple_call_builtin_p (stmt, BUILT_IN_RETURN)); | |
32b4b7f5 DV |
696 | loc = gimple_location (stmt); |
697 | builtin_decl = builtin_decl_implicit (BUILT_IN_TSAN_FUNC_EXIT); | |
698 | g = gimple_build_call (builtin_decl, 0); | |
699 | gimple_set_location (g, loc); | |
700 | gsi_insert_before (&gsi, g, GSI_SAME_STMT); | |
701 | } | |
702 | } | |
703 | ||
704 | /* ThreadSanitizer instrumentation pass. */ | |
705 | ||
706 | static unsigned | |
707 | tsan_pass (void) | |
708 | { | |
0e668eaf | 709 | initialize_sanitizer_builtins (); |
32b4b7f5 DV |
710 | if (instrument_memory_accesses ()) |
711 | { | |
712 | instrument_func_entry (); | |
713 | instrument_func_exit (); | |
714 | } | |
715 | return 0; | |
716 | } | |
717 | ||
32b4b7f5 DV |
718 | /* Inserts __tsan_init () into the list of CTORs. */ |
719 | ||
720 | void | |
721 | tsan_finish_file (void) | |
722 | { | |
0e668eaf | 723 | tree ctor_statements = NULL_TREE; |
32b4b7f5 | 724 | |
0e668eaf JJ |
725 | initialize_sanitizer_builtins (); |
726 | tree init_decl = builtin_decl_implicit (BUILT_IN_TSAN_INIT); | |
32b4b7f5 DV |
727 | append_to_statement_list (build_call_expr (init_decl, 0), |
728 | &ctor_statements); | |
729 | cgraph_build_static_cdtor ('I', ctor_statements, | |
730 | MAX_RESERVED_INIT_PRIORITY - 1); | |
731 | } | |
732 | ||
733 | /* The pass descriptor. */ | |
734 | ||
27a4cd48 DM |
735 | namespace { |
736 | ||
737 | const pass_data pass_data_tsan = | |
32b4b7f5 | 738 | { |
27a4cd48 DM |
739 | GIMPLE_PASS, /* type */ |
740 | "tsan", /* name */ | |
741 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
742 | TV_NONE, /* tv_id */ |
743 | ( PROP_ssa | PROP_cfg ), /* properties_required */ | |
744 | 0, /* properties_provided */ | |
745 | 0, /* properties_destroyed */ | |
746 | 0, /* todo_flags_start */ | |
3bea341f | 747 | TODO_update_ssa, /* todo_flags_finish */ |
32b4b7f5 DV |
748 | }; |
749 | ||
27a4cd48 DM |
750 | class pass_tsan : public gimple_opt_pass |
751 | { | |
752 | public: | |
c3284718 RS |
753 | pass_tsan (gcc::context *ctxt) |
754 | : gimple_opt_pass (pass_data_tsan, ctxt) | |
27a4cd48 DM |
755 | {} |
756 | ||
757 | /* opt_pass methods: */ | |
65d3284b | 758 | opt_pass * clone () { return new pass_tsan (m_ctxt); } |
1a3d085c TS |
759 | virtual bool gate (function *) |
760 | { | |
761 | return (flag_sanitize & SANITIZE_THREAD) != 0; | |
762 | } | |
763 | ||
be55bfe6 | 764 | virtual unsigned int execute (function *) { return tsan_pass (); } |
27a4cd48 DM |
765 | |
766 | }; // class pass_tsan | |
767 | ||
768 | } // anon namespace | |
769 | ||
770 | gimple_opt_pass * | |
771 | make_pass_tsan (gcc::context *ctxt) | |
772 | { | |
773 | return new pass_tsan (ctxt); | |
774 | } | |
775 | ||
27a4cd48 DM |
776 | namespace { |
777 | ||
778 | const pass_data pass_data_tsan_O0 = | |
32b4b7f5 | 779 | { |
27a4cd48 DM |
780 | GIMPLE_PASS, /* type */ |
781 | "tsan0", /* name */ | |
782 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
783 | TV_NONE, /* tv_id */ |
784 | ( PROP_ssa | PROP_cfg ), /* properties_required */ | |
785 | 0, /* properties_provided */ | |
786 | 0, /* properties_destroyed */ | |
787 | 0, /* todo_flags_start */ | |
3bea341f | 788 | TODO_update_ssa, /* todo_flags_finish */ |
32b4b7f5 | 789 | }; |
27a4cd48 DM |
790 | |
791 | class pass_tsan_O0 : public gimple_opt_pass | |
792 | { | |
793 | public: | |
c3284718 RS |
794 | pass_tsan_O0 (gcc::context *ctxt) |
795 | : gimple_opt_pass (pass_data_tsan_O0, ctxt) | |
27a4cd48 DM |
796 | {} |
797 | ||
798 | /* opt_pass methods: */ | |
1a3d085c TS |
799 | virtual bool gate (function *) |
800 | { | |
801 | return (flag_sanitize & SANITIZE_THREAD) != 0 && !optimize; | |
802 | } | |
803 | ||
be55bfe6 | 804 | virtual unsigned int execute (function *) { return tsan_pass (); } |
27a4cd48 DM |
805 | |
806 | }; // class pass_tsan_O0 | |
807 | ||
808 | } // anon namespace | |
809 | ||
810 | gimple_opt_pass * | |
811 | make_pass_tsan_O0 (gcc::context *ctxt) | |
812 | { | |
813 | return new pass_tsan_O0 (ctxt); | |
814 | } |