projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| d99a8ff6 SP |
1 | /* |
| 2 | * (C) Copyright 2007-2008 | |
| c9e798d3 | 3 | * Stelian Pop <stelian@popies.net> |
| d99a8ff6 SP |
4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * | |
| 6 | * Configuation settings for the AT91SAM9261EK board. | |
| 7 | * | |
| 1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
| d99a8ff6 SP |
9 | */ |
| 10 | ||
| 11 | #ifndef __CONFIG_H | |
| 12 | #define __CONFIG_H | |
| 13 | ||
| 14 | /* ARM asynchronous clock */ | |
| f7aea46d | 15 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 7c966a8b | 16 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ |
| d99a8ff6 | 17 | |
| f7aea46d XH |
18 | #ifdef CONFIG_AT91SAM9G10 |
| 19 | #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/ | |
| 5ccc2d99 | 20 | #else |
| f7aea46d | 21 | #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/ |
| 5ccc2d99 | 22 | #endif |
| f7aea46d XH |
23 | |
| 24 | #include <asm/hardware.h> | |
| 25 | ||
| f7aea46d XH |
26 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 27 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 28 | #define CONFIG_INITRD_TAG | |
| d99a8ff6 SP |
29 | |
| 30 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
| d99a8ff6 | 31 | |
| f7aea46d XH |
32 | #define CONFIG_DISPLAY_CPUINFO |
| 33 | ||
| dc3e30ba BS |
34 | #define CONFIG_OF_LIBFDT |
| 35 | ||
| 59158ba3 | 36 | |
| f7aea46d XH |
37 | #define CONFIG_ATMEL_LEGACY |
| 38 | #define CONFIG_SYS_TEXT_BASE 0x21f00000 | |
| 39 | ||
| d99a8ff6 SP |
40 | /* |
| 41 | * Hardware drivers | |
| 42 | */ | |
| f7aea46d XH |
43 | |
| 44 | /* gpio */ | |
| 45 | #define CONFIG_AT91_GPIO | |
| 46 | #define CONFIG_AT91_GPIO_PULLUP 1 | |
| 47 | ||
| 48 | /* serial console */ | |
| 49 | #define CONFIG_ATMEL_USART | |
| 50 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
| 51 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
| 52 | #define CONFIG_BAUDRATE 115200 | |
| d99a8ff6 | 53 | |
| 820f2a95 | 54 | /* LCD */ |
| f7aea46d | 55 | #define CONFIG_LCD |
| 820f2a95 | 56 | #define LCD_BPP LCD_COLOR8 |
| f7aea46d | 57 | #define CONFIG_LCD_LOGO |
| 820f2a95 | 58 | #undef LCD_TEST_PATTERN |
| f7aea46d XH |
59 | #define CONFIG_LCD_INFO |
| 60 | #define CONFIG_LCD_INFO_BELOW_LOGO | |
| 61 | #define CONFIG_SYS_WHITE_ON_BLACK | |
| 62 | #define CONFIG_ATMEL_LCD | |
| 5ccc2d99 | 63 | #ifdef CONFIG_AT91SAM9261EK |
| f7aea46d | 64 | #define CONFIG_ATMEL_LCD_BGR555 |
| 5ccc2d99 | 65 | #endif |
| f7aea46d XH |
66 | |
| 67 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
| 820f2a95 | 68 | |
| a484b00b JCPV |
69 | /* LED */ |
| 70 | #define CONFIG_AT91_LED | |
| 71 | #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ | |
| 72 | #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ | |
| 73 | #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ | |
| 74 | ||
| d99a8ff6 SP |
75 | #define CONFIG_BOOTDELAY 3 |
| 76 | ||
| d99a8ff6 SP |
77 | /* |
| 78 | * BOOTP options | |
| 79 | */ | |
| f7aea46d XH |
80 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 81 | #define CONFIG_BOOTP_BOOTPATH | |
| 82 | #define CONFIG_BOOTP_GATEWAY | |
| 83 | #define CONFIG_BOOTP_HOSTNAME | |
| d99a8ff6 SP |
84 | |
| 85 | /* | |
| 86 | * Command line configuration. | |
| 87 | */ | |
| f7aea46d XH |
88 | #define CONFIG_CMD_PING |
| 89 | #define CONFIG_CMD_DHCP | |
| 90 | #define CONFIG_CMD_NAND | |
| 91 | #define CONFIG_CMD_USB | |
| d99a8ff6 SP |
92 | |
| 93 | /* SDRAM */ | |
| 94 | #define CONFIG_NR_DRAM_BANKS 1 | |
| f7aea46d XH |
95 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 96 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
| 97 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
| 98 | (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
| d99a8ff6 SP |
99 | |
| 100 | /* DataFlash */ | |
| 4758ebdd | 101 | #define CONFIG_ATMEL_DATAFLASH_SPI |
| f7aea46d | 102 | #define CONFIG_HAS_DATAFLASH |
| 6d0f6bcf JCPV |
103 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
| 104 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
| 105 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ | |
| f7aea46d XH |
106 | #define AT91_SPI_CLK 15000000 |
| 107 | #define DATAFLASH_TCSS (0x1a << 16) | |
| 108 | #define DATAFLASH_TCHS (0x1 << 24) | |
| d99a8ff6 SP |
109 | |
| 110 | /* NAND flash */ | |
| 74c076d6 JCPV |
111 | #ifdef CONFIG_CMD_NAND |
| 112 | #define CONFIG_NAND_ATMEL | |
| 6d0f6bcf JCPV |
113 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 114 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
| f7aea46d | 115 | #define CONFIG_SYS_NAND_DBW_8 |
| 74c076d6 JCPV |
116 | /* our ALE is AD22 */ |
| 117 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) | |
| 118 | /* our CLE is AD21 */ | |
| 119 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) | |
| 120 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
| 121 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 | |
| 2eb99ca8 | 122 | |
| 74c076d6 | 123 | #endif |
| d99a8ff6 SP |
124 | |
| 125 | /* NOR flash - no real flash on this board */ | |
| f7aea46d | 126 | #define CONFIG_SYS_NO_FLASH |
| d99a8ff6 SP |
127 | |
| 128 | /* Ethernet */ | |
| f7aea46d | 129 | #define CONFIG_DRIVER_DM9000 |
| d99a8ff6 SP |
130 | #define CONFIG_DM9000_BASE 0x30000000 |
| 131 | #define DM9000_IO CONFIG_DM9000_BASE | |
| 132 | #define DM9000_DATA (CONFIG_DM9000_BASE + 4) | |
| f7aea46d XH |
133 | #define CONFIG_DM9000_USE_16BIT |
| 134 | #define CONFIG_DM9000_NO_SROM | |
| d99a8ff6 | 135 | #define CONFIG_NET_RETRY_COUNT 20 |
| f7aea46d | 136 | #define CONFIG_RESET_PHY_R |
| d99a8ff6 SP |
137 | |
| 138 | /* USB */ | |
| 2b7178af | 139 | #define CONFIG_USB_ATMEL |
| dcd2f1a0 | 140 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
| f7aea46d XH |
141 | #define CONFIG_USB_OHCI_NEW |
| 142 | #define CONFIG_DOS_PARTITION | |
| 143 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
| 6d0f6bcf | 144 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ |
| 5ccc2d99 SG |
145 | #ifdef CONFIG_AT91SAM9G10EK |
| 146 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" | |
| 147 | #else | |
| 6d0f6bcf | 148 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" |
| 5ccc2d99 | 149 | #endif |
| 6d0f6bcf | 150 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
| f7aea46d XH |
151 | #define CONFIG_USB_STORAGE |
| 152 | #define CONFIG_CMD_FAT | |
| d99a8ff6 | 153 | |
| 6d0f6bcf | 154 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| d99a8ff6 | 155 | |
| f7aea46d | 156 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 6d0f6bcf | 157 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
| d99a8ff6 | 158 | |
| 6d0f6bcf | 159 | #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 |
| d99a8ff6 SP |
160 | |
| 161 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
| f7aea46d | 162 | #define CONFIG_ENV_IS_IN_DATAFLASH |
| 6d0f6bcf | 163 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
| 89a7a87f | 164 | #define CONFIG_ENV_OFFSET 0x4200 |
| 6d0f6bcf | 165 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
| 0e8d1586 | 166 | #define CONFIG_ENV_SIZE 0x4200 |
| e139cb31 | 167 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" |
| d99a8ff6 SP |
168 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 169 | "root=/dev/mtdblock0 " \ | |
| 918319c7 | 170 | "mtdparts=atmel_nand:-(root) " \ |
| d99a8ff6 SP |
171 | "rw rootfstype=jffs2" |
| 172 | ||
| 89a7a87f NF |
173 | #elif CONFIG_SYS_USE_DATAFLASH_CS3 |
| 174 | ||
| 175 | /* bootstrap + u-boot + env + linux in dataflash on CS3 */ | |
| f7aea46d | 176 | #define CONFIG_ENV_IS_IN_DATAFLASH |
| 89a7a87f NF |
177 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) |
| 178 | #define CONFIG_ENV_OFFSET 0x4200 | |
| 179 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) | |
| 180 | #define CONFIG_ENV_SIZE 0x4200 | |
| e139cb31 | 181 | #define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm" |
| 89a7a87f NF |
182 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 183 | "root=/dev/mtdblock0 " \ | |
| 918319c7 | 184 | "mtdparts=atmel_nand:-(root) " \ |
| 89a7a87f NF |
185 | "rw rootfstype=jffs2" |
| 186 | ||
| 6d0f6bcf | 187 | #else /* CONFIG_SYS_USE_NANDFLASH */ |
| d99a8ff6 SP |
188 | |
| 189 | /* bootstrap + u-boot + env + linux in nandflash */ | |
| f7aea46d | 190 | #define CONFIG_ENV_IS_IN_NAND |
| 0c58cfa9 BS |
191 | #define CONFIG_ENV_OFFSET 0xc0000 |
| 192 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 | |
| 0e8d1586 | 193 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
| 0c58cfa9 BS |
194 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" |
| 195 | #define CONFIG_BOOTARGS \ | |
| 196 | "console=ttyS0,115200 earlyprintk " \ | |
| 197 | "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ | |
| 198 | "256k(env),256k(env_redundant),256k(spare)," \ | |
| 199 | "512k(dtb),6M(kernel)ro,-(rootfs) " \ | |
| 200 | "root=/dev/mtdblock7 rw rootfstype=jffs2" | |
| d99a8ff6 SP |
201 | #endif |
| 202 | ||
| 6d0f6bcf JCPV |
203 | #define CONFIG_SYS_CBSIZE 256 |
| 204 | #define CONFIG_SYS_MAXARGS 16 | |
| f7aea46d XH |
205 | #define CONFIG_SYS_LONGHELP |
| 206 | #define CONFIG_CMDLINE_EDITING | |
| e139cb31 | 207 | #define CONFIG_AUTO_COMPLETE |
| d99a8ff6 | 208 | |
| d99a8ff6 SP |
209 | /* |
| 210 | * Size of malloc() pool | |
| 211 | */ | |
| 6d0f6bcf | 212 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
| d99a8ff6 | 213 | |
| d99a8ff6 | 214 | #endif |