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d99a8ff6 SP |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
3 | * Stelian Pop <stelian.pop@leadtechdesign.com> | |
4 | * Lead Tech Design <www.leadtechdesign.com> | |
5 | * | |
6 | * Configuation settings for the AT91SAM9261EK board. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #ifndef __CONFIG_H | |
28 | #define __CONFIG_H | |
29 | ||
30 | /* ARM asynchronous clock */ | |
ad229a44 | 31 | #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ |
6ebff365 | 32 | #define CONFIG_SYS_HZ 1000 |
d99a8ff6 | 33 | |
d99a8ff6 | 34 | #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ |
5ccc2d99 SG |
35 | #ifdef CONFIG_AT91SAM9G10EK |
36 | #define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/ | |
37 | #else | |
d99a8ff6 | 38 | #define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ |
5ccc2d99 | 39 | #endif |
dc39ae95 | 40 | #define CONFIG_ARCH_CPU_INIT |
d99a8ff6 SP |
41 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
42 | ||
43 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
44 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
45 | #define CONFIG_INITRD_TAG 1 | |
46 | ||
47 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
48 | #define CONFIG_SKIP_RELOCATE_UBOOT | |
49 | ||
50 | /* | |
51 | * Hardware drivers | |
52 | */ | |
53 | #define CONFIG_ATMEL_USART 1 | |
54 | #undef CONFIG_USART0 | |
55 | #undef CONFIG_USART1 | |
56 | #undef CONFIG_USART2 | |
57 | #define CONFIG_USART3 1 /* USART 3 is DBGU */ | |
58 | ||
820f2a95 SP |
59 | /* LCD */ |
60 | #define CONFIG_LCD 1 | |
61 | #define LCD_BPP LCD_COLOR8 | |
62 | #define CONFIG_LCD_LOGO 1 | |
63 | #undef LCD_TEST_PATTERN | |
64 | #define CONFIG_LCD_INFO 1 | |
65 | #define CONFIG_LCD_INFO_BELOW_LOGO 1 | |
6d0f6bcf | 66 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
820f2a95 | 67 | #define CONFIG_ATMEL_LCD 1 |
5ccc2d99 | 68 | #ifdef CONFIG_AT91SAM9261EK |
820f2a95 | 69 | #define CONFIG_ATMEL_LCD_BGR555 1 |
5ccc2d99 SG |
70 | #else |
71 | #define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */ | |
72 | #endif | |
6d0f6bcf | 73 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
820f2a95 | 74 | |
a484b00b JCPV |
75 | /* LED */ |
76 | #define CONFIG_AT91_LED | |
77 | #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ | |
78 | #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ | |
79 | #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ | |
80 | ||
d99a8ff6 SP |
81 | #define CONFIG_BOOTDELAY 3 |
82 | ||
d99a8ff6 SP |
83 | /* |
84 | * BOOTP options | |
85 | */ | |
86 | #define CONFIG_BOOTP_BOOTFILESIZE 1 | |
87 | #define CONFIG_BOOTP_BOOTPATH 1 | |
88 | #define CONFIG_BOOTP_GATEWAY 1 | |
89 | #define CONFIG_BOOTP_HOSTNAME 1 | |
90 | ||
91 | /* | |
92 | * Command line configuration. | |
93 | */ | |
94 | #include <config_cmd_default.h> | |
95 | #undef CONFIG_CMD_BDI | |
d99a8ff6 | 96 | #undef CONFIG_CMD_FPGA |
74de7aef | 97 | #undef CONFIG_CMD_IMI |
d99a8ff6 | 98 | #undef CONFIG_CMD_IMLS |
74de7aef WD |
99 | #undef CONFIG_CMD_LOADS |
100 | #undef CONFIG_CMD_SOURCE | |
d99a8ff6 SP |
101 | |
102 | #define CONFIG_CMD_PING 1 | |
103 | #define CONFIG_CMD_DHCP 1 | |
104 | #define CONFIG_CMD_NAND 1 | |
105 | #define CONFIG_CMD_USB 1 | |
106 | ||
107 | /* SDRAM */ | |
108 | #define CONFIG_NR_DRAM_BANKS 1 | |
109 | #define PHYS_SDRAM 0x20000000 | |
110 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ | |
111 | ||
112 | /* DataFlash */ | |
4758ebdd | 113 | #define CONFIG_ATMEL_DATAFLASH_SPI |
d99a8ff6 | 114 | #define CONFIG_HAS_DATAFLASH 1 |
6d0f6bcf JCPV |
115 | #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) |
116 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 | |
117 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
118 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ | |
d99a8ff6 SP |
119 | #define AT91_SPI_CLK 15000000 |
120 | #define DATAFLASH_TCSS (0x1a << 16) | |
121 | #define DATAFLASH_TCHS (0x1 << 24) | |
122 | ||
123 | /* NAND flash */ | |
74c076d6 JCPV |
124 | #ifdef CONFIG_CMD_NAND |
125 | #define CONFIG_NAND_ATMEL | |
6d0f6bcf JCPV |
126 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
127 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
128 | #define CONFIG_SYS_NAND_DBW_8 1 | |
74c076d6 JCPV |
129 | /* our ALE is AD22 */ |
130 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) | |
131 | /* our CLE is AD21 */ | |
132 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) | |
133 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
134 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 | |
2eb99ca8 | 135 | |
74c076d6 | 136 | #endif |
d99a8ff6 SP |
137 | |
138 | /* NOR flash - no real flash on this board */ | |
6d0f6bcf | 139 | #define CONFIG_SYS_NO_FLASH 1 |
d99a8ff6 SP |
140 | |
141 | /* Ethernet */ | |
60f61e6d | 142 | #define CONFIG_NET_MULTI 1 |
d99a8ff6 SP |
143 | #define CONFIG_DRIVER_DM9000 1 |
144 | #define CONFIG_DM9000_BASE 0x30000000 | |
145 | #define DM9000_IO CONFIG_DM9000_BASE | |
146 | #define DM9000_DATA (CONFIG_DM9000_BASE + 4) | |
147 | #define CONFIG_DM9000_USE_16BIT 1 | |
e5a3bc24 | 148 | #define CONFIG_DM9000_NO_SROM 1 |
d99a8ff6 SP |
149 | #define CONFIG_NET_RETRY_COUNT 20 |
150 | #define CONFIG_RESET_PHY_R 1 | |
151 | ||
152 | /* USB */ | |
2b7178af | 153 | #define CONFIG_USB_ATMEL |
d99a8ff6 | 154 | #define CONFIG_USB_OHCI_NEW 1 |
d99a8ff6 | 155 | #define CONFIG_DOS_PARTITION 1 |
6d0f6bcf JCPV |
156 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
157 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ | |
5ccc2d99 SG |
158 | #ifdef CONFIG_AT91SAM9G10EK |
159 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" | |
160 | #else | |
6d0f6bcf | 161 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" |
5ccc2d99 | 162 | #endif |
6d0f6bcf | 163 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
d99a8ff6 | 164 | #define CONFIG_USB_STORAGE 1 |
3e0cda07 | 165 | #define CONFIG_CMD_FAT 1 |
d99a8ff6 | 166 | |
6d0f6bcf | 167 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
d99a8ff6 | 168 | |
6d0f6bcf JCPV |
169 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
170 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
d99a8ff6 | 171 | |
6d0f6bcf | 172 | #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 |
d99a8ff6 SP |
173 | |
174 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
057c849c | 175 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
6d0f6bcf | 176 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
89a7a87f | 177 | #define CONFIG_ENV_OFFSET 0x4200 |
6d0f6bcf | 178 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
0e8d1586 | 179 | #define CONFIG_ENV_SIZE 0x4200 |
d99a8ff6 SP |
180 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" |
181 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
182 | "root=/dev/mtdblock0 " \ | |
918319c7 | 183 | "mtdparts=atmel_nand:-(root) " \ |
d99a8ff6 SP |
184 | "rw rootfstype=jffs2" |
185 | ||
89a7a87f NF |
186 | #elif CONFIG_SYS_USE_DATAFLASH_CS3 |
187 | ||
188 | /* bootstrap + u-boot + env + linux in dataflash on CS3 */ | |
189 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 | |
190 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) | |
191 | #define CONFIG_ENV_OFFSET 0x4200 | |
192 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) | |
193 | #define CONFIG_ENV_SIZE 0x4200 | |
194 | #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" | |
195 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
196 | "root=/dev/mtdblock0 " \ | |
918319c7 | 197 | "mtdparts=atmel_nand:-(root) " \ |
89a7a87f NF |
198 | "rw rootfstype=jffs2" |
199 | ||
6d0f6bcf | 200 | #else /* CONFIG_SYS_USE_NANDFLASH */ |
d99a8ff6 SP |
201 | |
202 | /* bootstrap + u-boot + env + linux in nandflash */ | |
51bfee19 | 203 | #define CONFIG_ENV_IS_IN_NAND 1 |
0e8d1586 JCPV |
204 | #define CONFIG_ENV_OFFSET 0x60000 |
205 | #define CONFIG_ENV_OFFSET_REDUND 0x80000 | |
206 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ | |
d99a8ff6 SP |
207 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" |
208 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
209 | "root=/dev/mtdblock5 " \ | |
918319c7 | 210 | "mtdparts=atmel_nand:128k(bootstrap)ro," \ |
d99a8ff6 SP |
211 | "256k(uboot)ro,128k(env1)ro," \ |
212 | "128k(env2)ro,2M(linux),-(root) " \ | |
213 | "rw rootfstype=jffs2" | |
214 | ||
215 | #endif | |
216 | ||
217 | #define CONFIG_BAUDRATE 115200 | |
6d0f6bcf | 218 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
d99a8ff6 | 219 | |
6d0f6bcf JCPV |
220 | #define CONFIG_SYS_PROMPT "U-Boot> " |
221 | #define CONFIG_SYS_CBSIZE 256 | |
222 | #define CONFIG_SYS_MAXARGS 16 | |
223 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
224 | #define CONFIG_SYS_LONGHELP 1 | |
d99a8ff6 SP |
225 | #define CONFIG_CMDLINE_EDITING 1 |
226 | ||
d99a8ff6 SP |
227 | /* |
228 | * Size of malloc() pool | |
229 | */ | |
6d0f6bcf JCPV |
230 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
231 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ | |
d99a8ff6 SP |
232 | |
233 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ | |
234 | ||
235 | #ifdef CONFIG_USE_IRQ | |
236 | #error CONFIG_USE_IRQ not supported | |
237 | #endif | |
238 | ||
239 | #endif |