[people/ms/u-boot.git] / include / configs / at91sam9263ek.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian.pop@leadtechdesign.com>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9263EK board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* ARM asynchronous clock */
#define AT91_MAIN_CLOCK		16367660	/* 16.367 MHz crystal */
#define CONFIG_SYS_HZ		1000

#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
#define CONFIG_AT91SAM9263	1	/* It's an Atmel AT91SAM9263 SoC*/
#define CONFIG_AT91SAM9263EK	1	/* on an AT91SAM9263EK Board	*/
#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	1

#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT

/*
 * Hardware drivers
 */
#define CONFIG_ATMEL_USART	1
#undef CONFIG_USART0
#undef CONFIG_USART1
#undef CONFIG_USART2
#define CONFIG_USART3		1	/* USART 3 is DBGU */

/* LCD */
#define CONFIG_LCD			1
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO			1
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO			1
#define CONFIG_LCD_INFO_BELOW_LOGO	1
#define CONFIG_SYS_WHITE_ON_BLACK		1
#define CONFIG_ATMEL_LCD		1
#define CONFIG_ATMEL_LCD_BGR555		1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1

/* LED */
#define CONFIG_AT91_LED
#define	CONFIG_RED_LED		AT91_PIN_PB7	/* this is the power led */
#define	CONFIG_GREEN_LED	AT91_PIN_PB8	/* this is the user1 led */
#define	CONFIG_YELLOW_LED	AT91_PIN_PC29	/* this is the user2 led */

#define CONFIG_BOOTDELAY	3

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE	1
#define CONFIG_BOOTP_BOOTPATH		1
#define CONFIG_BOOTP_GATEWAY		1
#define CONFIG_BOOTP_HOSTNAME		1

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_SOURCE

#define CONFIG_CMD_PING		1
#define CONFIG_CMD_DHCP		1
#define CONFIG_CMD_NAND		1
#define CONFIG_CMD_USB		1

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			0x20000000
#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */

/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH		1
#define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
#define AT91_SPI_CLK			15000000
#define DATAFLASH_TCSS			(0x1a << 16)
#define DATAFLASH_TCHS			(0x1 << 24)

/* NOR flash, if populated */
#if 1
#define CONFIG_SYS_NO_FLASH			1
#else
#define CONFIG_SYS_FLASH_CFI			1
#define CONFIG_FLASH_CFI_DRIVER		1
#define PHYS_FLASH_1			0x10000000
#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
#define CONFIG_SYS_MAX_FLASH_SECT		256
#define CONFIG_SYS_MAX_FLASH_BANKS		1
#endif

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			0x40000000
#define CONFIG_SYS_NAND_DBW_8			1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PD15
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PA22
#endif

/* Ethernet */
#define CONFIG_MACB			1
#define CONFIG_RMII			1
#define CONFIG_NET_MULTI		1
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R		1

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW		1
#define CONFIG_DOS_PARTITION		1
#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00a00000	/* AT91SAM9263_UHP_BASE */
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define CONFIG_USB_STORAGE		1
#define CONFIG_CMD_FAT			1

#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END			0x23e00000

#ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_DATAFLASH	1
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET		0x4200
#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock0 " \
				"mtdparts=at91_nand:-(root) "\
				"rw rootfstype=jffs2"

#else /* CONFIG_SYS_USE_NANDFLASH */

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND	1
#define CONFIG_ENV_OFFSET		0x60000
#define CONFIG_ENV_OFFSET_REDUND	0x80000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock5 " \
				"mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
				"rw rootfstype=jffs2"

#endif

#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }

#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_CMDLINE_EDITING	1
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "

#define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
#define CONFIG_SYS_GBL_DATA_SIZE	128	/* 128 bytes for initial data */

#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */

#ifdef CONFIG_USE_IRQ
#error CONFIG_USE_IRQ not supported
#endif

#endif
Commit	Line	Data
8e429b3e SP	1	/*
	2	* (C) Copyright 2007-2008
	3	* Stelian Pop <stelian.pop@leadtechdesign.com>
	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Configuation settings for the AT91SAM9263EK board.
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
	30	/* ARM asynchronous clock */
ad229a44	31	#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
6ebff365	32	#define CONFIG_SYS_HZ 1000
8e429b3e	33
8e429b3e SP	34	#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
	35	#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/
	36	#define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */
dc39ae95	37	#define CONFIG_ARCH_CPU_INIT
8e429b3e SP	38	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	39
	40	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	41	#define CONFIG_SETUP_MEMORY_TAGS 1
	42	#define CONFIG_INITRD_TAG 1
	43
	44	#define CONFIG_SKIP_LOWLEVEL_INIT
	45	#define CONFIG_SKIP_RELOCATE_UBOOT
	46
	47	/*
	48	* Hardware drivers
	49	*/
	50	#define CONFIG_ATMEL_USART 1
	51	#undef CONFIG_USART0
	52	#undef CONFIG_USART1
	53	#undef CONFIG_USART2
	54	#define CONFIG_USART3 1 /* USART 3 is DBGU */
	55
56a2479c SP	56	/* LCD */
	57	#define CONFIG_LCD 1
	58	#define LCD_BPP LCD_COLOR8
	59	#define CONFIG_LCD_LOGO 1
	60	#undef LCD_TEST_PATTERN
	61	#define CONFIG_LCD_INFO 1
	62	#define CONFIG_LCD_INFO_BELOW_LOGO 1
6d0f6bcf	63	#define CONFIG_SYS_WHITE_ON_BLACK 1
56a2479c SP	64	#define CONFIG_ATMEL_LCD 1
56a2479c SP	65	#define CONFIG_ATMEL_LCD_BGR555 1
6d0f6bcf	66	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
56a2479c	67
a484b00b JCPV	68	/* LED */
	69	#define CONFIG_AT91_LED
	70	#define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */
	71	#define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */
	72	#define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */
	73
8e429b3e SP	74	#define CONFIG_BOOTDELAY 3
8e429b3e SP	75
8e429b3e SP	76	/*
	77	* BOOTP options
	78	*/
	79	#define CONFIG_BOOTP_BOOTFILESIZE 1
	80	#define CONFIG_BOOTP_BOOTPATH 1
	81	#define CONFIG_BOOTP_GATEWAY 1
	82	#define CONFIG_BOOTP_HOSTNAME 1
	83
	84	/*
	85	* Command line configuration.
	86	*/
	87	#include <config_cmd_default.h>
	88	#undef CONFIG_CMD_BDI
8e429b3e	89	#undef CONFIG_CMD_FPGA
74de7aef	90	#undef CONFIG_CMD_IMI
8e429b3e	91	#undef CONFIG_CMD_IMLS
74de7aef WD	92	#undef CONFIG_CMD_LOADS
74de7aef WD	93	#undef CONFIG_CMD_SOURCE
8e429b3e SP	94
	95	#define CONFIG_CMD_PING 1
	96	#define CONFIG_CMD_DHCP 1
	97	#define CONFIG_CMD_NAND 1
	98	#define CONFIG_CMD_USB 1
	99
	100	/* SDRAM */
	101	#define CONFIG_NR_DRAM_BANKS 1
	102	#define PHYS_SDRAM 0x20000000
	103	#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
	104
	105	/* DataFlash */
4758ebdd	106	#define CONFIG_ATMEL_DATAFLASH_SPI
8e429b3e	107	#define CONFIG_HAS_DATAFLASH 1
6d0f6bcf JCPV	108	#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
	109	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
	110	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
8e429b3e SP	111	#define AT91_SPI_CLK 15000000
	112	#define DATAFLASH_TCSS (0x1a << 16)
	113	#define DATAFLASH_TCHS (0x1 << 24)
	114
	115	/* NOR flash, if populated */
	116	#if 1
6d0f6bcf	117	#define CONFIG_SYS_NO_FLASH 1
8e429b3e	118	#else
6d0f6bcf	119	#define CONFIG_SYS_FLASH_CFI 1
00b1883a	120	#define CONFIG_FLASH_CFI_DRIVER 1
8e429b3e	121	#define PHYS_FLASH_1 0x10000000
6d0f6bcf JCPV	122	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
	123	#define CONFIG_SYS_MAX_FLASH_SECT 256
	124	#define CONFIG_SYS_MAX_FLASH_BANKS 1
8e429b3e SP	125	#endif
	126
	127	/* NAND flash */
74c076d6 JCPV	128	#ifdef CONFIG_CMD_NAND
74c076d6 JCPV	129	#define CONFIG_NAND_ATMEL
6d0f6bcf JCPV	130	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	131	#define CONFIG_SYS_NAND_BASE 0x40000000
	132	#define CONFIG_SYS_NAND_DBW_8 1
74c076d6 JCPV	133	/* our ALE is AD21 */
	134	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	135	/* our CLE is AD22 */
	136	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	137	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
	138	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
	139	#endif
8e429b3e SP	140
	141	/* Ethernet */
	142	#define CONFIG_MACB 1
	143	#define CONFIG_RMII 1
	144	#define CONFIG_NET_MULTI 1
	145	#define CONFIG_NET_RETRY_COUNT 20
	146	#define CONFIG_RESET_PHY_R 1
	147
	148	/* USB */
2b7178af	149	#define CONFIG_USB_ATMEL
8e429b3e	150	#define CONFIG_USB_OHCI_NEW 1
8e429b3e	151	#define CONFIG_DOS_PARTITION 1
6d0f6bcf JCPV	152	#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
	153	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */
	154	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
	155	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
8e429b3e	156	#define CONFIG_USB_STORAGE 1
3e0cda07	157	#define CONFIG_CMD_FAT 1
8e429b3e	158
6d0f6bcf	159	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
8e429b3e	160
6d0f6bcf JCPV	161	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
6d0f6bcf JCPV	162	#define CONFIG_SYS_MEMTEST_END 0x23e00000
8e429b3e	163
6d0f6bcf	164	#ifdef CONFIG_SYS_USE_DATAFLASH
8e429b3e SP	165
8e429b3e SP	166	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
057c849c	167	#define CONFIG_ENV_IS_IN_DATAFLASH 1
6d0f6bcf	168	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
0e8d1586	169	#define CONFIG_ENV_OFFSET 0x4200
6d0f6bcf	170	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
0e8d1586	171	#define CONFIG_ENV_SIZE 0x4200
8e429b3e SP	172	#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
	173	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	174	"root=/dev/mtdblock0 " \
	175	"mtdparts=at91_nand:-(root) "\
	176	"rw rootfstype=jffs2"
	177
6d0f6bcf	178	#else /* CONFIG_SYS_USE_NANDFLASH */
8e429b3e SP	179
8e429b3e SP	180	/* bootstrap + u-boot + env + linux in nandflash */
51bfee19	181	#define CONFIG_ENV_IS_IN_NAND 1
0e8d1586 JCPV	182	#define CONFIG_ENV_OFFSET 0x60000
	183	#define CONFIG_ENV_OFFSET_REDUND 0x80000
	184	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
8e429b3e SP	185	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
	186	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	187	"root=/dev/mtdblock5 " \
	188	"mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
	189	"rw rootfstype=jffs2"
	190
	191	#endif
	192
	193	#define CONFIG_BAUDRATE 115200
6d0f6bcf	194	#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
8e429b3e	195
6d0f6bcf JCPV	196	#define CONFIG_SYS_PROMPT "U-Boot> "
	197	#define CONFIG_SYS_CBSIZE 256
	198	#define CONFIG_SYS_MAXARGS 16
	199	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	200	#define CONFIG_SYS_LONGHELP 1
8e429b3e	201	#define CONFIG_CMDLINE_EDITING 1
03bab009 JCPV	202	#define CONFIG_AUTO_COMPLETE
	203	#define CONFIG_SYS_HUSH_PARSER
	204	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
8e429b3e SP	205
	206	#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
	207	/*
	208	* Size of malloc() pool
	209	*/
6d0f6bcf JCPV	210	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
6d0f6bcf JCPV	211	#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
8e429b3e SP	212
	213	#define CONFIG_STACKSIZE (321024) / regular stack */
	214
	215	#ifdef CONFIG_USE_IRQ
	216	#error CONFIG_USE_IRQ not supported
	217	#endif
	218
	219	#endif