projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 2118ebb4 SP |
1 | /* |
| 2 | * (C) Copyright 2007-2008 | |
| c9e798d3 | 3 | * Stelian Pop <stelian@popies.net> |
| 2118ebb4 SP |
4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * | |
| 6 | * Configuation settings for the AT91SAM9RLEK board. | |
| 7 | * | |
| 1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 2118ebb4 SP |
9 | */ |
| 10 | ||
| 11 | #ifndef __CONFIG_H | |
| 12 | #define __CONFIG_H | |
| 13 | ||
| 21d671d0 XH |
14 | #include <asm/hardware.h> |
| 15 | ||
| 16 | #define CONFIG_SYS_TEXT_BASE 0x21F00000 | |
| 425de62d | 17 | |
| 2118ebb4 | 18 | /* ARM asynchronous clock */ |
| 21d671d0 XH |
19 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 20 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ | |
| 21d671d0 XH |
21 | |
| 22 | #define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */ | |
| 2118ebb4 | 23 | |
| dc39ae95 | 24 | #define CONFIG_ARCH_CPU_INIT |
| 21d671d0 XH |
25 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 26 | #define CONFIG_BOARD_EARLY_INIT_F | |
| 2118ebb4 | 27 | |
| 21d671d0 XH |
28 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 29 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
| 30 | #define CONFIG_INITRD_TAG 1 | |
| 2118ebb4 | 31 | |
| 21d671d0 XH |
32 | #define CONFIG_DISPLAY_CPUINFO |
| 33 | ||
| f9129fe3 | 34 | #define CONFIG_CMD_BOOTZ |
| 36873e7d NF |
35 | #define CONFIG_OF_LIBFDT |
| 36 | ||
| 015b18c6 WJ |
37 | #define CONFIG_SYS_GENERIC_BOARD |
| 38 | ||
| 21d671d0 XH |
39 | #define CONFIG_ATMEL_LEGACY |
| 40 | #define CONFIG_AT91_GPIO 1 | |
| 41 | #define CONFIG_AT91_GPIO_PULLUP 1 | |
| 2118ebb4 SP |
42 | |
| 43 | /* | |
| 44 | * Hardware drivers | |
| 45 | */ | |
| 21d671d0 XH |
46 | |
| 47 | /* serial console */ | |
| 48 | #define CONFIG_ATMEL_USART | |
| 49 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
| 50 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
| 51 | #define CONFIG_BAUDRATE 115200 | |
| 2118ebb4 | 52 | |
| 761c70b8 SP |
53 | /* LCD */ |
| 54 | #define CONFIG_LCD 1 | |
| 55 | #define LCD_BPP LCD_COLOR8 | |
| 56 | #define CONFIG_LCD_LOGO 1 | |
| 57 | #undef LCD_TEST_PATTERN | |
| 58 | #define CONFIG_LCD_INFO 1 | |
| 59 | #define CONFIG_LCD_INFO_BELOW_LOGO 1 | |
| 21d671d0 | 60 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
| 761c70b8 SP |
61 | #define CONFIG_ATMEL_LCD 1 |
| 62 | #define CONFIG_ATMEL_LCD_RGB565 1 | |
| 21d671d0 XH |
63 | /* Let board_init_f handle the framebuffer allocation */ |
| 64 | #undef CONFIG_FB_ADDR | |
| 65 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 | |
| 66 | ||
| 761c70b8 | 67 | |
| a484b00b JCPV |
68 | /* LED */ |
| 69 | #define CONFIG_AT91_LED | |
| 70 | #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ | |
| 71 | #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ | |
| 72 | #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ | |
| 73 | ||
| 2118ebb4 SP |
74 | #define CONFIG_BOOTDELAY 3 |
| 75 | ||
| 2118ebb4 SP |
76 | /* |
| 77 | * Command line configuration. | |
| 78 | */ | |
| 79 | #include <config_cmd_default.h> | |
| 80 | #undef CONFIG_CMD_BDI | |
| 2118ebb4 | 81 | #undef CONFIG_CMD_FPGA |
| 74de7aef | 82 | #undef CONFIG_CMD_IMI |
| 2118ebb4 | 83 | #undef CONFIG_CMD_IMLS |
| 74de7aef | 84 | #undef CONFIG_CMD_LOADS |
| 2118ebb4 | 85 | #undef CONFIG_CMD_NET |
| 21d671d0 | 86 | #undef CONFIG_CMD_NFS |
| 74de7aef | 87 | #undef CONFIG_CMD_SOURCE |
| 2118ebb4 SP |
88 | #undef CONFIG_CMD_USB |
| 89 | ||
| 21d671d0 | 90 | #define CONFIG_CMD_NAND 1 |
| 2118ebb4 SP |
91 | |
| 92 | /* SDRAM */ | |
| 93 | #define CONFIG_NR_DRAM_BANKS 1 | |
| 21d671d0 XH |
94 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
| 95 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
| 96 | ||
| 97 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
| 98 | (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
| 2118ebb4 SP |
99 | |
| 100 | /* DataFlash */ | |
| 4758ebdd | 101 | #define CONFIG_ATMEL_DATAFLASH_SPI |
| 21d671d0 | 102 | #define CONFIG_HAS_DATAFLASH 1 |
| 6d0f6bcf JCPV |
103 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
| 104 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
| 21d671d0 XH |
105 | #define AT91_SPI_CLK 15000000 |
| 106 | #define DATAFLASH_TCSS (0x1a << 16) | |
| 107 | #define DATAFLASH_TCHS (0x1 << 24) | |
| 2118ebb4 SP |
108 | |
| 109 | /* NOR flash - not present */ | |
| 6d0f6bcf | 110 | #define CONFIG_SYS_NO_FLASH 1 |
| 2118ebb4 SP |
111 | |
| 112 | /* NAND flash */ | |
| 74c076d6 JCPV |
113 | #ifdef CONFIG_CMD_NAND |
| 114 | #define CONFIG_NAND_ATMEL | |
| 6d0f6bcf | 115 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 21d671d0 | 116 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 6d0f6bcf | 117 | #define CONFIG_SYS_NAND_DBW_8 1 |
| 74c076d6 JCPV |
118 | /* our ALE is AD21 */ |
| 119 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| 120 | /* our CLE is AD22 */ | |
| 121 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| 122 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 | |
| 123 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 | |
| 2eb99ca8 | 124 | |
| 74c076d6 | 125 | #endif |
| 2118ebb4 SP |
126 | |
| 127 | /* Ethernet - not present */ | |
| 128 | ||
| 129 | /* USB - not supported */ | |
| 130 | ||
| 6d0f6bcf | 131 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| 2118ebb4 | 132 | |
| 21d671d0 | 133 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 6d0f6bcf | 134 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
| 2118ebb4 | 135 | |
| 6d0f6bcf | 136 | #ifdef CONFIG_SYS_USE_DATAFLASH |
| 2118ebb4 SP |
137 | |
| 138 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
| 057c849c | 139 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
| 6d0f6bcf | 140 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
| 0e8d1586 | 141 | #define CONFIG_ENV_OFFSET 0x4200 |
| 6d0f6bcf | 142 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
| 0e8d1586 | 143 | #define CONFIG_ENV_SIZE 0x4200 |
| e139cb31 | 144 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" |
| 2118ebb4 SP |
145 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 146 | "root=/dev/mtdblock0 " \ | |
| 918319c7 | 147 | "mtdparts=atmel_nand:-(root) "\ |
| 2118ebb4 SP |
148 | "rw rootfstype=jffs2" |
| 149 | ||
| 6d0f6bcf | 150 | #else /* CONFIG_SYS_USE_NANDFLASH */ |
| 2118ebb4 SP |
151 | |
| 152 | /* bootstrap + u-boot + env + linux in nandflash */ | |
| 21d671d0 | 153 | #define CONFIG_ENV_IS_IN_NAND 1 |
| 0e8d1586 JCPV |
154 | #define CONFIG_ENV_OFFSET 0x60000 |
| 155 | #define CONFIG_ENV_OFFSET_REDUND 0x80000 | |
| 156 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ | |
| 2118ebb4 SP |
157 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" |
| 158 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
| 159 | "root=/dev/mtdblock5 " \ | |
| 918319c7 | 160 | "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ |
| 2118ebb4 SP |
161 | "rw rootfstype=jffs2" |
| 162 | ||
| 163 | #endif | |
| 164 | ||
| 6d0f6bcf JCPV |
165 | #define CONFIG_SYS_PROMPT "U-Boot> " |
| 166 | #define CONFIG_SYS_CBSIZE 256 | |
| 167 | #define CONFIG_SYS_MAXARGS 16 | |
| 168 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
| 169 | #define CONFIG_SYS_LONGHELP 1 | |
| 21d671d0 | 170 | #define CONFIG_CMDLINE_EDITING 1 |
| e139cb31 | 171 | #define CONFIG_AUTO_COMPLETE |
| 2118ebb4 | 172 | |
| 2118ebb4 SP |
173 | /* |
| 174 | * Size of malloc() pool | |
| 175 | */ | |
| 21d671d0 | 176 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
| 2118ebb4 | 177 | |
| 2118ebb4 | 178 | #endif |