[people/ms/u-boot.git] / include / configs / at91sam9x5ek.h

/*
 * Copyright (C) 2012 Atmel Corporation
 *
 * Configuation settings for the AT91SAM9X5EK board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x26f00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768
#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */

#define CONFIG_AT91SAM9X5EK

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE	ATMEL_BASE_DBGU
#define CONFIG_USART_ID		ATMEL_ID_SYS

/* LCD */
#define CONFIG_LCD
#define LCD_BPP			LCD_COLOR16
#define LCD_OUTPUT_BPP		24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* no NOR flash */
#define CONFIG_SYS_NO_FLASH

/*
 * Command line configuration.
 */
#define CONFIG_CMD_NAND

/*
 * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
 * NB: in this case, USB 1.1 devices won't be recognized.
 */

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#ifdef CONFIG_CMD_SF
#define CONFIG_ATMEL_SPI
#define CONFIG_SF_DEFAULT_SPEED		30000000
#endif

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_DBW_8		1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5

/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC		1
#define CONFIG_ATMEL_NAND_HW_PMECC	1
#define CONFIG_PMECC_CAP		2
#define CONFIG_PMECC_SECTOR_SIZE	512

#define CONFIG_CMD_NAND_TRIMFFS

#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif

/* MMC */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#endif

/* FAT */
#ifdef CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
#endif

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_MACB_SEARCH_PHY

/* USB */
#ifdef CONFIG_CMD_USB
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
#else
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
#endif
#define CONFIG_USB_STORAGE
#endif

#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		0x26e00000

#ifdef CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0xc0000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read " \
				"0x22000000 0x200000 0x300000; " \
				"bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_SPIFLASH)
/* bootstrap + u-boot + env + linux in spi flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET	0x5000
#define CONFIG_ENV_SIZE		0x3000
#define CONFIG_ENV_SECT_SIZE	0x1000
#define CONFIG_ENV_SPI_MAX_HZ	30000000
#define CONFIG_BOOTCOMMAND	"sf probe 0; " \
				"sf read 0x22000000 0x100000 0x300000; " \
				"bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_DATAFLASH)
/* bootstrap + u-boot + env + linux in data flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET	0x4200
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_ENV_SECT_SIZE	0x210
#define CONFIG_ENV_SPI_MAX_HZ	30000000
#define CONFIG_BOOTCOMMAND	"sf probe 0; " \
				"sf read 0x22000000 0x84000 0x294000; " \
				"bootm 0x22000000"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_ENV_IS_IN_FAT
#define CONFIG_FAT_WRITE
#define FAT_ENV_INTERFACE	"mmc"
#define FAT_ENV_FILE		"uboot.env"
#define FAT_ENV_DEVICE_AND_PART "0"
#define CONFIG_ENV_SIZE		0x4000
#endif

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_BOOTARGS		"mem=128M console=ttyS0,115200 " \
				"mtdparts=atmel_nand:" \
				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
				"root=/dev/mmcblk0p2 " \
				"rw rootfstype=ext4 rootwait"
#else
#define CONFIG_BOOTARGS							\
	"console=ttyS0,115200 earlyprintk "				\
	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
	"256k(env),256k(env_redundant),256k(spare),"			\
	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
#endif

#define CONFIG_BAUDRATE		115200

#define CONFIG_SYS_CBSIZE	256
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)

/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE		0x300000
#define CONFIG_SPL_MAX_SIZE		0x6000
#define CONFIG_SPL_STACK		0x308000

#define CONFIG_SPL_BSS_START_ADDR	0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT

#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN		(512 << 10)

#define CONFIG_SYS_MASTER_CLOCK		132096000
#define CONFIG_SYS_AT91_PLLA		0x20c73f03
#define CONFIG_SYS_MCKR			0x1301
#define CONFIG_SYS_MCKR_CSS		0x1302

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT

#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

#elif CONFIG_SYS_USE_SPIFLASH
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400

#endif

#endif
Commit	Line	Data
f7fa2f37 BS	1	/*
	2	* Copyright (C) 2012 Atmel Corporation
	3	*
	4	* Configuation settings for the AT91SAM9X5EK board.
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
f7fa2f37 BS	7	*/
	8
	9	#ifndef __CONFIG_H__
	10	#define __CONFIG_H__
	11
	12	#include <asm/hardware.h>
	13
77461a65 BS	14	#define CONFIG_SYS_TEXT_BASE 0x26f00000
77461a65 BS	15
f7fa2f37 BS	16	/* ARM asynchronous clock */
	17	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	18	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
f7fa2f37 BS	19
f7fa2f37 BS	20	#define CONFIG_AT91SAM9X5EK
f7fa2f37	21
f7fa2f37 BS	22	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	23	#define CONFIG_SETUP_MEMORY_TAGS
	24	#define CONFIG_INITRD_TAG
	25	#define CONFIG_SKIP_LOWLEVEL_INIT
	26	#define CONFIG_BOARD_EARLY_INIT_F
	27	#define CONFIG_DISPLAY_CPUINFO
	28
	29	/* general purpose I/O */
	30	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
	31	#define CONFIG_AT91_GPIO
	32
	33	/* serial console */
	34	#define CONFIG_ATMEL_USART
	35	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	36	#define CONFIG_USART_ID ATMEL_ID_SYS
	37
	38	/* LCD */
	39	#define CONFIG_LCD
	40	#define LCD_BPP LCD_COLOR16
	41	#define LCD_OUTPUT_BPP 24
	42	#define CONFIG_LCD_LOGO
f7fa2f37 BS	43	#define CONFIG_LCD_INFO
	44	#define CONFIG_LCD_INFO_BELOW_LOGO
	45	#define CONFIG_SYS_WHITE_ON_BLACK
	46	#define CONFIG_ATMEL_HLCD
	47	#define CONFIG_ATMEL_LCD_RGB565
	48	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	49
f7fa2f37 BS	50
	51	/*
	52	* BOOTP options
	53	*/
	54	#define CONFIG_BOOTP_BOOTFILESIZE
	55	#define CONFIG_BOOTP_BOOTPATH
	56	#define CONFIG_BOOTP_GATEWAY
	57	#define CONFIG_BOOTP_HOSTNAME
	58
d51a2a2d BS	59	/* no NOR flash */
	60	#define CONFIG_SYS_NO_FLASH
	61
f7fa2f37 BS	62	/*
	63	* Command line configuration.
	64	*/
f7fa2f37	65	#define CONFIG_CMD_NAND
b030e731 RG	66
	67	/*
	68	* define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
	69	* NB: in this case, USB 1.1 devices won't be recognized.
	70	*/
	71
f7fa2f37 BS	72	/* SDRAM */
	73	#define CONFIG_NR_DRAM_BANKS 1
	74	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	75	#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
	76
	77	#define CONFIG_SYS_INIT_SP_ADDR \
	78	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
	79
	80	/* DataFlash */
1d7442e6 BS	81	#ifdef CONFIG_CMD_SF
1d7442e6 BS	82	#define CONFIG_ATMEL_SPI
1d7442e6	83	#define CONFIG_SF_DEFAULT_SPEED 30000000
f7fa2f37 BS	84	#endif
f7fa2f37 BS	85
f7fa2f37 BS	86	/* NAND flash */
	87	#ifdef CONFIG_CMD_NAND
	88	#define CONFIG_NAND_ATMEL
	89	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	90	#define CONFIG_SYS_NAND_BASE 0x40000000
	91	#define CONFIG_SYS_NAND_DBW_8 1
	92	/* our ALE is AD21 */
	93	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	94	/* our CLE is AD22 */
	95	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	96	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
	97	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
	98
df95321c WJ	99	/* PMECC & PMERRLOC */
	100	#define CONFIG_ATMEL_NAND_HWECC 1
	101	#define CONFIG_ATMEL_NAND_HW_PMECC 1
	102	#define CONFIG_PMECC_CAP 2
	103	#define CONFIG_PMECC_SECTOR_SIZE 512
df95321c	104
ce76f0aa BS	105	#define CONFIG_CMD_NAND_TRIMFFS
ce76f0aa BS	106
f7fa2f37 BS	107	#define CONFIG_MTD_DEVICE
	108	#define CONFIG_CMD_MTDPARTS
	109	#define CONFIG_MTD_PARTITIONS
	110	#define CONFIG_RBTREE
	111	#define CONFIG_LZO
	112	#define CONFIG_CMD_UBI
	113	#define CONFIG_CMD_UBIFS
	114	#endif
	115
3a49cd7e WJ	116	/* MMC */
	117	#ifdef CONFIG_CMD_MMC
	118	#define CONFIG_MMC
3a49cd7e WJ	119	#define CONFIG_GENERIC_MMC
3a49cd7e WJ	120	#define CONFIG_GENERIC_ATMEL_MCI
419fba0c RG	121	#endif
	122
	123	/* FAT */
	124	#ifdef CONFIG_CMD_FAT
3a49cd7e WJ	125	#define CONFIG_DOS_PARTITION
	126	#endif
	127
f7fa2f37 BS	128	/* Ethernet */
	129	#define CONFIG_MACB
	130	#define CONFIG_RMII
	131	#define CONFIG_NET_RETRY_COUNT 20
	132	#define CONFIG_MACB_SEARCH_PHY
	133
b030e731 RG	134	/* USB */
	135	#ifdef CONFIG_CMD_USB
	136	#ifdef CONFIG_USB_EHCI
	137	#define CONFIG_USB_EHCI_ATMEL
	138	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
	139	#else
dcd2f1a0 BS	140	#define CONFIG_USB_ATMEL
dcd2f1a0 BS	141	#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
b030e731 RG	142	#define CONFIG_USB_OHCI_NEW
	143	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	144	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
	145	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
	146	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
	147	#endif
b030e731 RG	148	#define CONFIG_USB_STORAGE
	149	#endif
	150
f7fa2f37 BS	151	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	152
	153	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	154	#define CONFIG_SYS_MEMTEST_END 0x26e00000
	155
	156	#ifdef CONFIG_SYS_USE_NANDFLASH
	157	/* bootstrap + u-boot + env + linux in nandflash */
	158	#define CONFIG_ENV_IS_IN_NAND
	159	#define CONFIG_ENV_OFFSET 0xc0000
	160	#define CONFIG_ENV_OFFSET_REDUND 0x100000
	161	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
	162	#define CONFIG_BOOTCOMMAND "nand read " \
	163	"0x22000000 0x200000 0x300000; " \
	164	"bootm 0x22000000"
b7e3129e	165	#elif defined(CONFIG_SYS_USE_SPIFLASH)
1d7442e6 BS	166	/* bootstrap + u-boot + env + linux in spi flash */
	167	#define CONFIG_ENV_IS_IN_SPI_FLASH
	168	#define CONFIG_ENV_OFFSET 0x5000
	169	#define CONFIG_ENV_SIZE 0x3000
	170	#define CONFIG_ENV_SECT_SIZE 0x1000
	171	#define CONFIG_ENV_SPI_MAX_HZ 30000000
	172	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	173	"sf read 0x22000000 0x100000 0x300000; " \
	174	"bootm 0x22000000"
961ffc77 BS	175	#elif defined(CONFIG_SYS_USE_DATAFLASH)
	176	/* bootstrap + u-boot + env + linux in data flash */
	177	#define CONFIG_ENV_IS_IN_SPI_FLASH
	178	#define CONFIG_ENV_OFFSET 0x4200
	179	#define CONFIG_ENV_SIZE 0x4200
	180	#define CONFIG_ENV_SECT_SIZE 0x210
	181	#define CONFIG_ENV_SPI_MAX_HZ 30000000
	182	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	183	"sf read 0x22000000 0x84000 0x294000; " \
	184	"bootm 0x22000000"
b7e3129e WJ	185	#else /* CONFIG_SYS_USE_MMC */
b7e3129e WJ	186	/* bootstrap + u-boot + env + linux in mmc */
26961772 WJ	187	#define CONFIG_ENV_IS_IN_FAT
	188	#define CONFIG_FAT_WRITE
	189	#define FAT_ENV_INTERFACE "mmc"
	190	#define FAT_ENV_FILE "uboot.env"
	191	#define FAT_ENV_DEVICE_AND_PART "0"
	192	#define CONFIG_ENV_SIZE 0x4000
f7fa2f37 BS	193	#endif
f7fa2f37 BS	194
b7e3129e WJ	195	#ifdef CONFIG_SYS_USE_MMC
	196	#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
	197	"mtdparts=atmel_nand:" \
	198	"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
	199	"root=/dev/mmcblk0p2 " \
	200	"rw rootfstype=ext4 rootwait"
	201	#else
0c58cfa9 BS	202	#define CONFIG_BOOTARGS \
	203	"console=ttyS0,115200 earlyprintk " \
	204	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
	205	"256k(env),256k(env_redundant),256k(spare)," \
	206	"512k(dtb),6M(kernel)ro,-(rootfs) " \
	207	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
b7e3129e	208	#endif
f7fa2f37 BS	209
	210	#define CONFIG_BAUDRATE 115200
	211
f7fa2f37 BS	212	#define CONFIG_SYS_CBSIZE 256
f7fa2f37 BS	213	#define CONFIG_SYS_MAXARGS 16
f7fa2f37 BS	214	#define CONFIG_SYS_LONGHELP
	215	#define CONFIG_CMDLINE_EDITING
	216	#define CONFIG_AUTO_COMPLETE
f7fa2f37 BS	217
	218	/*
	219	* Size of malloc() pool
	220	*/
	221	#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
	222
d85e8914 BS	223	/* SPL */
	224	#define CONFIG_SPL_FRAMEWORK
	225	#define CONFIG_SPL_TEXT_BASE 0x300000
	226	#define CONFIG_SPL_MAX_SIZE 0x6000
	227	#define CONFIG_SPL_STACK 0x308000
	228
	229	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	230	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
	231	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	232	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
	233
	234	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	235	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	236	#define CONFIG_SPL_GPIO_SUPPORT
	237	#define CONFIG_SPL_SERIAL_SUPPORT
	238
	239	#define CONFIG_SPL_BOARD_INIT
	240	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
	241
	242	#define CONFIG_SYS_MASTER_CLOCK 132096000
	243	#define CONFIG_SYS_AT91_PLLA 0x20c73f03
	244	#define CONFIG_SYS_MCKR 0x1301
	245	#define CONFIG_SYS_MCKR_CSS 0x1302
	246
d85e8914 BS	247	#ifdef CONFIG_SYS_USE_MMC
	248	#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
	249	#define CONFIG_SPL_MMC_SUPPORT
	250	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
	251	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
	252	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
	253	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
	254	#define CONFIG_SPL_FAT_SUPPORT
	255	#define CONFIG_SPL_LIBDISK_SUPPORT
	256
	257	#elif CONFIG_SYS_USE_NANDFLASH
	258	#define CONFIG_SPL_NAND_SUPPORT
	259	#define CONFIG_SPL_NAND_DRIVERS
	260	#define CONFIG_SPL_NAND_BASE
	261	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
	262	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	263	#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
	264	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	265	#define CONFIG_SYS_NAND_OOBSIZE 64
	266	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
	267	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
	268	#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
	269
	270	#elif CONFIG_SYS_USE_SPIFLASH
	271	#define CONFIG_SPL_SPI_SUPPORT
	272	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	273	#define CONFIG_SPL_SPI_LOAD
	274	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
	275
	276	#endif
	277
f7fa2f37	278	#endif