[people/ms/u-boot.git] / include / configs / dra7xx_evm.h

/*
 * (C) Copyright 2013
 * Texas Instruments Incorporated.
 * Lokesh Vutla	  <lokeshvutla@ti.com>
 *
 * Configuration settings for the TI DRA7XX board.
 * See ti_omap5_common.h for omap5 common settings.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_DRA7XX_EVM_H
#define __CONFIG_DRA7XX_EVM_H

#define CONFIG_DRA7XX
#define CONFIG_BOARD_EARLY_INIT_F

#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
#endif

#ifndef CONFIG_QSPI_BOOT
/* MMC ENV related defines */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
#define CONFIG_ENV_SIZE			(128 << 10)
#define CONFIG_ENV_OFFSET		0xE0000
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#endif

#if (CONFIG_CONS_INDEX == 1)
#define CONSOLEDEV			"ttyO0"
#elif (CONFIG_CONS_INDEX == 3)
#define CONSOLEDEV			"ttyO2"
#endif
#define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
#define CONFIG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
#define CONFIG_BAUDRATE			115200

#define CONFIG_SYS_OMAP_ABE_SYSCK

#ifndef CONFIG_SPL_BUILD
/* Define the default GPT table for eMMC */
#define PARTS_DEFAULT \
	"uuid_disk=${uuid_gpt_disk};" \
	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"

#define DFU_ALT_INFO_MMC \
	"dfu_alt_info_mmc=" \
	"boot part 0 1;" \
	"rootfs part 0 2;" \
	"MLO fat 0 1;" \
	"MLO.raw raw 0x100 0x100;" \
	"u-boot.img.raw raw 0x300 0x400;" \
	"spl-os-args.raw raw 0x80 0x80;" \
	"spl-os-image.raw raw 0x900 0x2000;" \
	"spl-os-args fat 0 1;" \
	"spl-os-image fat 0 1;" \
	"u-boot.img fat 0 1;" \
	"uEnv.txt fat 0 1\0"

#define DFU_ALT_INFO_EMMC \
	"dfu_alt_info_emmc=" \
	"rawemmc raw 0 3751936;" \
	"boot part 1 1;" \
	"rootfs part 1 2;" \
	"MLO fat 1 1;" \
	"MLO.raw raw 0x100 0x100;" \
	"u-boot.img.raw raw 0x300 0x400;" \
	"spl-os-args.raw raw 0x80 0x80;" \
	"spl-os-image.raw raw 0x900 0x2000;" \
	"spl-os-args fat 1 1;" \
	"spl-os-image fat 1 1;" \
	"u-boot.img fat 1 1;" \
	"uEnv.txt fat 1 1\0"

#define DFU_ALT_INFO_RAM \
	"dfu_alt_info_ram=" \
	"kernel ram 0x80200000 0x4000000;" \
	"fdt ram 0x80f80000 0x80000;" \
	"ramdisk ram 0x81000000 0x4000000\0"

#define DFUARGS \
	"dfu_bufsiz=0x10000\0" \
	DFU_ALT_INFO_MMC \
	DFU_ALT_INFO_EMMC \
	DFU_ALT_INFO_RAM

/* Fastboot */
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_USB_FASTBOOT_BUF_ADDR    CONFIG_SYS_LOAD_ADDR
#define CONFIG_USB_FASTBOOT_BUF_SIZE    0x2F000000
#define CONFIG_FASTBOOT_FLASH
#define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
#endif

#include <configs/ti_omap5_common.h>

/* Enhance our eMMC support / experience. */
#define CONFIG_CMD_GPT
#define CONFIG_EFI_PARTITION
#define CONFIG_HSMMC2_8BIT

/* CPSW Ethernet */
#define CONFIG_CMD_DHCP
#define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT		10
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
#define CONFIG_MII			/* Required in net/eth.c */
#define CONFIG_PHY_GIGE			/* per-board part of CPSW */
#define CONFIG_PHYLIB

/* SPI */
#undef	CONFIG_OMAP3_SPI
#define CONFIG_TI_QSPI
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED                48000000
#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
#define CONFIG_QSPI_QUAD_SUPPORT

/*
 * Default to using SPI for environment, etc.
 * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
 * 0x9E0000 - 0x2000000 : USERLAND
 */
#define CONFIG_SYS_SPI_KERNEL_OFFS	0x1E0000
#define CONFIG_SYS_SPI_ARGS_OFFS	0x140000
#define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
#if defined(CONFIG_QSPI_BOOT)
/* In SPL, use the environment and discard MMC support for space. */
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_SPL_MMC_SUPPORT
#undef CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_MAX_SIZE             (64 << 10) /* 64 KiB */
#endif
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SIZE			(64 << 10)
#define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64 KB sectors */
#define CONFIG_ENV_OFFSET		0x1C0000
#define CONFIG_ENV_OFFSET_REDUND	0x1D0000
#endif

/* SPI SPL */
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000

#define CONFIG_SUPPORT_EMMC_BOOT

/* USB xHCI HOST */
#define CONFIG_CMD_USB
#define CONFIG_USB_HOST
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB2PHY2_HOST

/* USB GADGET */
#define CONFIG_USB_DWC3_PHY_OMAP
#define CONFIG_USB_DWC3_OMAP
#define CONFIG_USB_DWC3
#define CONFIG_USB_DWC3_GADGET

#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
#define CONFIG_G_DNL_VENDOR_NUM 0x0451
#define CONFIG_G_DNL_PRODUCT_NUM 0xd022
#define CONFIG_USB_GADGET_DUALSPEED

/* USB Device Firmware Update support */
#define CONFIG_USB_FUNCTION_DFU
#define CONFIG_DFU_RAM
#define CONFIG_CMD_DFU

#define CONFIG_DFU_MMC
#define CONFIG_DFU_RAM

/* SATA */
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_CMD_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
						CONFIG_SYS_SCSI_MAX_LUN)

/* NAND support */
#ifdef CONFIG_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
					 10, 11, 12, 13, 14, 15, 16, 17, \
					 18, 19, 20, 21, 22, 23, 24, 25, \
					 26, 27, 28, 29, 30, 31, 32, 33, \
					 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 43, 44, 45, 46, 47, 48, 49, \
					 50, 51, 52, 53, 54, 55, 56, 57, }
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	14
#define MTDIDS_DEFAULT			"nand0=nand.0"
#define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
					"128k(NAND.SPL)," \
					"128k(NAND.SPL.backup1)," \
					"128k(NAND.SPL.backup2)," \
					"128k(NAND.SPL.backup3)," \
					"256k(NAND.u-boot-spl-os)," \
					"1m(NAND.u-boot)," \
					"128k(NAND.u-boot-env)," \
					"128k(NAND.u-boot-env.backup1)," \
					"8m(NAND.kernel)," \
					"-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
/* NAND: SPL related configs */
#ifdef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x00080000 /* os-boot params*/
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif
#endif /* !CONFIG_NAND */

/* Parallel NOR Support */
#if defined(CONFIG_NOR)
/* NOR: device related configs */
#define CONFIG_SYS_MAX_FLASH_SECT	512
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
#define CONFIG_SYS_FLASH_SIZE		(64 * 1024 * 1024) /* 64 MB */
/* #define CONFIG_INIT_IGNORE_ERROR */
#undef CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BASE		(0x08000000)
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
/* Reduce SPL size by removing unlikey targets */
#ifdef CONFIG_NOR_BOOT
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE		(128 * 1024)	/* 128 KiB */
#define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
#define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:" \
					"128k(NOR.SPL)," \
					"128k(NOR.SPL.backup1)," \
					"128k(NOR.SPL.backup2)," \
					"128k(NOR.SPL.backup3)," \
					"256k(NOR.u-boot-spl-os)," \
					"1m(NOR.u-boot)," \
					"128k(NOR.u-boot-env)," \
					"128k(NOR.u-boot-env.backup1)," \
					"8m(NOR.kernel)," \
					"-(NOR.rootfs)"
#define CONFIG_ENV_OFFSET		0x001c0000
#define CONFIG_ENV_OFFSET_REDUND	0x001e0000
#endif
#endif  /* NOR support */

#endif /* __CONFIG_DRA7XX_EVM_H */
Commit	Line	Data
3ef5ebeb LV	1	/*
	2	* (C) Copyright 2013
	3	* Texas Instruments Incorporated.
	4	* Lokesh Vutla <lokeshvutla@ti.com>
	5	*
	6	* Configuration settings for the TI DRA7XX board.
3d657a05	7	* See ti_omap5_common.h for omap5 common settings.
3ef5ebeb	8	*
3765b3e7	9	* SPDX-License-Identifier: GPL-2.0+
3ef5ebeb LV	10	*/
	11
	12	#ifndef __CONFIG_DRA7XX_EVM_H
	13	#define __CONFIG_DRA7XX_EVM_H
	14
a8017574	15	#define CONFIG_DRA7XX
7b922523	16	#define CONFIG_BOARD_EARLY_INIT_F
3ef5ebeb	17
706dd348 LV	18	#ifdef CONFIG_SPL_BUILD
	19	#define CONFIG_IODELAY_RECALIBRATION
	20	#endif
	21
79b079f3	22	#ifndef CONFIG_QSPI_BOOT
d3d33daf LV	23	/* MMC ENV related defines */
	24	#define CONFIG_ENV_IS_IN_MMC
	25	#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
2737f011	26	#define CONFIG_ENV_SIZE (128 << 10)
d3d33daf LV	27	#define CONFIG_ENV_OFFSET 0xE0000
	28	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	29	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
79b079f3	30	#endif
3ef5ebeb	31
a13cbf5f	32	#if (CONFIG_CONS_INDEX == 1)
a8017574	33	#define CONSOLEDEV "ttyO0"
a13cbf5f MS	34	#elif (CONFIG_CONS_INDEX == 3)
	35	#define CONSOLEDEV "ttyO2"
	36	#endif
	37	#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
	38	#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
	39	#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
378bd1fb	40	#define CONFIG_BAUDRATE 115200
97405d84 LV	41
97405d84 LV	42	#define CONFIG_SYS_OMAP_ABE_SYSCK
45dbbf29	43
08520bf5	44	#ifndef CONFIG_SPL_BUILD
2efa79ae TR	45	/* Define the default GPT table for eMMC */
	46	#define PARTS_DEFAULT \
	47	"uuid_disk=${uuid_gpt_disk};" \
	48	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
	49
7a5a3e37 KVA	50	#define DFU_ALT_INFO_MMC \
	51	"dfu_alt_info_mmc=" \
	52	"boot part 0 1;" \
	53	"rootfs part 0 2;" \
	54	"MLO fat 0 1;" \
	55	"MLO.raw raw 0x100 0x100;" \
	56	"u-boot.img.raw raw 0x300 0x400;" \
	57	"spl-os-args.raw raw 0x80 0x80;" \
	58	"spl-os-image.raw raw 0x900 0x2000;" \
	59	"spl-os-args fat 0 1;" \
	60	"spl-os-image fat 0 1;" \
	61	"u-boot.img fat 0 1;" \
	62	"uEnv.txt fat 0 1\0"
	63
	64	#define DFU_ALT_INFO_EMMC \
	65	"dfu_alt_info_emmc=" \
	66	"rawemmc raw 0 3751936;" \
	67	"boot part 1 1;" \
	68	"rootfs part 1 2;" \
	69	"MLO fat 1 1;" \
	70	"MLO.raw raw 0x100 0x100;" \
	71	"u-boot.img.raw raw 0x300 0x400;" \
	72	"spl-os-args.raw raw 0x80 0x80;" \
	73	"spl-os-image.raw raw 0x900 0x2000;" \
	74	"spl-os-args fat 1 1;" \
	75	"spl-os-image fat 1 1;" \
	76	"u-boot.img fat 1 1;" \
	77	"uEnv.txt fat 1 1\0"
	78
	79	#define DFU_ALT_INFO_RAM \
	80	"dfu_alt_info_ram=" \
	81	"kernel ram 0x80200000 0x4000000;" \
	82	"fdt ram 0x80f80000 0x80000;" \
	83	"ramdisk ram 0x81000000 0x4000000\0"
	84
	85	#define DFUARGS \
	86	"dfu_bufsiz=0x10000\0" \
	87	DFU_ALT_INFO_MMC \
	88	DFU_ALT_INFO_EMMC \
	89	DFU_ALT_INFO_RAM
	90
be17d396 DK	91	/* Fastboot */
	92	#define CONFIG_CMD_FASTBOOT
	93	#define CONFIG_ANDROID_BOOT_IMAGE
	94	#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	95	#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x2F000000
	96	#define CONFIG_FASTBOOT_FLASH
	97	#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
08520bf5	98	#endif
be17d396	99
3d657a05	100	#include <configs/ti_omap5_common.h>
45dbbf29	101
2efa79ae TR	102	/* Enhance our eMMC support / experience. */
	103	#define CONFIG_CMD_GPT
	104	#define CONFIG_EFI_PARTITION
8065a4e8	105	#define CONFIG_HSMMC2_8BIT
2efa79ae	106
c9be62ca	107	/* CPSW Ethernet */
c9be62ca	108	#define CONFIG_CMD_DHCP
457bb505	109	#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
c9be62ca M	110	#define CONFIG_BOOTP_DNS2
	111	#define CONFIG_BOOTP_SEND_HOSTNAME
	112	#define CONFIG_BOOTP_GATEWAY
	113	#define CONFIG_BOOTP_SUBNETMASK
457bb505 TR	114	#define CONFIG_NET_RETRY_COUNT 10
	115	#define CONFIG_CMD_PING
	116	#define CONFIG_CMD_MII
	117	#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
	118	#define CONFIG_MII /* Required in net/eth.c */
	119	#define CONFIG_PHY_GIGE /* per-board part of CPSW */
c9be62ca	120	#define CONFIG_PHYLIB
c9be62ca	121
247cdf04 MP	122	/* SPI */
	123	#undef CONFIG_OMAP3_SPI
	124	#define CONFIG_TI_QSPI
247cdf04 MP	125	#define CONFIG_SPI_FLASH_SPANSION
	126	#define CONFIG_CMD_SF
	127	#define CONFIG_CMD_SPI
	128	#define CONFIG_TI_SPI_MMAP
	129	#define CONFIG_SF_DEFAULT_SPEED 48000000
	130	#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
46122960	131	#define CONFIG_QSPI_QUAD_SUPPORT
247cdf04	132
79b079f3 TR	133	/*
	134	* Default to using SPI for environment, etc.
	135	* 0x000000 - 0x010000 : QSPI.SPL (64KiB)
	136	* 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
	137	* 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
	138	* 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
	139	* 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
	140	* 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
	141	* 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
	142	* 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
	143	* 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
	144	* 0x9E0000 - 0x2000000 : USERLAND
	145	*/
	146	#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
	147	#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
	148	#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
	149	#if defined(CONFIG_QSPI_BOOT)
	150	/* In SPL, use the environment and discard MMC support for space. */
	151	#ifdef CONFIG_SPL_BUILD
	152	#undef CONFIG_SPL_MMC_SUPPORT
	153	#undef CONFIG_SPL_MAX_SIZE
	154	#define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */
	155	#endif
	156	#define CONFIG_SPL_ENV_SUPPORT
	157	#define CONFIG_ENV_IS_IN_SPI_FLASH
	158	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	159	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	160	#define CONFIG_ENV_SIZE (64 << 10)
	161	#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
	162	#define CONFIG_ENV_OFFSET 0x1C0000
	163	#define CONFIG_ENV_OFFSET_REDUND 0x1D0000
	164	#endif
	165
247cdf04 MP	166	/* SPI SPL */
	167	#define CONFIG_SPL_SPI_SUPPORT
	168	#define CONFIG_SPL_SPI_LOAD
	169	#define CONFIG_SPL_SPI_FLASH_SUPPORT
79b079f3	170	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
247cdf04	171
b818d9ab TR	172	#define CONFIG_SUPPORT_EMMC_BOOT
b818d9ab TR	173
834e91af DM	174	/* USB xHCI HOST */
	175	#define CONFIG_CMD_USB
	176	#define CONFIG_USB_HOST
	177	#define CONFIG_USB_XHCI
2770448c	178	#define CONFIG_USB_XHCI_DWC3
834e91af DM	179	#define CONFIG_USB_XHCI_OMAP
	180	#define CONFIG_USB_STORAGE
	181	#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
	182
	183	#define CONFIG_OMAP_USB_PHY
	184	#define CONFIG_OMAP_USB2PHY2_HOST
	185
7a5a3e37 KVA	186	/* USB GADGET */
	187	#define CONFIG_USB_DWC3_PHY_OMAP
	188	#define CONFIG_USB_DWC3_OMAP
	189	#define CONFIG_USB_DWC3
	190	#define CONFIG_USB_DWC3_GADGET
	191
	192	#define CONFIG_USB_GADGET
01acd6ab	193	#define CONFIG_USB_GADGET_DOWNLOAD
7a5a3e37 KVA	194	#define CONFIG_USB_GADGET_VBUS_DRAW 2
7a5a3e37 KVA	195	#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
be17d396 DK	196	#define CONFIG_G_DNL_VENDOR_NUM 0x0451
be17d396 DK	197	#define CONFIG_G_DNL_PRODUCT_NUM 0xd022
7a5a3e37 KVA	198	#define CONFIG_USB_GADGET_DUALSPEED
	199
	200	/* USB Device Firmware Update support */
01acd6ab	201	#define CONFIG_USB_FUNCTION_DFU
7a5a3e37 KVA	202	#define CONFIG_DFU_RAM
	203	#define CONFIG_CMD_DFU
	204
	205	#define CONFIG_DFU_MMC
	206	#define CONFIG_DFU_RAM
	207
21914ee6 RQ	208	/* SATA */
	209	#define CONFIG_BOARD_LATE_INIT
	210	#define CONFIG_CMD_SCSI
	211	#define CONFIG_LIBATA
	212	#define CONFIG_SCSI_AHCI
	213	#define CONFIG_SCSI_AHCI_PLAT
	214	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	215	#define CONFIG_SYS_SCSI_MAX_LUN 1
	216	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	217	CONFIG_SYS_SCSI_MAX_LUN)
	218
54a97d28	219	/* NAND support */
	220	#ifdef CONFIG_NAND
	221	/* NAND: device related configs */
	222	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	223	#define CONFIG_SYS_NAND_OOBSIZE 64
	224	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	225	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
	226	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	227	CONFIG_SYS_NAND_PAGE_SIZE)
	228	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	229	/* NAND: driver related configs */
	230	#define CONFIG_NAND_OMAP_GPMC
	231	#define CONFIG_NAND_OMAP_ELM
	232	#define CONFIG_SYS_NAND_ONFI_DETECTION
	233	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
	234	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	235	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	236	10, 11, 12, 13, 14, 15, 16, 17, \
	237	18, 19, 20, 21, 22, 23, 24, 25, \
	238	26, 27, 28, 29, 30, 31, 32, 33, \
	239	34, 35, 36, 37, 38, 39, 40, 41, \
	240	42, 43, 44, 45, 46, 47, 48, 49, \
	241	50, 51, 52, 53, 54, 55, 56, 57, }
	242	#define CONFIG_SYS_NAND_ECCSIZE 512
	243	#define CONFIG_SYS_NAND_ECCBYTES 14
	244	#define MTDIDS_DEFAULT "nand0=nand.0"
	245	#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
	246	"128k(NAND.SPL)," \
	247	"128k(NAND.SPL.backup1)," \
	248	"128k(NAND.SPL.backup2)," \
	249	"128k(NAND.SPL.backup3)," \
	250	"256k(NAND.u-boot-spl-os)," \
	251	"1m(NAND.u-boot)," \
	252	"128k(NAND.u-boot-env)," \
	253	"128k(NAND.u-boot-env.backup1)," \
	254	"8m(NAND.kernel)," \
9ddef489	255	"-(NAND.file-system)"
54a97d28	256	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
	257	/* NAND: SPL related configs */
	258	#ifdef CONFIG_SPL_NAND_SUPPORT
	259	#define CONFIG_SPL_NAND_AM33XX_BCH
	260	#endif
	261	/* NAND: SPL falcon mode configs */
	262	#ifdef CONFIG_SPL_OS_BOOT
	263	#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
	264	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
	265	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	266	#endif
	267	#endif /* !CONFIG_NAND */
	268
9352697a	269	/* Parallel NOR Support */
	270	#if defined(CONFIG_NOR)
	271	/* NOR: device related configs */
	272	#define CONFIG_SYS_MAX_FLASH_SECT 512
	273	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
	274	#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
	275	/* #define CONFIG_INIT_IGNORE_ERROR */
	276	#undef CONFIG_SYS_NO_FLASH
9352697a	277	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	278	#define CONFIG_SYS_FLASH_PROTECTION
	279	#define CONFIG_SYS_FLASH_CFI
	280	#define CONFIG_FLASH_CFI_DRIVER
	281	#define CONFIG_FLASH_CFI_MTD
	282	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	283	#define CONFIG_SYS_FLASH_BASE (0x08000000)
	284	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	285	/* Reduce SPL size by removing unlikey targets */
	286	#ifdef CONFIG_NOR_BOOT
	287	#define CONFIG_ENV_IS_IN_FLASH
	288	#define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
	289	#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
	290	#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
	291	"128k(NOR.SPL)," \
	292	"128k(NOR.SPL.backup1)," \
	293	"128k(NOR.SPL.backup2)," \
	294	"128k(NOR.SPL.backup3)," \
	295	"256k(NOR.u-boot-spl-os)," \
	296	"1m(NOR.u-boot)," \
	297	"128k(NOR.u-boot-env)," \
	298	"128k(NOR.u-boot-env.backup1)," \
	299	"8m(NOR.kernel)," \
	300	"-(NOR.rootfs)"
	301	#define CONFIG_ENV_OFFSET 0x001c0000
	302	#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
	303	#endif
	304	#endif /* NOR support */
	305
3ef5ebeb	306	#endif /* __CONFIG_DRA7XX_EVM_H */