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cba69eee IC |
1 | /* |
2 | * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> | |
3 | * | |
4 | * (C) Copyright 2007-2011 | |
5 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> | |
6 | * Tom Cubie <tangliang@allwinnertech.com> | |
7 | * | |
8 | * Configuration settings for the Allwinner sunxi series of boards. | |
9 | * | |
10 | * SPDX-License-Identifier: GPL-2.0+ | |
11 | */ | |
12 | ||
13 | #ifndef _SUNXI_COMMON_CONFIG_H | |
14 | #define _SUNXI_COMMON_CONFIG_H | |
15 | ||
e049fe28 HG |
16 | #include <linux/stringify.h> |
17 | ||
77ef1369 SS |
18 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
19 | /* | |
20 | * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the | |
21 | * expense of restricting some features, so the regular machine id values can | |
22 | * be used. | |
23 | */ | |
24 | # define CONFIG_MACH_TYPE_COMPAT_REV 0 | |
25 | #else | |
26 | /* | |
27 | * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. | |
28 | * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass | |
29 | * beyond the machine id check. | |
30 | */ | |
31 | # define CONFIG_MACH_TYPE_COMPAT_REV 1 | |
32 | #endif | |
33 | ||
cba69eee IC |
34 | /* |
35 | * High Level Configuration Options | |
36 | */ | |
37 | #define CONFIG_SUNXI /* sunxi family */ | |
50827a59 | 38 | #ifdef CONFIG_SPL_BUILD |
50827a59 IC |
39 | #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ |
40 | #endif | |
cba69eee IC |
41 | |
42 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
43 | ||
b6006baf | 44 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL) |
1a81cf83 | 45 | # define CONFIG_DW_SERIAL |
57f878ef SG |
46 | #endif |
47 | ||
cba69eee IC |
48 | /* |
49 | * Display CPU information | |
50 | */ | |
51 | #define CONFIG_DISPLAY_CPUINFO | |
52 | ||
53 | /* Serial & console */ | |
54 | #define CONFIG_SYS_NS16550 | |
55 | #define CONFIG_SYS_NS16550_SERIAL | |
56 | /* ns16550 reg in the low bits of cpu reg */ | |
cba69eee | 57 | #define CONFIG_SYS_NS16550_CLK 24000000 |
1a81cf83 SG |
58 | #ifndef CONFIG_DM_SERIAL |
59 | # define CONFIG_SYS_NS16550_REG_SIZE -4 | |
60 | # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE | |
61 | # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE | |
62 | # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE | |
63 | # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE | |
64 | # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE | |
65 | #endif | |
cba69eee | 66 | |
8a65f69c PK |
67 | /* CPU */ |
68 | #define CONFIG_SYS_CACHELINE_SIZE 64 | |
69 | ||
e049fe28 HG |
70 | /* |
71 | * The DRAM Base differs between some models. We cannot use macros for the | |
72 | * CONFIG_FOO defines which contain the DRAM base address since they end | |
73 | * up unexpanded in include/autoconf.mk . | |
74 | * | |
75 | * So we have to have this #ifdef #else #endif block for these. | |
76 | */ | |
77 | #ifdef CONFIG_MACH_SUN9I | |
78 | #define SDRAM_OFFSET(x) 0x2##x | |
79 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
80 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ | |
81 | #define CONFIG_SYS_TEXT_BASE 0x2a000000 | |
82 | #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 | |
83 | #define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000 | |
84 | #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 | |
85 | #else | |
86 | #define SDRAM_OFFSET(x) 0x4##x | |
cba69eee | 87 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
e049fe28 HG |
88 | #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ |
89 | #define CONFIG_SYS_TEXT_BASE 0x4a000000 | |
90 | #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 | |
91 | #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 | |
92 | #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 | |
93 | #endif | |
94 | ||
95 | #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ | |
96 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ | |
97 | ||
77fe9887 HG |
98 | #ifdef CONFIG_MACH_SUN9I |
99 | /* | |
100 | * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is | |
101 | * slightly bigger. Note that it is possible to map the first 32 KiB of the | |
102 | * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the | |
103 | * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and | |
104 | * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. | |
105 | */ | |
106 | #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 | |
107 | #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ | |
108 | #else | |
cba69eee IC |
109 | #define CONFIG_SYS_INIT_RAM_ADDR 0x0 |
110 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ | |
77fe9887 | 111 | #endif |
cba69eee IC |
112 | |
113 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
114 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
115 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
116 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
117 | ||
118 | #define CONFIG_NR_DRAM_BANKS 1 | |
119 | #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE | |
120 | #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ | |
121 | ||
a6e50a88 IC |
122 | #ifdef CONFIG_AHCI |
123 | #define CONFIG_LIBATA | |
124 | #define CONFIG_SCSI_AHCI | |
125 | #define CONFIG_SCSI_AHCI_PLAT | |
126 | #define CONFIG_SUNXI_AHCI | |
0751b138 | 127 | #define CONFIG_SYS_64BIT_LBA |
a6e50a88 IC |
128 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 |
129 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
130 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | |
131 | CONFIG_SYS_SCSI_MAX_LUN) | |
132 | #define CONFIG_CMD_SCSI | |
133 | #endif | |
134 | ||
cba69eee IC |
135 | #define CONFIG_SETUP_MEMORY_TAGS |
136 | #define CONFIG_CMDLINE_TAG | |
137 | #define CONFIG_INITRD_TAG | |
9f852211 | 138 | #define CONFIG_SERIAL_TAG |
cba69eee | 139 | |
960caeba PZ |
140 | #if defined(CONFIG_SPL_NAND_SUNXI) |
141 | #define CONFIG_SPL_NAND_DRIVERS | |
142 | #define CONFIG_SPL_NAND_SUPPORT | |
143 | ||
144 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 | |
145 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000 | |
146 | ||
147 | #endif | |
148 | ||
149 | ||
e24ea55c | 150 | /* mmc config */ |
ff2b47f6 | 151 | #if !defined(CONFIG_UART0_PORT_F) |
e24ea55c IC |
152 | #define CONFIG_MMC |
153 | #define CONFIG_GENERIC_MMC | |
154 | #define CONFIG_CMD_MMC | |
155 | #define CONFIG_MMC_SUNXI | |
156 | #define CONFIG_MMC_SUNXI_SLOT 0 | |
e24ea55c IC |
157 | #define CONFIG_ENV_IS_IN_MMC |
158 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ | |
ff2b47f6 | 159 | #endif |
e24ea55c | 160 | |
cba69eee IC |
161 | /* 4MB of malloc() pool */ |
162 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) | |
163 | ||
164 | /* | |
165 | * Miscellaneous configurable options | |
166 | */ | |
06beadb0 IC |
167 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
168 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ | |
cba69eee IC |
169 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
170 | #define CONFIG_SYS_GENERIC_BOARD | |
171 | ||
172 | /* Boot Argument Buffer Size */ | |
173 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
174 | ||
cba69eee | 175 | /* standalone support */ |
e049fe28 | 176 | #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR |
cba69eee | 177 | |
cba69eee IC |
178 | /* baudrate */ |
179 | #define CONFIG_BAUDRATE 115200 | |
180 | ||
181 | /* The stack sizes are set up in start.S using the settings below */ | |
182 | #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ | |
183 | ||
184 | /* FLASH and environment organization */ | |
185 | ||
186 | #define CONFIG_SYS_NO_FLASH | |
187 | ||
188 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ | |
189 | #define CONFIG_IDENT_STRING " Allwinner Technology" | |
190 | ||
e24ea55c | 191 | #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ |
cba69eee IC |
192 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
193 | ||
cba69eee IC |
194 | #define CONFIG_FAT_WRITE /* enable write access */ |
195 | ||
196 | #define CONFIG_SPL_FRAMEWORK | |
197 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
198 | #define CONFIG_SPL_SERIAL_SUPPORT | |
199 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
200 | ||
942cb0b6 SG |
201 | #define CONFIG_SPL_BOARD_LOAD_IMAGE |
202 | ||
50827a59 IC |
203 | #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ |
204 | #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ | |
205 | ||
206 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
f0ce28e9 SS |
207 | |
208 | #if !defined(CONFIG_UART0_PORT_F) | |
50827a59 | 209 | #define CONFIG_SPL_MMC_SUPPORT |
f0ce28e9 | 210 | #endif |
50827a59 IC |
211 | |
212 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" | |
213 | ||
214 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ | |
215 | #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ | |
216 | ||
cba69eee IC |
217 | /* end of 32 KiB in sram */ |
218 | #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ | |
219 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK | |
cba69eee | 220 | |
6620377e | 221 | /* I2C */ |
ad40610b | 222 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER |
6620377e | 223 | #define CONFIG_SPL_I2C_SUPPORT |
ad40610b HG |
224 | #endif |
225 | ||
6c739c5d PK |
226 | #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ |
227 | defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ | |
228 | defined CONFIG_I2C4_ENABLE | |
8b2db32a | 229 | #define CONFIG_SYS_I2C |
6620377e HG |
230 | #define CONFIG_SYS_I2C_MVTWSI |
231 | #define CONFIG_SYS_I2C_SPEED 400000 | |
232 | #define CONFIG_SYS_I2C_SLAVE 0x7f | |
8b2db32a HG |
233 | #define CONFIG_CMD_I2C |
234 | #endif | |
55410089 HG |
235 | |
236 | #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) | |
237 | #define CONFIG_SYS_I2C_SOFT | |
238 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 | |
239 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 | |
55410089 HG |
240 | /* We use pin names in Kconfig and sunxi_name_to_gpio() */ |
241 | #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda | |
242 | #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl | |
243 | #ifndef __ASSEMBLY__ | |
244 | extern int soft_i2c_gpio_sda; | |
245 | extern int soft_i2c_gpio_scl; | |
246 | #endif | |
1fc42018 HG |
247 | #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ |
248 | #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ | |
249 | #else | |
250 | #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ | |
251 | #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ | |
55410089 HG |
252 | #endif |
253 | ||
14bc66bd HN |
254 | /* PMU */ |
255 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER | |
256 | #define CONFIG_SPL_POWER_SUPPORT | |
257 | #endif | |
258 | ||
f84269c5 | 259 | #ifndef CONFIG_CONS_INDEX |
cba69eee | 260 | #define CONFIG_CONS_INDEX 1 /* UART0 */ |
f84269c5 | 261 | #endif |
cba69eee | 262 | |
a5da3c83 | 263 | #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE |
f3133962 HG |
264 | #if CONFIG_CONS_INDEX == 1 |
265 | #ifdef CONFIG_MACH_SUN9I | |
266 | #define OF_STDOUT_PATH "/soc/serial@07000000:115200" | |
267 | #else | |
268 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" | |
269 | #endif | |
270 | #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) | |
271 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" | |
5cd83b11 LI |
272 | #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) |
273 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" | |
f3133962 HG |
274 | #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) |
275 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" | |
276 | #else | |
277 | #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. | |
278 | #endif | |
a5da3c83 | 279 | #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ |
f3133962 | 280 | |
abce2c62 IC |
281 | /* GPIO */ |
282 | #define CONFIG_SUNXI_GPIO | |
cd82113a | 283 | #define CONFIG_SPL_GPIO_SUPPORT |
abce2c62 IC |
284 | #define CONFIG_CMD_GPIO |
285 | ||
7f2c521f LV |
286 | #ifdef CONFIG_VIDEO |
287 | /* | |
5633a296 HG |
288 | * The amount of RAM to keep free at the top of RAM when relocating u-boot, |
289 | * to use as framebuffer. This must be a multiple of 4096. | |
7f2c521f | 290 | */ |
c1cfd519 HG |
291 | #ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804 |
292 | #define CONFIG_SUNXI_MAX_FB_SIZE (12 << 20) | |
293 | #else | |
5633a296 | 294 | #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) |
c1cfd519 | 295 | #endif |
7f2c521f | 296 | |
2d7a084b LV |
297 | /* Do we want to initialize a simple FB? */ |
298 | #define CONFIG_VIDEO_DT_SIMPLEFB | |
299 | ||
7f2c521f LV |
300 | #define CONFIG_VIDEO_SUNXI |
301 | ||
302 | #define CONFIG_CFB_CONSOLE | |
303 | #define CONFIG_VIDEO_SW_CURSOR | |
304 | #define CONFIG_VIDEO_LOGO | |
be8ec633 | 305 | #define CONFIG_VIDEO_STD_TIMINGS |
75481607 | 306 | #define CONFIG_I2C_EDID |
58332f89 | 307 | #define VIDEO_LINE_LEN (pGD->plnSizeX) |
7f2c521f LV |
308 | |
309 | /* allow both serial and cfb console. */ | |
310 | #define CONFIG_CONSOLE_MUX | |
311 | /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ | |
312 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
313 | ||
2d7a084b LV |
314 | /* To be able to hook simplefb into dt */ |
315 | #ifdef CONFIG_VIDEO_DT_SIMPLEFB | |
316 | #define CONFIG_OF_BOARD_SETUP | |
317 | #endif | |
318 | ||
7f2c521f LV |
319 | #endif /* CONFIG_VIDEO */ |
320 | ||
c26fb9db HG |
321 | /* Ethernet support */ |
322 | #ifdef CONFIG_SUNXI_EMAC | |
8145dea4 | 323 | #define CONFIG_PHY_ADDR 1 |
c26fb9db | 324 | #define CONFIG_MII /* MII PHY management */ |
8145dea4 | 325 | #define CONFIG_PHYLIB |
c26fb9db HG |
326 | #endif |
327 | ||
5835823d | 328 | #ifdef CONFIG_SUNXI_GMAC |
5835823d IC |
329 | #define CONFIG_DW_AUTONEG |
330 | #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ | |
331 | #define CONFIG_PHY_ADDR 1 | |
332 | #define CONFIG_MII /* MII PHY management */ | |
333 | #define CONFIG_PHYLIB | |
334 | #endif | |
335 | ||
2582ca0d | 336 | #ifdef CONFIG_USB_EHCI_HCD |
6a72e804 HG |
337 | #define CONFIG_USB_OHCI_NEW |
338 | #define CONFIG_USB_OHCI_SUNXI | |
339 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 | |
3584f30c | 340 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 |
1a800f7a HG |
341 | #endif |
342 | ||
343 | #ifdef CONFIG_USB_MUSB_SUNXI | |
95de1e2f | 344 | #define CONFIG_USB_MUSB_PIO_ONLY |
1a800f7a HG |
345 | #endif |
346 | ||
b21144eb PK |
347 | #ifdef CONFIG_USB_MUSB_GADGET |
348 | #define CONFIG_USB_GADGET | |
349 | #define CONFIG_USB_GADGET_DUALSPEED | |
350 | #define CONFIG_USB_GADGET_VBUS_DRAW 0 | |
351 | ||
352 | #define CONFIG_USB_GADGET_DOWNLOAD | |
353 | #define CONFIG_USB_FUNCTION_FASTBOOT | |
354 | #define CONFIG_USB_FUNCTION_MASS_STORAGE | |
355 | #endif | |
356 | ||
357 | #ifdef CONFIG_USB_GADGET_DOWNLOAD | |
358 | #define CONFIG_G_DNL_VENDOR_NUM 0x1f3a | |
359 | #define CONFIG_G_DNL_PRODUCT_NUM 0x1010 | |
360 | #define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology" | |
361 | #endif | |
362 | ||
363 | #ifdef CONFIG_USB_FUNCTION_FASTBOOT | |
364 | #define CONFIG_CMD_FASTBOOT | |
365 | #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR | |
366 | #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 | |
367 | ||
368 | #define CONFIG_FASTBOOT_FLASH | |
369 | #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 | |
370 | #define CONFIG_EFI_PARTITION | |
371 | #endif | |
372 | ||
373 | #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE | |
374 | #define CONFIG_CMD_USB_MASS_STORAGE | |
375 | #endif | |
376 | ||
86b49093 HG |
377 | #ifdef CONFIG_USB_KEYBOARD |
378 | #define CONFIG_CONSOLE_MUX | |
379 | #define CONFIG_PREBOOT | |
380 | #define CONFIG_SYS_STDIO_DEREGISTER | |
eab9433a | 381 | #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE |
86b49093 HG |
382 | #endif |
383 | ||
cba69eee IC |
384 | #if !defined CONFIG_ENV_IS_IN_MMC && \ |
385 | !defined CONFIG_ENV_IS_IN_NAND && \ | |
386 | !defined CONFIG_ENV_IS_IN_FAT && \ | |
387 | !defined CONFIG_ENV_IS_IN_SPI_FLASH | |
388 | #define CONFIG_ENV_IS_NOWHERE | |
389 | #endif | |
390 | ||
b41d7d05 | 391 | #define CONFIG_MISC_INIT_R |
7f2c521f | 392 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
b41d7d05 | 393 | |
cba69eee IC |
394 | #ifndef CONFIG_SPL_BUILD |
395 | #include <config_distro_defaults.h> | |
2ec3a612 | 396 | |
a7925078 SS |
397 | /* Enable pre-console buffer to get complete log on the VGA console */ |
398 | #define CONFIG_PRE_CONSOLE_BUFFER | |
a8552c7c | 399 | #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ |
a7925078 | 400 | |
8c95c556 HG |
401 | /* |
402 | * 240M RAM (256M minimum minus space for the framebuffer), | |
403 | * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, | |
404 | * 1M script, 1M pxe and the ramdisk at the end. | |
405 | */ | |
846e3254 | 406 | #define MEM_LAYOUT_ENV_SETTINGS \ |
8c95c556 | 407 | "bootm_size=0xf000000\0" \ |
e049fe28 HG |
408 | "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ |
409 | "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ | |
410 | "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ | |
411 | "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ | |
412 | "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" | |
846e3254 | 413 | |
41f8e9f5 CYT |
414 | #ifdef CONFIG_MMC |
415 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) | |
416 | #else | |
417 | #define BOOT_TARGET_DEVICES_MMC(func) | |
418 | #endif | |
419 | ||
2ec3a612 HG |
420 | #ifdef CONFIG_AHCI |
421 | #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) | |
422 | #else | |
423 | #define BOOT_TARGET_DEVICES_SCSI(func) | |
424 | #endif | |
425 | ||
2582ca0d | 426 | #ifdef CONFIG_USB_STORAGE |
859b3f14 CYT |
427 | #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) |
428 | #else | |
429 | #define BOOT_TARGET_DEVICES_USB(func) | |
430 | #endif | |
431 | ||
2ec3a612 | 432 | #define BOOT_TARGET_DEVICES(func) \ |
41f8e9f5 | 433 | BOOT_TARGET_DEVICES_MMC(func) \ |
2ec3a612 | 434 | BOOT_TARGET_DEVICES_SCSI(func) \ |
859b3f14 | 435 | BOOT_TARGET_DEVICES_USB(func) \ |
2ec3a612 HG |
436 | func(PXE, pxe, na) \ |
437 | func(DHCP, dhcp, na) | |
438 | ||
439 | #include <config_distro_bootcmd.h> | |
440 | ||
86b49093 HG |
441 | #ifdef CONFIG_USB_KEYBOARD |
442 | #define CONSOLE_STDIN_SETTINGS \ | |
443 | "preboot=usb start\0" \ | |
444 | "stdin=serial,usbkbd\0" | |
445 | #else | |
7f2c521f LV |
446 | #define CONSOLE_STDIN_SETTINGS \ |
447 | "stdin=serial\0" | |
86b49093 | 448 | #endif |
7f2c521f LV |
449 | |
450 | #ifdef CONFIG_VIDEO | |
451 | #define CONSOLE_STDOUT_SETTINGS \ | |
452 | "stdout=serial,vga\0" \ | |
453 | "stderr=serial,vga\0" | |
454 | #else | |
455 | #define CONSOLE_STDOUT_SETTINGS \ | |
456 | "stdout=serial\0" \ | |
457 | "stderr=serial\0" | |
458 | #endif | |
459 | ||
460 | #define CONSOLE_ENV_SETTINGS \ | |
461 | CONSOLE_STDIN_SETTINGS \ | |
462 | CONSOLE_STDOUT_SETTINGS | |
463 | ||
2ec3a612 | 464 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
7f2c521f | 465 | CONSOLE_ENV_SETTINGS \ |
846e3254 | 466 | MEM_LAYOUT_ENV_SETTINGS \ |
25acd33f | 467 | "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
846e3254 | 468 | "console=ttyS0,115200\0" \ |
2ec3a612 HG |
469 | BOOTENV |
470 | ||
471 | #else /* ifndef CONFIG_SPL_BUILD */ | |
472 | #define CONFIG_EXTRA_ENV_SETTINGS | |
cba69eee IC |
473 | #endif |
474 | ||
475 | #endif /* _SUNXI_COMMON_CONFIG_H */ |