]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/sunxi-common.h
sunxi: DRAM: fix H3 DRAM size display on aarch64
[people/ms/u-boot.git] / include / configs / sunxi-common.h
CommitLineData
cba69eee
IC
1/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
daf6d399 16#include <asm/arch/cpu.h>
e049fe28
HG
17#include <linux/stringify.h>
18
77ef1369
SS
19#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20/*
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
23 * be used.
24 */
25# define CONFIG_MACH_TYPE_COMPAT_REV 0
26#else
27/*
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
31 */
32# define CONFIG_MACH_TYPE_COMPAT_REV 1
33#endif
34
cba69eee
IC
35/*
36 * High Level Configuration Options
37 */
ebda0cc5 38#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
50827a59
IC
39#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
40#endif
cba69eee 41
cba69eee 42/* Serial & console */
cba69eee
IC
43#define CONFIG_SYS_NS16550_SERIAL
44/* ns16550 reg in the low bits of cpu reg */
cba69eee 45#define CONFIG_SYS_NS16550_CLK 24000000
4fb60552 46#ifndef CONFIG_DM_SERIAL
1a81cf83
SG
47# define CONFIG_SYS_NS16550_REG_SIZE -4
48# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
49# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
50# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
51# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
52# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
53#endif
cba69eee 54
8a65f69c 55/* CPU */
d96ebc46 56#define CONFIG_TIMER_CLK_FREQ 24000000
8a65f69c 57
e049fe28
HG
58/*
59 * The DRAM Base differs between some models. We cannot use macros for the
60 * CONFIG_FOO defines which contain the DRAM base address since they end
61 * up unexpanded in include/autoconf.mk .
62 *
63 * So we have to have this #ifdef #else #endif block for these.
64 */
65#ifdef CONFIG_MACH_SUN9I
66#define SDRAM_OFFSET(x) 0x2##x
67#define CONFIG_SYS_SDRAM_BASE 0x20000000
68#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
69#define CONFIG_SYS_TEXT_BASE 0x2a000000
ff42d107
HG
70/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
71 * since it needs to fit in with the other values. By also #defining it
72 * we get warnings if the Kconfig value mismatches. */
73#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
e049fe28
HG
74#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
75#else
76#define SDRAM_OFFSET(x) 0x4##x
cba69eee 77#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28
HG
78#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
79#define CONFIG_SYS_TEXT_BASE 0x4a000000
ff42d107
HG
80/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
81 * since it needs to fit in with the other values. By also #defining it
82 * we get warnings if the Kconfig value mismatches. */
83#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
e049fe28
HG
84#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
85#endif
86
87#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
e049fe28 88
d96ebc46 89#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
77fe9887
HG
90/*
91 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
92 * slightly bigger. Note that it is possible to map the first 32 KiB of the
93 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
94 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
95 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
96 */
97#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
eb504fa1 98#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
77fe9887 99#else
cba69eee
IC
100#define CONFIG_SYS_INIT_RAM_ADDR 0x0
101#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887 102#endif
cba69eee
IC
103
104#define CONFIG_SYS_INIT_SP_OFFSET \
105 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
106#define CONFIG_SYS_INIT_SP_ADDR \
107 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
108
109#define CONFIG_NR_DRAM_BANKS 1
110#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
111#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
112
a6e50a88
IC
113#ifdef CONFIG_AHCI
114#define CONFIG_LIBATA
115#define CONFIG_SCSI_AHCI
116#define CONFIG_SCSI_AHCI_PLAT
117#define CONFIG_SUNXI_AHCI
0751b138 118#define CONFIG_SYS_64BIT_LBA
a6e50a88
IC
119#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
120#define CONFIG_SYS_SCSI_MAX_LUN 1
121#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
122 CONFIG_SYS_SCSI_MAX_LUN)
c649e3c9 123#define CONFIG_SCSI
a6e50a88
IC
124#endif
125
cba69eee
IC
126#define CONFIG_SETUP_MEMORY_TAGS
127#define CONFIG_CMDLINE_TAG
128#define CONFIG_INITRD_TAG
9f852211 129#define CONFIG_SERIAL_TAG
cba69eee 130
e5268616 131#ifdef CONFIG_NAND_SUNXI
a0dfa88b 132#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
4ccae81c
BB
133#define CONFIG_SYS_NAND_ONFI_DETECTION
134#define CONFIG_SYS_MAX_NAND_DEVICE 8
960caeba
PZ
135#endif
136
19e99fb4 137#ifdef CONFIG_SPL_SPI_SUNXI
19e99fb4
SS
138#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
139#endif
140
e24ea55c 141/* mmc config */
44c79879 142#ifdef CONFIG_MMC
e24ea55c 143#define CONFIG_GENERIC_MMC
e24ea55c
IC
144#define CONFIG_MMC_SUNXI
145#define CONFIG_MMC_SUNXI_SLOT 0
e24ea55c
IC
146#define CONFIG_ENV_IS_IN_MMC
147#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ae042beb 148#define CONFIG_SYS_MMC_MAX_DEVICE 4
ff2b47f6 149#endif
e24ea55c 150
5c965ed9
HG
151/* 64MB of malloc() pool */
152#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
cba69eee
IC
153
154/*
155 * Miscellaneous configurable options
156 */
06beadb0
IC
157#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
158#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee 159#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
cba69eee
IC
160
161/* Boot Argument Buffer Size */
162#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
163
cba69eee 164/* standalone support */
e049fe28 165#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee 166
cba69eee
IC
167/* baudrate */
168#define CONFIG_BAUDRATE 115200
169
170/* The stack sizes are set up in start.S using the settings below */
171#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
172
173/* FLASH and environment organization */
174
175#define CONFIG_SYS_NO_FLASH
176
fa5e1020 177#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee 178
e24ea55c 179#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
cba69eee
IC
180#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
181
cba69eee
IC
182#define CONFIG_FAT_WRITE /* enable write access */
183
184#define CONFIG_SPL_FRAMEWORK
cba69eee 185
942cb0b6
SG
186#define CONFIG_SPL_BOARD_LOAD_IMAGE
187
d96ebc46 188#if defined(CONFIG_MACH_SUN9I)
b19236fd
SS
189#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
190#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */
d96ebc46 191#elif defined(CONFIG_MACH_SUN50I)
b19236fd
SS
192#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
193#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */
d96ebc46 194#else
b19236fd
SS
195#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
196#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
d96ebc46 197#endif
50827a59 198
d96ebc46 199#ifndef CONFIG_ARM64
50827a59 200#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
d96ebc46 201#endif
50827a59 202
50827a59
IC
203#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
204
d96ebc46 205#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
eb504fa1
AP
206/* FIXME: 40 KiB instead of 32 KiB ? */
207#define LOW_LEVEL_SRAM_STACK 0x00018000
d96ebc46
SS
208#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
209#else
cba69eee
IC
210/* end of 32 KiB in sram */
211#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
212#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
d96ebc46 213#endif
cba69eee 214
6620377e 215/* I2C */
0d8382ae
JW
216#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
217 defined CONFIG_SY8106A_POWER
ad40610b
HG
218#endif
219
6c739c5d
PK
220#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
221 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
9d082687 222 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
8b2db32a 223#define CONFIG_SYS_I2C
6620377e
HG
224#define CONFIG_SYS_I2C_MVTWSI
225#define CONFIG_SYS_I2C_SPEED 400000
226#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a 227#endif
55410089
HG
228
229#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
230#define CONFIG_SYS_I2C_SOFT
231#define CONFIG_SYS_I2C_SOFT_SPEED 50000
232#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089
HG
233/* We use pin names in Kconfig and sunxi_name_to_gpio() */
234#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
235#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
236#ifndef __ASSEMBLY__
237extern int soft_i2c_gpio_sda;
238extern int soft_i2c_gpio_scl;
239#endif
1fc42018
HG
240#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
241#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
242#else
243#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
244#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089
HG
245#endif
246
14bc66bd 247/* PMU */
95ab8fee 248#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
0d8382ae
JW
249 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
250 defined CONFIG_SY8106A_POWER
14bc66bd
HN
251#endif
252
f84269c5 253#ifndef CONFIG_CONS_INDEX
cba69eee 254#define CONFIG_CONS_INDEX 1 /* UART0 */
f84269c5 255#endif
cba69eee 256
a5da3c83 257#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962
HG
258#if CONFIG_CONS_INDEX == 1
259#ifdef CONFIG_MACH_SUN9I
260#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
261#else
262#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
263#endif
264#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
265#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11
LI
266#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
267#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962
HG
268#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
269#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
270#else
271#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
272#endif
a5da3c83 273#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962 274
abce2c62
IC
275/* GPIO */
276#define CONFIG_SUNXI_GPIO
abce2c62 277
7f2c521f
LV
278#ifdef CONFIG_VIDEO
279/*
5633a296
HG
280 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
281 * to use as framebuffer. This must be a multiple of 4096.
7f2c521f 282 */
5c965ed9 283#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
7f2c521f 284
2d7a084b
LV
285/* Do we want to initialize a simple FB? */
286#define CONFIG_VIDEO_DT_SIMPLEFB
287
7f2c521f
LV
288#define CONFIG_VIDEO_SUNXI
289
7f2c521f 290#define CONFIG_VIDEO_LOGO
be8ec633 291#define CONFIG_VIDEO_STD_TIMINGS
75481607 292#define CONFIG_I2C_EDID
58332f89 293#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f
LV
294
295/* allow both serial and cfb console. */
7f2c521f 296/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
7f2c521f 297
7f2c521f
LV
298#endif /* CONFIG_VIDEO */
299
c26fb9db
HG
300/* Ethernet support */
301#ifdef CONFIG_SUNXI_EMAC
8145dea4 302#define CONFIG_PHY_ADDR 1
c26fb9db 303#define CONFIG_MII /* MII PHY management */
8145dea4 304#define CONFIG_PHYLIB
c26fb9db
HG
305#endif
306
5835823d 307#ifdef CONFIG_SUNXI_GMAC
5835823d
IC
308#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
309#define CONFIG_PHY_ADDR 1
310#define CONFIG_MII /* MII PHY management */
1eae8f66 311#define CONFIG_PHY_REALTEK
5835823d
IC
312#endif
313
2582ca0d 314#ifdef CONFIG_USB_EHCI_HCD
6a72e804
HG
315#define CONFIG_USB_OHCI_NEW
316#define CONFIG_USB_OHCI_SUNXI
317#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3584f30c 318#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
1a800f7a
HG
319#endif
320
321#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f 322#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a
HG
323#endif
324
b21144eb 325#ifdef CONFIG_USB_MUSB_GADGET
aaa4a9e3
SP
326#define CONFIG_USB_FUNCTION_FASTBOOT
327#define CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
PK
328#endif
329
330#ifdef CONFIG_USB_FUNCTION_FASTBOOT
331#define CONFIG_CMD_FASTBOOT
332#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
333#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
bac83fb0 334#define CONFIG_ANDROID_BOOT_IMAGE
b21144eb
PK
335
336#define CONFIG_FASTBOOT_FLASH
44c79879
MR
337
338#ifdef CONFIG_MMC
b21144eb
PK
339#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
340#define CONFIG_EFI_PARTITION
341#endif
44c79879 342#endif
b21144eb
PK
343
344#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
PK
345#endif
346
86b49093 347#ifdef CONFIG_USB_KEYBOARD
86b49093 348#define CONFIG_PREBOOT
eab9433a 349#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093
HG
350#endif
351
cba69eee
IC
352#if !defined CONFIG_ENV_IS_IN_MMC && \
353 !defined CONFIG_ENV_IS_IN_NAND && \
354 !defined CONFIG_ENV_IS_IN_FAT && \
355 !defined CONFIG_ENV_IS_IN_SPI_FLASH
356#define CONFIG_ENV_IS_NOWHERE
357#endif
358
b41d7d05
JL
359#define CONFIG_MISC_INIT_R
360
cba69eee
IC
361#ifndef CONFIG_SPL_BUILD
362#include <config_distro_defaults.h>
2ec3a612 363
671f9ad8
AP
364#ifdef CONFIG_ARM64
365/*
366 * Boards seem to come with at least 512MB of DRAM.
367 * The kernel should go at 512K, which is the default text offset (that will
368 * be adjusted at runtime if needed).
369 * There is no compression for arm64 kernels (yet), so leave some space
370 * for really big kernels, say 256MB for now.
371 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
372 * Align the initrd to a 2MB page.
373 */
374#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
375#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
376#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
377#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
378#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
379
380#else
8c95c556 381/*
5c965ed9 382 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
8c95c556
HG
383 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
384 * 1M script, 1M pxe and the ramdisk at the end.
385 */
2a909c5f
SS
386
387#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
388#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
389#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
390#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
391#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
671f9ad8 392#endif
2a909c5f 393
846e3254 394#define MEM_LAYOUT_ENV_SETTINGS \
5c965ed9 395 "bootm_size=0xa000000\0" \
2a909c5f
SS
396 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
397 "fdt_addr_r=" FDT_ADDR_R "\0" \
398 "scriptaddr=" SCRIPT_ADDR_R "\0" \
399 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
400 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
401
402#define DFU_ALT_INFO_RAM \
403 "dfu_alt_info_ram=" \
404 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
405 "fdt ram " FDT_ADDR_R " 0x100000;" \
406 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
846e3254 407
41f8e9f5
CYT
408#ifdef CONFIG_MMC
409#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
5a37a400
KM
410#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
411#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
412#else
413#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
414#endif
41f8e9f5
CYT
415#else
416#define BOOT_TARGET_DEVICES_MMC(func)
5a37a400 417#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
41f8e9f5
CYT
418#endif
419
2ec3a612
HG
420#ifdef CONFIG_AHCI
421#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
422#else
423#define BOOT_TARGET_DEVICES_SCSI(func)
424#endif
425
2582ca0d 426#ifdef CONFIG_USB_STORAGE
859b3f14
CYT
427#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
428#else
429#define BOOT_TARGET_DEVICES_USB(func)
430#endif
431
f3b589c0
BN
432/* FEL boot support, auto-execute boot.scr if a script address was provided */
433#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
434 "bootcmd_fel=" \
435 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
436 "echo '(FEL boot)'; " \
437 "source ${fel_scriptaddr}; " \
438 "fi\0"
439#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
440 "fel "
441
2ec3a612 442#define BOOT_TARGET_DEVICES(func) \
f3b589c0 443 func(FEL, fel, na) \
41f8e9f5 444 BOOT_TARGET_DEVICES_MMC(func) \
5a37a400 445 BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
2ec3a612 446 BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14 447 BOOT_TARGET_DEVICES_USB(func) \
2ec3a612
HG
448 func(PXE, pxe, na) \
449 func(DHCP, dhcp, na)
450
3b824025
HG
451#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
452#define BOOTCMD_SUNXI_COMPAT \
453 "bootcmd_sunxi_compat=" \
454 "setenv root /dev/mmcblk0p3 rootwait; " \
455 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
456 "echo Loaded environment from uEnv.txt; " \
457 "env import -t 0x44000000 ${filesize}; " \
458 "fi; " \
459 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
460 "ext2load mmc 0 0x43000000 script.bin && " \
461 "ext2load mmc 0 0x48000000 uImage && " \
462 "bootm 0x48000000\0"
463#else
464#define BOOTCMD_SUNXI_COMPAT
465#endif
466
2ec3a612
HG
467#include <config_distro_bootcmd.h>
468
86b49093
HG
469#ifdef CONFIG_USB_KEYBOARD
470#define CONSOLE_STDIN_SETTINGS \
471 "preboot=usb start\0" \
472 "stdin=serial,usbkbd\0"
473#else
7f2c521f
LV
474#define CONSOLE_STDIN_SETTINGS \
475 "stdin=serial\0"
86b49093 476#endif
7f2c521f
LV
477
478#ifdef CONFIG_VIDEO
479#define CONSOLE_STDOUT_SETTINGS \
480 "stdout=serial,vga\0" \
481 "stderr=serial,vga\0"
482#else
483#define CONSOLE_STDOUT_SETTINGS \
484 "stdout=serial\0" \
485 "stderr=serial\0"
486#endif
487
488#define CONSOLE_ENV_SETTINGS \
489 CONSOLE_STDIN_SETTINGS \
490 CONSOLE_STDOUT_SETTINGS
491
2ec3a612 492#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f 493 CONSOLE_ENV_SETTINGS \
846e3254 494 MEM_LAYOUT_ENV_SETTINGS \
2a909c5f 495 DFU_ALT_INFO_RAM \
25acd33f 496 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
846e3254 497 "console=ttyS0,115200\0" \
3b824025 498 BOOTCMD_SUNXI_COMPAT \
2ec3a612
HG
499 BOOTENV
500
501#else /* ifndef CONFIG_SPL_BUILD */
502#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee
IC
503#endif
504
505#endif /* _SUNXI_COMMON_CONFIG_H */