]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/sunxi-common.h
Revert "armv8: Enable CPUECTLR.SMPEN for coherency"
[people/ms/u-boot.git] / include / configs / sunxi-common.h
CommitLineData
cba69eee
IC
1/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
daf6d399 16#include <asm/arch/cpu.h>
e049fe28
HG
17#include <linux/stringify.h>
18
77ef1369
SS
19#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20/*
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
23 * be used.
24 */
25# define CONFIG_MACH_TYPE_COMPAT_REV 0
26#else
27/*
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
31 */
32# define CONFIG_MACH_TYPE_COMPAT_REV 1
33#endif
34
cba69eee
IC
35/*
36 * High Level Configuration Options
37 */
38#define CONFIG_SUNXI /* sunxi family */
50827a59 39#ifdef CONFIG_SPL_BUILD
50827a59
IC
40#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
41#endif
cba69eee 42
cba69eee 43/* Serial & console */
cba69eee
IC
44#define CONFIG_SYS_NS16550_SERIAL
45/* ns16550 reg in the low bits of cpu reg */
cba69eee 46#define CONFIG_SYS_NS16550_CLK 24000000
4fb60552 47#ifndef CONFIG_DM_SERIAL
1a81cf83
SG
48# define CONFIG_SYS_NS16550_REG_SIZE -4
49# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
50# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
51# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
52# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
53# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
54#endif
cba69eee 55
8a65f69c 56/* CPU */
daf6d399 57#define CONFIG_DISPLAY_CPUINFO
8a65f69c 58#define CONFIG_SYS_CACHELINE_SIZE 64
d96ebc46 59#define CONFIG_TIMER_CLK_FREQ 24000000
8a65f69c 60
e049fe28
HG
61/*
62 * The DRAM Base differs between some models. We cannot use macros for the
63 * CONFIG_FOO defines which contain the DRAM base address since they end
64 * up unexpanded in include/autoconf.mk .
65 *
66 * So we have to have this #ifdef #else #endif block for these.
67 */
68#ifdef CONFIG_MACH_SUN9I
69#define SDRAM_OFFSET(x) 0x2##x
70#define CONFIG_SYS_SDRAM_BASE 0x20000000
71#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
72#define CONFIG_SYS_TEXT_BASE 0x2a000000
73#define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
ff42d107
HG
74/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
75 * since it needs to fit in with the other values. By also #defining it
76 * we get warnings if the Kconfig value mismatches. */
77#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
e049fe28
HG
78#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
79#else
80#define SDRAM_OFFSET(x) 0x4##x
cba69eee 81#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28
HG
82#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
83#define CONFIG_SYS_TEXT_BASE 0x4a000000
84#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
ff42d107
HG
85/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
86 * since it needs to fit in with the other values. By also #defining it
87 * we get warnings if the Kconfig value mismatches. */
88#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
e049fe28
HG
89#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
90#endif
91
92#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
e049fe28 93
d96ebc46 94#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
77fe9887
HG
95/*
96 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
97 * slightly bigger. Note that it is possible to map the first 32 KiB of the
98 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
99 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
100 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
101 */
102#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
1a83fb4a 103#define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */
77fe9887 104#else
cba69eee
IC
105#define CONFIG_SYS_INIT_RAM_ADDR 0x0
106#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887 107#endif
cba69eee
IC
108
109#define CONFIG_SYS_INIT_SP_OFFSET \
110 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
111#define CONFIG_SYS_INIT_SP_ADDR \
112 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
113
114#define CONFIG_NR_DRAM_BANKS 1
115#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
116#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
117
a6e50a88
IC
118#ifdef CONFIG_AHCI
119#define CONFIG_LIBATA
120#define CONFIG_SCSI_AHCI
121#define CONFIG_SCSI_AHCI_PLAT
122#define CONFIG_SUNXI_AHCI
0751b138 123#define CONFIG_SYS_64BIT_LBA
a6e50a88
IC
124#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
125#define CONFIG_SYS_SCSI_MAX_LUN 1
126#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
127 CONFIG_SYS_SCSI_MAX_LUN)
c649e3c9 128#define CONFIG_SCSI
a6e50a88
IC
129#endif
130
cba69eee
IC
131#define CONFIG_SETUP_MEMORY_TAGS
132#define CONFIG_CMDLINE_TAG
133#define CONFIG_INITRD_TAG
9f852211 134#define CONFIG_SERIAL_TAG
cba69eee 135
e5268616 136#ifdef CONFIG_NAND_SUNXI
21d4d37a 137#define CONFIG_SPL_NAND_SUPPORT 1
960caeba
PZ
138#endif
139
e24ea55c 140/* mmc config */
44c79879 141#ifdef CONFIG_MMC
e24ea55c 142#define CONFIG_GENERIC_MMC
e24ea55c
IC
143#define CONFIG_MMC_SUNXI
144#define CONFIG_MMC_SUNXI_SLOT 0
e24ea55c
IC
145#define CONFIG_ENV_IS_IN_MMC
146#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ff2b47f6 147#endif
e24ea55c 148
5c965ed9
HG
149/* 64MB of malloc() pool */
150#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
cba69eee
IC
151
152/*
153 * Miscellaneous configurable options
154 */
06beadb0
IC
155#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
156#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee 157#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
cba69eee
IC
158
159/* Boot Argument Buffer Size */
160#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
161
cba69eee 162/* standalone support */
e049fe28 163#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee 164
cba69eee
IC
165/* baudrate */
166#define CONFIG_BAUDRATE 115200
167
168/* The stack sizes are set up in start.S using the settings below */
169#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
170
171/* FLASH and environment organization */
172
173#define CONFIG_SYS_NO_FLASH
174
fa5e1020 175#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee 176#define CONFIG_IDENT_STRING " Allwinner Technology"
2af25b74 177#define CONFIG_DISPLAY_BOARDINFO
cba69eee 178
e24ea55c 179#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
cba69eee
IC
180#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
181
cba69eee
IC
182#define CONFIG_FAT_WRITE /* enable write access */
183
184#define CONFIG_SPL_FRAMEWORK
185#define CONFIG_SPL_LIBCOMMON_SUPPORT
186#define CONFIG_SPL_SERIAL_SUPPORT
187#define CONFIG_SPL_LIBGENERIC_SUPPORT
188
942cb0b6
SG
189#define CONFIG_SPL_BOARD_LOAD_IMAGE
190
d96ebc46 191#if defined(CONFIG_MACH_SUN9I)
b19236fd
SS
192#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
193#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */
d96ebc46 194#elif defined(CONFIG_MACH_SUN50I)
b19236fd
SS
195#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
196#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */
d96ebc46 197#else
b19236fd
SS
198#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
199#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
d96ebc46 200#endif
50827a59
IC
201
202#define CONFIG_SPL_LIBDISK_SUPPORT
f0ce28e9 203
44c79879 204#ifdef CONFIG_MMC
50827a59 205#define CONFIG_SPL_MMC_SUPPORT
f0ce28e9 206#endif
50827a59 207
d96ebc46 208#ifndef CONFIG_ARM64
50827a59 209#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
d96ebc46 210#endif
50827a59
IC
211
212#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
213#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
214
d96ebc46 215#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
1a83fb4a 216#define LOW_LEVEL_SRAM_STACK 0x0001A000
d96ebc46
SS
217#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
218#else
cba69eee
IC
219/* end of 32 KiB in sram */
220#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
221#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
d96ebc46 222#endif
cba69eee 223
6620377e 224/* I2C */
0d8382ae
JW
225#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
226 defined CONFIG_SY8106A_POWER
6620377e 227#define CONFIG_SPL_I2C_SUPPORT
ad40610b
HG
228#endif
229
6c739c5d
PK
230#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
231 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
9d082687 232 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
8b2db32a 233#define CONFIG_SYS_I2C
6620377e
HG
234#define CONFIG_SYS_I2C_MVTWSI
235#define CONFIG_SYS_I2C_SPEED 400000
236#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a 237#endif
55410089
HG
238
239#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
240#define CONFIG_SYS_I2C_SOFT
241#define CONFIG_SYS_I2C_SOFT_SPEED 50000
242#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089
HG
243/* We use pin names in Kconfig and sunxi_name_to_gpio() */
244#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
245#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
246#ifndef __ASSEMBLY__
247extern int soft_i2c_gpio_sda;
248extern int soft_i2c_gpio_scl;
249#endif
1fc42018
HG
250#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
251#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
252#else
253#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
254#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089
HG
255#endif
256
14bc66bd 257/* PMU */
95ab8fee 258#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
0d8382ae
JW
259 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
260 defined CONFIG_SY8106A_POWER
14bc66bd
HN
261#define CONFIG_SPL_POWER_SUPPORT
262#endif
263
f84269c5 264#ifndef CONFIG_CONS_INDEX
cba69eee 265#define CONFIG_CONS_INDEX 1 /* UART0 */
f84269c5 266#endif
cba69eee 267
a5da3c83 268#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962
HG
269#if CONFIG_CONS_INDEX == 1
270#ifdef CONFIG_MACH_SUN9I
271#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
272#else
273#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
274#endif
275#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
276#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11
LI
277#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
278#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962
HG
279#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
280#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
281#else
282#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
283#endif
a5da3c83 284#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962 285
abce2c62
IC
286/* GPIO */
287#define CONFIG_SUNXI_GPIO
cd82113a 288#define CONFIG_SPL_GPIO_SUPPORT
abce2c62 289
7f2c521f
LV
290#ifdef CONFIG_VIDEO
291/*
5633a296
HG
292 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
293 * to use as framebuffer. This must be a multiple of 4096.
7f2c521f 294 */
5c965ed9 295#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
7f2c521f 296
2d7a084b
LV
297/* Do we want to initialize a simple FB? */
298#define CONFIG_VIDEO_DT_SIMPLEFB
299
7f2c521f
LV
300#define CONFIG_VIDEO_SUNXI
301
302#define CONFIG_CFB_CONSOLE
303#define CONFIG_VIDEO_SW_CURSOR
304#define CONFIG_VIDEO_LOGO
be8ec633 305#define CONFIG_VIDEO_STD_TIMINGS
75481607 306#define CONFIG_I2C_EDID
58332f89 307#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f
LV
308
309/* allow both serial and cfb console. */
310#define CONFIG_CONSOLE_MUX
311/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
312#define CONFIG_VGA_AS_SINGLE_DEVICE
313
7f2c521f
LV
314#endif /* CONFIG_VIDEO */
315
c26fb9db
HG
316/* Ethernet support */
317#ifdef CONFIG_SUNXI_EMAC
8145dea4 318#define CONFIG_PHY_ADDR 1
c26fb9db 319#define CONFIG_MII /* MII PHY management */
8145dea4 320#define CONFIG_PHYLIB
c26fb9db
HG
321#endif
322
5835823d 323#ifdef CONFIG_SUNXI_GMAC
5835823d
IC
324#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
325#define CONFIG_PHY_ADDR 1
326#define CONFIG_MII /* MII PHY management */
1eae8f66 327#define CONFIG_PHY_REALTEK
5835823d
IC
328#endif
329
2582ca0d 330#ifdef CONFIG_USB_EHCI_HCD
6a72e804
HG
331#define CONFIG_USB_OHCI_NEW
332#define CONFIG_USB_OHCI_SUNXI
333#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3584f30c 334#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
1a800f7a
HG
335#endif
336
337#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f 338#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a
HG
339#endif
340
b21144eb 341#ifdef CONFIG_USB_MUSB_GADGET
aaa4a9e3
SP
342#define CONFIG_USB_FUNCTION_DFU
343#define CONFIG_USB_FUNCTION_FASTBOOT
344#define CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
PK
345#endif
346
2a909c5f 347#ifdef CONFIG_USB_FUNCTION_DFU
2a909c5f
SS
348#define CONFIG_DFU_RAM
349#endif
350
b21144eb
PK
351#ifdef CONFIG_USB_FUNCTION_FASTBOOT
352#define CONFIG_CMD_FASTBOOT
353#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
354#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
bac83fb0 355#define CONFIG_ANDROID_BOOT_IMAGE
b21144eb
PK
356
357#define CONFIG_FASTBOOT_FLASH
44c79879
MR
358
359#ifdef CONFIG_MMC
b21144eb
PK
360#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
361#define CONFIG_EFI_PARTITION
362#endif
44c79879 363#endif
b21144eb
PK
364
365#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
PK
366#endif
367
86b49093
HG
368#ifdef CONFIG_USB_KEYBOARD
369#define CONFIG_CONSOLE_MUX
370#define CONFIG_PREBOOT
371#define CONFIG_SYS_STDIO_DEREGISTER
eab9433a 372#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093
HG
373#endif
374
cba69eee
IC
375#if !defined CONFIG_ENV_IS_IN_MMC && \
376 !defined CONFIG_ENV_IS_IN_NAND && \
377 !defined CONFIG_ENV_IS_IN_FAT && \
378 !defined CONFIG_ENV_IS_IN_SPI_FLASH
379#define CONFIG_ENV_IS_NOWHERE
380#endif
381
b41d7d05 382#define CONFIG_MISC_INIT_R
7f2c521f 383#define CONFIG_SYS_CONSOLE_IS_IN_ENV
b41d7d05 384
cba69eee
IC
385#ifndef CONFIG_SPL_BUILD
386#include <config_distro_defaults.h>
2ec3a612 387
a7925078
SS
388/* Enable pre-console buffer to get complete log on the VGA console */
389#define CONFIG_PRE_CONSOLE_BUFFER
a8552c7c 390#define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */
a7925078 391
671f9ad8
AP
392#ifdef CONFIG_ARM64
393/*
394 * Boards seem to come with at least 512MB of DRAM.
395 * The kernel should go at 512K, which is the default text offset (that will
396 * be adjusted at runtime if needed).
397 * There is no compression for arm64 kernels (yet), so leave some space
398 * for really big kernels, say 256MB for now.
399 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
400 * Align the initrd to a 2MB page.
401 */
402#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
403#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
404#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
405#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
406#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
407
408#else
8c95c556 409/*
5c965ed9 410 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
8c95c556
HG
411 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
412 * 1M script, 1M pxe and the ramdisk at the end.
413 */
2a909c5f
SS
414
415#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
416#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
417#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
418#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
419#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
671f9ad8 420#endif
2a909c5f 421
846e3254 422#define MEM_LAYOUT_ENV_SETTINGS \
5c965ed9 423 "bootm_size=0xa000000\0" \
2a909c5f
SS
424 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
425 "fdt_addr_r=" FDT_ADDR_R "\0" \
426 "scriptaddr=" SCRIPT_ADDR_R "\0" \
427 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
428 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
429
430#define DFU_ALT_INFO_RAM \
431 "dfu_alt_info_ram=" \
432 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
433 "fdt ram " FDT_ADDR_R " 0x100000;" \
434 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
846e3254 435
41f8e9f5
CYT
436#ifdef CONFIG_MMC
437#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
5a37a400
KM
438#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
439#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
440#else
441#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
442#endif
41f8e9f5
CYT
443#else
444#define BOOT_TARGET_DEVICES_MMC(func)
5a37a400 445#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
41f8e9f5
CYT
446#endif
447
2ec3a612
HG
448#ifdef CONFIG_AHCI
449#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
450#else
451#define BOOT_TARGET_DEVICES_SCSI(func)
452#endif
453
2582ca0d 454#ifdef CONFIG_USB_STORAGE
859b3f14
CYT
455#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
456#else
457#define BOOT_TARGET_DEVICES_USB(func)
458#endif
459
f3b589c0
BN
460/* FEL boot support, auto-execute boot.scr if a script address was provided */
461#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
462 "bootcmd_fel=" \
463 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
464 "echo '(FEL boot)'; " \
465 "source ${fel_scriptaddr}; " \
466 "fi\0"
467#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
468 "fel "
469
2ec3a612 470#define BOOT_TARGET_DEVICES(func) \
f3b589c0 471 func(FEL, fel, na) \
41f8e9f5 472 BOOT_TARGET_DEVICES_MMC(func) \
5a37a400 473 BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
2ec3a612 474 BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14 475 BOOT_TARGET_DEVICES_USB(func) \
2ec3a612
HG
476 func(PXE, pxe, na) \
477 func(DHCP, dhcp, na)
478
3b824025
HG
479#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
480#define BOOTCMD_SUNXI_COMPAT \
481 "bootcmd_sunxi_compat=" \
482 "setenv root /dev/mmcblk0p3 rootwait; " \
483 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
484 "echo Loaded environment from uEnv.txt; " \
485 "env import -t 0x44000000 ${filesize}; " \
486 "fi; " \
487 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
488 "ext2load mmc 0 0x43000000 script.bin && " \
489 "ext2load mmc 0 0x48000000 uImage && " \
490 "bootm 0x48000000\0"
491#else
492#define BOOTCMD_SUNXI_COMPAT
493#endif
494
2ec3a612
HG
495#include <config_distro_bootcmd.h>
496
86b49093
HG
497#ifdef CONFIG_USB_KEYBOARD
498#define CONSOLE_STDIN_SETTINGS \
499 "preboot=usb start\0" \
500 "stdin=serial,usbkbd\0"
501#else
7f2c521f
LV
502#define CONSOLE_STDIN_SETTINGS \
503 "stdin=serial\0"
86b49093 504#endif
7f2c521f
LV
505
506#ifdef CONFIG_VIDEO
507#define CONSOLE_STDOUT_SETTINGS \
508 "stdout=serial,vga\0" \
509 "stderr=serial,vga\0"
510#else
511#define CONSOLE_STDOUT_SETTINGS \
512 "stdout=serial\0" \
513 "stderr=serial\0"
514#endif
515
516#define CONSOLE_ENV_SETTINGS \
517 CONSOLE_STDIN_SETTINGS \
518 CONSOLE_STDOUT_SETTINGS
519
2ec3a612 520#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f 521 CONSOLE_ENV_SETTINGS \
846e3254 522 MEM_LAYOUT_ENV_SETTINGS \
2a909c5f 523 DFU_ALT_INFO_RAM \
25acd33f 524 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
846e3254 525 "console=ttyS0,115200\0" \
3b824025 526 BOOTCMD_SUNXI_COMPAT \
2ec3a612
HG
527 BOOTENV
528
529#else /* ifndef CONFIG_SPL_BUILD */
530#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee
IC
531#endif
532
533#endif /* _SUNXI_COMMON_CONFIG_H */