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1/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
daf6d399 16#include <asm/arch/cpu.h>
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17#include <linux/stringify.h>
18
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19#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20/*
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
23 * be used.
24 */
25# define CONFIG_MACH_TYPE_COMPAT_REV 0
26#else
27/*
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
31 */
32# define CONFIG_MACH_TYPE_COMPAT_REV 1
33#endif
34
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35/*
36 * High Level Configuration Options
37 */
38#define CONFIG_SUNXI /* sunxi family */
50827a59 39#ifdef CONFIG_SPL_BUILD
50827a59
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40#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
41#endif
cba69eee 42
cba69eee 43/* Serial & console */
cba69eee
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44#define CONFIG_SYS_NS16550_SERIAL
45/* ns16550 reg in the low bits of cpu reg */
cba69eee 46#define CONFIG_SYS_NS16550_CLK 24000000
4fb60552 47#ifndef CONFIG_DM_SERIAL
1a81cf83
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48# define CONFIG_SYS_NS16550_REG_SIZE -4
49# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
50# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
51# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
52# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
53# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
54#endif
cba69eee 55
8a65f69c 56/* CPU */
daf6d399 57#define CONFIG_DISPLAY_CPUINFO
8a65f69c 58#define CONFIG_SYS_CACHELINE_SIZE 64
d96ebc46 59#define CONFIG_TIMER_CLK_FREQ 24000000
8a65f69c 60
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61/*
62 * The DRAM Base differs between some models. We cannot use macros for the
63 * CONFIG_FOO defines which contain the DRAM base address since they end
64 * up unexpanded in include/autoconf.mk .
65 *
66 * So we have to have this #ifdef #else #endif block for these.
67 */
68#ifdef CONFIG_MACH_SUN9I
69#define SDRAM_OFFSET(x) 0x2##x
70#define CONFIG_SYS_SDRAM_BASE 0x20000000
71#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
72#define CONFIG_SYS_TEXT_BASE 0x2a000000
73#define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
ff42d107
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74/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
75 * since it needs to fit in with the other values. By also #defining it
76 * we get warnings if the Kconfig value mismatches. */
77#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
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78#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
79#else
80#define SDRAM_OFFSET(x) 0x4##x
cba69eee 81#define CONFIG_SYS_SDRAM_BASE 0x40000000
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82#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
83#define CONFIG_SYS_TEXT_BASE 0x4a000000
84#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
ff42d107
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85/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
86 * since it needs to fit in with the other values. By also #defining it
87 * we get warnings if the Kconfig value mismatches. */
88#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
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89#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
90#endif
91
92#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
e049fe28 93
d96ebc46 94#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
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95/*
96 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
97 * slightly bigger. Note that it is possible to map the first 32 KiB of the
98 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
99 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
100 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
101 */
102#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
d96ebc46 103#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
77fe9887 104#else
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105#define CONFIG_SYS_INIT_RAM_ADDR 0x0
106#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887 107#endif
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108
109#define CONFIG_SYS_INIT_SP_OFFSET \
110 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
111#define CONFIG_SYS_INIT_SP_ADDR \
112 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
113
114#define CONFIG_NR_DRAM_BANKS 1
115#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
116#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
117
a6e50a88
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118#ifdef CONFIG_AHCI
119#define CONFIG_LIBATA
120#define CONFIG_SCSI_AHCI
121#define CONFIG_SCSI_AHCI_PLAT
122#define CONFIG_SUNXI_AHCI
0751b138 123#define CONFIG_SYS_64BIT_LBA
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124#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
125#define CONFIG_SYS_SCSI_MAX_LUN 1
126#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
127 CONFIG_SYS_SCSI_MAX_LUN)
c649e3c9 128#define CONFIG_SCSI
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129#endif
130
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131#define CONFIG_SETUP_MEMORY_TAGS
132#define CONFIG_CMDLINE_TAG
133#define CONFIG_INITRD_TAG
9f852211 134#define CONFIG_SERIAL_TAG
cba69eee 135
e5268616 136#ifdef CONFIG_NAND_SUNXI
21d4d37a 137#define CONFIG_SPL_NAND_SUPPORT 1
960caeba
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138#endif
139
e24ea55c 140/* mmc config */
44c79879 141#ifdef CONFIG_MMC
e24ea55c 142#define CONFIG_GENERIC_MMC
e24ea55c
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143#define CONFIG_MMC_SUNXI
144#define CONFIG_MMC_SUNXI_SLOT 0
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145#define CONFIG_ENV_IS_IN_MMC
146#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ff2b47f6 147#endif
e24ea55c 148
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149/* 64MB of malloc() pool */
150#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
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151
152/*
153 * Miscellaneous configurable options
154 */
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155#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
156#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee 157#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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158
159/* Boot Argument Buffer Size */
160#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
161
cba69eee 162/* standalone support */
e049fe28 163#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee 164
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165/* baudrate */
166#define CONFIG_BAUDRATE 115200
167
168/* The stack sizes are set up in start.S using the settings below */
169#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
170
171/* FLASH and environment organization */
172
173#define CONFIG_SYS_NO_FLASH
174
fa5e1020 175#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee 176#define CONFIG_IDENT_STRING " Allwinner Technology"
2af25b74 177#define CONFIG_DISPLAY_BOARDINFO
cba69eee 178
e24ea55c 179#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
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180#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
181
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182#define CONFIG_FAT_WRITE /* enable write access */
183
184#define CONFIG_SPL_FRAMEWORK
185#define CONFIG_SPL_LIBCOMMON_SUPPORT
186#define CONFIG_SPL_SERIAL_SUPPORT
187#define CONFIG_SPL_LIBGENERIC_SUPPORT
188
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189#define CONFIG_SPL_BOARD_LOAD_IMAGE
190
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191#if defined(CONFIG_MACH_SUN9I)
192#define CONFIG_SPL_TEXT_BASE 0x10020 /* sram start+header */
193#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* ? KiB on sun9i */
194#elif defined(CONFIG_MACH_SUN50I)
195#define CONFIG_SPL_TEXT_BASE 0x10020 /* sram start+header */
196#define CONFIG_SPL_MAX_SIZE 0x7fe0 /* 32 KiB on sun50i */
197#else
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198#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
199#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
d96ebc46 200#endif
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201
202#define CONFIG_SPL_LIBDISK_SUPPORT
f0ce28e9 203
44c79879 204#ifdef CONFIG_MMC
50827a59 205#define CONFIG_SPL_MMC_SUPPORT
f0ce28e9 206#endif
50827a59 207
d96ebc46 208#ifndef CONFIG_ARM64
50827a59 209#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
d96ebc46 210#endif
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211
212#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
213#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
214
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215#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
216/* FIXME: 40 KiB instead of 32 KiB ? */
217#define LOW_LEVEL_SRAM_STACK 0x00018000
218#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
219#else
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220/* end of 32 KiB in sram */
221#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
222#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
d96ebc46 223#endif
cba69eee 224
6620377e 225/* I2C */
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226#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
227 defined CONFIG_SY8106A_POWER
6620377e 228#define CONFIG_SPL_I2C_SUPPORT
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229#endif
230
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231#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
232 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
9d082687 233 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
8b2db32a 234#define CONFIG_SYS_I2C
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235#define CONFIG_SYS_I2C_MVTWSI
236#define CONFIG_SYS_I2C_SPEED 400000
237#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a 238#endif
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239
240#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
241#define CONFIG_SYS_I2C_SOFT
242#define CONFIG_SYS_I2C_SOFT_SPEED 50000
243#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
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244/* We use pin names in Kconfig and sunxi_name_to_gpio() */
245#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
246#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
247#ifndef __ASSEMBLY__
248extern int soft_i2c_gpio_sda;
249extern int soft_i2c_gpio_scl;
250#endif
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251#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
252#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
253#else
254#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
255#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
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256#endif
257
14bc66bd 258/* PMU */
95ab8fee 259#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
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260 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
261 defined CONFIG_SY8106A_POWER
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262#define CONFIG_SPL_POWER_SUPPORT
263#endif
264
f84269c5 265#ifndef CONFIG_CONS_INDEX
cba69eee 266#define CONFIG_CONS_INDEX 1 /* UART0 */
f84269c5 267#endif
cba69eee 268
a5da3c83 269#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
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270#if CONFIG_CONS_INDEX == 1
271#ifdef CONFIG_MACH_SUN9I
272#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
273#else
274#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
275#endif
276#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
277#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
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278#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
279#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
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280#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
281#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
282#else
283#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
284#endif
a5da3c83 285#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962 286
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287/* GPIO */
288#define CONFIG_SUNXI_GPIO
cd82113a 289#define CONFIG_SPL_GPIO_SUPPORT
abce2c62 290
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291#ifdef CONFIG_VIDEO
292/*
5633a296
HG
293 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
294 * to use as framebuffer. This must be a multiple of 4096.
7f2c521f 295 */
5c965ed9 296#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
7f2c521f 297
2d7a084b
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298/* Do we want to initialize a simple FB? */
299#define CONFIG_VIDEO_DT_SIMPLEFB
300
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301#define CONFIG_VIDEO_SUNXI
302
303#define CONFIG_CFB_CONSOLE
304#define CONFIG_VIDEO_SW_CURSOR
305#define CONFIG_VIDEO_LOGO
be8ec633 306#define CONFIG_VIDEO_STD_TIMINGS
75481607 307#define CONFIG_I2C_EDID
58332f89 308#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f
LV
309
310/* allow both serial and cfb console. */
311#define CONFIG_CONSOLE_MUX
312/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
313#define CONFIG_VGA_AS_SINGLE_DEVICE
314
7f2c521f
LV
315#endif /* CONFIG_VIDEO */
316
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317/* Ethernet support */
318#ifdef CONFIG_SUNXI_EMAC
8145dea4 319#define CONFIG_PHY_ADDR 1
c26fb9db 320#define CONFIG_MII /* MII PHY management */
8145dea4 321#define CONFIG_PHYLIB
c26fb9db
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322#endif
323
5835823d 324#ifdef CONFIG_SUNXI_GMAC
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325#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
326#define CONFIG_PHY_ADDR 1
327#define CONFIG_MII /* MII PHY management */
1eae8f66 328#define CONFIG_PHY_REALTEK
5835823d
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329#endif
330
2582ca0d 331#ifdef CONFIG_USB_EHCI_HCD
6a72e804
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332#define CONFIG_USB_OHCI_NEW
333#define CONFIG_USB_OHCI_SUNXI
334#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3584f30c 335#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
1a800f7a
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336#endif
337
338#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f 339#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a
HG
340#endif
341
b21144eb 342#ifdef CONFIG_USB_MUSB_GADGET
aaa4a9e3
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343#define CONFIG_USB_FUNCTION_DFU
344#define CONFIG_USB_FUNCTION_FASTBOOT
345#define CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
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346#endif
347
2a909c5f 348#ifdef CONFIG_USB_FUNCTION_DFU
2a909c5f
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349#define CONFIG_DFU_RAM
350#endif
351
b21144eb
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352#ifdef CONFIG_USB_FUNCTION_FASTBOOT
353#define CONFIG_CMD_FASTBOOT
354#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
355#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
bac83fb0 356#define CONFIG_ANDROID_BOOT_IMAGE
b21144eb
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357
358#define CONFIG_FASTBOOT_FLASH
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359
360#ifdef CONFIG_MMC
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361#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
362#define CONFIG_EFI_PARTITION
363#endif
44c79879 364#endif
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365
366#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
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367#endif
368
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369#ifdef CONFIG_USB_KEYBOARD
370#define CONFIG_CONSOLE_MUX
371#define CONFIG_PREBOOT
372#define CONFIG_SYS_STDIO_DEREGISTER
eab9433a 373#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093
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374#endif
375
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376#if !defined CONFIG_ENV_IS_IN_MMC && \
377 !defined CONFIG_ENV_IS_IN_NAND && \
378 !defined CONFIG_ENV_IS_IN_FAT && \
379 !defined CONFIG_ENV_IS_IN_SPI_FLASH
380#define CONFIG_ENV_IS_NOWHERE
381#endif
382
b41d7d05 383#define CONFIG_MISC_INIT_R
7f2c521f 384#define CONFIG_SYS_CONSOLE_IS_IN_ENV
b41d7d05 385
cba69eee
IC
386#ifndef CONFIG_SPL_BUILD
387#include <config_distro_defaults.h>
2ec3a612 388
a7925078
SS
389/* Enable pre-console buffer to get complete log on the VGA console */
390#define CONFIG_PRE_CONSOLE_BUFFER
a8552c7c 391#define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */
a7925078 392
8c95c556 393/*
5c965ed9 394 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
8c95c556
HG
395 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
396 * 1M script, 1M pxe and the ramdisk at the end.
397 */
2a909c5f
SS
398
399#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
400#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
401#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
402#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
403#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
404
846e3254 405#define MEM_LAYOUT_ENV_SETTINGS \
5c965ed9 406 "bootm_size=0xa000000\0" \
2a909c5f
SS
407 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
408 "fdt_addr_r=" FDT_ADDR_R "\0" \
409 "scriptaddr=" SCRIPT_ADDR_R "\0" \
410 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
411 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
412
413#define DFU_ALT_INFO_RAM \
414 "dfu_alt_info_ram=" \
415 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
416 "fdt ram " FDT_ADDR_R " 0x100000;" \
417 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
846e3254 418
41f8e9f5
CYT
419#ifdef CONFIG_MMC
420#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
5a37a400
KM
421#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
422#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
423#else
424#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
425#endif
41f8e9f5
CYT
426#else
427#define BOOT_TARGET_DEVICES_MMC(func)
5a37a400 428#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
41f8e9f5
CYT
429#endif
430
2ec3a612
HG
431#ifdef CONFIG_AHCI
432#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
433#else
434#define BOOT_TARGET_DEVICES_SCSI(func)
435#endif
436
2582ca0d 437#ifdef CONFIG_USB_STORAGE
859b3f14
CYT
438#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
439#else
440#define BOOT_TARGET_DEVICES_USB(func)
441#endif
442
f3b589c0
BN
443/* FEL boot support, auto-execute boot.scr if a script address was provided */
444#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
445 "bootcmd_fel=" \
446 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
447 "echo '(FEL boot)'; " \
448 "source ${fel_scriptaddr}; " \
449 "fi\0"
450#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
451 "fel "
452
2ec3a612 453#define BOOT_TARGET_DEVICES(func) \
f3b589c0 454 func(FEL, fel, na) \
41f8e9f5 455 BOOT_TARGET_DEVICES_MMC(func) \
5a37a400 456 BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
2ec3a612 457 BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14 458 BOOT_TARGET_DEVICES_USB(func) \
2ec3a612
HG
459 func(PXE, pxe, na) \
460 func(DHCP, dhcp, na)
461
3b824025
HG
462#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
463#define BOOTCMD_SUNXI_COMPAT \
464 "bootcmd_sunxi_compat=" \
465 "setenv root /dev/mmcblk0p3 rootwait; " \
466 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
467 "echo Loaded environment from uEnv.txt; " \
468 "env import -t 0x44000000 ${filesize}; " \
469 "fi; " \
470 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
471 "ext2load mmc 0 0x43000000 script.bin && " \
472 "ext2load mmc 0 0x48000000 uImage && " \
473 "bootm 0x48000000\0"
474#else
475#define BOOTCMD_SUNXI_COMPAT
476#endif
477
2ec3a612
HG
478#include <config_distro_bootcmd.h>
479
86b49093
HG
480#ifdef CONFIG_USB_KEYBOARD
481#define CONSOLE_STDIN_SETTINGS \
482 "preboot=usb start\0" \
483 "stdin=serial,usbkbd\0"
484#else
7f2c521f
LV
485#define CONSOLE_STDIN_SETTINGS \
486 "stdin=serial\0"
86b49093 487#endif
7f2c521f
LV
488
489#ifdef CONFIG_VIDEO
490#define CONSOLE_STDOUT_SETTINGS \
491 "stdout=serial,vga\0" \
492 "stderr=serial,vga\0"
493#else
494#define CONSOLE_STDOUT_SETTINGS \
495 "stdout=serial\0" \
496 "stderr=serial\0"
497#endif
498
499#define CONSOLE_ENV_SETTINGS \
500 CONSOLE_STDIN_SETTINGS \
501 CONSOLE_STDOUT_SETTINGS
502
2ec3a612 503#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f 504 CONSOLE_ENV_SETTINGS \
846e3254 505 MEM_LAYOUT_ENV_SETTINGS \
2a909c5f 506 DFU_ALT_INFO_RAM \
25acd33f 507 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
846e3254 508 "console=ttyS0,115200\0" \
3b824025 509 BOOTCMD_SUNXI_COMPAT \
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510 BOOTENV
511
512#else /* ifndef CONFIG_SPL_BUILD */
513#define CONFIG_EXTRA_ENV_SETTINGS
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514#endif
515
516#endif /* _SUNXI_COMMON_CONFIG_H */