[people/ms/u-boot.git] / include / configs / sunxi-common.h

/*
 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
 *
 * (C) Copyright 2007-2011
 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
 * Tom Cubie <tangliang@allwinnertech.com>
 *
 * Configuration settings for the Allwinner sunxi series of boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H

#include <asm/arch/cpu.h>
#include <linux/stringify.h>

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
/*
 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
 * expense of restricting some features, so the regular machine id values can
 * be used.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	0
#else
/*
 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
 * beyond the machine id check.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	1
#endif

/* Serial & console */
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_NS16550_CLK		24000000
#ifndef CONFIG_DM_SERIAL
# define CONFIG_SYS_NS16550_REG_SIZE	-4
# define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
# define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
# define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
# define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
#endif

/* CPU */
#define COUNTER_FREQUENCY		24000000

/*
 * The DRAM Base differs between some models. We cannot use macros for the
 * CONFIG_FOO defines which contain the DRAM base address since they end
 * up unexpanded in include/autoconf.mk .
 *
 * So we have to have this #ifdef #else #endif block for these.
 */
#ifdef CONFIG_MACH_SUN9I
#define SDRAM_OFFSET(x) 0x2##x
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x2a000000
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 
 * since it needs to fit in with the other values. By also #defining it
 * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
#define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
#else
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x4a000000
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 
 * since it needs to fit in with the other values. By also #defining it
 * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
#define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
#endif

#define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */

#ifdef CONFIG_SUNXI_HIGH_SRAM
/*
 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
 * slightly bigger. Note that it is possible to map the first 32 KiB of the
 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x10000
#define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
#else
#define CONFIG_SYS_INIT_RAM_ADDR	0x0
#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
#endif

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */

#ifdef CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SUNXI_AHCI
#define CONFIG_SYS_64BIT_LBA
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_SCSI
#endif

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG

#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 8

#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#endif

#ifdef CONFIG_SPL_SPI_SUNXI
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
#endif

/* mmc config */
#ifdef CONFIG_MMC
#define CONFIG_MMC_SUNXI_SLOT		0
#endif

#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
#define CONFIG_SYS_MMC_MAX_DEVICE	4
#endif

/* 64MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */

/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/* standalone support */
#define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR

/* baudrate */

/* The stack sizes are set up in start.S using the settings below */
#define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */

/* FLASH and environment organization */

#define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */

#define CONFIG_FAT_WRITE	/* enable write access */

#define CONFIG_SPL_FRAMEWORK

#ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
#define CONFIG_SPL_BOARD_LOAD_IMAGE
#endif

#ifdef CONFIG_SUNXI_HIGH_SRAM
#define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB */
#define LOW_LEVEL_SRAM_STACK		0x00018000
#else
#define CONFIG_SPL_TEXT_BASE		0x40		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x5fc0		/* 24KB on sun4i/sun7i */
#define LOW_LEVEL_SRAM_STACK		0x00008000	/* End of sram */
#endif

#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

#ifndef CONFIG_ARM64
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
#endif

#define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */


/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
    defined CONFIG_SY8106A_POWER
#endif

#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
    defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
    defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_SYS_I2C_SPEED		400000
#define CONFIG_SYS_I2C_SLAVE		0x7f
#endif

#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C_SOFT_SPEED	50000
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
/* We use pin names in Kconfig and sunxi_name_to_gpio() */
#define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
#define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
#ifndef __ASSEMBLY__
extern int soft_i2c_gpio_sda;
extern int soft_i2c_gpio_scl;
#endif
#define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
#define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
#else
#define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
#define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
#endif

/* PMU */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
    defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
    defined CONFIG_SY8106A_POWER
#endif

#ifndef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX              1       /* UART0 */
#endif

#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
#if CONFIG_CONS_INDEX == 1
#ifdef CONFIG_MACH_SUN9I
#define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
#else
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
#endif
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
#else
#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
#endif
#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */

/* GPIO */
#define CONFIG_SUNXI_GPIO

#ifdef CONFIG_VIDEO
/*
 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
 * to use as framebuffer. This must be a multiple of 4096.
 */
#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)

/* Do we want to initialize a simple FB? */
#define CONFIG_VIDEO_DT_SIMPLEFB

#define CONFIG_VIDEO_SUNXI

#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_STD_TIMINGS
#define CONFIG_I2C_EDID
#define VIDEO_LINE_LEN (pGD->plnSizeX)

/* allow both serial and cfb console. */
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */

#endif /* CONFIG_VIDEO */

/* Ethernet support */
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHYLIB
#endif

#ifdef CONFIG_SUNXI_GMAC
#define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHY_REALTEK
#endif

#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif

#ifdef CONFIG_USB_MUSB_SUNXI
#define CONFIG_USB_MUSB_PIO_ONLY
#endif

#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
#define CONFIG_ANDROID_BOOT_IMAGE

#define CONFIG_FASTBOOT_FLASH

#ifdef CONFIG_MMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
#endif
#endif

#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_PREBOOT
#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
#endif

#define CONFIG_MISC_INIT_R

#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>

#ifdef CONFIG_ARM64
/*
 * Boards seem to come with at least 512MB of DRAM.
 * The kernel should go at 512K, which is the default text offset (that will
 * be adjusted at runtime if needed).
 * There is no compression for arm64 kernels (yet), so leave some space
 * for really big kernels, say 256MB for now.
 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
 * Align the initrd to a 2MB page.
 */
#define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
#define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
#define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
#define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
#define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))

#else
/*
 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end.
 */

#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
#define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
#define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
#endif

#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=0xa000000\0" \
	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
	"fdt_addr_r=" FDT_ADDR_R "\0" \
	"scriptaddr=" SCRIPT_ADDR_R "\0" \
	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"

#define DFU_ALT_INFO_RAM \
	"dfu_alt_info_ram=" \
	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
	"fdt ram " FDT_ADDR_R " 0x100000;" \
	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"

#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
#else
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif

#ifdef CONFIG_AHCI
#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
#else
#define BOOT_TARGET_DEVICES_SCSI(func)
#endif

#ifdef CONFIG_USB_STORAGE
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif

/* FEL boot support, auto-execute boot.scr if a script address was provided */
#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
	"bootcmd_fel=" \
		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
			"echo '(FEL boot)'; " \
			"source ${fel_scriptaddr}; " \
		"fi\0"
#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
	"fel "

#define BOOT_TARGET_DEVICES(func) \
	func(FEL, fel, na) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
	BOOT_TARGET_DEVICES_SCSI(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	func(PXE, pxe, na) \
	func(DHCP, dhcp, na)

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
#define BOOTCMD_SUNXI_COMPAT \
	"bootcmd_sunxi_compat=" \
		"setenv root /dev/mmcblk0p3 rootwait; " \
		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
			"echo Loaded environment from uEnv.txt; " \
			"env import -t 0x44000000 ${filesize}; " \
		"fi; " \
		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
		"ext2load mmc 0 0x43000000 script.bin && " \
		"ext2load mmc 0 0x48000000 uImage && " \
		"bootm 0x48000000\0"
#else
#define BOOTCMD_SUNXI_COMPAT
#endif

#include <config_distro_bootcmd.h>

#ifdef CONFIG_USB_KEYBOARD
#define CONSOLE_STDIN_SETTINGS \
	"preboot=usb start\0" \
	"stdin=serial,usbkbd\0"
#else
#define CONSOLE_STDIN_SETTINGS \
	"stdin=serial\0"
#endif

#ifdef CONFIG_VIDEO
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial,vga\0" \
	"stderr=serial,vga\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial\0" \
	"stderr=serial\0"
#endif

#define CONSOLE_ENV_SETTINGS \
	CONSOLE_STDIN_SETTINGS \
	CONSOLE_STDOUT_SETTINGS

#define CONFIG_EXTRA_ENV_SETTINGS \
	CONSOLE_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	DFU_ALT_INFO_RAM \
	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
	"console=ttyS0,115200\0" \
	BOOTCMD_SUNXI_COMPAT \
	BOOTENV

#else /* ifndef CONFIG_SPL_BUILD */
#define CONFIG_EXTRA_ENV_SETTINGS
#endif

#endif /* _SUNXI_COMMON_CONFIG_H */
Commit	Line	Data
cba69eee IC	1	/*
	2	* (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
	3	*
	4	* (C) Copyright 2007-2011
	5	* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
	6	* Tom Cubie <tangliang@allwinnertech.com>
	7	*
	8	* Configuration settings for the Allwinner sunxi series of boards.
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef _SUNXI_COMMON_CONFIG_H
	14	#define _SUNXI_COMMON_CONFIG_H
	15
daf6d399	16	#include <asm/arch/cpu.h>
e049fe28 HG	17	#include <linux/stringify.h>
e049fe28 HG	18
77ef1369 SS	19	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	20	/*
	21	* The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
	22	* expense of restricting some features, so the regular machine id values can
	23	* be used.
	24	*/
	25	# define CONFIG_MACH_TYPE_COMPAT_REV 0
	26	#else
	27	/*
	28	* A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
	29	* Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
	30	* beyond the machine id check.
	31	*/
	32	# define CONFIG_MACH_TYPE_COMPAT_REV 1
	33	#endif
	34
cba69eee	35	/* Serial & console */
cba69eee IC	36	#define CONFIG_SYS_NS16550_SERIAL
cba69eee IC	37	/* ns16550 reg in the low bits of cpu reg */
cba69eee	38	#define CONFIG_SYS_NS16550_CLK 24000000
4fb60552	39	#ifndef CONFIG_DM_SERIAL
1a81cf83 SG	40	# define CONFIG_SYS_NS16550_REG_SIZE -4
	41	# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
	42	# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
	43	# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
	44	# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
	45	# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
	46	#endif
cba69eee	47
8a65f69c	48	/* CPU */
e4916e85	49	#define COUNTER_FREQUENCY 24000000
8a65f69c	50
e049fe28 HG	51	/*
	52	* The DRAM Base differs between some models. We cannot use macros for the
	53	* CONFIG_FOO defines which contain the DRAM base address since they end
	54	* up unexpanded in include/autoconf.mk .
	55	*
	56	* So we have to have this #ifdef #else #endif block for these.
	57	*/
	58	#ifdef CONFIG_MACH_SUN9I
	59	#define SDRAM_OFFSET(x) 0x2##x
	60	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	61	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
	62	#define CONFIG_SYS_TEXT_BASE 0x2a000000
ff42d107 HG	63	/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
	64	* since it needs to fit in with the other values. By also #defining it
	65	* we get warnings if the Kconfig value mismatches. */
	66	#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
e049fe28 HG	67	#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
	68	#else
	69	#define SDRAM_OFFSET(x) 0x4##x
cba69eee	70	#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28 HG	71	#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
e049fe28 HG	72	#define CONFIG_SYS_TEXT_BASE 0x4a000000
ff42d107 HG	73	/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
	74	* since it needs to fit in with the other values. By also #defining it
	75	* we get warnings if the Kconfig value mismatches. */
	76	#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
e049fe28 HG	77	#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
	78	#endif
	79
	80	#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
e049fe28	81
bc613d85	82	#ifdef CONFIG_SUNXI_HIGH_SRAM
77fe9887 HG	83	/*
	84	* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
	85	* slightly bigger. Note that it is possible to map the first 32 KiB of the
	86	* A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
	87	* undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
	88	* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
	89	*/
	90	#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
eb504fa1	91	#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
77fe9887	92	#else
cba69eee IC	93	#define CONFIG_SYS_INIT_RAM_ADDR 0x0
cba69eee IC	94	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887	95	#endif
cba69eee IC	96
	97	#define CONFIG_SYS_INIT_SP_OFFSET \
	98	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	99	#define CONFIG_SYS_INIT_SP_ADDR \
	100	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	101
	102	#define CONFIG_NR_DRAM_BANKS 1
	103	#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
	104	#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
	105
a6e50a88 IC	106	#ifdef CONFIG_AHCI
	107	#define CONFIG_LIBATA
	108	#define CONFIG_SCSI_AHCI
	109	#define CONFIG_SCSI_AHCI_PLAT
	110	#define CONFIG_SUNXI_AHCI
0751b138	111	#define CONFIG_SYS_64BIT_LBA
a6e50a88 IC	112	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	113	#define CONFIG_SYS_SCSI_MAX_LUN 1
	114	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	115	CONFIG_SYS_SCSI_MAX_LUN)
c649e3c9	116	#define CONFIG_SCSI
a6e50a88 IC	117	#endif
a6e50a88 IC	118
cba69eee IC	119	#define CONFIG_SETUP_MEMORY_TAGS
	120	#define CONFIG_CMDLINE_TAG
	121	#define CONFIG_INITRD_TAG
9f852211	122	#define CONFIG_SERIAL_TAG
cba69eee	123
e5268616	124	#ifdef CONFIG_NAND_SUNXI
a0dfa88b	125	#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
4ccae81c BB	126	#define CONFIG_SYS_NAND_ONFI_DETECTION
4ccae81c BB	127	#define CONFIG_SYS_MAX_NAND_DEVICE 8
d482a8df HG	128
	129	#define CONFIG_MTD_DEVICE
	130	#define CONFIG_MTD_PARTITIONS
960caeba PZ	131	#endif
960caeba PZ	132
19e99fb4	133	#ifdef CONFIG_SPL_SPI_SUNXI
19e99fb4 SS	134	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
	135	#endif
	136
e24ea55c	137	/* mmc config */
44c79879	138	#ifdef CONFIG_MMC
e24ea55c	139	#define CONFIG_MMC_SUNXI_SLOT 0
fb1c43cc MR	140	#endif
	141
	142	#if defined(CONFIG_ENV_IS_IN_MMC)
e24ea55c	143	#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ae042beb	144	#define CONFIG_SYS_MMC_MAX_DEVICE 4
ff2b47f6	145	#endif
e24ea55c	146
5c965ed9 HG	147	/* 64MB of malloc() pool */
5c965ed9 HG	148	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
cba69eee IC	149
	150	/*
	151	* Miscellaneous configurable options
	152	*/
06beadb0 IC	153	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
06beadb0 IC	154	#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee	155	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
cba69eee IC	156
	157	/* Boot Argument Buffer Size */
	158	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	159
cba69eee	160	/* standalone support */
e049fe28	161	#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee	162
cba69eee	163	/* baudrate */
cba69eee IC	164
	165	/* The stack sizes are set up in start.S using the settings below */
	166	#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
	167
	168	/* FLASH and environment organization */
	169
fa5e1020	170	#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee	171
cba69eee IC	172	#define CONFIG_FAT_WRITE /* enable write access */
	173
	174	#define CONFIG_SPL_FRAMEWORK
cba69eee	175
eb77f5c9	176	#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
942cb0b6	177	#define CONFIG_SPL_BOARD_LOAD_IMAGE
eb77f5c9	178	#endif
942cb0b6	179
bc613d85	180	#ifdef CONFIG_SUNXI_HIGH_SRAM
b19236fd	181	#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
bc613d85 AP	182	#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB */
bc613d85 AP	183	#define LOW_LEVEL_SRAM_STACK 0x00018000
d96ebc46	184	#else
b19236fd SS	185	#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
b19236fd SS	186	#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
bc613d85	187	#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
d96ebc46	188	#endif
50827a59	189
bc613d85 AP	190	#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
bc613d85 AP	191
d96ebc46	192	#ifndef CONFIG_ARM64
50827a59	193	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
d96ebc46	194	#endif
50827a59	195
50827a59 IC	196	#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
50827a59 IC	197
cba69eee	198
6620377e	199	/* I2C */
0d8382ae JW	200	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| \
0d8382ae JW	201	defined CONFIG_SY8106A_POWER
ad40610b HG	202	#endif
ad40610b HG	203
6c739c5d PK	204	#if defined CONFIG_I2C0_ENABLE \|\| defined CONFIG_I2C1_ENABLE \|\| \
6c739c5d PK	205	defined CONFIG_I2C2_ENABLE \|\| defined CONFIG_I2C3_ENABLE \|\| \
9d082687	206	defined CONFIG_I2C4_ENABLE \|\| defined CONFIG_R_I2C_ENABLE
8b2db32a	207	#define CONFIG_SYS_I2C
6620377e HG	208	#define CONFIG_SYS_I2C_MVTWSI
	209	#define CONFIG_SYS_I2C_SPEED 400000
	210	#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a	211	#endif
55410089 HG	212
	213	#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
	214	#define CONFIG_SYS_I2C_SOFT
	215	#define CONFIG_SYS_I2C_SOFT_SPEED 50000
	216	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089 HG	217	/* We use pin names in Kconfig and sunxi_name_to_gpio() */
	218	#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
	219	#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
	220	#ifndef __ASSEMBLY__
	221	extern int soft_i2c_gpio_sda;
	222	extern int soft_i2c_gpio_scl;
	223	#endif
1fc42018 HG	224	#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
	225	#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
	226	#else
	227	#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
	228	#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089 HG	229	#endif
55410089 HG	230
14bc66bd	231	/* PMU */
95ab8fee	232	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| \
0d8382ae JW	233	defined CONFIG_AXP221_POWER \|\| defined CONFIG_AXP818_POWER \|\| \
0d8382ae JW	234	defined CONFIG_SY8106A_POWER
14bc66bd HN	235	#endif
14bc66bd HN	236
f84269c5	237	#ifndef CONFIG_CONS_INDEX
cba69eee	238	#define CONFIG_CONS_INDEX 1 /* UART0 */
f84269c5	239	#endif
cba69eee	240
a5da3c83	241	#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962 HG	242	#if CONFIG_CONS_INDEX == 1
	243	#ifdef CONFIG_MACH_SUN9I
	244	#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
	245	#else
	246	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
	247	#endif
	248	#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
	249	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11 LI	250	#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
5cd83b11 LI	251	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962 HG	252	#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
	253	#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
	254	#else
	255	#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
	256	#endif
a5da3c83	257	#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962	258
abce2c62 IC	259	/* GPIO */
abce2c62 IC	260	#define CONFIG_SUNXI_GPIO
abce2c62	261
7f2c521f LV	262	#ifdef CONFIG_VIDEO
7f2c521f LV	263	/*
5633a296 HG	264	* The amount of RAM to keep free at the top of RAM when relocating u-boot,
5633a296 HG	265	* to use as framebuffer. This must be a multiple of 4096.
7f2c521f	266	*/
5c965ed9	267	#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
7f2c521f	268
2d7a084b LV	269	/* Do we want to initialize a simple FB? */
	270	#define CONFIG_VIDEO_DT_SIMPLEFB
	271
7f2c521f LV	272	#define CONFIG_VIDEO_SUNXI
7f2c521f LV	273
7f2c521f	274	#define CONFIG_VIDEO_LOGO
be8ec633	275	#define CONFIG_VIDEO_STD_TIMINGS
75481607	276	#define CONFIG_I2C_EDID
58332f89	277	#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f LV	278
7f2c521f LV	279	/* allow both serial and cfb console. */
7f2c521f	280	/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
7f2c521f	281
7f2c521f LV	282	#endif /* CONFIG_VIDEO */
7f2c521f LV	283
c26fb9db HG	284	/* Ethernet support */
c26fb9db HG	285	#ifdef CONFIG_SUNXI_EMAC
8145dea4	286	#define CONFIG_PHY_ADDR 1
c26fb9db	287	#define CONFIG_MII /* MII PHY management */
8145dea4	288	#define CONFIG_PHYLIB
c26fb9db HG	289	#endif
c26fb9db HG	290
5835823d	291	#ifdef CONFIG_SUNXI_GMAC
5835823d IC	292	#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
	293	#define CONFIG_PHY_ADDR 1
	294	#define CONFIG_MII /* MII PHY management */
1eae8f66	295	#define CONFIG_PHY_REALTEK
5835823d IC	296	#endif
5835823d IC	297
2582ca0d	298	#ifdef CONFIG_USB_EHCI_HCD
6a72e804 HG	299	#define CONFIG_USB_OHCI_NEW
	300	#define CONFIG_USB_OHCI_SUNXI
	301	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3584f30c	302	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
1a800f7a HG	303	#endif
	304
	305	#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f	306	#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a HG	307	#endif
1a800f7a HG	308
b21144eb	309	#ifdef CONFIG_USB_MUSB_GADGET
aaa4a9e3 SP	310	#define CONFIG_USB_FUNCTION_FASTBOOT
aaa4a9e3 SP	311	#define CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb PK	312	#endif
	313
	314	#ifdef CONFIG_USB_FUNCTION_FASTBOOT
	315	#define CONFIG_CMD_FASTBOOT
	316	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	317	#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
bac83fb0	318	#define CONFIG_ANDROID_BOOT_IMAGE
b21144eb PK	319
b21144eb PK	320	#define CONFIG_FASTBOOT_FLASH
44c79879 MR	321
44c79879 MR	322	#ifdef CONFIG_MMC
b21144eb	323	#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
b21144eb	324	#endif
44c79879	325	#endif
b21144eb PK	326
b21144eb PK	327	#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb PK	328	#endif
b21144eb PK	329
86b49093	330	#ifdef CONFIG_USB_KEYBOARD
86b49093	331	#define CONFIG_PREBOOT
eab9433a	332	#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093 HG	333	#endif
86b49093 HG	334
b41d7d05 JL	335	#define CONFIG_MISC_INIT_R
b41d7d05 JL	336
cba69eee IC	337	#ifndef CONFIG_SPL_BUILD
cba69eee IC	338	#include <config_distro_defaults.h>
2ec3a612	339
671f9ad8 AP	340	#ifdef CONFIG_ARM64
	341	/*
	342	* Boards seem to come with at least 512MB of DRAM.
	343	* The kernel should go at 512K, which is the default text offset (that will
	344	* be adjusted at runtime if needed).
	345	* There is no compression for arm64 kernels (yet), so leave some space
	346	* for really big kernels, say 256MB for now.
	347	* Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
	348	* Align the initrd to a 2MB page.
	349	*/
	350	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
	351	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
	352	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
	353	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
	354	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
	355
	356	#else
8c95c556	357	/*
5c965ed9	358	* 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
8c95c556 HG	359	* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
	360	* 1M script, 1M pxe and the ramdisk at the end.
	361	*/
2a909c5f SS	362
	363	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
	364	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
	365	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
	366	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
	367	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
671f9ad8	368	#endif
2a909c5f	369
846e3254	370	#define MEM_LAYOUT_ENV_SETTINGS \
5c965ed9	371	"bootm_size=0xa000000\0" \
2a909c5f SS	372	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
	373	"fdt_addr_r=" FDT_ADDR_R "\0" \
	374	"scriptaddr=" SCRIPT_ADDR_R "\0" \
	375	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
	376	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
	377
	378	#define DFU_ALT_INFO_RAM \
	379	"dfu_alt_info_ram=" \
	380	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
	381	"fdt ram " FDT_ADDR_R " 0x100000;" \
	382	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
846e3254	383
41f8e9f5 CYT	384	#ifdef CONFIG_MMC
41f8e9f5 CYT	385	#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
5a37a400 KM	386	#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
	387	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
	388	#else
	389	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
	390	#endif
41f8e9f5 CYT	391	#else
41f8e9f5 CYT	392	#define BOOT_TARGET_DEVICES_MMC(func)
5a37a400	393	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
41f8e9f5 CYT	394	#endif
41f8e9f5 CYT	395
2ec3a612 HG	396	#ifdef CONFIG_AHCI
	397	#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
	398	#else
	399	#define BOOT_TARGET_DEVICES_SCSI(func)
	400	#endif
	401
2582ca0d	402	#ifdef CONFIG_USB_STORAGE
859b3f14 CYT	403	#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
	404	#else
	405	#define BOOT_TARGET_DEVICES_USB(func)
	406	#endif
	407
f3b589c0 BN	408	/* FEL boot support, auto-execute boot.scr if a script address was provided */
	409	#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
	410	"bootcmd_fel=" \
	411	"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
	412	"echo '(FEL boot)'; " \
	413	"source ${fel_scriptaddr}; " \
	414	"fi\0"
	415	#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
	416	"fel "
	417
2ec3a612	418	#define BOOT_TARGET_DEVICES(func) \
f3b589c0	419	func(FEL, fel, na) \
41f8e9f5	420	BOOT_TARGET_DEVICES_MMC(func) \
5a37a400	421	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
2ec3a612	422	BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14	423	BOOT_TARGET_DEVICES_USB(func) \
2ec3a612 HG	424	func(PXE, pxe, na) \
	425	func(DHCP, dhcp, na)
	426
3b824025 HG	427	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	428	#define BOOTCMD_SUNXI_COMPAT \
	429	"bootcmd_sunxi_compat=" \
	430	"setenv root /dev/mmcblk0p3 rootwait; " \
	431	"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
	432	"echo Loaded environment from uEnv.txt; " \
	433	"env import -t 0x44000000 ${filesize}; " \
	434	"fi; " \
	435	"setenv bootargs console=${console} root=${root} ${extraargs}; " \
	436	"ext2load mmc 0 0x43000000 script.bin && " \
	437	"ext2load mmc 0 0x48000000 uImage && " \
	438	"bootm 0x48000000\0"
	439	#else
	440	#define BOOTCMD_SUNXI_COMPAT
	441	#endif
	442
2ec3a612 HG	443	#include <config_distro_bootcmd.h>
2ec3a612 HG	444
86b49093 HG	445	#ifdef CONFIG_USB_KEYBOARD
	446	#define CONSOLE_STDIN_SETTINGS \
	447	"preboot=usb start\0" \
	448	"stdin=serial,usbkbd\0"
	449	#else
7f2c521f LV	450	#define CONSOLE_STDIN_SETTINGS \
7f2c521f LV	451	"stdin=serial\0"
86b49093	452	#endif
7f2c521f LV	453
	454	#ifdef CONFIG_VIDEO
	455	#define CONSOLE_STDOUT_SETTINGS \
	456	"stdout=serial,vga\0" \
	457	"stderr=serial,vga\0"
	458	#else
	459	#define CONSOLE_STDOUT_SETTINGS \
	460	"stdout=serial\0" \
	461	"stderr=serial\0"
	462	#endif
	463
	464	#define CONSOLE_ENV_SETTINGS \
	465	CONSOLE_STDIN_SETTINGS \
	466	CONSOLE_STDOUT_SETTINGS
	467
2ec3a612	468	#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f	469	CONSOLE_ENV_SETTINGS \
846e3254	470	MEM_LAYOUT_ENV_SETTINGS \
2a909c5f	471	DFU_ALT_INFO_RAM \
25acd33f	472	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
846e3254	473	"console=ttyS0,115200\0" \
3b824025	474	BOOTCMD_SUNXI_COMPAT \
2ec3a612 HG	475	BOOTENV
	476
	477	#else /* ifndef CONFIG_SPL_BUILD */
	478	#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee IC	479	#endif
	480
	481	#endif /* _SUNXI_COMMON_CONFIG_H */