[people/ms/u-boot.git] / include / configs / sunxi-common.h

/*
 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
 *
 * (C) Copyright 2007-2011
 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
 * Tom Cubie <tangliang@allwinnertech.com>
 *
 * Configuration settings for the Allwinner sunxi series of boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H

#include <asm/arch/cpu.h>
#include <linux/stringify.h>

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
/*
 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
 * expense of restricting some features, so the regular machine id values can
 * be used.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	0
#else
/*
 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
 * beyond the machine id check.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	1
#endif

/*
 * High Level Configuration Options
 */
#define CONFIG_SUNXI		/* sunxi family */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
#endif

/* Serial & console */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_NS16550_CLK		24000000
#ifdef CONFIG_DM_SERIAL
# define CONFIG_DW_SERIAL
#else
# define CONFIG_SYS_NS16550_REG_SIZE	-4
# define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
# define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
# define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
# define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
#endif

/* CPU */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_SYS_CACHELINE_SIZE	64

/*
 * The DRAM Base differs between some models. We cannot use macros for the
 * CONFIG_FOO defines which contain the DRAM base address since they end
 * up unexpanded in include/autoconf.mk .
 *
 * So we have to have this #ifdef #else #endif block for these.
 */
#ifdef CONFIG_MACH_SUN9I
#define SDRAM_OFFSET(x) 0x2##x
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x2a000000
#define CONFIG_PRE_CON_BUF_ADDR		0x2f000000
#define CONFIG_SYS_SPL_MALLOC_START	0x2ff00000
#define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
#else
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x4a000000
#define CONFIG_PRE_CON_BUF_ADDR		0x4f000000
#define CONFIG_SYS_SPL_MALLOC_START	0x4ff00000
#define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
#endif

#define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000 /* 512 KiB */

#ifdef CONFIG_MACH_SUN9I
/*
 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
 * slightly bigger. Note that it is possible to map the first 32 KiB of the
 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x10000
#define CONFIG_SYS_INIT_RAM_SIZE	0x0a000	/* 40 KiB */
#else
#define CONFIG_SYS_INIT_RAM_ADDR	0x0
#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
#endif

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */

#ifdef CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SUNXI_AHCI
#define CONFIG_SYS_64BIT_LBA
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_CMD_SCSI
#endif

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG

#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SPL_NAND_SUPPORT 1
#endif

/* mmc config */
#if !defined(CONFIG_UART0_PORT_F)
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_MMC
#define CONFIG_MMC_SUNXI
#define CONFIG_MMC_SUNXI_SLOT		0
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
#endif

/* 4MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_GENERIC_BOARD

/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/* standalone support */
#define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR

/* baudrate */
#define CONFIG_BAUDRATE			115200

/* The stack sizes are set up in start.S using the settings below */
#define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */

/* FLASH and environment organization */

#define CONFIG_SYS_NO_FLASH

#define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */
#define CONFIG_IDENT_STRING		" Allwinner Technology"

#define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */

#define CONFIG_FAT_WRITE	/* enable write access */

#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT

#define CONFIG_SPL_BOARD_LOAD_IMAGE

#define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */

#define CONFIG_SPL_LIBDISK_SUPPORT

#if !defined(CONFIG_UART0_PORT_F)
#define CONFIG_SPL_MMC_SUPPORT
#endif

#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"

#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
#define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */

/* end of 32 KiB in sram */
#define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
#define CONFIG_SPL_I2C_SUPPORT
#endif

#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
    defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
    defined CONFIG_I2C4_ENABLE
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_SYS_I2C_SPEED		400000
#define CONFIG_SYS_I2C_SLAVE		0x7f
#define CONFIG_CMD_I2C
#endif

#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C_SOFT_SPEED	50000
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
/* We use pin names in Kconfig and sunxi_name_to_gpio() */
#define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
#define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
#ifndef __ASSEMBLY__
extern int soft_i2c_gpio_sda;
extern int soft_i2c_gpio_scl;
#endif
#define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
#define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
#else
#define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
#define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
#endif

/* PMU */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
#define CONFIG_SPL_POWER_SUPPORT
#endif

#ifndef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX              1       /* UART0 */
#endif

#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
#if CONFIG_CONS_INDEX == 1
#ifdef CONFIG_MACH_SUN9I
#define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
#else
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
#endif
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
#else
#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
#endif
#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */

/* GPIO */
#define CONFIG_SUNXI_GPIO
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_CMD_GPIO

#ifdef CONFIG_VIDEO
/*
 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
 * to use as framebuffer. This must be a multiple of 4096.
 */
#ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
#define CONFIG_SUNXI_MAX_FB_SIZE (12 << 20)
#else
#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
#endif

/* Do we want to initialize a simple FB? */
#define CONFIG_VIDEO_DT_SIMPLEFB

#define CONFIG_VIDEO_SUNXI

#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_STD_TIMINGS
#define CONFIG_I2C_EDID
#define VIDEO_LINE_LEN (pGD->plnSizeX)

/* allow both serial and cfb console. */
#define CONFIG_CONSOLE_MUX
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
#define CONFIG_VGA_AS_SINGLE_DEVICE

/* To be able to hook simplefb into dt */
#ifdef CONFIG_VIDEO_DT_SIMPLEFB
#define CONFIG_OF_BOARD_SETUP
#endif

#endif /* CONFIG_VIDEO */

/* Ethernet support */
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHYLIB
#endif

#ifdef CONFIG_SUNXI_GMAC
#define CONFIG_DW_AUTONEG
#define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHYLIB
#endif

#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif

#ifdef CONFIG_USB_MUSB_SUNXI
#define CONFIG_USB_MUSB_PIO_ONLY
#endif

#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW	0

#define CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_G_DNL_VENDOR_NUM		0x1f3a
#define CONFIG_G_DNL_PRODUCT_NUM	0x1010
#define CONFIG_G_DNL_MANUFACTURER	"Allwinner Technology"
#endif

#ifdef CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x2000000

#define CONFIG_FASTBOOT_FLASH
#define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
#define CONFIG_EFI_PARTITION
#endif

#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
#define CONFIG_CMD_USB_MASS_STORAGE
#endif

#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_CONSOLE_MUX
#define CONFIG_PREBOOT
#define CONFIG_SYS_STDIO_DEREGISTER
#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
#endif

#if !defined CONFIG_ENV_IS_IN_MMC && \
    !defined CONFIG_ENV_IS_IN_NAND && \
    !defined CONFIG_ENV_IS_IN_FAT && \
    !defined CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_IS_NOWHERE
#endif

#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>

/* Enable pre-console buffer to get complete log on the VGA console */
#define CONFIG_PRE_CONSOLE_BUFFER
#define CONFIG_PRE_CON_BUF_SZ		4096 /* Aprox 2 80*25 screens */

/*
 * 240M RAM (256M minimum minus space for the framebuffer),
 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end.
 */
#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=0xf000000\0" \
	"kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
	"fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
	"scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
	"pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
	"ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"

#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#endif

#ifdef CONFIG_AHCI
#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
#else
#define BOOT_TARGET_DEVICES_SCSI(func)
#endif

#ifdef CONFIG_USB_STORAGE
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif

#define BOOT_TARGET_DEVICES(func) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_SCSI(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	func(PXE, pxe, na) \
	func(DHCP, dhcp, na)

#include <config_distro_bootcmd.h>

#ifdef CONFIG_USB_KEYBOARD
#define CONSOLE_STDIN_SETTINGS \
	"preboot=usb start\0" \
	"stdin=serial,usbkbd\0"
#else
#define CONSOLE_STDIN_SETTINGS \
	"stdin=serial\0"
#endif

#ifdef CONFIG_VIDEO
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial,vga\0" \
	"stderr=serial,vga\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial\0" \
	"stderr=serial\0"
#endif

#define CONSOLE_ENV_SETTINGS \
	CONSOLE_STDIN_SETTINGS \
	CONSOLE_STDOUT_SETTINGS

#define CONFIG_EXTRA_ENV_SETTINGS \
	CONSOLE_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
	"console=ttyS0,115200\0" \
	BOOTENV

#else /* ifndef CONFIG_SPL_BUILD */
#define CONFIG_EXTRA_ENV_SETTINGS
#endif

#endif /* _SUNXI_COMMON_CONFIG_H */
Commit	Line	Data
cba69eee IC	1	/*
	2	* (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
	3	*
	4	* (C) Copyright 2007-2011
	5	* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
	6	* Tom Cubie <tangliang@allwinnertech.com>
	7	*
	8	* Configuration settings for the Allwinner sunxi series of boards.
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef _SUNXI_COMMON_CONFIG_H
	14	#define _SUNXI_COMMON_CONFIG_H
	15
daf6d399	16	#include <asm/arch/cpu.h>
e049fe28 HG	17	#include <linux/stringify.h>
e049fe28 HG	18
77ef1369 SS	19	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	20	/*
	21	* The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
	22	* expense of restricting some features, so the regular machine id values can
	23	* be used.
	24	*/
	25	# define CONFIG_MACH_TYPE_COMPAT_REV 0
	26	#else
	27	/*
	28	* A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
	29	* Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
	30	* beyond the machine id check.
	31	*/
	32	# define CONFIG_MACH_TYPE_COMPAT_REV 1
	33	#endif
	34
cba69eee IC	35	/*
	36	* High Level Configuration Options
	37	*/
	38	#define CONFIG_SUNXI /* sunxi family */
50827a59	39	#ifdef CONFIG_SPL_BUILD
50827a59 IC	40	#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
50827a59 IC	41	#endif
cba69eee	42
cba69eee IC	43	/* Serial & console */
	44	#define CONFIG_SYS_NS16550
	45	#define CONFIG_SYS_NS16550_SERIAL
	46	/* ns16550 reg in the low bits of cpu reg */
cba69eee	47	#define CONFIG_SYS_NS16550_CLK 24000000
daf6d399 HG	48	#ifdef CONFIG_DM_SERIAL
	49	# define CONFIG_DW_SERIAL
	50	#else
1a81cf83 SG	51	# define CONFIG_SYS_NS16550_REG_SIZE -4
	52	# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
	53	# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
	54	# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
	55	# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
	56	# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
	57	#endif
cba69eee	58
8a65f69c	59	/* CPU */
daf6d399	60	#define CONFIG_DISPLAY_CPUINFO
8a65f69c PK	61	#define CONFIG_SYS_CACHELINE_SIZE 64
8a65f69c PK	62
e049fe28 HG	63	/*
	64	* The DRAM Base differs between some models. We cannot use macros for the
	65	* CONFIG_FOO defines which contain the DRAM base address since they end
	66	* up unexpanded in include/autoconf.mk .
	67	*
	68	* So we have to have this #ifdef #else #endif block for these.
	69	*/
	70	#ifdef CONFIG_MACH_SUN9I
	71	#define SDRAM_OFFSET(x) 0x2##x
	72	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	73	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
	74	#define CONFIG_SYS_TEXT_BASE 0x2a000000
	75	#define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
	76	#define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000
	77	#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
	78	#else
	79	#define SDRAM_OFFSET(x) 0x4##x
cba69eee	80	#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28 HG	81	#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
	82	#define CONFIG_SYS_TEXT_BASE 0x4a000000
	83	#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
	84	#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
	85	#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
	86	#endif
	87
	88	#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
	89	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
	90
77fe9887 HG	91	#ifdef CONFIG_MACH_SUN9I
	92	/*
	93	* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
	94	* slightly bigger. Note that it is possible to map the first 32 KiB of the
	95	* A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
	96	* undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
	97	* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
	98	*/
	99	#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
	100	#define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */
	101	#else
cba69eee IC	102	#define CONFIG_SYS_INIT_RAM_ADDR 0x0
cba69eee IC	103	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887	104	#endif
cba69eee IC	105
	106	#define CONFIG_SYS_INIT_SP_OFFSET \
	107	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	108	#define CONFIG_SYS_INIT_SP_ADDR \
	109	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	110
	111	#define CONFIG_NR_DRAM_BANKS 1
	112	#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
	113	#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
	114
a6e50a88 IC	115	#ifdef CONFIG_AHCI
	116	#define CONFIG_LIBATA
	117	#define CONFIG_SCSI_AHCI
	118	#define CONFIG_SCSI_AHCI_PLAT
	119	#define CONFIG_SUNXI_AHCI
0751b138	120	#define CONFIG_SYS_64BIT_LBA
a6e50a88 IC	121	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	122	#define CONFIG_SYS_SCSI_MAX_LUN 1
	123	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	124	CONFIG_SYS_SCSI_MAX_LUN)
	125	#define CONFIG_CMD_SCSI
	126	#endif
	127
cba69eee IC	128	#define CONFIG_SETUP_MEMORY_TAGS
	129	#define CONFIG_CMDLINE_TAG
	130	#define CONFIG_INITRD_TAG
9f852211	131	#define CONFIG_SERIAL_TAG
cba69eee	132
e5268616	133	#ifdef CONFIG_NAND_SUNXI
21d4d37a	134	#define CONFIG_SPL_NAND_SUPPORT 1
960caeba PZ	135	#endif
960caeba PZ	136
e24ea55c	137	/* mmc config */
ff2b47f6	138	#if !defined(CONFIG_UART0_PORT_F)
e24ea55c IC	139	#define CONFIG_MMC
	140	#define CONFIG_GENERIC_MMC
	141	#define CONFIG_CMD_MMC
	142	#define CONFIG_MMC_SUNXI
	143	#define CONFIG_MMC_SUNXI_SLOT 0
e24ea55c IC	144	#define CONFIG_ENV_IS_IN_MMC
e24ea55c IC	145	#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ff2b47f6	146	#endif
e24ea55c	147
cba69eee IC	148	/* 4MB of malloc() pool */
	149	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
	150
	151	/*
	152	* Miscellaneous configurable options
	153	*/
06beadb0 IC	154	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
06beadb0 IC	155	#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee IC	156	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	157	#define CONFIG_SYS_GENERIC_BOARD
	158
	159	/* Boot Argument Buffer Size */
	160	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	161
cba69eee	162	/* standalone support */
e049fe28	163	#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee	164
cba69eee IC	165	/* baudrate */
	166	#define CONFIG_BAUDRATE 115200
	167
	168	/* The stack sizes are set up in start.S using the settings below */
	169	#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
	170
	171	/* FLASH and environment organization */
	172
	173	#define CONFIG_SYS_NO_FLASH
	174
fa5e1020	175	#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee IC	176	#define CONFIG_IDENT_STRING " Allwinner Technology"
cba69eee IC	177
e24ea55c	178	#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
cba69eee IC	179	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
cba69eee IC	180
cba69eee IC	181	#define CONFIG_FAT_WRITE /* enable write access */
	182
	183	#define CONFIG_SPL_FRAMEWORK
	184	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	185	#define CONFIG_SPL_SERIAL_SUPPORT
	186	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	187
942cb0b6 SG	188	#define CONFIG_SPL_BOARD_LOAD_IMAGE
942cb0b6 SG	189
50827a59 IC	190	#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
	191	#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
	192
	193	#define CONFIG_SPL_LIBDISK_SUPPORT
f0ce28e9 SS	194
f0ce28e9 SS	195	#if !defined(CONFIG_UART0_PORT_F)
50827a59	196	#define CONFIG_SPL_MMC_SUPPORT
f0ce28e9	197	#endif
50827a59 IC	198
	199	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
	200
	201	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
	202	#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
	203
cba69eee IC	204	/* end of 32 KiB in sram */
	205	#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
	206	#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
cba69eee	207
6620377e	208	/* I2C */
ad40610b	209	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER
6620377e	210	#define CONFIG_SPL_I2C_SUPPORT
ad40610b HG	211	#endif
ad40610b HG	212
6c739c5d PK	213	#if defined CONFIG_I2C0_ENABLE \|\| defined CONFIG_I2C1_ENABLE \|\| \
	214	defined CONFIG_I2C2_ENABLE \|\| defined CONFIG_I2C3_ENABLE \|\| \
	215	defined CONFIG_I2C4_ENABLE
8b2db32a	216	#define CONFIG_SYS_I2C
6620377e HG	217	#define CONFIG_SYS_I2C_MVTWSI
	218	#define CONFIG_SYS_I2C_SPEED 400000
	219	#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a HG	220	#define CONFIG_CMD_I2C
8b2db32a HG	221	#endif
55410089 HG	222
	223	#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
	224	#define CONFIG_SYS_I2C_SOFT
	225	#define CONFIG_SYS_I2C_SOFT_SPEED 50000
	226	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089 HG	227	/* We use pin names in Kconfig and sunxi_name_to_gpio() */
	228	#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
	229	#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
	230	#ifndef __ASSEMBLY__
	231	extern int soft_i2c_gpio_sda;
	232	extern int soft_i2c_gpio_scl;
	233	#endif
1fc42018 HG	234	#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
	235	#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
	236	#else
	237	#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
	238	#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089 HG	239	#endif
55410089 HG	240
14bc66bd HN	241	/* PMU */
	242	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| defined CONFIG_AXP221_POWER
	243	#define CONFIG_SPL_POWER_SUPPORT
	244	#endif
	245
f84269c5	246	#ifndef CONFIG_CONS_INDEX
cba69eee	247	#define CONFIG_CONS_INDEX 1 /* UART0 */
f84269c5	248	#endif
cba69eee	249
a5da3c83	250	#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962 HG	251	#if CONFIG_CONS_INDEX == 1
	252	#ifdef CONFIG_MACH_SUN9I
	253	#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
	254	#else
	255	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
	256	#endif
	257	#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
	258	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11 LI	259	#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
5cd83b11 LI	260	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962 HG	261	#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
	262	#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
	263	#else
	264	#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
	265	#endif
a5da3c83	266	#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962	267
abce2c62 IC	268	/* GPIO */
abce2c62 IC	269	#define CONFIG_SUNXI_GPIO
cd82113a	270	#define CONFIG_SPL_GPIO_SUPPORT
abce2c62 IC	271	#define CONFIG_CMD_GPIO
abce2c62 IC	272
7f2c521f LV	273	#ifdef CONFIG_VIDEO
7f2c521f LV	274	/*
5633a296 HG	275	* The amount of RAM to keep free at the top of RAM when relocating u-boot,
5633a296 HG	276	* to use as framebuffer. This must be a multiple of 4096.
7f2c521f	277	*/
c1cfd519 HG	278	#ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
	279	#define CONFIG_SUNXI_MAX_FB_SIZE (12 << 20)
	280	#else
5633a296	281	#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
c1cfd519	282	#endif
7f2c521f	283
2d7a084b LV	284	/* Do we want to initialize a simple FB? */
	285	#define CONFIG_VIDEO_DT_SIMPLEFB
	286
7f2c521f LV	287	#define CONFIG_VIDEO_SUNXI
	288
	289	#define CONFIG_CFB_CONSOLE
	290	#define CONFIG_VIDEO_SW_CURSOR
	291	#define CONFIG_VIDEO_LOGO
be8ec633	292	#define CONFIG_VIDEO_STD_TIMINGS
75481607	293	#define CONFIG_I2C_EDID
58332f89	294	#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f LV	295
	296	/* allow both serial and cfb console. */
	297	#define CONFIG_CONSOLE_MUX
	298	/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
	299	#define CONFIG_VGA_AS_SINGLE_DEVICE
	300
2d7a084b LV	301	/* To be able to hook simplefb into dt */
	302	#ifdef CONFIG_VIDEO_DT_SIMPLEFB
	303	#define CONFIG_OF_BOARD_SETUP
	304	#endif
	305
7f2c521f LV	306	#endif /* CONFIG_VIDEO */
7f2c521f LV	307
c26fb9db HG	308	/* Ethernet support */
c26fb9db HG	309	#ifdef CONFIG_SUNXI_EMAC
8145dea4	310	#define CONFIG_PHY_ADDR 1
c26fb9db	311	#define CONFIG_MII /* MII PHY management */
8145dea4	312	#define CONFIG_PHYLIB
c26fb9db HG	313	#endif
c26fb9db HG	314
5835823d	315	#ifdef CONFIG_SUNXI_GMAC
5835823d IC	316	#define CONFIG_DW_AUTONEG
	317	#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
	318	#define CONFIG_PHY_ADDR 1
	319	#define CONFIG_MII /* MII PHY management */
	320	#define CONFIG_PHYLIB
	321	#endif
	322
2582ca0d	323	#ifdef CONFIG_USB_EHCI_HCD
6a72e804 HG	324	#define CONFIG_USB_OHCI_NEW
	325	#define CONFIG_USB_OHCI_SUNXI
	326	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3584f30c	327	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
1a800f7a HG	328	#endif
	329
	330	#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f	331	#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a HG	332	#endif
1a800f7a HG	333
b21144eb PK	334	#ifdef CONFIG_USB_MUSB_GADGET
	335	#define CONFIG_USB_GADGET
	336	#define CONFIG_USB_GADGET_DUALSPEED
	337	#define CONFIG_USB_GADGET_VBUS_DRAW 0
	338
	339	#define CONFIG_USB_GADGET_DOWNLOAD
	340	#define CONFIG_USB_FUNCTION_FASTBOOT
	341	#define CONFIG_USB_FUNCTION_MASS_STORAGE
	342	#endif
	343
	344	#ifdef CONFIG_USB_GADGET_DOWNLOAD
	345	#define CONFIG_G_DNL_VENDOR_NUM 0x1f3a
	346	#define CONFIG_G_DNL_PRODUCT_NUM 0x1010
	347	#define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology"
	348	#endif
	349
	350	#ifdef CONFIG_USB_FUNCTION_FASTBOOT
	351	#define CONFIG_CMD_FASTBOOT
	352	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	353	#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
	354
	355	#define CONFIG_FASTBOOT_FLASH
	356	#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
	357	#define CONFIG_EFI_PARTITION
	358	#endif
	359
	360	#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
	361	#define CONFIG_CMD_USB_MASS_STORAGE
	362	#endif
	363
86b49093 HG	364	#ifdef CONFIG_USB_KEYBOARD
	365	#define CONFIG_CONSOLE_MUX
	366	#define CONFIG_PREBOOT
	367	#define CONFIG_SYS_STDIO_DEREGISTER
eab9433a	368	#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093 HG	369	#endif
86b49093 HG	370
cba69eee IC	371	#if !defined CONFIG_ENV_IS_IN_MMC && \
	372	!defined CONFIG_ENV_IS_IN_NAND && \
	373	!defined CONFIG_ENV_IS_IN_FAT && \
	374	!defined CONFIG_ENV_IS_IN_SPI_FLASH
	375	#define CONFIG_ENV_IS_NOWHERE
	376	#endif
	377
b41d7d05	378	#define CONFIG_MISC_INIT_R
7f2c521f	379	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
b41d7d05	380
cba69eee IC	381	#ifndef CONFIG_SPL_BUILD
cba69eee IC	382	#include <config_distro_defaults.h>
2ec3a612	383
a7925078 SS	384	/* Enable pre-console buffer to get complete log on the VGA console */
a7925078 SS	385	#define CONFIG_PRE_CONSOLE_BUFFER
a8552c7c	386	#define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 8025 screens /
a7925078	387
8c95c556 HG	388	/*
	389	* 240M RAM (256M minimum minus space for the framebuffer),
	390	* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
	391	* 1M script, 1M pxe and the ramdisk at the end.
	392	*/
846e3254	393	#define MEM_LAYOUT_ENV_SETTINGS \
8c95c556	394	"bootm_size=0xf000000\0" \
e049fe28 HG	395	"kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
	396	"fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
	397	"scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
	398	"pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
	399	"ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"
846e3254	400
41f8e9f5 CYT	401	#ifdef CONFIG_MMC
	402	#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
	403	#else
	404	#define BOOT_TARGET_DEVICES_MMC(func)
	405	#endif
	406
2ec3a612 HG	407	#ifdef CONFIG_AHCI
	408	#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
	409	#else
	410	#define BOOT_TARGET_DEVICES_SCSI(func)
	411	#endif
	412
2582ca0d	413	#ifdef CONFIG_USB_STORAGE
859b3f14 CYT	414	#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
	415	#else
	416	#define BOOT_TARGET_DEVICES_USB(func)
	417	#endif
	418
2ec3a612	419	#define BOOT_TARGET_DEVICES(func) \
41f8e9f5	420	BOOT_TARGET_DEVICES_MMC(func) \
2ec3a612	421	BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14	422	BOOT_TARGET_DEVICES_USB(func) \
2ec3a612 HG	423	func(PXE, pxe, na) \
	424	func(DHCP, dhcp, na)
	425
	426	#include <config_distro_bootcmd.h>
	427
86b49093 HG	428	#ifdef CONFIG_USB_KEYBOARD
	429	#define CONSOLE_STDIN_SETTINGS \
	430	"preboot=usb start\0" \
	431	"stdin=serial,usbkbd\0"
	432	#else
7f2c521f LV	433	#define CONSOLE_STDIN_SETTINGS \
7f2c521f LV	434	"stdin=serial\0"
86b49093	435	#endif
7f2c521f LV	436
	437	#ifdef CONFIG_VIDEO
	438	#define CONSOLE_STDOUT_SETTINGS \
	439	"stdout=serial,vga\0" \
	440	"stderr=serial,vga\0"
	441	#else
	442	#define CONSOLE_STDOUT_SETTINGS \
	443	"stdout=serial\0" \
	444	"stderr=serial\0"
	445	#endif
	446
	447	#define CONSOLE_ENV_SETTINGS \
	448	CONSOLE_STDIN_SETTINGS \
	449	CONSOLE_STDOUT_SETTINGS
	450
2ec3a612	451	#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f	452	CONSOLE_ENV_SETTINGS \
846e3254	453	MEM_LAYOUT_ENV_SETTINGS \
25acd33f	454	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
846e3254	455	"console=ttyS0,115200\0" \
2ec3a612 HG	456	BOOTENV
	457
	458	#else /* ifndef CONFIG_SPL_BUILD */
	459	#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee IC	460	#endif
	461
	462	#endif /* _SUNXI_COMMON_CONFIG_H */