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1/*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
5 *
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
8 *
9 * TI OMAP5 AND DRA7XX common configuration settings
10 *
3765b3e7 11 * SPDX-License-Identifier: GPL-2.0+
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12 *
13 * For more details, please see the technical documents listed at
14 * http://www.ti.com/product/omap5432
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15 */
16
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17#ifndef __CONFIG_TI_OMAP5_COMMON_H
18#define __CONFIG_TI_OMAP5_COMMON_H
3ef5ebeb 19
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20#define CONFIG_DISPLAY_CPUINFO
21#define CONFIG_DISPLAY_BOARDINFO
3ef5ebeb 22
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23/* Common ARM Erratas */
24#define CONFIG_ARM_ERRATA_798870
25
a8017574 26#define CONFIG_SYS_CACHELINE_SIZE 64
3ef5ebeb 27
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28/* Use General purpose timer 1 */
29#define CONFIG_SYS_TIMERBASE GPT2_BASE
30
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31/*
32 * For the DDR timing information we can either dynamically determine
33 * the timings to use or use pre-determined timings (based on using the
34 * dynamic method. Default to the static timing infomation.
35 */
a8017574 36#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
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37#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
38#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
39#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
40#endif
41
a8017574 42#define CONFIG_PALMAS_POWER
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43
44#include <asm/arch/cpu.h>
45#include <asm/arch/omap.h>
3ef5ebeb 46
9a0f4004 47#include <configs/ti_armv7_omap.h>
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48
49/*
a8017574 50 * Hardware drivers
3ef5ebeb 51 */
c7b9686d 52#define CONFIG_SYS_NS16550_CLK 48000000
01e870b7 53#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
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54#define CONFIG_SYS_NS16550_SERIAL
55#define CONFIG_SYS_NS16550_REG_SIZE (-4)
01e870b7 56#endif
3ef5ebeb 57
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58/*
59 * Environment setup
60 */
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61#ifndef PARTS_DEFAULT
62#define PARTS_DEFAULT
63#endif
64
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65#ifndef DFUARGS
66#define DFUARGS
67#endif
68
08520bf5 69#ifndef CONFIG_SPL_BUILD
4ec3f6e5 70#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
3ef5ebeb 71#define CONFIG_EXTRA_ENV_SETTINGS \
fb3ad9bd 72 DEFAULT_LINUX_BOOT_ENV \
85d17be3 73 DEFAULT_MMC_TI_ARGS \
f6723794 74 "console=" CONSOLEDEV ",115200n8\0" \
a7143215 75 "fdtfile=undefined\0" \
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76 "bootpart=0:2\0" \
77 "bootdir=/boot\0" \
aaed0a23 78 "bootfile=zImage\0" \
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79 "usbtty=cdc_acm\0" \
80 "vram=16M\0" \
9552ee3e 81 "partitions=" PARTS_DEFAULT "\0" \
85b7ac45 82 "optargs=\0" \
16862604 83 "dofastboot=0\0" \
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84 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
85 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
86 "source ${loadaddr}\0" \
143070df 87 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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88 "mmcboot=mmc dev ${mmcdev}; " \
89 "if mmc rescan; then " \
90 "echo SD/MMC found on device ${mmcdev};" \
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91 "if run loadimage; then " \
92 "run loadfdt; " \
93 "echo Booting from mmc${mmcdev} ...; " \
85d17be3 94 "run args_mmc; " \
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95 "bootz ${loadaddr} - ${fdtaddr}; " \
96 "fi;" \
97 "fi;\0" \
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98 "findfdt="\
99 "if test $board_name = omap5_uevm; then " \
a7143215 100 "setenv fdtfile omap5-uevm.dtb; fi; " \
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101 "if test $board_name = dra7xx; then " \
102 "setenv fdtfile dra7-evm.dtb; fi;" \
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103 "if test $board_name = dra72x; then " \
104 "setenv fdtfile dra72-evm.dtb; fi;" \
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105 "if test $board_name = beagle_x15; then " \
106 "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
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107 "if test $board_name = am57xx_evm; then " \
108 "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
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109 "if test $fdtfile = undefined; then " \
110 "echo WARNING: Could not determine device tree to use; fi; \0" \
143070df 111 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
7a5a3e37 112 DFUARGS \
2320866b 113 NETARGS \
3ef5ebeb 114
ecd85579 115
3ef5ebeb 116#define CONFIG_BOOTCOMMAND \
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117 "if test ${dofastboot} -eq 1; then " \
118 "echo Boot fastboot requested, resetting dofastboot ...;" \
119 "setenv dofastboot 0; saveenv;" \
8d2f0039 120 "echo Booting into fastboot ...; fastboot 0;" \
ecd85579 121 "fi;" \
143070df 122 "run findfdt; " \
18c534bb 123 "run envboot; " \
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124 "run mmcboot;" \
125 "setenv mmcdev 1; " \
126 "setenv bootpart 1:2; " \
127 "setenv mmcroot /dev/mmcblk0p2 rw; " \
128 "run mmcboot;" \
ecd85579 129 ""
08520bf5 130#endif
3ef5ebeb 131
a5d439c2 132
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133/*
134 * SPL related defines. The Public RAM memory map the ROM defines the
135 * area between 0x40300000 and 0x4031E000 as a download area for OMAP5
136 * (dra7xx is larger, but we do not need to be larger at this time). We
137 * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
138 * print some information.
139 */
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140#define CONFIG_SPL_TEXT_BASE 0x40300000
141#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE)
3ef5ebeb 142#define CONFIG_SPL_DISPLAY_PRINT
3ef5ebeb 143#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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144#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
145 (128 << 20))
3ef5ebeb 146
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147#ifdef CONFIG_NAND
148#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
149#endif
150
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151/*
152 * Disable MMC DM for SPL build and can be re-enabled after adding
153 * DM support in SPL
154 */
155#ifdef CONFIG_SPL_BUILD
156#undef CONFIG_DM_MMC
30a0cdb6 157#undef CONFIG_TIMER
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158#endif
159
3d657a05 160#endif /* __CONFIG_TI_OMAP5_COMMON_H */