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1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale Vybrid vf610twr board.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#include <asm/arch/imx-regs.h>
8c653124 13
18fb0e3c 14#define CONFIG_SYS_FSL_CLK
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15
16#define CONFIG_MACH_TYPE 4146
17
18#define CONFIG_SKIP_LOWLEVEL_INIT
19
20/* Enable passing of ATAGs */
21#define CONFIG_CMDLINE_TAG
22
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23#ifdef CONFIG_CMD_FUSE
24#define CONFIG_MXC_OCOTP
25#endif
26
27/* Size of malloc() pool */
28#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
29
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30/* Allow to overwrite serial and ethaddr */
31#define CONFIG_ENV_OVERWRITE
8c653124 32
d6d07a9b 33/* NAND support */
8fca2d8c 34#define CONFIG_SYS_NAND_ONFI_DETECTION
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35
36#ifdef CONFIG_CMD_NAND
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37#define CONFIG_SYS_MAX_NAND_DEVICE 1
38#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
39
d6d07a9b 40/* Dynamic MTD partition support */
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41#define CONFIG_MTD_PARTITIONS
42#define CONFIG_MTD_DEVICE
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43#endif
44
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45#define CONFIG_FSL_ESDHC
46#define CONFIG_SYS_FSL_ESDHC_ADDR 0
47#define CONFIG_SYS_FSL_ESDHC_NUM 1
48
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49#define CONFIG_FEC_MXC
50#define CONFIG_MII
51#define IMX_FEC_BASE ENET_BASE_ADDR
52#define CONFIG_FEC_XCV_TYPE RMII
53#define CONFIG_FEC_MXC_PHYADDR 0
8c653124 54
cb6d04d6 55/* QSPI Configs*/
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56
57#ifdef CONFIG_FSL_QSPI
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58#define FSL_QSPI_FLASH_SIZE (1 << 24)
59#define FSL_QSPI_FLASH_NUM 2
60#define CONFIG_SYS_FSL_QSPI_LE
61#endif
62
1221b3d7 63/* I2C Configs */
b089d039 64#define CONFIG_SYS_I2C
65#define CONFIG_SYS_I2C_MXC
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66#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
67#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
b089d039 68#define CONFIG_SYS_SPD_BUS_NUM 0
1221b3d7 69
8c653124 70
cf04ad32 71#define CONFIG_SYS_LOAD_ADDR 0x82000000
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72
73/* We boot from the gfxRAM area of the OCRAM. */
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74#define CONFIG_SYS_TEXT_BASE 0x3f401000
75#define CONFIG_BOARD_SIZE_LIMIT 520192
8c653124 76
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77/*
78 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
79 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
80 * DDR3. Hence, limit the memory range for image processing to 112MB
81 * using bootm_size. All of the following must be within this range.
82 * We have the default load at 32MB into DDR (for the kernel), FDT at
83 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
84 * seen large trees). This allows a reasonable split between ramdisk
85 * and kernel size, where the ram disk can be a bit larger.
86 */
87#define MEM_LAYOUT_ENV_SETTINGS \
88 "bootm_size=0x07000000\0" \
89 "loadaddr=0x82000000\0" \
90 "kernel_addr_r=0x82000000\0" \
91 "fdt_addr=0x84000000\0" \
92 "fdt_addr_r=0x84000000\0" \
93 "rdaddr=0x84080000\0" \
94 "ramdisk_addr_r=0x84080000\0"
95
ca21f61e 96#define CONFIG_EXTRA_ENV_SETTINGS \
cf04ad32 97 MEM_LAYOUT_ENV_SETTINGS \
ca21f61e 98 "script=boot.scr\0" \
c0a5b081 99 "image=zImage\0" \
ca21f61e 100 "console=ttyLP1\0" \
ca21f61e 101 "fdt_file=vf610-twr.dtb\0" \
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102 "boot_fdt=try\0" \
103 "ip_dyn=yes\0" \
104 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
105 "mmcpart=1\0" \
106 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
107 "update_sd_firmware_filename=u-boot.imx\0" \
108 "update_sd_firmware=" \
109 "if test ${ip_dyn} = yes; then " \
110 "setenv get_cmd dhcp; " \
111 "else " \
112 "setenv get_cmd tftp; " \
113 "fi; " \
114 "if mmc dev ${mmcdev}; then " \
115 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
116 "setexpr fw_sz ${filesize} / 0x200; " \
117 "setexpr fw_sz ${fw_sz} + 1; " \
118 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
119 "fi; " \
120 "fi\0" \
121 "mmcargs=setenv bootargs console=${console},${baudrate} " \
122 "root=${mmcroot}\0" \
123 "loadbootscript=" \
124 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
125 "bootscript=echo Running bootscript from mmc ...; " \
126 "source\0" \
c0a5b081 127 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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128 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
129 "mmcboot=echo Booting from mmc ...; " \
130 "run mmcargs; " \
131 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
132 "if run loadfdt; then " \
c0a5b081 133 "bootz ${loadaddr} - ${fdt_addr}; " \
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134 "else " \
135 "if test ${boot_fdt} = try; then " \
c0a5b081 136 "bootz; " \
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137 "else " \
138 "echo WARN: Cannot load the DT; " \
139 "fi; " \
140 "fi; " \
141 "else " \
c0a5b081 142 "bootz; " \
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143 "fi;\0" \
144 "netargs=setenv bootargs console=${console},${baudrate} " \
145 "root=/dev/nfs " \
146 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
147 "netboot=echo Booting from net ...; " \
148 "run netargs; " \
149 "if test ${ip_dyn} = yes; then " \
150 "setenv get_cmd dhcp; " \
151 "else " \
152 "setenv get_cmd tftp; " \
153 "fi; " \
c0a5b081 154 "${get_cmd} ${image}; " \
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155 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
156 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
c0a5b081 157 "bootz ${loadaddr} - ${fdt_addr}; " \
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158 "else " \
159 "if test ${boot_fdt} = try; then " \
c0a5b081 160 "bootz; " \
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161 "else " \
162 "echo WARN: Cannot load the DT; " \
163 "fi; " \
164 "fi; " \
165 "else " \
c0a5b081 166 "bootz; " \
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167 "fi;\0"
168
169#define CONFIG_BOOTCOMMAND \
170 "mmc dev ${mmcdev}; if mmc rescan; then " \
171 "if run loadbootscript; then " \
172 "run bootscript; " \
173 "else " \
c0a5b081 174 "if run loadimage; then " \
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175 "run mmcboot; " \
176 "else run netboot; " \
177 "fi; " \
178 "fi; " \
179 "else run netboot; fi"
180
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181/* Miscellaneous configurable options */
182#define CONFIG_SYS_LONGHELP /* undef to save memory */
8c653124 183#undef CONFIG_AUTO_COMPLETE
8c653124 184
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185#define CONFIG_SYS_MEMTEST_START 0x80010000
186#define CONFIG_SYS_MEMTEST_END 0x87C00000
187
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188/* Physical memory map */
189#define CONFIG_NR_DRAM_BANKS 1
190#define PHYS_SDRAM (0x80000000)
191#define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
192
193#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
194#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
195#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
196
197#define CONFIG_SYS_INIT_SP_OFFSET \
198 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
199#define CONFIG_SYS_INIT_SP_ADDR \
200 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
201
d6d07a9b 202#ifdef CONFIG_ENV_IS_IN_MMC
8c653124 203#define CONFIG_ENV_SIZE (8 * 1024)
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204
205#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
206#define CONFIG_SYS_MMC_ENV_DEV 0
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207#endif
208
209#ifdef CONFIG_ENV_IS_IN_NAND
210#define CONFIG_ENV_SIZE (64 * 2048)
211#define CONFIG_ENV_SECT_SIZE (64 * 2048)
212#define CONFIG_ENV_RANGE (512 * 1024)
213#define CONFIG_ENV_OFFSET 0x180000
214#endif
8c653124 215
8c653124 216#endif