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e2d282a1 FE |
1 | /* |
2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Wandboard. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
e2d282a1 FE |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
3d99e862 | 12 | #include <config_distro_defaults.h> |
02824dc7 | 13 | #include "mx6_common.h" |
e2d282a1 | 14 | |
0d1ea052 FE |
15 | #include "imx6_spl.h" |
16 | ||
e2d282a1 FE |
17 | #define MACH_TYPE_WANDBOARD 4412 |
18 | #define CONFIG_MACH_TYPE MACH_TYPE_WANDBOARD | |
19 | ||
e2d282a1 | 20 | /* Size of malloc() pool */ |
7bcb983f | 21 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
e2d282a1 FE |
22 | |
23 | #define CONFIG_BOARD_EARLY_INIT_F | |
eaffaa2d | 24 | #define CONFIG_BOARD_LATE_INIT |
e2d282a1 FE |
25 | |
26 | #define CONFIG_MXC_UART | |
27 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
28 | ||
e355eec7 GC |
29 | /* SATA Configs */ |
30 | ||
31 | #define CONFIG_CMD_SATA | |
32 | #ifdef CONFIG_CMD_SATA | |
33 | #define CONFIG_DWC_AHSATA | |
34 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 | |
35 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
36 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR | |
37 | #define CONFIG_LBA48 | |
38 | #define CONFIG_LIBATA | |
39 | #endif | |
40 | ||
e2d282a1 | 41 | /* Command definition */ |
eaffaa2d | 42 | #define CONFIG_CMD_BMODE |
0798d578 | 43 | |
e2d282a1 FE |
44 | #define CONFIG_SYS_MEMTEST_START 0x10000000 |
45 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) | |
e2d282a1 | 46 | |
8bc7c487 | 47 | /* I2C Configs */ |
8bc7c487 OS |
48 | #define CONFIG_SYS_I2C |
49 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
50 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
51 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 52 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
8bc7c487 OS |
53 | #define CONFIG_SYS_I2C_SPEED 100000 |
54 | ||
e2d282a1 | 55 | /* MMC Configuration */ |
5ed15738 | 56 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
e2d282a1 | 57 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
e2d282a1 | 58 | |
9df47577 | 59 | /* USB Configs */ |
9df47577 JH |
60 | #define CONFIG_USB_EHCI |
61 | #define CONFIG_USB_EHCI_MX6 | |
9df47577 JH |
62 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
63 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
64 | #define CONFIG_MXC_USB_FLAGS 0 | |
65 | ||
e2d282a1 | 66 | /* Ethernet Configuration */ |
e2d282a1 FE |
67 | #define CONFIG_FEC_MXC |
68 | #define CONFIG_MII | |
69 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
70 | #define CONFIG_FEC_XCV_TYPE RGMII | |
71 | #define CONFIG_ETHPRIME "FEC" | |
72 | #define CONFIG_FEC_MXC_PHYADDR 1 | |
73 | #define CONFIG_PHYLIB | |
74 | #define CONFIG_PHY_ATHEROS | |
75 | ||
7bcb983f FE |
76 | /* Framebuffer */ |
77 | #define CONFIG_VIDEO | |
78 | #define CONFIG_VIDEO_IPUV3 | |
79 | #define CONFIG_CFB_CONSOLE | |
80 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
81 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
82 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | |
83 | #define CONFIG_VIDEO_BMP_RLE8 | |
84 | #define CONFIG_SPLASH_SCREEN | |
a7efb026 | 85 | #define CONFIG_SPLASH_SCREEN_ALIGN |
7bcb983f FE |
86 | #define CONFIG_BMP_16BPP |
87 | #define CONFIG_VIDEO_LOGO | |
a7efb026 | 88 | #define CONFIG_VIDEO_BMP_LOGO |
7bcb983f | 89 | #define CONFIG_IPUV3_CLK 260000000 |
0ef797a5 | 90 | #define CONFIG_CMD_HDMIDETECT |
5ea7f0e3 | 91 | #define CONFIG_IMX_HDMI |
8bc7c487 | 92 | #define CONFIG_IMX_VIDEO_SKIP |
7bcb983f | 93 | |
0d1ea052 | 94 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
e2d282a1 | 95 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
acc6bb56 | 96 | "console=ttymxc0,115200\0" \ |
d727ab3c | 97 | "splashpos=m,m\0" \ |
0d1ea052 | 98 | "fdtfile=undefined\0" \ |
e2d282a1 FE |
99 | "fdt_high=0xffffffff\0" \ |
100 | "initrd_high=0xffffffff\0" \ | |
acc6bb56 | 101 | "fdt_addr_r=0x18000000\0" \ |
6584a1b5 | 102 | "fdt_addr=0x18000000\0" \ |
e2d282a1 | 103 | "ip_dyn=yes\0" \ |
1e1cbde0 | 104 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ |
0798d578 OS |
105 | "update_sd_firmware_filename=u-boot.imx\0" \ |
106 | "update_sd_firmware=" \ | |
107 | "if test ${ip_dyn} = yes; then " \ | |
108 | "setenv get_cmd dhcp; " \ | |
109 | "else " \ | |
110 | "setenv get_cmd tftp; " \ | |
111 | "fi; " \ | |
112 | "if mmc dev ${mmcdev}; then " \ | |
113 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
114 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
115 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
116 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
117 | "fi; " \ | |
118 | "fi\0" \ | |
0d1ea052 | 119 | "findfdt="\ |
9a8804a8 | 120 | "if test $board_name = C1 && test $board_rev = MX6Q ; then " \ |
0d1ea052 | 121 | "setenv fdtfile imx6q-wandboard.dtb; fi; " \ |
9a8804a8 | 122 | "if test $board_name = C1 && test $board_rev = MX6DL ; then " \ |
0d1ea052 | 123 | "setenv fdtfile imx6dl-wandboard.dtb; fi; " \ |
9a8804a8 FE |
124 | "if test $board_name = B1 && test $board_rev = MX6Q ; then " \ |
125 | "setenv fdtfile imx6q-wandboard-revb1.dtb; fi; " \ | |
126 | "if test $board_name = B1 && test $board_rev = MX6DL ; then " \ | |
127 | "setenv fdtfile imx6dl-wandboard-revb1.dtb; fi; " \ | |
0d1ea052 FE |
128 | "if test $fdtfile = undefined; then " \ |
129 | "echo WARNING: Could not determine dtb to use; fi; \0" \ | |
acc6bb56 | 130 | "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ |
d3b78e18 | 131 | "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ |
acc6bb56 VC |
132 | "ramdisk_addr_r=0x13000000\0" \ |
133 | "ramdiskaddr=0x13000000\0" \ | |
134 | "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ | |
135 | BOOTENV | |
136 | ||
137 | #define BOOT_TARGET_DEVICES(func) \ | |
138 | func(MMC, mmc, 0) \ | |
139 | func(MMC, mmc, 1) \ | |
140 | func(USB, usb, 0) \ | |
141 | func(PXE, pxe, na) \ | |
142 | func(DHCP, dhcp, na) | |
e2d282a1 FE |
143 | |
144 | #define CONFIG_BOOTCOMMAND \ | |
0d1ea052 | 145 | "run findfdt; " \ |
acc6bb56 VC |
146 | "run distro_bootcmd" |
147 | ||
acc6bb56 | 148 | #include <config_distro_bootcmd.h> |
e2d282a1 | 149 | |
e2d282a1 FE |
150 | /* Physical Memory Map */ |
151 | #define CONFIG_NR_DRAM_BANKS 1 | |
152 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
153 | ||
154 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
155 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
156 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
157 | ||
158 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
159 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
160 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
161 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
162 | ||
056845c2 | 163 | /* Environment organization */ |
e2d282a1 FE |
164 | #define CONFIG_ENV_SIZE (8 * 1024) |
165 | ||
166 | #define CONFIG_ENV_IS_IN_MMC | |
67ff9e11 | 167 | #define CONFIG_ENV_OFFSET (768 * 1024) |
e2d282a1 FE |
168 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
169 | ||
e2d282a1 | 170 | #endif /* __CONFIG_H * */ |