[people/ms/u-boot.git] / include / configs / xilinx_zynqmp_ep.h

/*
 * Configuration for Xilinx ZynqMP emulation platforms
 *
 * (C) Copyright 2014 - 2015 Xilinx, Inc.
 * Michal Simek <michal.simek@xilinx.com>
 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
 *
 * Based on Configuration for Versatile Express
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ZYNQMP_EP_H
#define __CONFIG_ZYNQMP_EP_H

#define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ	(CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
#define CONFIG_ZYNQ_EEPROM
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
				 ZYNQMP_USB1_XHCI_BASEADDR}

#define COUNTER_FREQUENCY	4000000

#include <configs/xilinx_zynqmp.h>

#endif /* __CONFIG_ZYNQMP_EP_H */
Commit	Line	Data
0b54a9dd	1	/*
d041e3e1	2	* Configuration for Xilinx ZynqMP emulation platforms
0b54a9dd SDPP	3	*
	4	* (C) Copyright 2014 - 2015 Xilinx, Inc.
	5	* Michal Simek <michal.simek@xilinx.com>
	6	* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
	7	*
	8	* Based on Configuration for Versatile Express
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef __CONFIG_ZYNQMP_EP_H
	14	#define __CONFIG_ZYNQMP_EP_H
	15
f3bd7280	16	#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
913a6eeb	17	#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
0b54a9dd	18	#define CONFIG_ZYNQ_EEPROM
f4dd69ca SDPP	19	#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
f4dd69ca SDPP	20	ZYNQMP_USB1_XHCI_BASEADDR}
0b54a9dd	21
713b6164 MS	22	#define COUNTER_FREQUENCY 4000000
713b6164 MS	23
0b54a9dd SDPP	24	#include <configs/xilinx_zynqmp.h>
	25
	26	#endif /* __CONFIG_ZYNQMP_EP_H */