]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
block: Move ceva driver to DM
authorMichal Simek <michal.simek@xilinx.com>
Thu, 8 Sep 2016 13:06:22 +0000 (15:06 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 8 Dec 2016 08:23:48 +0000 (09:23 +0100)
This patch also includes ARM64 zynqmp changes:
- Remove platform non DM initialization
- Remove hardcoded sata base address

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Series-to: sjg, agraf@suse.de
Series-cc: uboot
Series-version: 4
Series-changes: 2
- make ceva_init_sata static
- Move SATA_CEVA to defconfig
- Initalized max_lun and max_id platdata

Series-changes: 3
- Extend Kconfig help description
- sort dm.h
- Remove SPL undefinition from board file
- Fix Kconfig dependecies

arch/arm/include/asm/arch-zynqmp/hardware.h
board/xilinx/zynqmp/zynqmp.c
configs/xilinx_zynqmp_ep_defconfig
configs/xilinx_zynqmp_zcu102_defconfig
configs/xilinx_zynqmp_zcu102_revB_defconfig
drivers/block/Kconfig
drivers/block/sata_ceva.c
include/configs/xilinx_zynqmp.h
include/configs/xilinx_zynqmp_ep.h
include/configs/xilinx_zynqmp_zcu102.h

index 5908c50d09460a359150a73d65a1a60d9da0d914..041b43cfe044385b7e5b61928b38a07b7218adb9 100644 (file)
@@ -18,8 +18,6 @@
 
 #define ARASAN_NAND_BASEADDR   0xFF100000
 
-#define ZYNQMP_SATA_BASEADDR   0xFD0C0000
-
 #define ZYNQMP_USB0_XHCI_BASEADDR      0xFE200000
 #define ZYNQMP_USB1_XHCI_BASEADDR      0xFE300000
 
index cef1f6a13aee00adc48b0d0781ad5273fa14c8ba..a23c38acd99d415ea38a61d805adaeb6b952452b 100644 (file)
@@ -311,17 +311,6 @@ void reset_cpu(ulong addr)
 {
 }
 
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void scsi_init(void)
-{
-#if defined(CONFIG_SATA_CEVA)
-       init_sata(0);
-#endif
-       ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR);
-       scsi_scan(1);
-}
-#endif
-
 int board_late_init(void)
 {
        u32 reg = 0;
index f261e229d0879530735825d2a31168c6b9b655c3..b223e110c86a67d4df386dfebc2c607df2dd5911 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_SCSI=y
+CONFIG_SATA_CEVA=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
index 021e0ff964db8ea8e3823238eb714f516e59d1f0..9f2df491ec543c5668b287dae571677990f9dd6d 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_SCSI=y
+CONFIG_SATA_CEVA=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
index 34062bd24459795d7ff18c0e26b2ef0a40259b6e..b2b1720a03d1b2b87f98e2271cbc39e6ffdf1b94 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_SCSI=y
+CONFIG_SATA_CEVA=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
index 7b82ba67eadb4c8589497b0286c560d10d1d1cb5..88e66e2377a9a2122672fec256b9cd797017a18c 100644 (file)
@@ -39,4 +39,13 @@ config BLOCK_CACHE
 
 menu "SATA/SCSI device support"
 
+config SATA_CEVA
+       bool "Ceva Sata controller"
+       depends on AHCI
+       depends on DM_SCSI
+       help
+         This option enables Ceva Sata controller hard IP available on Xilinx
+         ZynqMP. Support up to 2 external devices. Complient with SATA 3.1 and
+         AHCI 1.3 specifications with hot-plug detect feature.
+
 endmenu
index dcc3b90b17f1157db4f56f30704dd4e448b62d1e..9b5466483aa42adec35ab0a3adabc686e7efd10f 100644 (file)
@@ -5,6 +5,7 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
+#include <dm.h>
 #include <netdev.h>
 #include <ahci.h>
 #include <scsi.h>
 #define DRV_NAME       "ahci-ceva"
 #define CEVA_FLAG_BROKEN_GEN2  1
 
-int init_sata(int dev)
+static int ceva_init_sata(ulong mmio)
 {
        ulong tmp;
-       ulong mmio = ZYNQMP_SATA_BASEADDR;
        int i;
 
        /*
@@ -111,3 +111,40 @@ int init_sata(int dev)
        }
        return 0;
 }
+
+static int sata_ceva_probe(struct udevice *dev)
+{
+       struct scsi_platdata *plat = dev_get_platdata(dev);
+
+       ceva_init_sata(plat->base);
+       return 0;
+}
+
+static const struct udevice_id sata_ceva_ids[] = {
+       { .compatible = "ceva,ahci-1v84" },
+       { }
+};
+
+static int sata_ceva_ofdata_to_platdata(struct udevice *dev)
+{
+       struct scsi_platdata *plat = dev_get_platdata(dev);
+
+       plat->base = dev_get_addr(dev);
+       if (plat->base == FDT_ADDR_T_NONE)
+               return -EINVAL;
+
+       /* Hardcode number for ceva sata controller */
+       plat->max_lun = 1; /* Actually two but untested */
+       plat->max_id = 2;
+
+       return 0;
+}
+
+U_BOOT_DRIVER(ceva_host_blk) = {
+       .name = "ceva_sata",
+       .id = UCLASS_SCSI,
+       .of_match = sata_ceva_ids,
+       .probe = sata_ceva_probe,
+       .ofdata_to_platdata = sata_ceva_ofdata_to_platdata,
+       .platdata_auto_alloc_size = sizeof(struct scsi_platdata),
+};
index d480990d2dd01a9dcf98801bb0bcb51e51c1542f..fb4f6d680672f3430222a105af5d4f0a7f8d6ace 100644 (file)
 #ifdef CONFIG_SATA_CEVA
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI
-#define CONFIG_SCSI_AHCI_PLAT
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID    2
 #define CONFIG_SYS_SCSI_MAX_LUN                1
 #define CONFIG_SYS_SCSI_MAX_DEVICE     (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
index d0ce768e6e14f1e447f2989aa64735fa3e1e2d68..3a572b7a6c2f4df9ae38ba860f70ab890ce4ab61 100644 (file)
@@ -16,7 +16,6 @@
 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ     52000000
 #define CONFIG_ZYNQ_SDHCI_MIN_FREQ     (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
 #define CONFIG_ZYNQ_EEPROM
-#define CONFIG_SATA_CEVA
 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
                                 ZYNQMP_USB1_XHCI_BASEADDR}
 
index adf2321c5d4f726ab57675704197b9bdc95a0f9d..8d018da23e34ce24938af793423fbae9c8f0e26a 100644 (file)
@@ -41,8 +41,6 @@
 #define CONFIG_CMD_PCA953X
 #define CONFIG_CMD_PCA953X_INFO
 
-#define CONFIG_SATA_CEVA
-
 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1