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Commit | Line | Data |
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21144298 | 1 | /* |
cb199102 | 2 | * (C) Copyright 2012-2013 |
21144298 S |
3 | * Texas Instruments, <www.ti.com> |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
21144298 | 6 | */ |
da2cc454 NM |
7 | #ifndef PALMAS_H |
8 | #define PALMAS_H | |
21144298 S |
9 | |
10 | #include <common.h> | |
11 | #include <i2c.h> | |
12 | ||
e9090fa4 LP |
13 | /* I2C chip addresses, TW6035/37 */ |
14 | #define TWL603X_CHIP_P1 0x48 /* Page 1 */ | |
15 | #define TWL603X_CHIP_P2 0x49 /* Page 2 */ | |
16 | #define TWL603X_CHIP_P3 0x4a /* Page 3 */ | |
21144298 | 17 | |
e9090fa4 LP |
18 | /* TPS659038/39 */ |
19 | #define TPS65903X_CHIP_P1 0x58 /* Page 1 */ | |
20 | ||
21 | /* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */ | |
22 | ||
23 | /* LDO1 control/voltage */ | |
24 | #define LDO1_CTRL 0x50 | |
25 | #define LDO1_VOLTAGE 0x51 | |
26 | ||
b4b06006 LV |
27 | /* LDO1 control/voltage for LP873x */ |
28 | #define LP873X_LDO1_ADDR 0x60 | |
29 | #define LP873X_LDO1_CTRL 0x9 | |
30 | #define LP873X_LDO1_VOLTAGE 0xa | |
31 | #define LP873X_LDO_VOLT_3V0 0x19 | |
32 | #define LP873X_LDO_VOLT_1V8 0xa | |
33 | #define LP873X_LDO_CTRL_EN (0x1 << 0) | |
34 | #define LP873X_LDO_CTRL_EN_PINCTRL (0x1 << 1) | |
35 | #define LP873X_LDO_CTRL_RDIS_EN (0x1 << 2) | |
36 | ||
35fe1cb0 DL |
37 | /* LDO2 control/voltage */ |
38 | #define LDO2_CTRL 0x52 | |
39 | #define LDO2_VOLTAGE 0x53 | |
40 | ||
e9090fa4 | 41 | /* LDO9 control/voltage */ |
21144298 S |
42 | #define LDO9_CTRL 0x60 |
43 | #define LDO9_VOLTAGE 0x61 | |
44 | ||
e9090fa4 LP |
45 | /* LDOUSB control/voltage */ |
46 | #define LDOUSB_CTRL 0x64 | |
47 | #define LDOUSB_VOLTAGE 0x65 | |
1bd435bc | 48 | #define LDO_CTRL 0x6a |
e9090fa4 LP |
49 | |
50 | /* Control of 32 kHz audio clock */ | |
51 | #define CLK32KGAUDIO_CTRL 0xd5 | |
52 | ||
53 | /* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */ | |
54 | #define SYSEN2_CTRL 0xd9 | |
55 | ||
56 | /* | |
57 | * Bit field definitions for LDOx_CTRL, SYSENx_CTRL | |
58 | * and some other xxx_CTRL resources: | |
59 | */ | |
60 | #define LDO9_BYP_EN (1 << 6) /* LDO9 only! */ | |
61 | #define RSC_STAT_ON (1 << 4) /* RO status bit! */ | |
62 | #define RSC_MODE_SLEEP (1 << 2) | |
63 | #define RSC_MODE_ACTIVE (1 << 0) | |
64 | ||
65 | /* Some LDO voltage values */ | |
66 | #define LDO_VOLT_OFF 0 | |
67 | #define LDO_VOLT_1V8 0x13 | |
68 | #define LDO_VOLT_3V0 0x2b | |
69 | #define LDO_VOLT_3V3 0x31 | |
70 | /* Request bypass, LDO9 only */ | |
71 | #define LDO9_BYPASS 0x3f | |
72 | ||
73 | /* SMPS7_CTRL */ | |
74 | #define SMPS7_CTRL 0x30 | |
75 | ||
76 | /* SMPS9_CTRL */ | |
77 | #define SMPS9_CTRL 0x38 | |
78 | #define SMPS9_VOLTAGE 0x3b | |
79 | ||
1bd435bc DM |
80 | /* SMPS10_CTRL */ |
81 | #define SMPS10_CTRL 0x3c | |
82 | #define SMPS10_MODE_ACTIVE_D 0x0d | |
83 | ||
e9090fa4 LP |
84 | /* Bit field definitions for SMPSx_CTRL */ |
85 | #define SMPS_MODE_ACT_AUTO 1 | |
86 | #define SMPS_MODE_ACT_ECO 2 | |
87 | #define SMPS_MODE_ACT_FPWM 3 | |
88 | #define SMPS_MODE_SLP_AUTO (1 << 2) | |
89 | #define SMPS_MODE_SLP_ECO (2 << 2) | |
90 | #define SMPS_MODE_SLP_FPWM (3 << 2) | |
91 | ||
92 | /* | |
93 | * Some popular SMPS voltages, all with RANGE=1; note | |
94 | * that RANGE cannot be changed on the fly | |
95 | */ | |
96 | #define SMPS_VOLT_OFF 0 | |
97 | #define SMPS_VOLT_1V2 0x90 | |
98 | #define SMPS_VOLT_1V8 0xae | |
99 | #define SMPS_VOLT_2V1 0xbd | |
100 | #define SMPS_VOLT_3V0 0xea | |
101 | #define SMPS_VOLT_3V3 0xf9 | |
102 | ||
103 | /* Backup Battery & VRTC Control */ | |
104 | #define BB_VRTC_CTRL 0xa8 | |
105 | /* Bit definitions for BB_VRTC_CTRL */ | |
106 | #define VRTC_EN_SLP (1 << 6) | |
107 | #define VRTC_EN_OFF (1 << 5) | |
108 | #define VRTC_PWEN (1 << 4) | |
109 | #define BB_LOW_ICHRG (1 << 3) | |
110 | #define BB_HIGH_ICHRG (0 << 3) | |
111 | #define BB_VSEL_3V0 (0 << 1) | |
112 | #define BB_VSEL_2V5 (1 << 1) | |
113 | #define BB_VSEL_3V15 (2 << 1) | |
114 | #define BB_VSEL_VBAT (3 << 1) | |
115 | #define BB_CHRG_EN (1 << 0) | |
21144298 | 116 | |
ff2d57ea NM |
117 | /* |
118 | * Functions to read and write from TPS659038/TWL6035/TWL6037 | |
119 | * or other Palmas family of TI PMICs | |
120 | */ | |
121 | static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val) | |
122 | { | |
123 | return i2c_write(chip_no, reg, 1, &val, 1); | |
124 | } | |
125 | ||
126 | static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) | |
127 | { | |
128 | return i2c_read(chip_no, reg, 1, val, 1); | |
129 | } | |
130 | ||
12733881 | 131 | void palmas_init_settings(void); |
b4b06006 LV |
132 | int palmas_mmc1_poweron_ldo(uint voltage); |
133 | int lp873x_mmc1_poweron_ldo(uint voltage); | |
e9090fa4 LP |
134 | int twl603x_mmc1_set_ldo9(u8 vsel); |
135 | int twl603x_audio_power(u8 on); | |
136 | int twl603x_enable_bb_charge(u8 bb_fields); | |
1bd435bc | 137 | int palmas_enable_ss_ldo(void); |
da2cc454 NM |
138 | |
139 | #endif /* PALMAS_H */ |