[thirdparty/pciutils.git] / lib / generic.c

/*
 *	The PCI Library -- Generic Direct Access Functions
 *
 *	Copyright (c) 1997--2000 Martin Mares <mj@ucw.cz>
 *
 *	Can be freely distributed and used under the terms of the GNU GPL.
 */

#include <string.h>

#include "internal.h"

void
pci_generic_scan_bus(struct pci_access *a, byte *busmap, int bus)
{
  int dev, multi, ht;
  struct pci_dev *t = pci_alloc_dev(a);

  a->debug("Scanning bus %02x for devices...\n", bus);
  if (busmap[bus])
    {
      a->warning("Bus %02x seen twice (firmware bug). Ignored.", bus);
      return;
    }
  busmap[bus] = 1;
  t->bus = bus;
  for(dev=0; dev<32; dev++)
    {
      t->dev = dev;
      multi = 0;
      for(t->func=0; !t->func || multi && t->func<8; t->func++)
	{
	  u32 vd = pci_read_long(t, PCI_VENDOR_ID);
	  struct pci_dev *d;

	  if (!vd || vd == 0xffffffff)
	    continue;
	  ht = pci_read_byte(t, PCI_HEADER_TYPE);
	  if (!t->func)
	    multi = ht & 0x80;
	  ht &= 0x7f;
	  d = pci_alloc_dev(a);
	  d->bus = t->bus;
	  d->dev = t->dev;
	  d->func = t->func;
	  d->vendor_id = vd & 0xffff;
	  d->device_id = vd >> 16U;
	  d->known_fields = PCI_FILL_IDENT;
	  d->hdrtype = ht;
	  pci_link_dev(a, d);
	  switch (ht)
	    {
	    case PCI_HEADER_TYPE_NORMAL:
	      break;
	    case PCI_HEADER_TYPE_BRIDGE:
	    case PCI_HEADER_TYPE_CARDBUS:
	      pci_generic_scan_bus(a, busmap, pci_read_byte(t, PCI_SECONDARY_BUS));
	      break;
	    default:
	      a->debug("Device %02x:%02x.%d has unknown header type %02x.\n", d->bus, d->dev, d->func, ht);
	    }
	}
    }
}

void
pci_generic_scan(struct pci_access *a)
{
  byte busmap[256];

  bzero(busmap, sizeof(busmap));
  pci_generic_scan_bus(a, busmap, 0);
}

int
pci_generic_fill_info(struct pci_dev *d, int flags)
{
  struct pci_access *a = d->access;

  if (flags & PCI_FILL_IDENT)
    {
      d->vendor_id = pci_read_word(d, PCI_VENDOR_ID);
      d->device_id = pci_read_word(d, PCI_DEVICE_ID);
    }
  if (flags & PCI_FILL_IRQ)
    d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE);
  if (flags & PCI_FILL_BASES)
    {
      int cnt = 0, i;
      bzero(d->base_addr, sizeof(d->base_addr));
      switch (d->hdrtype)
	{
	case PCI_HEADER_TYPE_NORMAL:
	  cnt = 6;
	  break;
	case PCI_HEADER_TYPE_BRIDGE:
	  cnt = 2;
	  break;
	case PCI_HEADER_TYPE_CARDBUS:
	  cnt = 1;
	  break;
	}
      if (cnt)
	{
	  u16 cmd = pci_read_word(d, PCI_COMMAND);
	  for(i=0; i<cnt; i++)
	    {
	      u32 x = pci_read_long(d, PCI_BASE_ADDRESS_0 + i*4);
	      if (!x || x == (u32) ~0)
		continue;
	      d->base_addr[i] = x;
	      if (x & PCI_BASE_ADDRESS_SPACE_IO)
		{
		  if (!a->buscentric && !(cmd & PCI_COMMAND_IO))
		    d->base_addr[i] = 0;
		}
	      else if (a->buscentric || (cmd & PCI_COMMAND_MEMORY))
		{
		  if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64)
		    {
		      if (i >= cnt-1)
			a->warning("%02x:%02x.%d: Invalid 64-bit address seen.", d->bus, d->dev, d->func);
		      else
			{
			  u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i)*4);
#ifdef HAVE_64BIT_ADDRESS
			  d->base_addr[i-1] |= ((pciaddr_t) y) << 32;
#else
			  if (y)
			    {
			      a->warning("%02x:%02x.%d 64-bit device address ignored.", d->bus, d->dev, d->func);
			      d->base_addr[i-1] = 0;
			    }
#endif
			}
		    }
		}
	      else
		d->base_addr[i] = 0;
	    }
	}
    }
  if (flags & PCI_FILL_ROM_BASE)
    {
      int reg = 0;
      d->rom_base_addr = 0;
      switch (d->hdrtype)
	{
	case PCI_HEADER_TYPE_NORMAL:
	  reg = PCI_ROM_ADDRESS;
	  break;
	case PCI_HEADER_TYPE_BRIDGE:
	  reg = PCI_ROM_ADDRESS1;
	  break;
	}
      if (reg)
	{
	  u32 a = pci_read_long(d, reg);
	  if (a & PCI_ROM_ADDRESS_ENABLE)
	    d->rom_base_addr = a;
	}
    }
  return flags & ~PCI_FILL_SIZES;
}

static int
pci_generic_block_op(struct pci_dev *d, int pos, byte *buf, int len,
		 int (*r)(struct pci_dev *d, int pos, byte *buf, int len))
{
  if ((pos & 1) && len >= 1)
    {
      if (!r(d, pos, buf, 1))
	return 0;
      pos++; buf++; len--;
    }
  if ((pos & 3) && len >= 2)
    {
      if (!r(d, pos, buf, 2))
	return 0;
      pos += 2; buf += 2; len -= 2;
    }
  while (len >= 4)
    {
      if (!r(d, pos, buf, 4))
	return 0;
      pos += 4; buf += 4; len -= 4;
    }
  if (len >= 2)
    {
      if (!r(d, pos, buf, 2))
	return 0;
      pos += 2; buf += 2; len -= 2;
    }
  if (len && !r(d, pos, buf, 1))
    return 0;
  return 1;
}

int
pci_generic_block_read(struct pci_dev *d, int pos, byte *buf, int len)
{
  return pci_generic_block_op(d, pos, buf, len, d->access->methods->read);
}

int
pci_generic_block_write(struct pci_dev *d, int pos, byte *buf, int len)
{
  return pci_generic_block_op(d, pos, buf, len, d->access->methods->write);
}
Commit	Line	Data
727ce158	1	/*
727ce158 MM	2	* The PCI Library -- Generic Direct Access Functions
727ce158 MM	3	*
a27a33dd	4	* Copyright (c) 1997--2000 Martin Mares <mj@ucw.cz>
727ce158 MM	5	*
	6	* Can be freely distributed and used under the terms of the GNU GPL.
	7	*/
	8
	9	#include <string.h>
	10
	11	#include "internal.h"
	12
14d6c0a3	13	void
727ce158 MM	14	pci_generic_scan_bus(struct pci_access a, byte busmap, int bus)
	15	{
	16	int dev, multi, ht;
	17	struct pci_dev *t = pci_alloc_dev(a);
	18
	19	a->debug("Scanning bus %02x for devices...\n", bus);
	20	if (busmap[bus])
	21	{
	22	a->warning("Bus %02x seen twice (firmware bug). Ignored.", bus);
	23	return;
	24	}
	25	busmap[bus] = 1;
	26	t->bus = bus;
	27	for(dev=0; dev<32; dev++)
	28	{
	29	t->dev = dev;
	30	multi = 0;
eb620239	31	for(t->func=0; !t->func \|\| multi && t->func<8; t->func++)
727ce158 MM	32	{
	33	u32 vd = pci_read_long(t, PCI_VENDOR_ID);
	34	struct pci_dev *d;
	35
	36	if (!vd \|\| vd == 0xffffffff)
eb620239	37	continue;
727ce158 MM	38	ht = pci_read_byte(t, PCI_HEADER_TYPE);
	39	if (!t->func)
	40	multi = ht & 0x80;
	41	ht &= 0x7f;
	42	d = pci_alloc_dev(a);
	43	d->bus = t->bus;
	44	d->dev = t->dev;
	45	d->func = t->func;
	46	d->vendor_id = vd & 0xffff;
	47	d->device_id = vd >> 16U;
	48	d->known_fields = PCI_FILL_IDENT;
	49	d->hdrtype = ht;
	50	pci_link_dev(a, d);
	51	switch (ht)
	52	{
	53	case PCI_HEADER_TYPE_NORMAL:
	54	break;
	55	case PCI_HEADER_TYPE_BRIDGE:
	56	case PCI_HEADER_TYPE_CARDBUS:
	57	pci_generic_scan_bus(a, busmap, pci_read_byte(t, PCI_SECONDARY_BUS));
	58	break;
	59	default:
3aa2523f	60	a->debug("Device %02x:%02x.%d has unknown header type %02x.\n", d->bus, d->dev, d->func, ht);
727ce158	61	}
727ce158 MM	62	}
	63	}
	64	}
	65
	66	void
	67	pci_generic_scan(struct pci_access *a)
	68	{
	69	byte busmap[256];
	70
	71	bzero(busmap, sizeof(busmap));
	72	pci_generic_scan_bus(a, busmap, 0);
	73	}
	74
e95c8373	75	int
727ce158 MM	76	pci_generic_fill_info(struct pci_dev *d, int flags)
	77	{
	78	struct pci_access *a = d->access;
	79
	80	if (flags & PCI_FILL_IDENT)
	81	{
	82	d->vendor_id = pci_read_word(d, PCI_VENDOR_ID);
	83	d->device_id = pci_read_word(d, PCI_DEVICE_ID);
	84	}
	85	if (flags & PCI_FILL_IRQ)
	86	d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE);
	87	if (flags & PCI_FILL_BASES)
	88	{
	89	int cnt = 0, i;
	90	bzero(d->base_addr, sizeof(d->base_addr));
	91	switch (d->hdrtype)
	92	{
	93	case PCI_HEADER_TYPE_NORMAL:
	94	cnt = 6;
	95	break;
	96	case PCI_HEADER_TYPE_BRIDGE:
	97	cnt = 2;
	98	break;
	99	case PCI_HEADER_TYPE_CARDBUS:
	100	cnt = 1;
	101	break;
	102	}
	103	if (cnt)
	104	{
	105	u16 cmd = pci_read_word(d, PCI_COMMAND);
	106	for(i=0; i<cnt; i++)
	107	{
	108	u32 x = pci_read_long(d, PCI_BASE_ADDRESS_0 + i*4);
	109	if (!x \|\| x == (u32) ~0)
	110	continue;
	111	d->base_addr[i] = x;
	112	if (x & PCI_BASE_ADDRESS_SPACE_IO)
	113	{
1812a795	114	if (!a->buscentric && !(cmd & PCI_COMMAND_IO))
727ce158 MM	115	d->base_addr[i] = 0;
727ce158 MM	116	}
1812a795	117	else if (a->buscentric \|\| (cmd & PCI_COMMAND_MEMORY))
727ce158 MM	118	{
	119	if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64)
	120	{
	121	if (i >= cnt-1)
	122	a->warning("%02x:%02x.%d: Invalid 64-bit address seen.", d->bus, d->dev, d->func);
	123	else
	124	{
	125	u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i)*4);
f3395cc5 MM	126	#ifdef HAVE_64BIT_ADDRESS
f3395cc5 MM	127	d->base_addr[i-1] \|= ((pciaddr_t) y) << 32;
727ce158 MM	128	#else
	129	if (y)
	130	{
	131	a->warning("%02x:%02x.%d 64-bit device address ignored.", d->bus, d->dev, d->func);
	132	d->base_addr[i-1] = 0;
	133	}
	134	#endif
	135	}
	136	}
	137	}
	138	else
	139	d->base_addr[i] = 0;
	140	}
	141	}
	142	}
	143	if (flags & PCI_FILL_ROM_BASE)
	144	{
	145	int reg = 0;
	146	d->rom_base_addr = 0;
	147	switch (d->hdrtype)
	148	{
	149	case PCI_HEADER_TYPE_NORMAL:
	150	reg = PCI_ROM_ADDRESS;
	151	break;
	152	case PCI_HEADER_TYPE_BRIDGE:
	153	reg = PCI_ROM_ADDRESS1;
	154	break;
	155	}
	156	if (reg)
	157	{
	158	u32 a = pci_read_long(d, reg);
	159	if (a & PCI_ROM_ADDRESS_ENABLE)
	160	d->rom_base_addr = a;
	161	}
	162	}
e95c8373	163	return flags & ~PCI_FILL_SIZES;
727ce158 MM	164	}
	165
	166	static int
	167	pci_generic_block_op(struct pci_dev d, int pos, byte buf, int len,
	168	int (r)(struct pci_dev d, int pos, byte *buf, int len))
	169	{
	170	if ((pos & 1) && len >= 1)
	171	{
	172	if (!r(d, pos, buf, 1))
	173	return 0;
	174	pos++; buf++; len--;
	175	}
	176	if ((pos & 3) && len >= 2)
	177	{
	178	if (!r(d, pos, buf, 2))
	179	return 0;
	180	pos += 2; buf += 2; len -= 2;
	181	}
	182	while (len >= 4)
	183	{
	184	if (!r(d, pos, buf, 4))
	185	return 0;
	186	pos += 4; buf += 4; len -= 4;
	187	}
	188	if (len >= 2)
	189	{
	190	if (!r(d, pos, buf, 2))
	191	return 0;
	192	pos += 2; buf += 2; len -= 2;
	193	}
	194	if (len && !r(d, pos, buf, 1))
	195	return 0;
	196	return 1;
	197	}
	198
	199	int
	200	pci_generic_block_read(struct pci_dev d, int pos, byte buf, int len)
	201	{
	202	return pci_generic_block_op(d, pos, buf, len, d->access->methods->read);
	203	}
	204
	205	int
	206	pci_generic_block_write(struct pci_dev d, int pos, byte buf, int len)
	207	{
	208	return pci_generic_block_op(d, pos, buf, len, d->access->methods->write);
	209	}