[thirdparty/pciutils.git] / lib / generic.c

/*
 *	The PCI Library -- Generic Direct Access Functions
 *
 *	Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz>
 *
 *	Can be freely distributed and used under the terms of the GNU GPL v2+.
 *
 *	SPDX-License-Identifier: GPL-2.0-or-later
 */

#include <string.h>

#include "internal.h"

void
pci_generic_scan_bus(struct pci_access *a, byte *busmap, int domain, int bus)
{
  int dev, multi, ht;
  struct pci_dev *t;

  a->debug("Scanning bus %02x for devices...\n", bus);
  if (busmap[bus])
    {
      a->warning("Bus %02x seen twice (firmware bug). Ignored.", bus);
      return;
    }
  busmap[bus] = 1;
  t = pci_alloc_dev(a);
  t->domain = domain;
  t->bus = bus;
  for (dev=0; dev<32; dev++)
    {
      t->dev = dev;
      multi = 0;
      for (t->func=0; !t->func || multi && t->func<8; t->func++)
	{
	  u32 vd = pci_read_long(t, PCI_VENDOR_ID);
	  struct pci_dev *d;

	  if (!vd || vd == 0xffffffff)
	    continue;
	  ht = pci_read_byte(t, PCI_HEADER_TYPE);
	  if (!t->func)
	    multi = ht & 0x80;
	  ht &= 0x7f;
	  d = pci_alloc_dev(a);
	  d->domain = t->domain;
	  d->bus = t->bus;
	  d->dev = t->dev;
	  d->func = t->func;
	  d->vendor_id = vd & 0xffff;
	  d->device_id = vd >> 16U;
	  d->known_fields = PCI_FILL_IDENT;
	  d->hdrtype = ht;
	  pci_link_dev(a, d);
	  switch (ht)
	    {
	    case PCI_HEADER_TYPE_NORMAL:
	      break;
	    case PCI_HEADER_TYPE_BRIDGE:
	    case PCI_HEADER_TYPE_CARDBUS:
	      pci_generic_scan_bus(a, busmap, domain, pci_read_byte(t, PCI_SECONDARY_BUS));
	      break;
	    default:
	      a->debug("Device %04x:%02x:%02x.%d has unknown header type %02x.\n", d->domain, d->bus, d->dev, d->func, ht);
	    }
	}
    }
  pci_free_dev(t);
}

void
pci_generic_scan_domain(struct pci_access *a, int domain)
{
  byte busmap[256];

  memset(busmap, 0, sizeof(busmap));
  pci_generic_scan_bus(a, busmap, domain, 0);
}

void
pci_generic_scan(struct pci_access *a)
{
  pci_generic_scan_domain(a, 0);
}

static int
get_hdr_type(struct pci_dev *d)
{
  if (d->hdrtype < 0)
    d->hdrtype = pci_read_byte(d, PCI_HEADER_TYPE) & 0x7f;
  return d->hdrtype;
}

void
pci_generic_fill_info(struct pci_dev *d, unsigned int flags)
{
  struct pci_access *a = d->access;
  struct pci_cap *cap;

  if (want_fill(d, flags, PCI_FILL_IDENT))
    {
      d->vendor_id = pci_read_word(d, PCI_VENDOR_ID);
      d->device_id = pci_read_word(d, PCI_DEVICE_ID);
    }

  if (want_fill(d, flags, PCI_FILL_CLASS))
    d->device_class = pci_read_word(d, PCI_CLASS_DEVICE);

  if (want_fill(d, flags, PCI_FILL_CLASS_EXT))
    {
      d->prog_if = pci_read_byte(d, PCI_CLASS_PROG);
      d->rev_id = pci_read_byte(d, PCI_REVISION_ID);
    }

  if (want_fill(d, flags, PCI_FILL_SUBSYS))
    {
      switch (get_hdr_type(d))
        {
        case PCI_HEADER_TYPE_NORMAL:
          d->subsys_vendor_id = pci_read_word(d, PCI_SUBSYSTEM_VENDOR_ID);
          d->subsys_id = pci_read_word(d, PCI_SUBSYSTEM_ID);
          break;
        case PCI_HEADER_TYPE_BRIDGE:
          cap = pci_find_cap(d, PCI_CAP_ID_SSVID, PCI_CAP_NORMAL);
          if (cap)
            {
              d->subsys_vendor_id = pci_read_word(d, cap->addr + PCI_SSVID_VENDOR);
              d->subsys_id = pci_read_word(d, cap->addr + PCI_SSVID_DEVICE);
            }
          break;
        case PCI_HEADER_TYPE_CARDBUS:
          d->subsys_vendor_id = pci_read_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
          d->subsys_id = pci_read_word(d, PCI_CB_SUBSYSTEM_ID);
          break;
        default:
          clear_fill(d, PCI_FILL_SUBSYS);
        }
    }

  if (want_fill(d, flags, PCI_FILL_IRQ))
    d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE);

  if (want_fill(d, flags, PCI_FILL_BASES))
    {
      int cnt = 0, i;
      memset(d->base_addr, 0, sizeof(d->base_addr));
      switch (get_hdr_type(d))
	{
	case PCI_HEADER_TYPE_NORMAL:
	  cnt = 6;
	  break;
	case PCI_HEADER_TYPE_BRIDGE:
	  cnt = 2;
	  break;
	case PCI_HEADER_TYPE_CARDBUS:
	  cnt = 1;
	  break;
	}
      if (cnt)
	{
	  for (i=0; i<cnt; i++)
	    {
	      u32 x = pci_read_long(d, PCI_BASE_ADDRESS_0 + i*4);
	      if (!x || x == (u32) ~0)
		continue;
	      if ((x & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
		d->base_addr[i] = x;
	      else
		{
		  if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) != PCI_BASE_ADDRESS_MEM_TYPE_64)
		    d->base_addr[i] = x;
		  else if (i >= cnt-1)
		    a->warning("%04x:%02x:%02x.%d: Invalid 64-bit address seen for BAR %d.", d->domain, d->bus, d->dev, d->func, i);
		  else
		    {
		      u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i)*4);
#ifdef PCI_HAVE_64BIT_ADDRESS
		      d->base_addr[i-1] = x | (((pciaddr_t) y) << 32);
#else
		      if (y)
			a->warning("%04x:%02x:%02x.%d 64-bit device address ignored.", d->domain, d->bus, d->dev, d->func);
		      else
			d->base_addr[i-1] = x;
#endif
		    }
		}
	    }
	}
    }

  if (want_fill(d, flags, PCI_FILL_ROM_BASE))
    {
      int reg = 0;
      d->rom_base_addr = 0;
      switch (get_hdr_type(d))
	{
	case PCI_HEADER_TYPE_NORMAL:
	  reg = PCI_ROM_ADDRESS;
	  break;
	case PCI_HEADER_TYPE_BRIDGE:
	  reg = PCI_ROM_ADDRESS1;
	  break;
	}
      if (reg)
	{
	  u32 u = pci_read_long(d, reg);
	  if (u != 0xffffffff)
	    d->rom_base_addr = u;
	}
    }

  pci_scan_caps(d, flags);
}

static int
pci_generic_block_op(struct pci_dev *d, int pos, byte *buf, int len,
		 int (*r)(struct pci_dev *d, int pos, byte *buf, int len))
{
  if ((pos & 1) && len >= 1)
    {
      if (!r(d, pos, buf, 1))
	return 0;
      pos++; buf++; len--;
    }
  if ((pos & 3) && len >= 2)
    {
      if (!r(d, pos, buf, 2))
	return 0;
      pos += 2; buf += 2; len -= 2;
    }
  while (len >= 4)
    {
      if (!r(d, pos, buf, 4))
	return 0;
      pos += 4; buf += 4; len -= 4;
    }
  if (len >= 2)
    {
      if (!r(d, pos, buf, 2))
	return 0;
      pos += 2; buf += 2; len -= 2;
    }
  if (len && !r(d, pos, buf, 1))
    return 0;
  return 1;
}

int
pci_generic_block_read(struct pci_dev *d, int pos, byte *buf, int len)
{
  return pci_generic_block_op(d, pos, buf, len, d->access->methods->read);
}

int
pci_generic_block_write(struct pci_dev *d, int pos, byte *buf, int len)
{
  return pci_generic_block_op(d, pos, buf, len, d->access->methods->write);
}
Commit	Line	Data
727ce158	1	/*
727ce158 MM	2	* The PCI Library -- Generic Direct Access Functions
727ce158 MM	3	*
8e9299e4	4	* Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz>
727ce158	5	*
61829219 MM	6	* Can be freely distributed and used under the terms of the GNU GPL v2+.
	7	*
	8	* SPDX-License-Identifier: GPL-2.0-or-later
727ce158 MM	9	*/
	10
	11	#include <string.h>
	12
	13	#include "internal.h"
	14
14d6c0a3	15	void
8d750a8d	16	pci_generic_scan_bus(struct pci_access a, byte busmap, int domain, int bus)
727ce158 MM	17	{
727ce158 MM	18	int dev, multi, ht;
05bb10a2	19	struct pci_dev *t;
727ce158 MM	20
	21	a->debug("Scanning bus %02x for devices...\n", bus);
	22	if (busmap[bus])
	23	{
	24	a->warning("Bus %02x seen twice (firmware bug). Ignored.", bus);
	25	return;
	26	}
	27	busmap[bus] = 1;
05bb10a2	28	t = pci_alloc_dev(a);
8d750a8d	29	t->domain = domain;
727ce158	30	t->bus = bus;
de7ef8bc	31	for (dev=0; dev<32; dev++)
727ce158 MM	32	{
	33	t->dev = dev;
	34	multi = 0;
de7ef8bc	35	for (t->func=0; !t->func \|\| multi && t->func<8; t->func++)
727ce158 MM	36	{
	37	u32 vd = pci_read_long(t, PCI_VENDOR_ID);
	38	struct pci_dev *d;
	39
	40	if (!vd \|\| vd == 0xffffffff)
eb620239	41	continue;
727ce158 MM	42	ht = pci_read_byte(t, PCI_HEADER_TYPE);
	43	if (!t->func)
	44	multi = ht & 0x80;
	45	ht &= 0x7f;
	46	d = pci_alloc_dev(a);
8d750a8d	47	d->domain = t->domain;
727ce158 MM	48	d->bus = t->bus;
	49	d->dev = t->dev;
	50	d->func = t->func;
	51	d->vendor_id = vd & 0xffff;
	52	d->device_id = vd >> 16U;
	53	d->known_fields = PCI_FILL_IDENT;
	54	d->hdrtype = ht;
	55	pci_link_dev(a, d);
	56	switch (ht)
	57	{
	58	case PCI_HEADER_TYPE_NORMAL:
	59	break;
	60	case PCI_HEADER_TYPE_BRIDGE:
	61	case PCI_HEADER_TYPE_CARDBUS:
8d750a8d	62	pci_generic_scan_bus(a, busmap, domain, pci_read_byte(t, PCI_SECONDARY_BUS));
727ce158 MM	63	break;
727ce158 MM	64	default:
84c8d1bb	65	a->debug("Device %04x:%02x:%02x.%d has unknown header type %02x.\n", d->domain, d->bus, d->dev, d->func, ht);
727ce158	66	}
727ce158 MM	67	}
727ce158 MM	68	}
05bb10a2	69	pci_free_dev(t);
727ce158 MM	70	}
	71
	72	void
8d750a8d	73	pci_generic_scan_domain(struct pci_access *a, int domain)
727ce158 MM	74	{
	75	byte busmap[256];
	76
1ac3a99d	77	memset(busmap, 0, sizeof(busmap));
8d750a8d PR	78	pci_generic_scan_bus(a, busmap, domain, 0);
	79	}
	80
	81	void
	82	pci_generic_scan(struct pci_access *a)
	83	{
	84	pci_generic_scan_domain(a, 0);
727ce158 MM	85	}
727ce158 MM	86
8e9299e4 MM	87	static int
	88	get_hdr_type(struct pci_dev *d)
	89	{
	90	if (d->hdrtype < 0)
	91	d->hdrtype = pci_read_byte(d, PCI_HEADER_TYPE) & 0x7f;
	92	return d->hdrtype;
	93	}
	94
	95	void
82c06b47	96	pci_generic_fill_info(struct pci_dev *d, unsigned int flags)
727ce158 MM	97	{
727ce158 MM	98	struct pci_access *a = d->access;
4fd10eb9	99	struct pci_cap *cap;
727ce158	100
8e9299e4	101	if (want_fill(d, flags, PCI_FILL_IDENT))
727ce158 MM	102	{
	103	d->vendor_id = pci_read_word(d, PCI_VENDOR_ID);
	104	d->device_id = pci_read_word(d, PCI_DEVICE_ID);
	105	}
82c06b47	106
8e9299e4 MM	107	if (want_fill(d, flags, PCI_FILL_CLASS))
8e9299e4 MM	108	d->device_class = pci_read_word(d, PCI_CLASS_DEVICE);
82c06b47	109
2dc7b53b PR	110	if (want_fill(d, flags, PCI_FILL_CLASS_EXT))
	111	{
	112	d->prog_if = pci_read_byte(d, PCI_CLASS_PROG);
	113	d->rev_id = pci_read_byte(d, PCI_REVISION_ID);
	114	}
	115
	116	if (want_fill(d, flags, PCI_FILL_SUBSYS))
	117	{
	118	switch (get_hdr_type(d))
	119	{
	120	case PCI_HEADER_TYPE_NORMAL:
	121	d->subsys_vendor_id = pci_read_word(d, PCI_SUBSYSTEM_VENDOR_ID);
	122	d->subsys_id = pci_read_word(d, PCI_SUBSYSTEM_ID);
	123	break;
4fd10eb9 PR	124	case PCI_HEADER_TYPE_BRIDGE:
	125	cap = pci_find_cap(d, PCI_CAP_ID_SSVID, PCI_CAP_NORMAL);
	126	if (cap)
	127	{
	128	d->subsys_vendor_id = pci_read_word(d, cap->addr + PCI_SSVID_VENDOR);
	129	d->subsys_id = pci_read_word(d, cap->addr + PCI_SSVID_DEVICE);
	130	}
	131	break;
2dc7b53b PR	132	case PCI_HEADER_TYPE_CARDBUS:
	133	d->subsys_vendor_id = pci_read_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
	134	d->subsys_id = pci_read_word(d, PCI_CB_SUBSYSTEM_ID);
	135	break;
	136	default:
	137	clear_fill(d, PCI_FILL_SUBSYS);
	138	}
	139	}
	140
8e9299e4 MM	141	if (want_fill(d, flags, PCI_FILL_IRQ))
8e9299e4 MM	142	d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE);
82c06b47	143
8e9299e4	144	if (want_fill(d, flags, PCI_FILL_BASES))
727ce158 MM	145	{
727ce158 MM	146	int cnt = 0, i;
1ac3a99d	147	memset(d->base_addr, 0, sizeof(d->base_addr));
8e9299e4	148	switch (get_hdr_type(d))
727ce158 MM	149	{
	150	case PCI_HEADER_TYPE_NORMAL:
	151	cnt = 6;
	152	break;
	153	case PCI_HEADER_TYPE_BRIDGE:
	154	cnt = 2;
	155	break;
	156	case PCI_HEADER_TYPE_CARDBUS:
	157	cnt = 1;
	158	break;
	159	}
	160	if (cnt)
	161	{
de7ef8bc	162	for (i=0; i<cnt; i++)
727ce158 MM	163	{
	164	u32 x = pci_read_long(d, PCI_BASE_ADDRESS_0 + i*4);
	165	if (!x \|\| x == (u32) ~0)
	166	continue;
6aa54f1b MM	167	if ((x & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
	168	d->base_addr[i] = x;
	169	else
727ce158	170	{
6aa54f1b MM	171	if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) != PCI_BASE_ADDRESS_MEM_TYPE_64)
	172	d->base_addr[i] = x;
	173	else if (i >= cnt-1)
	174	a->warning("%04x:%02x:%02x.%d: Invalid 64-bit address seen for BAR %d.", d->domain, d->bus, d->dev, d->func, i);
	175	else
727ce158	176	{
6aa54f1b	177	u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i)*4);
489233b4	178	#ifdef PCI_HAVE_64BIT_ADDRESS
6aa54f1b	179	d->base_addr[i-1] = x \| (((pciaddr_t) y) << 32);
727ce158	180	#else
6aa54f1b MM	181	if (y)
	182	a->warning("%04x:%02x:%02x.%d 64-bit device address ignored.", d->domain, d->bus, d->dev, d->func);
	183	else
	184	d->base_addr[i-1] = x;
727ce158	185	#endif
727ce158 MM	186	}
727ce158 MM	187	}
727ce158 MM	188	}
	189	}
	190	}
82c06b47	191
8e9299e4	192	if (want_fill(d, flags, PCI_FILL_ROM_BASE))
727ce158 MM	193	{
	194	int reg = 0;
	195	d->rom_base_addr = 0;
8e9299e4	196	switch (get_hdr_type(d))
727ce158 MM	197	{
	198	case PCI_HEADER_TYPE_NORMAL:
	199	reg = PCI_ROM_ADDRESS;
	200	break;
	201	case PCI_HEADER_TYPE_BRIDGE:
	202	reg = PCI_ROM_ADDRESS1;
	203	break;
	204	}
	205	if (reg)
	206	{
6aa54f1b MM	207	u32 u = pci_read_long(d, reg);
	208	if (u != 0xffffffff)
	209	d->rom_base_addr = u;
727ce158 MM	210	}
727ce158 MM	211	}
82c06b47	212
8e9299e4	213	pci_scan_caps(d, flags);
727ce158 MM	214	}
	215
	216	static int
	217	pci_generic_block_op(struct pci_dev d, int pos, byte buf, int len,
	218	int (r)(struct pci_dev d, int pos, byte *buf, int len))
	219	{
	220	if ((pos & 1) && len >= 1)
	221	{
	222	if (!r(d, pos, buf, 1))
	223	return 0;
	224	pos++; buf++; len--;
	225	}
	226	if ((pos & 3) && len >= 2)
	227	{
	228	if (!r(d, pos, buf, 2))
	229	return 0;
	230	pos += 2; buf += 2; len -= 2;
	231	}
	232	while (len >= 4)
	233	{
	234	if (!r(d, pos, buf, 4))
	235	return 0;
	236	pos += 4; buf += 4; len -= 4;
	237	}
	238	if (len >= 2)
	239	{
	240	if (!r(d, pos, buf, 2))
	241	return 0;
	242	pos += 2; buf += 2; len -= 2;
	243	}
	244	if (len && !r(d, pos, buf, 1))
	245	return 0;
	246	return 1;
	247	}
	248
	249	int
	250	pci_generic_block_read(struct pci_dev d, int pos, byte buf, int len)
	251	{
	252	return pci_generic_block_op(d, pos, buf, len, d->access->methods->read);
	253	}
	254
	255	int
	256	pci_generic_block_write(struct pci_dev d, int pos, byte buf, int len)
	257	{
	258	return pci_generic_block_op(d, pos, buf, len, d->access->methods->write);
	259	}