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727ce158 | 1 | /* |
727ce158 MM |
2 | * The PCI Library |
3 | * | |
a2413560 | 4 | * Copyright (c) 1997--2004 Martin Mares <mj@ucw.cz> |
727ce158 MM |
5 | * |
6 | * Can be freely distributed and used under the terms of the GNU GPL. | |
7 | */ | |
8 | ||
9 | #ifndef _PCI_LIB_H | |
10 | #define _PCI_LIB_H | |
11 | ||
12 | #include "config.h" | |
727ce158 | 13 | #include "header.h" |
727ce158 MM |
14 | |
15 | /* | |
9739916e | 16 | * Types and format strings |
727ce158 MM |
17 | */ |
18 | ||
168b4f46 MM |
19 | #include <sys/types.h> |
20 | ||
a2413560 MM |
21 | #ifdef OS_WINDOWS |
22 | typedef unsigned char byte; | |
23 | typedef char u8; | |
24 | typedef unsigned short word; | |
25 | typedef short u16; | |
26 | typedef unsigned long u32; | |
27 | #else | |
168b4f46 MM |
28 | typedef u_int8_t byte; |
29 | typedef u_int8_t u8; | |
30 | typedef u_int16_t word; | |
31 | typedef u_int16_t u16; | |
32 | typedef u_int32_t u32; | |
a2413560 | 33 | #endif |
14d6c0a3 | 34 | |
9739916e MM |
35 | #ifdef HAVE_64BIT_ADDRESS |
36 | #include <limits.h> | |
37 | #if ULONG_MAX > 0xffffffff | |
38 | typedef unsigned long u64; | |
39 | #define PCIADDR_T_FMT "%016lx" | |
40 | #define PCIADDR_PORT_FMT "%04lx" | |
41 | #else | |
42 | typedef unsigned long long u64; | |
11f7b31b MM |
43 | #define PCIADDR_T_FMT "%016llx" |
44 | #define PCIADDR_PORT_FMT "%04llx" | |
14d6c0a3 | 45 | #endif |
9739916e MM |
46 | typedef u64 pciaddr_t; |
47 | #else | |
48 | typedef u32 pciaddr_t; | |
49 | #define PCIADDR_T_FMT "%08x" | |
50 | #define PCIADDR_PORT_FMT "%04x" | |
80459c65 MM |
51 | #endif |
52 | ||
9739916e MM |
53 | #ifdef ARCH_SPARC64 |
54 | /* On sparc64 Linux the kernel reports remapped port addresses and IRQ numbers */ | |
55 | #undef PCIADDR_PORT_FMT | |
56 | #define PCIADDR_PORT_FMT PCIADDR_T_FMT | |
57 | #define PCIIRQ_FMT "%08x" | |
f3395cc5 | 58 | #else |
9739916e | 59 | #define PCIIRQ_FMT "%d" |
f3395cc5 MM |
60 | #endif |
61 | ||
727ce158 MM |
62 | /* |
63 | * PCI Access Structure | |
64 | */ | |
65 | ||
66 | struct pci_methods; | |
67 | struct nl_entry; | |
68 | ||
d772ef15 MM |
69 | enum pci_access_type { |
70 | /* Known access methods, remember to update access.c as well */ | |
71 | PCI_ACCESS_AUTO, /* Autodetection (params: none) */ | |
11f7b31b | 72 | PCI_ACCESS_SYS_BUS_PCI, /* Linux /sys/bus/pci (params: path) */ |
d772ef15 MM |
73 | PCI_ACCESS_PROC_BUS_PCI, /* Linux /proc/bus/pci (params: path) */ |
74 | PCI_ACCESS_I386_TYPE1, /* i386 ports, type 1 (params: none) */ | |
75 | PCI_ACCESS_I386_TYPE2, /* i386 ports, type 2 (params: none) */ | |
76 | PCI_ACCESS_FBSD_DEVICE, /* FreeBSD /dev/pci (params: path) */ | |
77 | PCI_ACCESS_AIX_DEVICE, /* /dev/pci0, /dev/bus0, etc. */ | |
78 | PCI_ACCESS_NBSD_LIBPCI, /* NetBSD libpci */ | |
79 | PCI_ACCESS_DUMP, /* Dump file (params: filename) */ | |
80 | PCI_ACCESS_MAX | |
81 | }; | |
727ce158 MM |
82 | |
83 | struct pci_access { | |
84 | /* Options you can change: */ | |
85 | unsigned int method; /* Access method */ | |
86 | char *method_params[PCI_ACCESS_MAX]; /* Parameters for the methods */ | |
87 | int writeable; /* Open in read/write mode */ | |
88 | int buscentric; /* Bus-centric view of the world */ | |
89 | char *id_file_name; /* Name of ID list file */ | |
90 | int numeric_ids; /* Don't resolve device IDs to names */ | |
91 | int debugging; /* Turn on debugging messages */ | |
92 | ||
93 | /* Functions you can override: */ | |
94 | void (*error)(char *msg, ...); /* Write error message and quit */ | |
95 | void (*warning)(char *msg, ...); /* Write a warning message */ | |
96 | void (*debug)(char *msg, ...); /* Write a debugging message */ | |
97 | ||
98 | struct pci_dev *devices; /* Devices found on this bus */ | |
99 | ||
100 | /* Fields used internally: */ | |
101 | struct pci_methods *methods; | |
102 | char *nl_list; /* Name list cache */ | |
103 | struct nl_entry **nl_hash; | |
104 | int fd; /* proc: fd */ | |
105 | int fd_rw; /* proc: fd opened read-write */ | |
106 | struct pci_dev *cached_dev; /* proc: device the fd is for */ | |
bc6346df | 107 | int fd_pos; /* proc: current position */ |
727ce158 MM |
108 | }; |
109 | ||
110 | /* Initialize PCI access */ | |
111 | struct pci_access *pci_alloc(void); | |
112 | void pci_init(struct pci_access *); | |
113 | void pci_cleanup(struct pci_access *); | |
114 | ||
115 | /* Scanning of devices */ | |
116 | void pci_scan_bus(struct pci_access *acc); | |
84c8d1bb | 117 | struct pci_dev *pci_get_dev(struct pci_access *acc, int domain, int bus, int dev, int func); /* Raw access to specified device */ |
727ce158 MM |
118 | void pci_free_dev(struct pci_dev *); |
119 | ||
120 | /* | |
121 | * Devices | |
122 | */ | |
123 | ||
124 | struct pci_dev { | |
125 | struct pci_dev *next; /* Next device in the chain */ | |
84c8d1bb MM |
126 | u16 domain; /* PCI domain (host bridge) */ |
127 | byte bus, dev, func; /* Bus inside domain, device and function */ | |
727ce158 MM |
128 | |
129 | /* These fields are set by pci_fill_info() */ | |
e95c8373 | 130 | int known_fields; /* Set of info fields already known */ |
727ce158 MM |
131 | word vendor_id, device_id; /* Identity of the device */ |
132 | int irq; /* IRQ number */ | |
f3395cc5 | 133 | pciaddr_t base_addr[6]; /* Base addresses */ |
e95c8373 | 134 | pciaddr_t size[6]; /* Region sizes */ |
f3395cc5 | 135 | pciaddr_t rom_base_addr; /* Expansion ROM base address */ |
e95c8373 | 136 | pciaddr_t rom_size; /* Expansion ROM size */ |
727ce158 MM |
137 | |
138 | /* Fields used internally: */ | |
139 | struct pci_access *access; | |
140 | struct pci_methods *methods; | |
84c8d1bb | 141 | byte *cache; /* Cached config registers */ |
3430bafe | 142 | int cache_len; |
84c8d1bb | 143 | int hdrtype; /* Cached header type, -1 if unknown */ |
727ce158 MM |
144 | void *aux; /* Auxillary data */ |
145 | }; | |
146 | ||
f3395cc5 MM |
147 | #define PCI_ADDR_IO_MASK (~(pciaddr_t) 0x3) |
148 | #define PCI_ADDR_MEM_MASK (~(pciaddr_t) 0xf) | |
149 | ||
727ce158 MM |
150 | byte pci_read_byte(struct pci_dev *, int pos); /* Access to configuration space */ |
151 | word pci_read_word(struct pci_dev *, int pos); | |
152 | u32 pci_read_long(struct pci_dev *, int pos); | |
153 | int pci_read_block(struct pci_dev *, int pos, byte *buf, int len); | |
154 | int pci_write_byte(struct pci_dev *, int pos, byte data); | |
155 | int pci_write_word(struct pci_dev *, int pos, word data); | |
156 | int pci_write_long(struct pci_dev *, int pos, u32 data); | |
157 | int pci_write_block(struct pci_dev *, int pos, byte *buf, int len); | |
158 | ||
e95c8373 | 159 | int pci_fill_info(struct pci_dev *, int flags); /* Fill in device information */ |
727ce158 MM |
160 | |
161 | #define PCI_FILL_IDENT 1 | |
162 | #define PCI_FILL_IRQ 2 | |
163 | #define PCI_FILL_BASES 4 | |
164 | #define PCI_FILL_ROM_BASE 8 | |
e95c8373 | 165 | #define PCI_FILL_SIZES 16 |
727ce158 MM |
166 | #define PCI_FILL_RESCAN 0x10000 |
167 | ||
3430bafe | 168 | void pci_setup_cache(struct pci_dev *, byte *cache, int len); |
727ce158 MM |
169 | |
170 | /* | |
171 | * Filters | |
172 | */ | |
173 | ||
174 | struct pci_filter { | |
84c8d1bb | 175 | int domain, bus, slot, func; /* -1 = ANY */ |
727ce158 MM |
176 | int vendor, device; |
177 | }; | |
178 | ||
179 | void pci_filter_init(struct pci_access *, struct pci_filter *); | |
180 | char *pci_filter_parse_slot(struct pci_filter *, char *); | |
181 | char *pci_filter_parse_id(struct pci_filter *, char *); | |
182 | int pci_filter_match(struct pci_filter *, struct pci_dev *); | |
183 | ||
184 | /* | |
185 | * Device names | |
186 | */ | |
187 | ||
d4798a32 | 188 | char *pci_lookup_name(struct pci_access *a, char *buf, int size, int flags, u32 arg1, u32 arg2, u32 arg3, u32 arg4); |
727ce158 MM |
189 | void pci_free_name_list(struct pci_access *a); |
190 | ||
191 | #define PCI_LOOKUP_VENDOR 1 | |
192 | #define PCI_LOOKUP_DEVICE 2 | |
193 | #define PCI_LOOKUP_CLASS 4 | |
194 | #define PCI_LOOKUP_SUBSYSTEM 8 | |
d4798a32 | 195 | #define PCI_LOOKUP_PROGIF 16 |
727ce158 MM |
196 | #define PCI_LOOKUP_NUMERIC 0x10000 |
197 | ||
198 | #endif |