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a5544970 | 1 | /* Copyright (C) 2012-2019 Free Software Foundation, Inc. |
48310492 RH |
2 | Contributed by Richard Henderson <rth@redhat.com>. |
3 | ||
4 | This file is part of the GNU Atomic Library (libatomic). | |
5 | ||
6 | Libatomic is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY | |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS | |
13 | FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | Under Section 7 of GPL version 3, you are granted additional | |
17 | permissions described in the GCC Runtime Library Exception, version | |
18 | 3.1, as published by the Free Software Foundation. | |
19 | ||
20 | You should have received a copy of the GNU General Public License and | |
21 | a copy of the GCC Runtime Library Exception along with this program; | |
22 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
23 | <http://www.gnu.org/licenses/>. */ | |
24 | ||
25 | #if HAVE_IFUNC | |
26 | #include <cpuid.h> | |
27 | ||
cb3c90cc FW |
28 | #ifdef __x86_64__ |
29 | # define FEAT1_REGISTER ecx | |
30 | #else | |
31 | # define FEAT1_REGISTER edx | |
32 | #endif | |
33 | ||
34 | /* Value of the CPUID feature register FEAT1_REGISTER for the cmpxchg | |
35 | bit for IFUNC_COND1 below. */ | |
36 | extern unsigned int __libat_feat1 HIDDEN; | |
37 | ||
38 | /* Initialize libat_feat1 and return its value. */ | |
39 | unsigned int __libat_feat1_init (void) HIDDEN; | |
40 | ||
41 | /* Return the value of the relevant feature register for the relevant | |
42 | cmpxchg bit, or 0 if there is no CPUID support. */ | |
43 | static inline unsigned int | |
44 | __attribute__ ((const)) | |
45 | load_feat1 (void) | |
46 | { | |
47 | /* See the store in __libat_feat1_init. */ | |
48 | unsigned int feat1 = __atomic_load_n (&__libat_feat1, __ATOMIC_RELAXED); | |
49 | if (feat1 == 0) | |
50 | /* Assume that initialization has not happened yet. This may get | |
51 | called repeatedly if the CPU does not have any feature bits at | |
52 | all. */ | |
53 | feat1 = __libat_feat1_init (); | |
54 | return feat1; | |
55 | } | |
48310492 RH |
56 | |
57 | #ifdef __x86_64__ | |
cb3c90cc | 58 | # define IFUNC_COND_1 (load_feat1 () & bit_CMPXCHG16B) |
48310492 | 59 | #else |
cb3c90cc | 60 | # define IFUNC_COND_1 (load_feat1 () & bit_CMPXCHG8B) |
48310492 RH |
61 | #endif |
62 | ||
63 | #ifdef __x86_64__ | |
64 | # define IFUNC_NCOND(N) (N == 16) | |
65 | #else | |
66 | # define IFUNC_NCOND(N) (N == 8) | |
67 | #endif | |
68 | ||
69 | #ifdef __x86_64__ | |
70 | # undef MAYBE_HAVE_ATOMIC_CAS_16 | |
71 | # define MAYBE_HAVE_ATOMIC_CAS_16 IFUNC_COND_1 | |
72 | # undef MAYBE_HAVE_ATOMIC_EXCHANGE_16 | |
73 | # define MAYBE_HAVE_ATOMIC_EXCHANGE_16 IFUNC_COND_1 | |
74 | # undef MAYBE_HAVE_ATOMIC_LDST_16 | |
75 | # define MAYBE_HAVE_ATOMIC_LDST_16 IFUNC_COND_1 | |
969a32ce TR |
76 | /* Since load and store are implemented with CAS, they are not fast. */ |
77 | # undef FAST_ATOMIC_LDST_16 | |
78 | # define FAST_ATOMIC_LDST_16 0 | |
48310492 RH |
79 | # if IFUNC_ALT == 1 |
80 | # undef HAVE_ATOMIC_CAS_16 | |
81 | # define HAVE_ATOMIC_CAS_16 1 | |
82 | # endif | |
83 | #else | |
84 | # undef MAYBE_HAVE_ATOMIC_CAS_8 | |
85 | # define MAYBE_HAVE_ATOMIC_CAS_8 IFUNC_COND_1 | |
86 | # undef MAYBE_HAVE_ATOMIC_EXCHANGE_8 | |
87 | # define MAYBE_HAVE_ATOMIC_EXCHANGE_8 IFUNC_COND_1 | |
88 | # undef MAYBE_HAVE_ATOMIC_LDST_8 | |
89 | # define MAYBE_HAVE_ATOMIC_LDST_8 IFUNC_COND_1 | |
90 | # if IFUNC_ALT == 1 | |
91 | # undef HAVE_ATOMIC_CAS_8 | |
92 | # define HAVE_ATOMIC_CAS_8 1 | |
93 | # endif | |
94 | #endif | |
95 | ||
969a32ce TR |
96 | #if defined(__x86_64__) && N == 16 && IFUNC_ALT == 1 |
97 | static inline bool | |
98 | atomic_compare_exchange_n (UTYPE *mptr, UTYPE *eptr, UTYPE newval, | |
99 | bool weak_p UNUSED, int sm UNUSED, int fm UNUSED) | |
100 | { | |
101 | UTYPE cmpval = *eptr; | |
102 | UTYPE oldval = __sync_val_compare_and_swap_16 (mptr, cmpval, newval); | |
103 | if (oldval == cmpval) | |
104 | return true; | |
105 | *eptr = oldval; | |
106 | return false; | |
107 | } | |
108 | # define atomic_compare_exchange_n atomic_compare_exchange_n | |
109 | #endif /* Have CAS 16 */ | |
110 | ||
48310492 RH |
111 | #endif /* HAVE_IFUNC */ |
112 | ||
113 | #include_next <host-config.h> |