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31927af6 | 1 | /* Store register values as _Unwind_Word type in DWARF2 EH unwind context. |
83ffe9cd | 2 | Copyright (C) 2017-2023 Free Software Foundation, Inc. |
31927af6 AP |
3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published | |
8 | by the Free Software Foundation; either version 3, or (at your | |
9 | option) any later version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
15 | ||
de7a795c RS |
16 | Under Section 7 of GPL version 3, you are granted additional |
17 | permissions described in the GCC Runtime Library Exception, version | |
18 | 3.1, as published by the Free Software Foundation. | |
19 | ||
31927af6 AP |
20 | You should have received a copy of the GNU General Public License and |
21 | a copy of the GCC Runtime Library Exception along with this program; | |
22 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
23 | <http://www.gnu.org/licenses/>. */ | |
24 | ||
25 | /* Define this macro if the target stores register values as _Unwind_Word | |
26 | type in unwind context. Only enable it for ilp32. */ | |
27 | #if defined __aarch64__ && !defined __LP64__ | |
28 | # define REG_VALUE_IN_UNWIND_CONTEXT | |
29 | #endif | |
dbc3af4f RS |
30 | |
31 | /* Return the value of the pseudo VG register. This should only be | |
32 | called if we know this is an SVE host. */ | |
33 | static inline int | |
34 | aarch64_vg (void) | |
35 | { | |
36 | register int vg asm ("x0"); | |
37 | /* CNTD X0. */ | |
38 | asm (".inst 0x04e0e3e0" : "=r" (vg)); | |
39 | return vg; | |
40 | } | |
41 | ||
42 | /* Lazily provide a value for VG, so that we don't try to execute SVE | |
43 | instructions unless we know they're needed. */ | |
44 | #define DWARF_LAZY_REGISTER_VALUE(REGNO, VALUE) \ | |
45 | ((REGNO) == AARCH64_DWARF_VG && ((*VALUE) = aarch64_vg (), 1)) |