[thirdparty/gcc.git] / libgcc / config / ia64 / sfp-machine.h

#define _FP_W_TYPE_SIZE		64
#define _FP_W_TYPE		unsigned long
#define _FP_WS_TYPE		signed long
#define _FP_I_TYPE		long

typedef int TItype __attribute__ ((mode (TI)));
typedef unsigned int UTItype __attribute__ ((mode (TI)));

#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))

/* The type of the result of a floating point comparison.  This must
   match `__libgcc_cmp_return__' in GCC for the target.  */
typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
#define CMPtype __gcc_CMPtype

#define _FP_MUL_MEAT_Q(R,X,Y)				\
  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)

#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)

#define _FP_NANFRAC_S		_FP_QNANBIT_S
#define _FP_NANFRAC_D		_FP_QNANBIT_D
#define _FP_NANFRAC_E		_FP_QNANBIT_E, 0
#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0

#define _FP_KEEPNANFRACP	1
#define _FP_QNANNEGATEDP 0

#define _FP_NANSIGN_S		1
#define _FP_NANSIGN_D		1
#define _FP_NANSIGN_E		1
#define _FP_NANSIGN_Q		1

/* Here is something Intel misdesigned: the specs don't define
   the case where we have two NaNs with same mantissas, but
   different sign. Different operations pick up different NaNs.  */
#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
  do {								\
    if (_FP_FRAC_GT_##wc(X, Y)					\
	|| (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*')))	\
      {								\
	R##_s = X##_s;						\
	_FP_FRAC_COPY_##wc(R,X);				\
      }								\
    else							\
      {								\
	R##_s = Y##_s;						\
	_FP_FRAC_COPY_##wc(R,Y);				\
      }								\
    R##_c = FP_CLS_NAN;						\
  } while (0)

#define FP_EX_INVALID		0x01
#define FP_EX_DENORM		0x02
#define FP_EX_DIVZERO		0x04
#define FP_EX_OVERFLOW		0x08
#define FP_EX_UNDERFLOW		0x10
#define FP_EX_INEXACT		0x20

void __sfp_handle_exceptions (int);

#define FP_HANDLE_EXCEPTIONS			\
  do {						\
    if (__builtin_expect (_fex, 0))		\
      __sfp_handle_exceptions (_fex);		\
  } while (0);

#define FP_RND_NEAREST		0
#define FP_RND_ZERO		0xc00L
#define FP_RND_PINF		0x800L
#define FP_RND_MINF		0x400L

#define FP_RND_MASK		0xc00L

#define _FP_DECL_EX \
  unsigned long int _fcw __attribute__ ((unused)) = FP_RND_NEAREST

#define FP_INIT_ROUNDMODE					\
  do {								\
    __asm__ __volatile__ ("mov.m %0 = ar.fpsr" : "=r" (_fcw));	\
  } while (0)

#define FP_ROUNDMODE		(_fcw & FP_RND_MASK)

#define	__LITTLE_ENDIAN	1234
#define	__BIG_ENDIAN	4321

#define __BYTE_ORDER __LITTLE_ENDIAN

/* Define ALIASNAME as a strong alias for NAME.  */
#define strong_alias(name, aliasname) _strong_alias(name, aliasname)
#define _strong_alias(name, aliasname) \
  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
Commit	Line	Data
c252db20 L	1	#define _FP_W_TYPE_SIZE 64
	2	#define _FP_W_TYPE unsigned long
	3	#define _FP_WS_TYPE signed long
	4	#define _FP_I_TYPE long
	5
	6	typedef int TItype __attribute__ ((mode (TI)));
	7	typedef unsigned int UTItype __attribute__ ((mode (TI)));
	8
	9	#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
	10
	11	/* The type of the result of a floating point comparison. This must
	12	match `__libgcc_cmp_return__' in GCC for the target. */
	13	typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
	14	#define CMPtype __gcc_CMPtype
	15
79261115	16	#define _FP_MUL_MEAT_Q(R,X,Y) \
c252db20 L	17	_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
	18
	19	#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
	20
	21	#define _FP_NANFRAC_S _FP_QNANBIT_S
	22	#define _FP_NANFRAC_D _FP_QNANBIT_D
	23	#define _FP_NANFRAC_E _FP_QNANBIT_E, 0
	24	#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0
79261115 UB	25
79261115 UB	26	#define _FP_KEEPNANFRACP 1
fa1e55b0	27	#define _FP_QNANNEGATEDP 0
79261115	28
c252db20 L	29	#define _FP_NANSIGN_S 1
	30	#define _FP_NANSIGN_D 1
	31	#define _FP_NANSIGN_E 1
	32	#define _FP_NANSIGN_Q 1
	33
c252db20 L	34	/* Here is something Intel misdesigned: the specs don't define
	35	the case where we have two NaNs with same mantissas, but
	36	different sign. Different operations pick up different NaNs. */
	37	#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
	38	do { \
	39	if (_FP_FRAC_GT_##wc(X, Y) \
	40	\|\| (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' \|\| OP == '*'))) \
	41	{ \
	42	R##_s = X##_s; \
79261115	43	_FP_FRAC_COPY_##wc(R,X); \
c252db20 L	44	} \
	45	else \
	46	{ \
	47	R##_s = Y##_s; \
79261115	48	_FP_FRAC_COPY_##wc(R,Y); \
c252db20 L	49	} \
	50	R##_c = FP_CLS_NAN; \
	51	} while (0)
	52
	53	#define FP_EX_INVALID 0x01
	54	#define FP_EX_DENORM 0x02
	55	#define FP_EX_DIVZERO 0x04
	56	#define FP_EX_OVERFLOW 0x08
	57	#define FP_EX_UNDERFLOW 0x10
	58	#define FP_EX_INEXACT 0x20
	59
79261115 UB	60	void __sfp_handle_exceptions (int);
	61
	62	#define FP_HANDLE_EXCEPTIONS \
	63	do { \
a20d08fd	64	if (__builtin_expect (_fex, 0)) \
79261115 UB	65	__sfp_handle_exceptions (_fex); \
79261115 UB	66	} while (0);
c252db20 L	67
	68	#define FP_RND_NEAREST 0
	69	#define FP_RND_ZERO 0xc00L
	70	#define FP_RND_PINF 0x800L
	71	#define FP_RND_MINF 0x400L
	72
79261115 UB	73	#define FP_RND_MASK 0xc00L
79261115 UB	74
c252db20	75	#define _FP_DECL_EX \
79261115	76	unsigned long int _fcw __attribute__ ((unused)) = FP_RND_NEAREST
c252db20	77
79261115 UB	78	#define FP_INIT_ROUNDMODE \
	79	do { \
	80	__asm__ __volatile__ ("mov.m %0 = ar.fpsr" : "=r" (_fcw)); \
c252db20 L	81	} while (0)
c252db20 L	82
79261115	83	#define FP_ROUNDMODE (_fcw & FP_RND_MASK)
c252db20 L	84
	85	#define __LITTLE_ENDIAN 1234
	86	#define __BIG_ENDIAN 4321
	87
	88	#define __BYTE_ORDER __LITTLE_ENDIAN
	89
	90	/* Define ALIASNAME as a strong alias for NAME. */
	91	#define strong_alias(name, aliasname) _strong_alias(name, aliasname)
	92	#define _strong_alias(name, aliasname) \
	93	extern __typeof (name) aliasname __attribute__ ((alias (#name)));