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1# _ashlsi3.S for Lattice Mico32
2# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
3#
7adcbafe 4# Copyright (C) 2009-2022 Free Software Foundation, Inc.
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5#
6# This file is free software; you can redistribute it and/or modify it
7# under the terms of the GNU General Public License as published by the
8# Free Software Foundation; either version 3, or (at your option) any
9# later version.
10#
11# This file is distributed in the hope that it will be useful, but
12# WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14# General Public License for more details.
15#
16# Under Section 7 of GPL version 3, you are granted additional
17# permissions described in the GCC Runtime Library Exception, version
18# 3.1, as published by the Free Software Foundation.
19#
20# You should have received a copy of the GNU General Public License and
21# a copy of the GCC Runtime Library Exception along with this program;
22# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23# <http://www.gnu.org/licenses/>.
24#
25
26/* Arithmetic left shift. */
27
28 .text
29
30 .global __ashlsi3
31 .type __ashlsi3,@function
32
33 .align 4
34__ashlsi3:
35 /* Only use 5 LSBs, as that's all the h/w shifter uses. */
36 andi r2, r2, 0x1f
37 /* Get address of offset into unrolled shift loop to jump to. */
38#ifdef __PIC__
39 lw r3, (gp+got(__ashlsi3_0))
40#else
41 mvhi r3, hi(__ashlsi3_0)
42 ori r3, r3, lo(__ashlsi3_0)
43#endif
44 add r2, r2, r2
45 add r2, r2, r2
46 sub r3, r3, r2
47 b r3
48
49__ashlsi3_31:
50 add r1, r1, r1
51__ashlsi3_30:
52 add r1, r1, r1
53__ashlsi3_29:
54 add r1, r1, r1
55__ashlsi3_28:
56 add r1, r1, r1
57__ashlsi3_27:
58 add r1, r1, r1
59__ashlsi3_26:
60 add r1, r1, r1
61__ashlsi3_25:
62 add r1, r1, r1
63__ashlsi3_24:
64 add r1, r1, r1
65__ashlsi3_23:
66 add r1, r1, r1
67__ashlsi3_22:
68 add r1, r1, r1
69__ashlsi3_21:
70 add r1, r1, r1
71__ashlsi3_20:
72 add r1, r1, r1
73__ashlsi3_19:
74 add r1, r1, r1
75__ashlsi3_18:
76 add r1, r1, r1
77__ashlsi3_17:
78 add r1, r1, r1
79__ashlsi3_16:
80 add r1, r1, r1
81__ashlsi3_15:
82 add r1, r1, r1
83__ashlsi3_14:
84 add r1, r1, r1
85__ashlsi3_13:
86 add r1, r1, r1
87__ashlsi3_12:
88 add r1, r1, r1
89__ashlsi3_11:
90 add r1, r1, r1
91__ashlsi3_10:
92 add r1, r1, r1
93__ashlsi3_9:
94 add r1, r1, r1
95__ashlsi3_8:
96 add r1, r1, r1
97__ashlsi3_7:
98 add r1, r1, r1
99__ashlsi3_6:
100 add r1, r1, r1
101__ashlsi3_5:
102 add r1, r1, r1
103__ashlsi3_4:
104 add r1, r1, r1
105__ashlsi3_3:
106 add r1, r1, r1
107__ashlsi3_2:
108 add r1, r1, r1
109__ashlsi3_1:
110 add r1, r1, r1
111__ashlsi3_0:
112 ret
113
114