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99dee823 | 1 | ; Copyright (C) 2012-2021 Free Software Foundation, Inc. |
f6a83b4a DD |
2 | ; Contributed by Red Hat. |
3 | ; | |
4 | ; This file is free software; you can redistribute it and/or modify it | |
5 | ; under the terms of the GNU General Public License as published by the | |
6 | ; Free Software Foundation; either version 3, or (at your option) any | |
7 | ; later version. | |
8 | ; | |
9 | ; This file is distributed in the hope that it will be useful, but | |
10 | ; WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
12 | ; General Public License for more details. | |
13 | ; | |
14 | ; Under Section 7 of GPL version 3, you are granted additional | |
15 | ; permissions described in the GCC Runtime Library Exception, version | |
16 | ; 3.1, as published by the Free Software Foundation. | |
17 | ; | |
18 | ; You should have received a copy of the GNU General Public License and | |
19 | ; a copy of the GCC Runtime Library Exception along with this program; | |
20 | ; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
21 | ; <http://www.gnu.org/licenses/>. | |
22 | ||
23 | .text | |
24 | ||
d1b2f85f | 25 | .section .text.__mspabi_srli_n |
f6a83b4a DD |
26 | .macro _srli n |
27 | .global __mspabi_srli_\n | |
28 | __mspabi_srli_\n: | |
29 | CLRC | |
30 | RRC.W R12 | |
31 | .endm | |
32 | ||
d1b2f85f | 33 | /* Logical Right Shift - R12 -> R12. */ |
f6a83b4a DD |
34 | _srli 15 |
35 | _srli 14 | |
36 | _srli 13 | |
37 | _srli 12 | |
38 | _srli 11 | |
39 | _srli 10 | |
40 | _srli 9 | |
41 | _srli 8 | |
42 | _srli 7 | |
43 | _srli 6 | |
44 | _srli 5 | |
45 | _srli 4 | |
46 | _srli 3 | |
47 | _srli 2 | |
48 | _srli 1 | |
49 | #ifdef __MSP430X_LARGE__ | |
50 | RETA | |
51 | #else | |
52 | RET | |
53 | #endif | |
54 | ||
d1b2f85f | 55 | .section .text.__mspabi_srli |
f6a83b4a DD |
56 | 1: ADD.W #-1,R13 |
57 | CLRC | |
58 | RRC.W R12,R12 | |
59 | .global __mspabi_srli | |
60 | __mspabi_srli: | |
61 | CMP #0,R13 | |
62 | JNZ 1b | |
63 | #ifdef __MSP430X_LARGE__ | |
64 | RETA | |
65 | #else | |
66 | RET | |
67 | #endif | |
68 | ||
703e049a JL |
69 | #ifdef __MSP430X__ |
70 | .section .text.__gnu_mspabi_srlp | |
71 | 1: ADDA #-1,R13 | |
72 | CLRC | |
73 | RRCX.A R12,R12 | |
74 | .global __gnu_mspabi_srlp | |
75 | __gnu_mspabi_srlp: | |
76 | CMP #0,R13 | |
77 | JNZ 1b | |
78 | #ifdef __MSP430X_LARGE__ | |
79 | RETA | |
80 | #else | |
81 | RET | |
82 | #endif /* __MSP430X_LARGE__ */ | |
83 | #endif /* __MSP430X__ */ | |
84 | ||
d1b2f85f | 85 | /* Logical Right Shift - R12:R13 -> R12:R13. */ |
f6a83b4a | 86 | |
d1b2f85f | 87 | .section .text.__mspabi_srll_n |
f6a83b4a DD |
88 | .macro _srll n |
89 | .global __mspabi_srll_\n | |
90 | __mspabi_srll_\n: | |
91 | CLRC | |
92 | RRC.W R13 | |
93 | RRC.W R12 | |
94 | .endm | |
95 | ||
96 | _srll 15 | |
97 | _srll 14 | |
98 | _srll 13 | |
99 | _srll 12 | |
100 | _srll 11 | |
101 | _srll 10 | |
102 | _srll 9 | |
103 | _srll 8 | |
104 | _srll 7 | |
105 | _srll 6 | |
106 | _srll 5 | |
107 | _srll 4 | |
108 | _srll 3 | |
109 | _srll 2 | |
110 | _srll 1 | |
111 | #ifdef __MSP430X_LARGE__ | |
112 | RETA | |
113 | #else | |
114 | RET | |
115 | #endif | |
116 | ||
d1b2f85f | 117 | .section .text.__mspabi_srll |
f6a83b4a DD |
118 | 1: ADD.W #-1,R14 |
119 | CLRC | |
120 | RRC.W R13 | |
121 | RRC.W R12 | |
122 | .global __mspabi_srll | |
123 | __mspabi_srll: | |
124 | CMP #0,R14 | |
125 | JNZ 1b | |
126 | #ifdef __MSP430X_LARGE__ | |
127 | RETA | |
128 | #else | |
129 | RET | |
130 | #endif | |
0fcc78f7 JL |
131 | |
132 | /* Logical Right Shift - R8:R11 -> R12:R15 | |
133 | A 64-bit argument would normally be passed in R12:R15, but __mspabi_srlll has | |
134 | special conventions, so the 64-bit value to shift is passed in R8:R11. | |
135 | According to the MSPABI, the shift amount is a 64-bit value in R12:R15, but | |
136 | we only use the low word in R12. */ | |
137 | ||
138 | .section .text.__mspabi_srlll | |
139 | .global __mspabi_srlll | |
140 | __mspabi_srlll: | |
141 | MOV R11, R15 ; Free up R11 first | |
142 | MOV R12, R11 ; Save the shift amount in R11 | |
143 | MOV R10, R14 | |
144 | MOV R9, R13 | |
145 | MOV R8, R12 | |
146 | CMP #0,R11 | |
147 | JNZ 1f | |
148 | #ifdef __MSP430X_LARGE__ | |
149 | RETA | |
150 | #else | |
151 | RET | |
152 | #endif | |
153 | 1: | |
154 | CLRC | |
155 | RRC R15 | |
156 | RRC R14 | |
157 | RRC R13 | |
158 | RRC R12 | |
159 | ADD #-1,R11 | |
160 | JNZ 1b | |
161 | #ifdef __MSP430X_LARGE__ | |
162 | RETA | |
163 | #else | |
164 | RET | |
165 | #endif |