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83ffe9cd | 1 | /* Copyright (C) 2011-2023 Free Software Foundation, Inc. |
aebac0ca RH |
2 | Contributed by Richard Henderson <rth@redhat.com>. |
3 | ||
4 | This file is part of the GNU Transactional Memory Library (libitm). | |
5 | ||
6 | Libitm is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | Libitm is distributed in the hope that it will be useful, but WITHOUT ANY | |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS | |
13 | FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | Under Section 7 of GPL version 3, you are granted additional | |
17 | permissions described in the GCC Runtime Library Exception, version | |
18 | 3.1, as published by the Free Software Foundation. | |
19 | ||
20 | You should have received a copy of the GNU General Public License and | |
21 | a copy of the GCC Runtime Library Exception along with this program; | |
22 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
23 | <http://www.gnu.org/licenses/>. */ | |
24 | ||
25 | #include "hwcap.h" | |
26 | #include "asmcfi.h" | |
27 | ||
28 | .syntax unified | |
29 | ||
30 | #if defined(__thumb2__) | |
31 | # define PC_OFS 4 | |
32 | .thumb | |
33 | .thumb_func | |
34 | #else | |
35 | # define PC_OFS 8 | |
36 | #endif | |
37 | ||
38 | #if defined (__thumb2__) && defined(__ARM_ARCH_6T2__) | |
39 | # define HAVE_MOVT | |
40 | .arch armv6t2 | |
41 | #elif defined (__ARM_ARCH_7A__) | |
42 | # define HAVE_MOVT | |
43 | .arch armv7-a | |
44 | #elif defined (__ARM_ARCH_7R__) | |
45 | # define HAVE_MOVT | |
46 | .arch armv7-r | |
47 | #elif defined (__ARM_ARCH_7M__) | |
48 | # define HAVE_MOVT | |
49 | .arch armv7-m | |
50 | #endif | |
51 | ||
a360a359 CL |
52 | #if defined(__FDPIC__) |
53 | .macro ldaddr reg, addr | |
54 | ldr \reg, 99f | |
55 | add \reg, \reg, r9 | |
56 | .subsection 1 | |
57 | .align 2 | |
58 | 99: .word \addr(GOTOFF) | |
59 | .subsection 0 | |
60 | .endm | |
61 | #elif defined(HAVE_MOVT) && defined(PIC) | |
aebac0ca RH |
62 | .macro ldaddr reg, addr |
63 | movw \reg, #:lower16:(\addr - (98f + PC_OFS)) | |
64 | movt \reg, #:upper16:(\addr - (98f + PC_OFS)) | |
65 | 98: add \reg, \reg, pc | |
66 | .endm | |
67 | #elif defined(HAVE_MOVT) | |
68 | .macro ldaddr reg, addr | |
69 | movw \reg, #:lower16:\addr | |
70 | movt \reg, #:upper16:\addr | |
71 | .endm | |
72 | #elif defined(PIC) | |
73 | .macro ldaddr reg, addr | |
74 | ldr \reg, 99f | |
75 | 98: add \reg, \reg, pc | |
76 | .subsection 1 | |
77 | .align 2 | |
78 | 99: .word \addr - (98b + PC_OFS) | |
79 | .subsection 0 | |
80 | .endm | |
81 | #else | |
82 | .macro ldaddr reg, addr | |
83 | ldr \reg, =\addr | |
84 | .endm | |
85 | #endif | |
86 | ||
87 | .text | |
88 | .align 2 | |
89 | .global _ITM_beginTransaction | |
90 | .type _ITM_beginTransaction, %function | |
91 | ||
92 | _ITM_beginTransaction: | |
93 | .fnstart | |
94 | cfi_startproc | |
95 | mov ip, sp | |
96 | push { r4-r11, ip, lr } | |
97 | .save { lr } | |
98 | .pad #(9*4) | |
99 | cfi_adjust_cfa_offset(40) | |
100 | cfi_rel_offset(lr, 36) | |
101 | sub sp, sp, #(14*8) | |
102 | .pad #(14*8) | |
103 | cfi_adjust_cfa_offset(14*8) | |
104 | ||
105 | ldaddr r2, GTM_hwcap | |
106 | ldr r2, [r2] | |
107 | ||
108 | /* Store the VFP registers. Don't use VFP instructions directly | |
109 | because this code is used in non-VFP multilibs. */ | |
110 | tst r2, #HWCAP_ARM_VFP | |
111 | beq 1f | |
112 | stc p11, cr8, [sp], {16} /* vstm sp, {d8-d15} */ | |
113 | 1: | |
114 | /* Save the call-preserved iWMMXt registers. */ | |
115 | tst r2, #HWCAP_ARM_IWMMXT | |
116 | beq 1f | |
117 | stcl p1, cr10, [sp, #64] /* wstrd wr10, [sp, #64] */ | |
118 | stcl p1, cr11, [sp, #72] | |
119 | stcl p1, cr12, [sp, #80] | |
120 | stcl p1, cr13, [sp, #88] | |
121 | stcl p1, cr14, [sp, #96] | |
122 | stcl p1, cr15, [sp, #104] | |
123 | 1: | |
124 | /* Invoke GTM_begin_transaction with the struct we just built. */ | |
125 | mov r1, sp | |
126 | bl GTM_begin_transaction | |
127 | ||
128 | /* Return; we don't need to restore any of the call-saved regs. */ | |
129 | add sp, sp, #(14*8 + 9*4) | |
130 | cfi_adjust_cfa_offset(-(14*8 + 9*4)) | |
131 | pop { pc } | |
132 | .fnend | |
133 | cfi_endproc | |
134 | .size _ITM_beginTransaction, . - _ITM_beginTransaction | |
135 | ||
136 | .align 2 | |
137 | .global GTM_longjmp | |
138 | .hidden GTM_longjmp | |
139 | .type GTM_longjmp, %function | |
140 | ||
141 | GTM_longjmp: | |
142 | cfi_startproc | |
143 | ldaddr r2, GTM_hwcap | |
144 | ldr r2, [r2] | |
145 | ||
146 | tst r2, #HWCAP_ARM_VFP | |
147 | beq 1f | |
148 | ldc p11, cr8, [r1], {16} /* vldmia r1, {d8-d15} */ | |
149 | 1: | |
150 | tst r2, #HWCAP_ARM_IWMMXT | |
151 | beq 1f | |
152 | ldcl p1, cr10, [r1, #64] /* wldrd wr10, [r1, #64] */ | |
153 | ldcl p1, cr11, [r1, #72] | |
154 | ldcl p1, cr12, [r1, #80] | |
155 | ldcl p1, cr13, [r1, #88] | |
156 | ldcl p1, cr14, [r1, #96] | |
157 | ldcl p1, cr15, [r1, #104] | |
158 | 1: | |
159 | add r1, r1, #(14*8) /* Skip both VFP and iWMMXt blocks */ | |
160 | #ifdef __thumb2__ | |
161 | ldm r1, { r4-r11, ip, lr } | |
162 | cfi_def_cfa(ip, 0) | |
163 | mov sp, ip | |
164 | bx lr | |
165 | #else | |
166 | ldm r1, { r4-r11, sp, pc } | |
167 | #endif | |
168 | cfi_endproc | |
169 | .size GTM_longjmp, . - GTM_longjmp | |
170 | ||
171 | #ifdef __linux__ | |
172 | .section .note.GNU-stack, "", %progbits | |
173 | #endif |