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f1717362 | 1 | /* Copyright (C) 2008-2016 Free Software Foundation, Inc. |
4c0315d0 | 2 | Contributed by Richard Henderson <rth@redhat.com>. |
3 | ||
4 | This file is part of the GNU Transactional Memory Library (libitm). | |
5 | ||
6 | Libitm is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | Libitm is distributed in the hope that it will be useful, but WITHOUT ANY | |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS | |
13 | FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | Under Section 7 of GPL version 3, you are granted additional | |
17 | permissions described in the GCC Runtime Library Exception, version | |
18 | 3.1, as published by the Free Software Foundation. | |
19 | ||
20 | You should have received a copy of the GNU General Public License and | |
21 | a copy of the GCC Runtime Library Exception along with this program; | |
22 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
23 | <http://www.gnu.org/licenses/>. */ | |
24 | ||
5b35a791 | 25 | // We'll be using some of the cpu builtins, and their associated types. |
26 | #include <x86intrin.h> | |
27 | #include <cpuid.h> | |
28 | ||
4c0315d0 | 29 | namespace GTM HIDDEN { |
30 | ||
4c0315d0 | 31 | /* ??? This doesn't work for Win64. */ |
32 | typedef struct gtm_jmpbuf | |
33 | { | |
34 | void *cfa; | |
63c3ac77 | 35 | #ifdef __x86_64__ |
0c991e10 | 36 | unsigned long long rbx; |
37 | unsigned long long rbp; | |
38 | unsigned long long r12; | |
39 | unsigned long long r13; | |
40 | unsigned long long r14; | |
41 | unsigned long long r15; | |
42 | unsigned long long rip; | |
4c0315d0 | 43 | #else |
4c0315d0 | 44 | unsigned long ebx; |
45 | unsigned long esi; | |
46 | unsigned long edi; | |
47 | unsigned long ebp; | |
48 | unsigned long eip; | |
4c0315d0 | 49 | #endif |
63c3ac77 | 50 | } gtm_jmpbuf; |
4c0315d0 | 51 | |
52 | /* x86 doesn't require strict alignment for the basic types. */ | |
53 | #define STRICT_ALIGNMENT 0 | |
54 | ||
4c0315d0 | 55 | /* The size of one line in hardware caches (in bytes). */ |
56 | #define HW_CACHELINE_SIZE 64 | |
57 | ||
58 | ||
59 | static inline void | |
60 | cpu_relax (void) | |
61 | { | |
44bfcc4f | 62 | __builtin_ia32_pause (); |
4c0315d0 | 63 | } |
64 | ||
5b35a791 | 65 | // Use Intel RTM if supported by the assembler. |
66 | // See gtm_thread::begin_transaction for how these functions are used. | |
67 | #ifdef HAVE_AS_RTM | |
68 | #define USE_HTM_FASTPATH | |
f20d0394 | 69 | #ifdef __x86_64__ |
70 | // Use the custom fastpath in ITM_beginTransaction. | |
71 | #define HTM_CUSTOM_FASTPATH | |
72 | #endif | |
4c0315d0 | 73 | |
5b35a791 | 74 | static inline bool |
75 | htm_available () | |
76 | { | |
77 | const unsigned cpuid_rtm = bit_RTM; | |
78 | if (__get_cpuid_max (0, NULL) >= 7) | |
79 | { | |
80 | unsigned a, b, c, d; | |
81 | __cpuid_count (7, 0, a, b, c, d); | |
82 | if (b & cpuid_rtm) | |
83 | return true; | |
84 | } | |
85 | return false; | |
86 | } | |
87 | ||
88 | static inline uint32_t | |
89 | htm_init () | |
90 | { | |
91 | // Maximum number of times we try to execute a transaction as a HW | |
92 | // transaction. | |
93 | // ??? Why 2? Any offline or runtime tuning necessary? | |
94 | return htm_available () ? 2 : 0; | |
95 | } | |
96 | ||
97 | static inline uint32_t | |
98 | htm_begin () | |
99 | { | |
100 | return _xbegin(); | |
101 | } | |
102 | ||
103 | static inline bool | |
104 | htm_begin_success (uint32_t begin_ret) | |
105 | { | |
106 | return begin_ret == _XBEGIN_STARTED; | |
107 | } | |
108 | ||
109 | static inline void | |
110 | htm_commit () | |
111 | { | |
112 | _xend(); | |
113 | } | |
114 | ||
115 | static inline void | |
116 | htm_abort () | |
117 | { | |
118 | // ??? According to a yet unpublished ABI rule, 0xff is reserved and | |
119 | // supposed to signal a busy lock. Source: andi.kleen@intel.com | |
120 | _xabort(0xff); | |
121 | } | |
122 | ||
123 | static inline bool | |
124 | htm_abort_should_retry (uint32_t begin_ret) | |
125 | { | |
126 | return begin_ret & _XABORT_RETRY; | |
127 | } | |
27ca454e | 128 | |
129 | /* Returns true iff a hardware transaction is currently being executed. */ | |
130 | static inline bool | |
131 | htm_transaction_active () | |
132 | { | |
133 | return _xtest() != 0; | |
134 | } | |
4c0315d0 | 135 | #endif |
5b35a791 | 136 | |
137 | ||
138 | } // namespace GTM |